2 * Copyright (c) 2017-2018 Cavium, Inc.
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32 #ifndef __ECORE_INT_H__
33 #define __ECORE_INT_H__
36 #include "ecore_int_api.h"
38 #define ECORE_CAU_DEF_RX_TIMER_RES 0
39 #define ECORE_CAU_DEF_TX_TIMER_RES 0
41 #define ECORE_SB_ATT_IDX 0x0001
42 #define ECORE_SB_EVENT_MASK 0x0003
44 #define SB_ALIGNED_SIZE(p_hwfn) \
45 ALIGNED_TYPE_SIZE(struct status_block, p_hwfn)
47 #define ECORE_SB_INVALID_IDX 0xffff
49 struct ecore_igu_block
52 #define ECORE_IGU_STATUS_FREE 0x01
53 #define ECORE_IGU_STATUS_VALID 0x02
54 #define ECORE_IGU_STATUS_PF 0x04
55 #define ECORE_IGU_STATUS_DSB 0x08
61 /* Index inside IGU [meant for back reference] */
64 struct ecore_sb_info *sb_info;
69 struct ecore_igu_block entry[MAX_TOT_SB_PER_PATH];
72 /* The numbers can shift when using APIs to switch SBs between PF and
75 struct ecore_sb_cnt_info usage;
77 /* Determine whether we can shift SBs between VFs and PFs */
78 bool b_allow_pf_vf_change;
82 * @brief - Make sure the IGU CAM reflects the resources provided by MFW
87 int ecore_int_igu_reset_cam(struct ecore_hwfn *p_hwfn,
88 struct ecore_ptt *p_ptt);
91 * @brief - Make sure IGU CAM reflects the default resources once again,
92 * starting with a 'dirty' SW database.
96 int ecore_int_igu_reset_cam_default(struct ecore_hwfn *p_hwfn,
97 struct ecore_ptt *p_ptt);
100 * @brief Translate the weakly-defined client sb-id into an IGU sb-id
103 * @param sb_id - user provided sb_id
105 * @return an index inside IGU CAM where the SB resides
107 u16 ecore_get_igu_sb_id(struct ecore_hwfn *p_hwfn, u16 sb_id);
110 * @brief return a pointer to an unused valid SB
113 * @param b_is_pf - true iff we want a SB belonging to a PF
115 * @return point to an igu_block, OSAL_NULL if none is available
117 struct ecore_igu_block *
118 ecore_get_igu_free_sb(struct ecore_hwfn *p_hwfn, bool b_is_pf);
120 /* TODO Names of function may change... */
121 void ecore_int_igu_init_pure_rt(struct ecore_hwfn *p_hwfn,
122 struct ecore_ptt *p_ptt,
126 void ecore_int_igu_init_rt(struct ecore_hwfn *p_hwfn);
129 * @brief ecore_int_igu_read_cam - Reads the IGU CAM.
130 * This function needs to be called during hardware
131 * prepare. It reads the info from igu cam to know which
132 * status block is the default / base status block etc.
137 * @return enum _ecore_status_t
139 enum _ecore_status_t ecore_int_igu_read_cam(struct ecore_hwfn *p_hwfn,
140 struct ecore_ptt *p_ptt);
142 typedef enum _ecore_status_t(*ecore_int_comp_cb_t)(struct ecore_hwfn *p_hwfn,
145 * @brief ecore_int_register_cb - Register callback func for
146 * slowhwfn statusblock.
148 * Every protocol that uses the slowhwfn status block
149 * should register a callback function that will be called
150 * once there is an update of the sp status block.
153 * @param comp_cb - function to be called when there is an
154 * interrupt on the sp sb
156 * @param cookie - passed to the callback function
157 * @param sb_idx - OUT parameter which gives the chosen index
159 * @param p_fw_cons - pointer to the actual address of the
160 * consumer for this protocol.
162 * @return enum _ecore_status_t
164 enum _ecore_status_t ecore_int_register_cb(struct ecore_hwfn *p_hwfn,
165 ecore_int_comp_cb_t comp_cb,
170 * @brief ecore_int_unregister_cb - Unregisters callback
171 * function from sp sb.
172 * Partner of ecore_int_register_cb -> should be called
173 * when no longer required.
178 * @return enum _ecore_status_t
180 enum _ecore_status_t ecore_int_unregister_cb(struct ecore_hwfn *p_hwfn,
184 * @brief ecore_int_get_sp_sb_id - Get the slowhwfn sb id.
190 u16 ecore_int_get_sp_sb_id(struct ecore_hwfn *p_hwfn);
193 * @brief Status block cleanup. Should be called for each status
194 * block that will be used -> both PF / VF
198 * @param sb_id - igu status block id
199 * @param opaque - opaque fid of the sb owner.
200 * @param cleanup_set - set(1) / clear(0)
202 void ecore_int_igu_init_pure_rt_single(struct ecore_hwfn *p_hwfn,
203 struct ecore_ptt *p_ptt,
209 * @brief ecore_int_cau_conf - configure cau for a given status
219 void ecore_int_cau_conf_sb(struct ecore_hwfn *p_hwfn,
220 struct ecore_ptt *p_ptt,
227 * @brief ecore_int_alloc
232 * @return enum _ecore_status_t
234 enum _ecore_status_t ecore_int_alloc(struct ecore_hwfn *p_hwfn,
235 struct ecore_ptt *p_ptt);
238 * @brief ecore_int_free
242 void ecore_int_free(struct ecore_hwfn *p_hwfn);
245 * @brief ecore_int_setup
250 void ecore_int_setup(struct ecore_hwfn *p_hwfn,
251 struct ecore_ptt *p_ptt);
254 * @brief - Enable Interrupt & Attention for hw function
260 * @return enum _ecore_status_t
262 enum _ecore_status_t ecore_int_igu_enable(struct ecore_hwfn *p_hwfn,
263 struct ecore_ptt *p_ptt,
264 enum ecore_int_mode int_mode);
267 * @brief - Initialize CAU status block entry
275 void ecore_init_cau_sb_entry(struct ecore_hwfn *p_hwfn,
276 struct cau_sb_entry *p_sb_entry, u8 pf_id,
277 u16 vf_number, u8 vf_valid);
279 enum _ecore_status_t ecore_int_set_timer_res(struct ecore_hwfn *p_hwfn,
280 struct ecore_ptt *p_ptt,
281 u8 timer_res, u16 sb_id, bool tx);
283 #define ECORE_MAPPING_MEMORY_SIZE(dev) \
284 ((CHIP_REV_IS_SLOW(dev) && (!(dev)->b_is_emul_full)) ? \
285 136 : NUM_OF_SBS(dev))
287 #define ECORE_MAPPING_MEMORY_SIZE(dev) NUM_OF_SBS(dev)
290 #endif /* __ECORE_INT_H__ */