2 * Copyright (c) 2006 Sam Leffler, Errno Consulting
3 * Copyright (c) 2008-2009 Weongyo Jeong <weongyo@freebsd.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer,
11 * without modification.
12 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
13 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
14 * redistribution must be conditioned upon including a substantially
15 * similar Disclaimer requirement for further binary redistribution.
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
21 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
22 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
23 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
26 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
28 * THE POSSIBILITY OF SUCH DAMAGES.
32 * This driver is distantly derived from a driver of the same name
33 * by Damien Bergamini. The original copyright is included below:
36 * Damien Bergamini <damien.bergamini@free.fr>
38 * Permission to use, copy, modify, and distribute this software for any
39 * purpose with or without fee is hereby granted, provided that the above
40 * copyright notice and this permission notice appear in all copies.
42 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
43 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
44 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
45 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
46 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
47 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
48 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
51 #include <sys/cdefs.h>
52 __FBSDID("$FreeBSD$");
55 * Driver for Atheros AR5523 USB parts.
57 * The driver requires firmware to be loaded into the device. This
58 * is done on device discovery from a user application (uathload)
59 * that is launched by devd when a device with suitable product ID
60 * is recognized. Once firmware has been loaded the device will
61 * reset the USB port and re-attach with the original product ID+1
62 * and this driver will be attached. The firmware is licensed for
63 * general use (royalty free) and may be incorporated in products.
64 * Note that the firmware normally packaged with the NDIS drivers
65 * for these devices does not work in this way and so does not work
68 #include <sys/param.h>
69 #include <sys/sockio.h>
70 #include <sys/sysctl.h>
72 #include <sys/mutex.h>
74 #include <sys/kernel.h>
75 #include <sys/socket.h>
76 #include <sys/systm.h>
77 #include <sys/malloc.h>
78 #include <sys/module.h>
80 #include <sys/endian.h>
83 #include <machine/bus.h>
84 #include <machine/resource.h>
89 #include <net/if_arp.h>
90 #include <net/ethernet.h>
91 #include <net/if_dl.h>
92 #include <net/if_media.h>
93 #include <net/if_types.h>
96 #include <netinet/in.h>
97 #include <netinet/in_systm.h>
98 #include <netinet/in_var.h>
99 #include <netinet/if_ether.h>
100 #include <netinet/ip.h>
103 #include <net80211/ieee80211_var.h>
104 #include <net80211/ieee80211_regdomain.h>
105 #include <net80211/ieee80211_radiotap.h>
107 #include <dev/usb/usb.h>
108 #include <dev/usb/usbdi.h>
111 #include <dev/usb/wlan/if_uathreg.h>
112 #include <dev/usb/wlan/if_uathvar.h>
114 static SYSCTL_NODE(_hw_usb, OID_AUTO, uath, CTLFLAG_RW, 0, "USB Atheros");
116 static int uath_countrycode = CTRY_DEFAULT; /* country code */
117 SYSCTL_INT(_hw_usb_uath, OID_AUTO, countrycode, CTLFLAG_RW | CTLFLAG_TUN, &uath_countrycode,
119 TUNABLE_INT("hw.usb.uath.countrycode", &uath_countrycode);
120 static int uath_regdomain = 0; /* regulatory domain */
121 SYSCTL_INT(_hw_usb_uath, OID_AUTO, regdomain, CTLFLAG_RD, &uath_regdomain,
122 0, "regulatory domain");
126 SYSCTL_INT(_hw_usb_uath, OID_AUTO, debug, CTLFLAG_RW | CTLFLAG_TUN, &uath_debug, 0,
128 TUNABLE_INT("hw.usb.uath.debug", &uath_debug);
130 UATH_DEBUG_XMIT = 0x00000001, /* basic xmit operation */
131 UATH_DEBUG_XMIT_DUMP = 0x00000002, /* xmit dump */
132 UATH_DEBUG_RECV = 0x00000004, /* basic recv operation */
133 UATH_DEBUG_TX_PROC = 0x00000008, /* tx ISR proc */
134 UATH_DEBUG_RX_PROC = 0x00000010, /* rx ISR proc */
135 UATH_DEBUG_RECV_ALL = 0x00000020, /* trace all frames (beacons) */
136 UATH_DEBUG_INIT = 0x00000040, /* initialization of dev */
137 UATH_DEBUG_DEVCAP = 0x00000080, /* dev caps */
138 UATH_DEBUG_CMDS = 0x00000100, /* commands */
139 UATH_DEBUG_CMDS_DUMP = 0x00000200, /* command buffer dump */
140 UATH_DEBUG_RESET = 0x00000400, /* reset processing */
141 UATH_DEBUG_STATE = 0x00000800, /* 802.11 state transitions */
142 UATH_DEBUG_MULTICAST = 0x00001000, /* multicast */
143 UATH_DEBUG_WME = 0x00002000, /* WME */
144 UATH_DEBUG_CHANNEL = 0x00004000, /* channel */
145 UATH_DEBUG_RATES = 0x00008000, /* rates */
146 UATH_DEBUG_CRYPTO = 0x00010000, /* crypto */
147 UATH_DEBUG_LED = 0x00020000, /* LED */
148 UATH_DEBUG_ANY = 0xffffffff
150 #define DPRINTF(sc, m, fmt, ...) do { \
151 if (sc->sc_debug & (m)) \
152 printf(fmt, __VA_ARGS__); \
155 #define DPRINTF(sc, m, fmt, ...) do { \
160 /* unaligned little endian access */
161 #define LE_READ_2(p) \
163 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8)))
164 #define LE_READ_4(p) \
166 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8) | \
167 (((u_int8_t *)(p))[2] << 16) | (((u_int8_t *)(p))[3] << 24)))
169 /* recognized device vendors/products */
170 static const STRUCT_USB_HOST_ID uath_devs[] = {
171 #define UATH_DEV(v,p) { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) }
172 UATH_DEV(ACCTON, SMCWUSBTG2),
173 UATH_DEV(ATHEROS, AR5523),
174 UATH_DEV(ATHEROS2, AR5523_1),
175 UATH_DEV(ATHEROS2, AR5523_2),
176 UATH_DEV(ATHEROS2, AR5523_3),
177 UATH_DEV(CONCEPTRONIC, AR5523_1),
178 UATH_DEV(CONCEPTRONIC, AR5523_2),
179 UATH_DEV(DLINK, DWLAG122),
180 UATH_DEV(DLINK, DWLAG132),
181 UATH_DEV(DLINK, DWLG132),
182 UATH_DEV(DLINK2, DWA120),
183 UATH_DEV(GIGASET, AR5523),
184 UATH_DEV(GIGASET, SMCWUSBTG),
185 UATH_DEV(GLOBALSUN, AR5523_1),
186 UATH_DEV(GLOBALSUN, AR5523_2),
187 UATH_DEV(NETGEAR, WG111U),
188 UATH_DEV(NETGEAR3, WG111T),
189 UATH_DEV(NETGEAR3, WPN111),
190 UATH_DEV(NETGEAR3, WPN111_2),
191 UATH_DEV(UMEDIA, TEW444UBEU),
192 UATH_DEV(UMEDIA, AR5523_2),
193 UATH_DEV(WISTRONNEWEB, AR5523_1),
194 UATH_DEV(WISTRONNEWEB, AR5523_2),
195 UATH_DEV(ZCOM, AR5523)
199 static usb_callback_t uath_intr_rx_callback;
200 static usb_callback_t uath_intr_tx_callback;
201 static usb_callback_t uath_bulk_rx_callback;
202 static usb_callback_t uath_bulk_tx_callback;
204 static const struct usb_config uath_usbconfig[UATH_N_XFERS] = {
208 .direction = UE_DIR_IN,
209 .bufsize = UATH_MAX_CMDSZ,
214 .callback = uath_intr_rx_callback
219 .direction = UE_DIR_OUT,
220 .bufsize = UATH_MAX_CMDSZ * UATH_CMD_LIST_COUNT,
222 .force_short_xfer = 1,
225 .callback = uath_intr_tx_callback,
226 .timeout = UATH_CMD_TIMEOUT
231 .direction = UE_DIR_IN,
238 .callback = uath_bulk_rx_callback
243 .direction = UE_DIR_OUT,
244 .bufsize = UATH_MAX_TXBUFSZ * UATH_TX_DATA_LIST_COUNT,
246 .force_short_xfer = 1,
249 .callback = uath_bulk_tx_callback,
250 .timeout = UATH_DATA_TIMEOUT
254 static struct ieee80211vap *uath_vap_create(struct ieee80211com *,
255 const char [IFNAMSIZ], int, enum ieee80211_opmode, int,
256 const uint8_t [IEEE80211_ADDR_LEN],
257 const uint8_t [IEEE80211_ADDR_LEN]);
258 static void uath_vap_delete(struct ieee80211vap *);
259 static int uath_alloc_cmd_list(struct uath_softc *, struct uath_cmd []);
260 static void uath_free_cmd_list(struct uath_softc *, struct uath_cmd []);
261 static int uath_host_available(struct uath_softc *);
262 static int uath_get_capability(struct uath_softc *, uint32_t, uint32_t *);
263 static int uath_get_devcap(struct uath_softc *);
264 static struct uath_cmd *
265 uath_get_cmdbuf(struct uath_softc *);
266 static int uath_cmd_read(struct uath_softc *, uint32_t, const void *,
267 int, void *, int, int);
268 static int uath_cmd_write(struct uath_softc *, uint32_t, const void *,
270 static void uath_stat(void *);
272 static void uath_dump_cmd(const uint8_t *, int, char);
276 static int uath_get_devstatus(struct uath_softc *,
277 uint8_t macaddr[IEEE80211_ADDR_LEN]);
278 static int uath_get_status(struct uath_softc *, uint32_t, void *, int);
279 static int uath_alloc_rx_data_list(struct uath_softc *);
280 static int uath_alloc_tx_data_list(struct uath_softc *);
281 static void uath_free_rx_data_list(struct uath_softc *);
282 static void uath_free_tx_data_list(struct uath_softc *);
283 static int uath_init_locked(void *);
284 static void uath_init(void *);
285 static void uath_stop_locked(struct ifnet *);
286 static void uath_stop(struct ifnet *);
287 static int uath_ioctl(struct ifnet *, u_long, caddr_t);
288 static void uath_start(struct ifnet *);
289 static int uath_raw_xmit(struct ieee80211_node *, struct mbuf *,
290 const struct ieee80211_bpf_params *);
291 static void uath_scan_start(struct ieee80211com *);
292 static void uath_scan_end(struct ieee80211com *);
293 static void uath_set_channel(struct ieee80211com *);
294 static void uath_update_mcast(struct ifnet *);
295 static void uath_update_promisc(struct ifnet *);
296 static int uath_config(struct uath_softc *, uint32_t, uint32_t);
297 static int uath_config_multi(struct uath_softc *, uint32_t, const void *,
299 static int uath_switch_channel(struct uath_softc *,
300 struct ieee80211_channel *);
301 static int uath_set_rxfilter(struct uath_softc *, uint32_t, uint32_t);
302 static void uath_watchdog(void *);
303 static void uath_abort_xfers(struct uath_softc *);
304 static int uath_dataflush(struct uath_softc *);
305 static int uath_cmdflush(struct uath_softc *);
306 static int uath_flush(struct uath_softc *);
307 static int uath_set_ledstate(struct uath_softc *, int);
308 static int uath_set_chan(struct uath_softc *, struct ieee80211_channel *);
309 static int uath_reset_tx_queues(struct uath_softc *);
310 static int uath_wme_init(struct uath_softc *);
311 static struct uath_data *
312 uath_getbuf(struct uath_softc *);
313 static int uath_newstate(struct ieee80211vap *, enum ieee80211_state,
315 static int uath_set_key(struct uath_softc *,
316 const struct ieee80211_key *, int);
317 static int uath_set_keys(struct uath_softc *, struct ieee80211vap *);
318 static void uath_sysctl_node(struct uath_softc *);
321 uath_match(device_t dev)
323 struct usb_attach_arg *uaa = device_get_ivars(dev);
325 if (uaa->usb_mode != USB_MODE_HOST)
327 if (uaa->info.bConfigIndex != UATH_CONFIG_INDEX)
329 if (uaa->info.bIfaceIndex != UATH_IFACE_INDEX)
332 return (usbd_lookup_id_by_uaa(uath_devs, sizeof(uath_devs), uaa));
336 uath_attach(device_t dev)
338 struct uath_softc *sc = device_get_softc(dev);
339 struct usb_attach_arg *uaa = device_get_ivars(dev);
340 struct ieee80211com *ic;
342 uint8_t bands, iface_index = UATH_IFACE_INDEX; /* XXX */
344 uint8_t macaddr[IEEE80211_ADDR_LEN];
347 sc->sc_udev = uaa->device;
349 sc->sc_debug = uath_debug;
351 device_set_usb_desc(dev);
354 * Only post-firmware devices here.
356 mtx_init(&sc->sc_mtx, device_get_nameunit(sc->sc_dev), MTX_NETWORK_LOCK,
358 callout_init(&sc->stat_ch, 0);
359 callout_init_mtx(&sc->watchdog_ch, &sc->sc_mtx, 0);
361 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer,
362 uath_usbconfig, UATH_N_XFERS, sc, &sc->sc_mtx);
364 device_printf(dev, "could not allocate USB transfers, "
365 "err=%s\n", usbd_errstr(error));
370 usbd_xfer_get_frame_buffer(sc->sc_xfer[UATH_INTR_TX], 0);
372 usbd_xfer_get_frame_buffer(sc->sc_xfer[UATH_BULK_TX], 0);
375 * Setup buffers for firmware commands.
377 error = uath_alloc_cmd_list(sc, sc->sc_cmd);
379 device_printf(sc->sc_dev,
380 "could not allocate Tx command list\n");
385 * We're now ready to send+receive firmware commands.
388 error = uath_host_available(sc);
390 device_printf(sc->sc_dev, "could not initialize adapter\n");
393 error = uath_get_devcap(sc);
395 device_printf(sc->sc_dev,
396 "could not get device capabilities\n");
401 /* Create device sysctl node. */
402 uath_sysctl_node(sc);
404 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
406 device_printf(sc->sc_dev, "can not allocate ifnet\n");
412 error = uath_get_devstatus(sc, macaddr);
414 device_printf(sc->sc_dev, "could not get device status\n");
419 * Allocate xfers for Rx/Tx data pipes.
421 error = uath_alloc_rx_data_list(sc);
423 device_printf(sc->sc_dev, "could not allocate Rx data list\n");
426 error = uath_alloc_tx_data_list(sc);
428 device_printf(sc->sc_dev, "could not allocate Tx data list\n");
434 if_initname(ifp, "uath", device_get_unit(sc->sc_dev));
435 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
436 ifp->if_init = uath_init;
437 ifp->if_ioctl = uath_ioctl;
438 ifp->if_start = uath_start;
439 /* XXX UATH_TX_DATA_LIST_COUNT */
440 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
441 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
442 IFQ_SET_READY(&ifp->if_snd);
446 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
447 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
449 /* set device capabilities */
451 IEEE80211_C_STA | /* station mode */
452 IEEE80211_C_MONITOR | /* monitor mode supported */
453 IEEE80211_C_TXPMGT | /* tx power management */
454 IEEE80211_C_SHPREAMBLE | /* short preamble supported */
455 IEEE80211_C_SHSLOT | /* short slot time supported */
456 IEEE80211_C_WPA | /* 802.11i */
457 IEEE80211_C_BGSCAN | /* capable of bg scanning */
458 IEEE80211_C_TXFRAG; /* handle tx frags */
460 /* put a regulatory domain to reveal informations. */
461 uath_regdomain = sc->sc_devcap.regDomain;
464 setbit(&bands, IEEE80211_MODE_11B);
465 setbit(&bands, IEEE80211_MODE_11G);
466 if ((sc->sc_devcap.analog5GhzRevision & 0xf0) == 0x30)
467 setbit(&bands, IEEE80211_MODE_11A);
469 ieee80211_init_channels(ic, NULL, &bands);
471 ieee80211_ifattach(ic, macaddr);
472 ic->ic_raw_xmit = uath_raw_xmit;
473 ic->ic_scan_start = uath_scan_start;
474 ic->ic_scan_end = uath_scan_end;
475 ic->ic_set_channel = uath_set_channel;
477 ic->ic_vap_create = uath_vap_create;
478 ic->ic_vap_delete = uath_vap_delete;
479 ic->ic_update_mcast = uath_update_mcast;
480 ic->ic_update_promisc = uath_update_promisc;
482 ieee80211_radiotap_attach(ic,
483 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
484 UATH_TX_RADIOTAP_PRESENT,
485 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
486 UATH_RX_RADIOTAP_PRESENT);
489 ieee80211_announce(ic);
494 fail3: UATH_UNLOCK(sc);
495 fail2: uath_free_cmd_list(sc, sc->sc_cmd);
496 fail1: usbd_transfer_unsetup(sc->sc_xfer, UATH_N_XFERS);
502 uath_detach(device_t dev)
504 struct uath_softc *sc = device_get_softc(dev);
505 struct ifnet *ifp = sc->sc_ifp;
506 struct ieee80211com *ic = ifp->if_l2com;
510 * Prevent further allocations from RX/TX/CMD
511 * data lists and ioctls
514 sc->sc_flags |= UATH_FLAG_INVALID;
516 STAILQ_INIT(&sc->sc_rx_active);
517 STAILQ_INIT(&sc->sc_rx_inactive);
519 STAILQ_INIT(&sc->sc_tx_active);
520 STAILQ_INIT(&sc->sc_tx_inactive);
521 STAILQ_INIT(&sc->sc_tx_pending);
523 STAILQ_INIT(&sc->sc_cmd_active);
524 STAILQ_INIT(&sc->sc_cmd_pending);
525 STAILQ_INIT(&sc->sc_cmd_waiting);
526 STAILQ_INIT(&sc->sc_cmd_inactive);
531 callout_drain(&sc->stat_ch);
532 callout_drain(&sc->watchdog_ch);
534 /* drain USB transfers */
535 for (x = 0; x != UATH_N_XFERS; x++)
536 usbd_transfer_drain(sc->sc_xfer[x]);
538 /* free data buffers */
540 uath_free_rx_data_list(sc);
541 uath_free_tx_data_list(sc);
542 uath_free_cmd_list(sc, sc->sc_cmd);
545 /* free USB transfers and some data buffers */
546 usbd_transfer_unsetup(sc->sc_xfer, UATH_N_XFERS);
548 ieee80211_ifdetach(ic);
550 mtx_destroy(&sc->sc_mtx);
555 uath_free_cmd_list(struct uath_softc *sc, struct uath_cmd cmds[])
559 for (i = 0; i != UATH_CMD_LIST_COUNT; i++)
564 uath_alloc_cmd_list(struct uath_softc *sc, struct uath_cmd cmds[])
568 STAILQ_INIT(&sc->sc_cmd_active);
569 STAILQ_INIT(&sc->sc_cmd_pending);
570 STAILQ_INIT(&sc->sc_cmd_waiting);
571 STAILQ_INIT(&sc->sc_cmd_inactive);
573 for (i = 0; i != UATH_CMD_LIST_COUNT; i++) {
574 struct uath_cmd *cmd = &cmds[i];
576 cmd->sc = sc; /* backpointer for callbacks */
578 cmd->buf = ((uint8_t *)sc->sc_cmd_dma_buf) +
579 (i * UATH_MAX_CMDSZ);
580 STAILQ_INSERT_TAIL(&sc->sc_cmd_inactive, cmd, next);
581 UATH_STAT_INC(sc, st_cmd_inactive);
587 uath_host_available(struct uath_softc *sc)
589 struct uath_cmd_host_available setup;
591 UATH_ASSERT_LOCKED(sc);
593 /* inform target the host is available */
594 setup.sw_ver_major = htobe32(ATH_SW_VER_MAJOR);
595 setup.sw_ver_minor = htobe32(ATH_SW_VER_MINOR);
596 setup.sw_ver_patch = htobe32(ATH_SW_VER_PATCH);
597 setup.sw_ver_build = htobe32(ATH_SW_VER_BUILD);
598 return uath_cmd_read(sc, WDCMSG_HOST_AVAILABLE,
599 &setup, sizeof setup, NULL, 0, 0);
604 uath_dump_cmd(const uint8_t *buf, int len, char prefix)
606 const char *sep = "";
609 for (i = 0; i < len; i++) {
611 printf("%s%c ", sep, prefix);
614 else if ((i % 4) == 0)
616 printf("%02x", buf[i]);
622 uath_codename(int code)
624 #define N(a) (sizeof(a)/sizeof(a[0]))
625 static const char *names[] = {
630 "TARGET_GET_CAPABILITY",
639 "UPDATE_CONNECT_ATTR",
655 "RESET_KEY_CACHE_ENTRY",
656 "SET_KEY_CACHE_ENTRY",
658 "SET_REGULATORY_DOMAIN",
661 "SET_STA_BEACON_TIMERS",
669 "SET_ANTENNA_SWITCH",
670 "0x2c", "0x2d", "0x2e",
671 "USE_SHORT_SLOT_TIME",
674 "SET_RX_MULTICAST_FILTER",
680 "SET_TX_POWER_LIMIT",
681 "SET_TX_QUEUE_PARAMS",
689 if (code == WDCMSG_SET_DEFAULT_KEY)
690 return "SET_DEFAULT_KEY";
691 snprintf(buf, sizeof(buf), "0x%02x", code);
698 * Low-level function to send read or write commands to the firmware.
701 uath_cmdsend(struct uath_softc *sc, uint32_t code, const void *idata, int ilen,
702 void *odata, int olen, int flags)
704 struct uath_cmd_hdr *hdr;
705 struct uath_cmd *cmd;
708 UATH_ASSERT_LOCKED(sc);
711 cmd = uath_get_cmdbuf(sc);
713 device_printf(sc->sc_dev, "%s: empty inactive queue\n",
718 /* always bulk-out a multiple of 4 bytes */
719 cmd->buflen = roundup2(sizeof(struct uath_cmd_hdr) + ilen, 4);
721 hdr = (struct uath_cmd_hdr *)cmd->buf;
722 memset(hdr, 0, sizeof(struct uath_cmd_hdr));
723 hdr->len = htobe32(cmd->buflen);
724 hdr->code = htobe32(code);
725 hdr->msgid = cmd->msgid; /* don't care about endianness */
726 hdr->magic = htobe32((cmd->flags & UATH_CMD_FLAG_MAGIC) ? 1 << 24 : 0);
727 memcpy((uint8_t *)(hdr + 1), idata, ilen);
730 if (sc->sc_debug & UATH_DEBUG_CMDS) {
731 printf("%s: send %s [flags 0x%x] olen %d\n",
732 __func__, uath_codename(code), cmd->flags, olen);
733 if (sc->sc_debug & UATH_DEBUG_CMDS_DUMP)
734 uath_dump_cmd(cmd->buf, cmd->buflen, '+');
738 KASSERT(odata == NULL ||
739 olen < UATH_MAX_CMDSZ - sizeof(*hdr) + sizeof(uint32_t),
740 ("odata %p olen %u", odata, olen));
743 STAILQ_INSERT_TAIL(&sc->sc_cmd_pending, cmd, next);
744 UATH_STAT_INC(sc, st_cmd_pending);
745 usbd_transfer_start(sc->sc_xfer[UATH_INTR_TX]);
747 if (cmd->flags & UATH_CMD_FLAG_READ) {
748 usbd_transfer_start(sc->sc_xfer[UATH_INTR_RX]);
750 /* wait at most two seconds for command reply */
751 error = mtx_sleep(cmd, &sc->sc_mtx, 0, "uathcmd", 2 * hz);
752 cmd->odata = NULL; /* in case reply comes too late */
754 device_printf(sc->sc_dev, "timeout waiting for reply "
755 "to cmd 0x%x (%u)\n", code, code);
756 } else if (cmd->olen != olen) {
757 device_printf(sc->sc_dev, "unexpected reply data count "
758 "to cmd 0x%x (%u), got %u, expected %u\n",
759 code, code, cmd->olen, olen);
768 uath_cmd_read(struct uath_softc *sc, uint32_t code, const void *idata,
769 int ilen, void *odata, int olen, int flags)
772 flags |= UATH_CMD_FLAG_READ;
773 return uath_cmdsend(sc, code, idata, ilen, odata, olen, flags);
777 uath_cmd_write(struct uath_softc *sc, uint32_t code, const void *data, int len,
781 flags &= ~UATH_CMD_FLAG_READ;
782 return uath_cmdsend(sc, code, data, len, NULL, 0, flags);
785 static struct uath_cmd *
786 uath_get_cmdbuf(struct uath_softc *sc)
790 UATH_ASSERT_LOCKED(sc);
792 uc = STAILQ_FIRST(&sc->sc_cmd_inactive);
794 STAILQ_REMOVE_HEAD(&sc->sc_cmd_inactive, next);
795 UATH_STAT_DEC(sc, st_cmd_inactive);
799 DPRINTF(sc, UATH_DEBUG_XMIT, "%s: %s\n", __func__,
800 "out of command xmit buffers");
805 * This function is called periodically (every second) when associated to
806 * query device statistics.
811 struct uath_softc *sc = arg;
816 * Send request for statistics asynchronously. The timer will be
817 * restarted when we'll get the stats notification.
819 error = uath_cmd_write(sc, WDCMSG_TARGET_GET_STATS, NULL, 0,
820 UATH_CMD_FLAG_ASYNC);
822 device_printf(sc->sc_dev,
823 "could not query stats, error %d\n", error);
829 uath_get_capability(struct uath_softc *sc, uint32_t cap, uint32_t *val)
834 error = uath_cmd_read(sc, WDCMSG_TARGET_GET_CAPABILITY,
835 &cap, sizeof cap, val, sizeof(uint32_t), UATH_CMD_FLAG_MAGIC);
837 device_printf(sc->sc_dev, "could not read capability %u\n",
841 *val = be32toh(*val);
846 uath_get_devcap(struct uath_softc *sc)
848 #define GETCAP(x, v) do { \
849 error = uath_get_capability(sc, x, &v); \
852 DPRINTF(sc, UATH_DEBUG_DEVCAP, \
853 "%s: %s=0x%08x\n", __func__, #x, v); \
855 struct uath_devcap *cap = &sc->sc_devcap;
858 /* collect device capabilities */
859 GETCAP(CAP_TARGET_VERSION, cap->targetVersion);
860 GETCAP(CAP_TARGET_REVISION, cap->targetRevision);
861 GETCAP(CAP_MAC_VERSION, cap->macVersion);
862 GETCAP(CAP_MAC_REVISION, cap->macRevision);
863 GETCAP(CAP_PHY_REVISION, cap->phyRevision);
864 GETCAP(CAP_ANALOG_5GHz_REVISION, cap->analog5GhzRevision);
865 GETCAP(CAP_ANALOG_2GHz_REVISION, cap->analog2GhzRevision);
867 GETCAP(CAP_REG_DOMAIN, cap->regDomain);
868 GETCAP(CAP_REG_CAP_BITS, cap->regCapBits);
870 /* NB: not supported in rev 1.5 */
871 GETCAP(CAP_COUNTRY_CODE, cap->countryCode);
873 GETCAP(CAP_WIRELESS_MODES, cap->wirelessModes);
874 GETCAP(CAP_CHAN_SPREAD_SUPPORT, cap->chanSpreadSupport);
875 GETCAP(CAP_COMPRESS_SUPPORT, cap->compressSupport);
876 GETCAP(CAP_BURST_SUPPORT, cap->burstSupport);
877 GETCAP(CAP_FAST_FRAMES_SUPPORT, cap->fastFramesSupport);
878 GETCAP(CAP_CHAP_TUNING_SUPPORT, cap->chapTuningSupport);
879 GETCAP(CAP_TURBOG_SUPPORT, cap->turboGSupport);
880 GETCAP(CAP_TURBO_PRIME_SUPPORT, cap->turboPrimeSupport);
881 GETCAP(CAP_DEVICE_TYPE, cap->deviceType);
882 GETCAP(CAP_WME_SUPPORT, cap->wmeSupport);
883 GETCAP(CAP_TOTAL_QUEUES, cap->numTxQueues);
884 GETCAP(CAP_CONNECTION_ID_MAX, cap->connectionIdMax);
886 GETCAP(CAP_LOW_5GHZ_CHAN, cap->low5GhzChan);
887 GETCAP(CAP_HIGH_5GHZ_CHAN, cap->high5GhzChan);
888 GETCAP(CAP_LOW_2GHZ_CHAN, cap->low2GhzChan);
889 GETCAP(CAP_HIGH_2GHZ_CHAN, cap->high2GhzChan);
890 GETCAP(CAP_TWICE_ANTENNAGAIN_5G, cap->twiceAntennaGain5G);
891 GETCAP(CAP_TWICE_ANTENNAGAIN_2G, cap->twiceAntennaGain2G);
893 GETCAP(CAP_CIPHER_AES_CCM, cap->supportCipherAES_CCM);
894 GETCAP(CAP_CIPHER_TKIP, cap->supportCipherTKIP);
895 GETCAP(CAP_MIC_TKIP, cap->supportMicTKIP);
897 cap->supportCipherWEP = 1; /* NB: always available */
903 uath_get_devstatus(struct uath_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN])
907 /* retrieve MAC address */
908 error = uath_get_status(sc, ST_MAC_ADDR, macaddr, IEEE80211_ADDR_LEN);
910 device_printf(sc->sc_dev, "could not read MAC address\n");
914 error = uath_get_status(sc, ST_SERIAL_NUMBER,
915 &sc->sc_serial[0], sizeof(sc->sc_serial));
917 device_printf(sc->sc_dev,
918 "could not read device serial number\n");
925 uath_get_status(struct uath_softc *sc, uint32_t which, void *odata, int olen)
929 which = htobe32(which);
930 error = uath_cmd_read(sc, WDCMSG_TARGET_GET_STATUS,
931 &which, sizeof(which), odata, olen, UATH_CMD_FLAG_MAGIC);
933 device_printf(sc->sc_dev,
934 "could not read EEPROM offset 0x%02x\n", be32toh(which));
939 uath_free_data_list(struct uath_softc *sc, struct uath_data data[], int ndata,
944 for (i = 0; i < ndata; i++) {
945 struct uath_data *dp = &data[i];
956 if (dp->ni != NULL) {
957 ieee80211_free_node(dp->ni);
964 uath_alloc_data_list(struct uath_softc *sc, struct uath_data data[],
965 int ndata, int maxsz, void *dma_buf)
969 for (i = 0; i < ndata; i++) {
970 struct uath_data *dp = &data[i];
973 if (dma_buf == NULL) {
974 /* XXX check maxsz */
975 dp->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
977 device_printf(sc->sc_dev,
978 "could not allocate rx mbuf\n");
982 dp->buf = mtod(dp->m, uint8_t *);
985 dp->buf = ((uint8_t *)dma_buf) + (i * maxsz);
992 fail: uath_free_data_list(sc, data, ndata, 1 /* free mbufs */);
997 uath_alloc_rx_data_list(struct uath_softc *sc)
1001 /* XXX is it enough to store the RX packet with MCLBYTES bytes? */
1002 error = uath_alloc_data_list(sc,
1003 sc->sc_rx, UATH_RX_DATA_LIST_COUNT, MCLBYTES,
1004 NULL /* setup mbufs */);
1008 STAILQ_INIT(&sc->sc_rx_active);
1009 STAILQ_INIT(&sc->sc_rx_inactive);
1011 for (i = 0; i < UATH_RX_DATA_LIST_COUNT; i++) {
1012 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i],
1014 UATH_STAT_INC(sc, st_rx_inactive);
1021 uath_alloc_tx_data_list(struct uath_softc *sc)
1025 error = uath_alloc_data_list(sc,
1026 sc->sc_tx, UATH_TX_DATA_LIST_COUNT, UATH_MAX_TXBUFSZ,
1031 STAILQ_INIT(&sc->sc_tx_active);
1032 STAILQ_INIT(&sc->sc_tx_inactive);
1033 STAILQ_INIT(&sc->sc_tx_pending);
1035 for (i = 0; i < UATH_TX_DATA_LIST_COUNT; i++) {
1036 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i],
1038 UATH_STAT_INC(sc, st_tx_inactive);
1045 uath_free_rx_data_list(struct uath_softc *sc)
1047 uath_free_data_list(sc, sc->sc_rx, UATH_RX_DATA_LIST_COUNT,
1048 1 /* free mbufs */);
1052 uath_free_tx_data_list(struct uath_softc *sc)
1054 uath_free_data_list(sc, sc->sc_tx, UATH_TX_DATA_LIST_COUNT,
1058 static struct ieee80211vap *
1059 uath_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
1060 enum ieee80211_opmode opmode, int flags,
1061 const uint8_t bssid[IEEE80211_ADDR_LEN],
1062 const uint8_t mac[IEEE80211_ADDR_LEN])
1064 struct uath_vap *uvp;
1065 struct ieee80211vap *vap;
1067 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */
1069 uvp = (struct uath_vap *) malloc(sizeof(struct uath_vap),
1070 M_80211_VAP, M_NOWAIT | M_ZERO);
1074 /* enable s/w bmiss handling for sta mode */
1075 ieee80211_vap_setup(ic, vap, name, unit, opmode,
1076 flags | IEEE80211_CLONE_NOBEACONS, bssid, mac);
1078 /* override state transition machine */
1079 uvp->newstate = vap->iv_newstate;
1080 vap->iv_newstate = uath_newstate;
1082 /* complete setup */
1083 ieee80211_vap_attach(vap, ieee80211_media_change,
1084 ieee80211_media_status);
1085 ic->ic_opmode = opmode;
1090 uath_vap_delete(struct ieee80211vap *vap)
1092 struct uath_vap *uvp = UATH_VAP(vap);
1094 ieee80211_vap_detach(vap);
1095 free(uvp, M_80211_VAP);
1099 uath_init_locked(void *arg)
1101 struct uath_softc *sc = arg;
1102 struct ifnet *ifp = sc->sc_ifp;
1103 struct ieee80211com *ic = ifp->if_l2com;
1107 UATH_ASSERT_LOCKED(sc);
1109 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1110 uath_stop_locked(ifp);
1112 /* reset variables */
1113 sc->sc_intrx_nextnum = sc->sc_msgid = 0;
1116 uath_cmd_write(sc, WDCMSG_BIND, &val, sizeof val, 0);
1118 /* set MAC address */
1119 uath_config_multi(sc, CFG_MAC_ADDR, IF_LLADDR(ifp), IEEE80211_ADDR_LEN);
1121 /* XXX honor net80211 state */
1122 uath_config(sc, CFG_RATE_CONTROL_ENABLE, 0x00000001);
1123 uath_config(sc, CFG_DIVERSITY_CTL, 0x00000001);
1124 uath_config(sc, CFG_ABOLT, 0x0000003f);
1125 uath_config(sc, CFG_WME_ENABLED, 0x00000001);
1127 uath_config(sc, CFG_SERVICE_TYPE, 1);
1128 uath_config(sc, CFG_TP_SCALE, 0x00000000);
1129 uath_config(sc, CFG_TPC_HALF_DBM5, 0x0000003c);
1130 uath_config(sc, CFG_TPC_HALF_DBM2, 0x0000003c);
1131 uath_config(sc, CFG_OVERRD_TX_POWER, 0x00000000);
1132 uath_config(sc, CFG_GMODE_PROTECTION, 0x00000000);
1133 uath_config(sc, CFG_GMODE_PROTECT_RATE_INDEX, 0x00000003);
1134 uath_config(sc, CFG_PROTECTION_TYPE, 0x00000000);
1135 uath_config(sc, CFG_MODE_CTS, 0x00000002);
1137 error = uath_cmd_read(sc, WDCMSG_TARGET_START, NULL, 0,
1138 &val, sizeof(val), UATH_CMD_FLAG_MAGIC);
1140 device_printf(sc->sc_dev,
1141 "could not start target, error %d\n", error);
1144 DPRINTF(sc, UATH_DEBUG_INIT, "%s returns handle: 0x%x\n",
1145 uath_codename(WDCMSG_TARGET_START), be32toh(val));
1147 /* set default channel */
1148 error = uath_switch_channel(sc, ic->ic_curchan);
1150 device_printf(sc->sc_dev,
1151 "could not switch channel, error %d\n", error);
1155 val = htobe32(TARGET_DEVICE_AWAKE);
1156 uath_cmd_write(sc, WDCMSG_SET_PWR_MODE, &val, sizeof val, 0);
1158 uath_cmd_write(sc, WDCMSG_RESET_KEY_CACHE, NULL, 0, 0);
1160 usbd_transfer_start(sc->sc_xfer[UATH_BULK_RX]);
1162 uath_set_rxfilter(sc, 0x0, UATH_FILTER_OP_INIT);
1163 uath_set_rxfilter(sc,
1164 UATH_FILTER_RX_UCAST | UATH_FILTER_RX_MCAST |
1165 UATH_FILTER_RX_BCAST | UATH_FILTER_RX_BEACON,
1166 UATH_FILTER_OP_SET);
1168 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1169 ifp->if_drv_flags |= IFF_DRV_RUNNING;
1170 sc->sc_flags |= UATH_FLAG_INITDONE;
1172 callout_reset(&sc->watchdog_ch, hz, uath_watchdog, sc);
1177 uath_stop_locked(ifp);
1182 uath_init(void *arg)
1184 struct uath_softc *sc = arg;
1187 (void)uath_init_locked(sc);
1192 uath_stop_locked(struct ifnet *ifp)
1194 struct uath_softc *sc = ifp->if_softc;
1196 UATH_ASSERT_LOCKED(sc);
1198 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
1199 sc->sc_flags &= ~UATH_FLAG_INITDONE;
1201 callout_stop(&sc->stat_ch);
1202 callout_stop(&sc->watchdog_ch);
1203 sc->sc_tx_timer = 0;
1204 /* abort pending transmits */
1205 uath_abort_xfers(sc);
1206 /* flush data & control requests into the target */
1207 (void)uath_flush(sc);
1208 /* set a LED status to the disconnected. */
1209 uath_set_ledstate(sc, 0);
1210 /* stop the target */
1211 uath_cmd_write(sc, WDCMSG_TARGET_STOP, NULL, 0, 0);
1215 uath_stop(struct ifnet *ifp)
1217 struct uath_softc *sc = ifp->if_softc;
1220 uath_stop_locked(ifp);
1225 uath_config(struct uath_softc *sc, uint32_t reg, uint32_t val)
1227 struct uath_write_mac write;
1230 write.reg = htobe32(reg);
1231 write.len = htobe32(0); /* 0 = single write */
1232 *(uint32_t *)write.data = htobe32(val);
1234 error = uath_cmd_write(sc, WDCMSG_TARGET_SET_CONFIG, &write,
1235 3 * sizeof (uint32_t), 0);
1237 device_printf(sc->sc_dev, "could not write register 0x%02x\n",
1244 uath_config_multi(struct uath_softc *sc, uint32_t reg, const void *data,
1247 struct uath_write_mac write;
1250 write.reg = htobe32(reg);
1251 write.len = htobe32(len);
1252 bcopy(data, write.data, len);
1254 /* properly handle the case where len is zero (reset) */
1255 error = uath_cmd_write(sc, WDCMSG_TARGET_SET_CONFIG, &write,
1256 (len == 0) ? sizeof (uint32_t) : 2 * sizeof (uint32_t) + len, 0);
1258 device_printf(sc->sc_dev,
1259 "could not write %d bytes to register 0x%02x\n", len, reg);
1265 uath_switch_channel(struct uath_softc *sc, struct ieee80211_channel *c)
1269 UATH_ASSERT_LOCKED(sc);
1271 /* set radio frequency */
1272 error = uath_set_chan(sc, c);
1274 device_printf(sc->sc_dev,
1275 "could not set channel, error %d\n", error);
1278 /* reset Tx rings */
1279 error = uath_reset_tx_queues(sc);
1281 device_printf(sc->sc_dev,
1282 "could not reset Tx queues, error %d\n", error);
1285 /* set Tx rings WME properties */
1286 error = uath_wme_init(sc);
1288 device_printf(sc->sc_dev,
1289 "could not init Tx queues, error %d\n", error);
1292 error = uath_set_ledstate(sc, 0);
1294 device_printf(sc->sc_dev,
1295 "could not set led state, error %d\n", error);
1298 error = uath_flush(sc);
1300 device_printf(sc->sc_dev,
1301 "could not flush pipes, error %d\n", error);
1309 uath_set_rxfilter(struct uath_softc *sc, uint32_t bits, uint32_t op)
1311 struct uath_cmd_rx_filter rxfilter;
1313 rxfilter.bits = htobe32(bits);
1314 rxfilter.op = htobe32(op);
1316 DPRINTF(sc, UATH_DEBUG_RECV | UATH_DEBUG_RECV_ALL,
1317 "setting Rx filter=0x%x flags=0x%x\n", bits, op);
1318 return uath_cmd_write(sc, WDCMSG_RX_FILTER, &rxfilter,
1319 sizeof rxfilter, 0);
1323 uath_watchdog(void *arg)
1325 struct uath_softc *sc = arg;
1326 struct ifnet *ifp = sc->sc_ifp;
1328 if (sc->sc_tx_timer > 0) {
1329 if (--sc->sc_tx_timer == 0) {
1330 device_printf(sc->sc_dev, "device timeout\n");
1331 /*uath_init(ifp); XXX needs a process context! */
1335 callout_reset(&sc->watchdog_ch, hz, uath_watchdog, sc);
1340 uath_abort_xfers(struct uath_softc *sc)
1344 UATH_ASSERT_LOCKED(sc);
1345 /* abort any pending transfers */
1346 for (i = 0; i < UATH_N_XFERS; i++)
1347 usbd_transfer_stop(sc->sc_xfer[i]);
1351 uath_flush(struct uath_softc *sc)
1355 error = uath_dataflush(sc);
1359 error = uath_cmdflush(sc);
1368 uath_cmdflush(struct uath_softc *sc)
1371 return uath_cmd_write(sc, WDCMSG_FLUSH, NULL, 0, 0);
1375 uath_dataflush(struct uath_softc *sc)
1377 struct uath_data *data;
1378 struct uath_chunk *chunk;
1379 struct uath_tx_desc *desc;
1381 UATH_ASSERT_LOCKED(sc);
1383 data = uath_getbuf(sc);
1386 data->buflen = sizeof(struct uath_chunk) + sizeof(struct uath_tx_desc);
1389 chunk = (struct uath_chunk *)data->buf;
1390 desc = (struct uath_tx_desc *)(chunk + 1);
1392 /* one chunk only */
1394 chunk->flags = UATH_CFLAGS_FINAL;
1395 chunk->length = htobe16(sizeof (struct uath_tx_desc));
1397 memset(desc, 0, sizeof(struct uath_tx_desc));
1398 desc->msglen = htobe32(sizeof(struct uath_tx_desc));
1399 desc->msgid = (sc->sc_msgid++) + 1; /* don't care about endianness */
1400 desc->type = htobe32(WDCMSG_FLUSH);
1401 desc->txqid = htobe32(0);
1402 desc->connid = htobe32(0);
1403 desc->flags = htobe32(0);
1406 if (sc->sc_debug & UATH_DEBUG_CMDS) {
1407 DPRINTF(sc, UATH_DEBUG_RESET, "send flush ix %d\n",
1409 if (sc->sc_debug & UATH_DEBUG_CMDS_DUMP)
1410 uath_dump_cmd(data->buf, data->buflen, '+');
1414 STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next);
1415 UATH_STAT_INC(sc, st_tx_pending);
1416 sc->sc_tx_timer = 5;
1417 usbd_transfer_start(sc->sc_xfer[UATH_BULK_TX]);
1422 static struct uath_data *
1423 _uath_getbuf(struct uath_softc *sc)
1425 struct uath_data *bf;
1427 bf = STAILQ_FIRST(&sc->sc_tx_inactive);
1429 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next);
1430 UATH_STAT_DEC(sc, st_tx_inactive);
1434 DPRINTF(sc, UATH_DEBUG_XMIT, "%s: %s\n", __func__,
1435 "out of xmit buffers");
1439 static struct uath_data *
1440 uath_getbuf(struct uath_softc *sc)
1442 struct uath_data *bf;
1444 UATH_ASSERT_LOCKED(sc);
1446 bf = _uath_getbuf(sc);
1448 struct ifnet *ifp = sc->sc_ifp;
1450 DPRINTF(sc, UATH_DEBUG_XMIT, "%s: stop queue\n", __func__);
1451 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1457 uath_set_ledstate(struct uath_softc *sc, int connected)
1460 DPRINTF(sc, UATH_DEBUG_LED,
1461 "set led state %sconnected\n", connected ? "" : "!");
1462 connected = htobe32(connected);
1463 return uath_cmd_write(sc, WDCMSG_SET_LED_STATE,
1464 &connected, sizeof connected, 0);
1468 uath_set_chan(struct uath_softc *sc, struct ieee80211_channel *c)
1471 struct ifnet *ifp = sc->sc_ifp;
1472 struct ieee80211com *ic = ifp->if_l2com;
1474 struct uath_cmd_reset reset;
1476 memset(&reset, 0, sizeof(reset));
1477 if (IEEE80211_IS_CHAN_2GHZ(c))
1478 reset.flags |= htobe32(UATH_CHAN_2GHZ);
1479 if (IEEE80211_IS_CHAN_5GHZ(c))
1480 reset.flags |= htobe32(UATH_CHAN_5GHZ);
1481 /* NB: 11g =>'s 11b so don't specify both OFDM and CCK */
1482 if (IEEE80211_IS_CHAN_OFDM(c))
1483 reset.flags |= htobe32(UATH_CHAN_OFDM);
1484 else if (IEEE80211_IS_CHAN_CCK(c))
1485 reset.flags |= htobe32(UATH_CHAN_CCK);
1486 /* turbo can be used in either 2GHz or 5GHz */
1487 if (c->ic_flags & IEEE80211_CHAN_TURBO)
1488 reset.flags |= htobe32(UATH_CHAN_TURBO);
1489 reset.freq = htobe32(c->ic_freq);
1490 reset.maxrdpower = htobe32(50); /* XXX */
1491 reset.channelchange = htobe32(1);
1492 reset.keeprccontent = htobe32(0);
1494 DPRINTF(sc, UATH_DEBUG_CHANNEL, "set channel %d, flags 0x%x freq %u\n",
1495 ieee80211_chan2ieee(ic, c),
1496 be32toh(reset.flags), be32toh(reset.freq));
1497 return uath_cmd_write(sc, WDCMSG_RESET, &reset, sizeof reset, 0);
1501 uath_reset_tx_queues(struct uath_softc *sc)
1505 DPRINTF(sc, UATH_DEBUG_RESET, "%s: reset Tx queues\n", __func__);
1506 for (ac = 0; ac < 4; ac++) {
1507 const uint32_t qid = htobe32(ac);
1509 error = uath_cmd_write(sc, WDCMSG_RELEASE_TX_QUEUE, &qid,
1518 uath_wme_init(struct uath_softc *sc)
1520 /* XXX get from net80211 */
1521 static const struct uath_wme_settings uath_wme_11g[4] = {
1522 { 7, 4, 10, 0, 0 }, /* Background */
1523 { 3, 4, 10, 0, 0 }, /* Best-Effort */
1524 { 3, 3, 4, 26, 0 }, /* Video */
1525 { 2, 2, 3, 47, 0 } /* Voice */
1527 struct uath_cmd_txq_setup qinfo;
1530 DPRINTF(sc, UATH_DEBUG_WME, "%s: setup Tx queues\n", __func__);
1531 for (ac = 0; ac < 4; ac++) {
1532 qinfo.qid = htobe32(ac);
1533 qinfo.len = htobe32(sizeof(qinfo.attr));
1534 qinfo.attr.priority = htobe32(ac); /* XXX */
1535 qinfo.attr.aifs = htobe32(uath_wme_11g[ac].aifsn);
1536 qinfo.attr.logcwmin = htobe32(uath_wme_11g[ac].logcwmin);
1537 qinfo.attr.logcwmax = htobe32(uath_wme_11g[ac].logcwmax);
1538 qinfo.attr.bursttime = htobe32(UATH_TXOP_TO_US(
1539 uath_wme_11g[ac].txop));
1540 qinfo.attr.mode = htobe32(uath_wme_11g[ac].acm);/*XXX? */
1541 qinfo.attr.qflags = htobe32(1); /* XXX? */
1543 error = uath_cmd_write(sc, WDCMSG_SETUP_TX_QUEUE, &qinfo,
1552 uath_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1554 struct ieee80211com *ic = ifp->if_l2com;
1555 struct ifreq *ifr = (struct ifreq *) data;
1556 struct uath_softc *sc = ifp->if_softc;
1561 error = (sc->sc_flags & UATH_FLAG_INVALID) ? ENXIO : 0;
1568 if (ifp->if_flags & IFF_UP) {
1569 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
1570 uath_init(ifp->if_softc);
1574 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1578 ieee80211_start_all(ic);
1581 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
1584 error = ether_ioctl(ifp, cmd, data);
1595 uath_tx_start(struct uath_softc *sc, struct mbuf *m0, struct ieee80211_node *ni,
1596 struct uath_data *data)
1598 struct ieee80211vap *vap = ni->ni_vap;
1599 struct uath_chunk *chunk;
1600 struct uath_tx_desc *desc;
1601 const struct ieee80211_frame *wh;
1602 struct ieee80211_key *k;
1603 int framelen, msglen;
1605 UATH_ASSERT_LOCKED(sc);
1609 chunk = (struct uath_chunk *)data->buf;
1610 desc = (struct uath_tx_desc *)(chunk + 1);
1612 if (ieee80211_radiotap_active_vap(vap)) {
1613 struct uath_tx_radiotap_header *tap = &sc->sc_txtap;
1616 if (m0->m_flags & M_FRAG)
1617 tap->wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
1619 ieee80211_radiotap_tx(vap, m0);
1622 wh = mtod(m0, struct ieee80211_frame *);
1623 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1624 k = ieee80211_crypto_encap(ni, m0);
1630 /* packet header may have moved, reset our local pointer */
1631 wh = mtod(m0, struct ieee80211_frame *);
1633 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(desc + 1));
1635 framelen = m0->m_pkthdr.len + IEEE80211_CRC_LEN;
1636 msglen = framelen + sizeof (struct uath_tx_desc);
1637 data->buflen = msglen + sizeof (struct uath_chunk);
1639 /* one chunk only for now */
1640 chunk->seqnum = sc->sc_seqnum++;
1641 chunk->flags = (m0->m_flags & M_FRAG) ? 0 : UATH_CFLAGS_FINAL;
1642 if (m0->m_flags & M_LASTFRAG)
1643 chunk->flags |= UATH_CFLAGS_FINAL;
1644 chunk->flags = UATH_CFLAGS_FINAL;
1645 chunk->length = htobe16(msglen);
1647 /* fill Tx descriptor */
1648 desc->msglen = htobe32(msglen);
1649 /* NB: to get UATH_TX_NOTIFY reply, `msgid' must be larger than 0 */
1650 desc->msgid = (sc->sc_msgid++) + 1; /* don't care about endianness */
1651 desc->type = htobe32(WDCMSG_SEND);
1652 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
1653 case IEEE80211_FC0_TYPE_CTL:
1654 case IEEE80211_FC0_TYPE_MGT:
1655 /* NB: force all management frames to highest queue */
1656 if (ni->ni_flags & IEEE80211_NODE_QOS) {
1657 /* NB: force all management frames to highest queue */
1658 desc->txqid = htobe32(WME_AC_VO | UATH_TXQID_MINRATE);
1660 desc->txqid = htobe32(WME_AC_BE | UATH_TXQID_MINRATE);
1662 case IEEE80211_FC0_TYPE_DATA:
1663 /* XXX multicast frames should honor mcastrate */
1664 desc->txqid = htobe32(M_WME_GETAC(m0));
1667 device_printf(sc->sc_dev, "bogus frame type 0x%x (%s)\n",
1668 wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__);
1672 if (vap->iv_state == IEEE80211_S_AUTH ||
1673 vap->iv_state == IEEE80211_S_ASSOC ||
1674 vap->iv_state == IEEE80211_S_RUN)
1675 desc->connid = htobe32(UATH_ID_BSS);
1677 desc->connid = htobe32(UATH_ID_INVALID);
1678 desc->flags = htobe32(0 /* no UATH_TX_NOTIFY */);
1679 desc->buflen = htobe32(m0->m_pkthdr.len);
1682 DPRINTF(sc, UATH_DEBUG_XMIT,
1683 "send frame ix %u framelen %d msglen %d connid 0x%x txqid 0x%x\n",
1684 desc->msgid, framelen, msglen, be32toh(desc->connid),
1685 be32toh(desc->txqid));
1686 if (sc->sc_debug & UATH_DEBUG_XMIT_DUMP)
1687 uath_dump_cmd(data->buf, data->buflen, '+');
1690 STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next);
1691 UATH_STAT_INC(sc, st_tx_pending);
1692 usbd_transfer_start(sc->sc_xfer[UATH_BULK_TX]);
1698 * Cleanup driver resources when we run out of buffers while processing
1699 * fragments; return the tx buffers allocated and drop node references.
1702 uath_txfrag_cleanup(struct uath_softc *sc,
1703 uath_datahead *frags, struct ieee80211_node *ni)
1705 struct uath_data *bf, *next;
1707 UATH_ASSERT_LOCKED(sc);
1709 STAILQ_FOREACH_SAFE(bf, frags, next, next) {
1710 /* NB: bf assumed clean */
1711 STAILQ_REMOVE_HEAD(frags, next);
1712 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next);
1713 UATH_STAT_INC(sc, st_tx_inactive);
1714 ieee80211_node_decref(ni);
1719 * Setup xmit of a fragmented frame. Allocate a buffer for each frag and bump
1720 * the node reference count to reflect the held reference to be setup by
1724 uath_txfrag_setup(struct uath_softc *sc, uath_datahead *frags,
1725 struct mbuf *m0, struct ieee80211_node *ni)
1728 struct uath_data *bf;
1730 UATH_ASSERT_LOCKED(sc);
1731 for (m = m0->m_nextpkt; m != NULL; m = m->m_nextpkt) {
1732 bf = uath_getbuf(sc);
1733 if (bf == NULL) { /* out of buffers, cleanup */
1734 uath_txfrag_cleanup(sc, frags, ni);
1737 ieee80211_node_incref(ni);
1738 STAILQ_INSERT_TAIL(frags, bf, next);
1741 return !STAILQ_EMPTY(frags);
1745 * Reclaim mbuf resources. For fragmented frames we need to claim each frag
1746 * chained with m_nextpkt.
1749 uath_freetx(struct mbuf *m)
1754 next = m->m_nextpkt;
1755 m->m_nextpkt = NULL;
1757 } while ((m = next) != NULL);
1761 uath_start(struct ifnet *ifp)
1763 struct uath_data *bf;
1764 struct uath_softc *sc = ifp->if_softc;
1765 struct ieee80211_node *ni;
1766 struct mbuf *m, *next;
1767 uath_datahead frags;
1769 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 ||
1770 (sc->sc_flags & UATH_FLAG_INVALID))
1775 bf = uath_getbuf(sc);
1779 IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
1781 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next);
1782 UATH_STAT_INC(sc, st_tx_inactive);
1785 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
1786 m->m_pkthdr.rcvif = NULL;
1789 * Check for fragmentation. If this frame has been broken up
1790 * verify we have enough buffers to send all the fragments
1791 * so all go out or none...
1793 STAILQ_INIT(&frags);
1794 if ((m->m_flags & M_FRAG) &&
1795 !uath_txfrag_setup(sc, &frags, m, ni)) {
1796 DPRINTF(sc, UATH_DEBUG_XMIT,
1797 "%s: out of txfrag buffers\n", __func__);
1804 * Pass the frame to the h/w for transmission.
1805 * Fragmented frames have each frag chained together
1806 * with m_nextpkt. We know there are sufficient uath_data's
1807 * to send all the frags because of work done by
1808 * uath_txfrag_setup.
1810 next = m->m_nextpkt;
1811 if (uath_tx_start(sc, m, ni, bf) != 0) {
1815 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next);
1816 UATH_STAT_INC(sc, st_tx_inactive);
1817 uath_txfrag_cleanup(sc, &frags, ni);
1818 ieee80211_free_node(ni);
1824 * Beware of state changing between frags.
1825 XXX check sta power-save state?
1827 if (ni->ni_vap->iv_state != IEEE80211_S_RUN) {
1828 DPRINTF(sc, UATH_DEBUG_XMIT,
1829 "%s: flush fragmented packet, state %s\n",
1831 ieee80211_state_name[ni->ni_vap->iv_state]);
1836 bf = STAILQ_FIRST(&frags);
1837 KASSERT(bf != NULL, ("no buf for txfrag"));
1838 STAILQ_REMOVE_HEAD(&frags, next);
1842 sc->sc_tx_timer = 5;
1848 uath_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
1849 const struct ieee80211_bpf_params *params)
1851 struct ieee80211com *ic = ni->ni_ic;
1852 struct ifnet *ifp = ic->ic_ifp;
1853 struct uath_data *bf;
1854 struct uath_softc *sc = ifp->if_softc;
1856 /* prevent management frames from being sent if we're not ready */
1857 if ((sc->sc_flags & UATH_FLAG_INVALID) ||
1858 !(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
1860 ieee80211_free_node(ni);
1865 /* grab a TX buffer */
1866 bf = uath_getbuf(sc);
1868 ieee80211_free_node(ni);
1875 if (uath_tx_start(sc, m, ni, bf) != 0) {
1876 ieee80211_free_node(ni);
1878 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next);
1879 UATH_STAT_INC(sc, st_tx_inactive);
1885 sc->sc_tx_timer = 5;
1890 uath_scan_start(struct ieee80211com *ic)
1896 uath_scan_end(struct ieee80211com *ic)
1902 uath_set_channel(struct ieee80211com *ic)
1904 struct ifnet *ifp = ic->ic_ifp;
1905 struct uath_softc *sc = ifp->if_softc;
1908 if ((sc->sc_flags & UATH_FLAG_INVALID) ||
1909 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1913 (void)uath_switch_channel(sc, ic->ic_curchan);
1918 uath_set_rxmulti_filter(struct uath_softc *sc)
1924 uath_update_mcast(struct ifnet *ifp)
1926 struct uath_softc *sc = ifp->if_softc;
1929 if ((sc->sc_flags & UATH_FLAG_INVALID) ||
1930 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1935 * this is for avoiding the race condition when we're try to
1936 * connect to the AP with WPA.
1938 if (sc->sc_flags & UATH_FLAG_INITDONE)
1939 (void)uath_set_rxmulti_filter(sc);
1944 uath_update_promisc(struct ifnet *ifp)
1946 struct uath_softc *sc = ifp->if_softc;
1949 if ((sc->sc_flags & UATH_FLAG_INVALID) ||
1950 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1954 if (sc->sc_flags & UATH_FLAG_INITDONE) {
1955 uath_set_rxfilter(sc,
1956 UATH_FILTER_RX_UCAST | UATH_FILTER_RX_MCAST |
1957 UATH_FILTER_RX_BCAST | UATH_FILTER_RX_BEACON |
1958 UATH_FILTER_RX_PROM, UATH_FILTER_OP_SET);
1964 uath_create_connection(struct uath_softc *sc, uint32_t connid)
1966 const struct ieee80211_rateset *rs;
1967 struct ieee80211com *ic = sc->sc_ifp->if_l2com;
1968 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
1969 struct ieee80211_node *ni;
1970 struct uath_cmd_create_connection create;
1972 ni = ieee80211_ref_node(vap->iv_bss);
1973 memset(&create, 0, sizeof(create));
1974 create.connid = htobe32(connid);
1975 create.bssid = htobe32(0);
1976 /* XXX packed or not? */
1977 create.size = htobe32(sizeof(struct uath_cmd_rateset));
1980 create.connattr.rateset.length = rs->rs_nrates;
1981 bcopy(rs->rs_rates, &create.connattr.rateset.set[0],
1985 if (IEEE80211_IS_CHAN_A(ni->ni_chan))
1986 create.connattr.wlanmode = htobe32(WLAN_MODE_11a);
1987 else if (IEEE80211_IS_CHAN_ANYG(ni->ni_chan))
1988 create.connattr.wlanmode = htobe32(WLAN_MODE_11g);
1990 create.connattr.wlanmode = htobe32(WLAN_MODE_11b);
1991 ieee80211_free_node(ni);
1993 return uath_cmd_write(sc, WDCMSG_CREATE_CONNECTION, &create,
1998 uath_set_rates(struct uath_softc *sc, const struct ieee80211_rateset *rs)
2000 struct uath_cmd_rates rates;
2002 memset(&rates, 0, sizeof(rates));
2003 rates.connid = htobe32(UATH_ID_BSS); /* XXX */
2004 rates.size = htobe32(sizeof(struct uath_cmd_rateset));
2005 /* XXX bounds check rs->rs_nrates */
2006 rates.rateset.length = rs->rs_nrates;
2007 bcopy(rs->rs_rates, &rates.rateset.set[0], rs->rs_nrates);
2009 DPRINTF(sc, UATH_DEBUG_RATES,
2010 "setting supported rates nrates=%d\n", rs->rs_nrates);
2011 return uath_cmd_write(sc, WDCMSG_SET_BASIC_RATE,
2012 &rates, sizeof rates, 0);
2016 uath_write_associd(struct uath_softc *sc)
2018 struct ieee80211com *ic = sc->sc_ifp->if_l2com;
2019 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2020 struct ieee80211_node *ni;
2021 struct uath_cmd_set_associd associd;
2023 ni = ieee80211_ref_node(vap->iv_bss);
2024 memset(&associd, 0, sizeof(associd));
2025 associd.defaultrateix = htobe32(1); /* XXX */
2026 associd.associd = htobe32(ni->ni_associd);
2027 associd.timoffset = htobe32(0x3b); /* XXX */
2028 IEEE80211_ADDR_COPY(associd.bssid, ni->ni_bssid);
2029 ieee80211_free_node(ni);
2030 return uath_cmd_write(sc, WDCMSG_WRITE_ASSOCID, &associd,
2035 uath_set_ledsteady(struct uath_softc *sc, int lednum, int ledmode)
2037 struct uath_cmd_ledsteady led;
2039 led.lednum = htobe32(lednum);
2040 led.ledmode = htobe32(ledmode);
2042 DPRINTF(sc, UATH_DEBUG_LED, "set %s led %s (steady)\n",
2043 (lednum == UATH_LED_LINK) ? "link" : "activity",
2044 ledmode ? "on" : "off");
2045 return uath_cmd_write(sc, WDCMSG_SET_LED_STEADY, &led, sizeof led, 0);
2049 uath_set_ledblink(struct uath_softc *sc, int lednum, int ledmode,
2050 int blinkrate, int slowmode)
2052 struct uath_cmd_ledblink led;
2054 led.lednum = htobe32(lednum);
2055 led.ledmode = htobe32(ledmode);
2056 led.blinkrate = htobe32(blinkrate);
2057 led.slowmode = htobe32(slowmode);
2059 DPRINTF(sc, UATH_DEBUG_LED, "set %s led %s (blink)\n",
2060 (lednum == UATH_LED_LINK) ? "link" : "activity",
2061 ledmode ? "on" : "off");
2062 return uath_cmd_write(sc, WDCMSG_SET_LED_BLINK, &led, sizeof led, 0);
2066 uath_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
2068 enum ieee80211_state ostate = vap->iv_state;
2070 struct ieee80211_node *ni;
2071 struct ieee80211com *ic = vap->iv_ic;
2072 struct uath_softc *sc = ic->ic_ifp->if_softc;
2073 struct uath_vap *uvp = UATH_VAP(vap);
2075 DPRINTF(sc, UATH_DEBUG_STATE,
2076 "%s: %s -> %s\n", __func__, ieee80211_state_name[vap->iv_state],
2077 ieee80211_state_name[nstate]);
2079 IEEE80211_UNLOCK(ic);
2081 callout_stop(&sc->stat_ch);
2082 callout_stop(&sc->watchdog_ch);
2083 ni = ieee80211_ref_node(vap->iv_bss);
2086 case IEEE80211_S_INIT:
2087 if (ostate == IEEE80211_S_RUN) {
2088 /* turn link and activity LEDs off */
2089 uath_set_ledstate(sc, 0);
2093 case IEEE80211_S_SCAN:
2096 case IEEE80211_S_AUTH:
2097 /* XXX good place? set RTS threshold */
2098 uath_config(sc, CFG_USER_RTS_THRESHOLD, vap->iv_rtsthreshold);
2100 error = uath_set_keys(sc, vap);
2102 device_printf(sc->sc_dev,
2103 "could not set crypto keys, error %d\n", error);
2106 if (uath_switch_channel(sc, ni->ni_chan) != 0) {
2107 device_printf(sc->sc_dev, "could not switch channel\n");
2110 if (uath_create_connection(sc, UATH_ID_BSS) != 0) {
2111 device_printf(sc->sc_dev,
2112 "could not create connection\n");
2117 case IEEE80211_S_ASSOC:
2118 if (uath_set_rates(sc, &ni->ni_rates) != 0) {
2119 device_printf(sc->sc_dev,
2120 "could not set negotiated rate set\n");
2125 case IEEE80211_S_RUN:
2126 /* XXX monitor mode doesn't be tested */
2127 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
2128 uath_set_ledstate(sc, 1);
2133 * Tx rate is controlled by firmware, report the maximum
2134 * negotiated rate in ifconfig output.
2136 ni->ni_txrate = ni->ni_rates.rs_rates[ni->ni_rates.rs_nrates-1];
2138 if (uath_write_associd(sc) != 0) {
2139 device_printf(sc->sc_dev,
2140 "could not write association id\n");
2143 /* turn link LED on */
2144 uath_set_ledsteady(sc, UATH_LED_LINK, UATH_LED_ON);
2145 /* make activity LED blink */
2146 uath_set_ledblink(sc, UATH_LED_ACTIVITY, UATH_LED_ON, 1, 2);
2147 /* set state to associated */
2148 uath_set_ledstate(sc, 1);
2150 /* start statistics timer */
2151 callout_reset(&sc->stat_ch, hz, uath_stat, sc);
2156 ieee80211_free_node(ni);
2159 return (uvp->newstate(vap, nstate, arg));
2163 uath_set_key(struct uath_softc *sc, const struct ieee80211_key *wk,
2167 struct uath_cmd_crypto crypto;
2170 memset(&crypto, 0, sizeof(crypto));
2171 crypto.keyidx = htobe32(index);
2172 crypto.magic1 = htobe32(1);
2173 crypto.size = htobe32(368);
2174 crypto.mask = htobe32(0xffff);
2175 crypto.flags = htobe32(0x80000068);
2176 if (index != UATH_DEFAULT_KEY)
2177 crypto.flags |= htobe32(index << 16);
2178 memset(crypto.magic2, 0xff, sizeof(crypto.magic2));
2181 * Each byte of the key must be XOR'ed with 10101010 before being
2182 * transmitted to the firmware.
2184 for (i = 0; i < wk->wk_keylen; i++)
2185 crypto.key[i] = wk->wk_key[i] ^ 0xaa;
2187 DPRINTF(sc, UATH_DEBUG_CRYPTO,
2188 "setting crypto key index=%d len=%d\n", index, wk->wk_keylen);
2189 return uath_cmd_write(sc, WDCMSG_SET_KEY_CACHE_ENTRY, &crypto,
2192 /* XXX support H/W cryto */
2198 uath_set_keys(struct uath_softc *sc, struct ieee80211vap *vap)
2203 for (i = 0; i < IEEE80211_WEP_NKID; i++) {
2204 const struct ieee80211_key *wk = &vap->iv_nw_keys[i];
2206 if (wk->wk_flags & (IEEE80211_KEY_XMIT|IEEE80211_KEY_RECV)) {
2207 error = uath_set_key(sc, wk, i);
2212 if (vap->iv_def_txkey != IEEE80211_KEYIX_NONE) {
2213 error = uath_set_key(sc, &vap->iv_nw_keys[vap->iv_def_txkey],
2219 #define UATH_SYSCTL_STAT_ADD32(c, h, n, p, d) \
2220 SYSCTL_ADD_UINT(c, h, OID_AUTO, n, CTLFLAG_RD, p, 0, d)
2223 uath_sysctl_node(struct uath_softc *sc)
2225 struct sysctl_ctx_list *ctx;
2226 struct sysctl_oid_list *child;
2227 struct sysctl_oid *tree;
2228 struct uath_stat *stats;
2230 stats = &sc->sc_stat;
2231 ctx = device_get_sysctl_ctx(sc->sc_dev);
2232 child = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->sc_dev));
2234 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "stats", CTLFLAG_RD,
2235 NULL, "UATH statistics");
2236 child = SYSCTL_CHILDREN(tree);
2237 UATH_SYSCTL_STAT_ADD32(ctx, child, "badchunkseqnum",
2238 &stats->st_badchunkseqnum, "Bad chunk sequence numbers");
2239 UATH_SYSCTL_STAT_ADD32(ctx, child, "invalidlen", &stats->st_invalidlen,
2241 UATH_SYSCTL_STAT_ADD32(ctx, child, "multichunk", &stats->st_multichunk,
2243 UATH_SYSCTL_STAT_ADD32(ctx, child, "toobigrxpkt",
2244 &stats->st_toobigrxpkt, "Too big rx packets");
2245 UATH_SYSCTL_STAT_ADD32(ctx, child, "stopinprogress",
2246 &stats->st_stopinprogress, "Stop in progress");
2247 UATH_SYSCTL_STAT_ADD32(ctx, child, "crcerrs", &stats->st_crcerr,
2249 UATH_SYSCTL_STAT_ADD32(ctx, child, "phyerr", &stats->st_phyerr,
2251 UATH_SYSCTL_STAT_ADD32(ctx, child, "decrypt_crcerr",
2252 &stats->st_decrypt_crcerr, "Decryption CRC errors");
2253 UATH_SYSCTL_STAT_ADD32(ctx, child, "decrypt_micerr",
2254 &stats->st_decrypt_micerr, "Decryption Misc errors");
2255 UATH_SYSCTL_STAT_ADD32(ctx, child, "decomperr", &stats->st_decomperr,
2257 UATH_SYSCTL_STAT_ADD32(ctx, child, "keyerr", &stats->st_keyerr,
2259 UATH_SYSCTL_STAT_ADD32(ctx, child, "err", &stats->st_err,
2262 UATH_SYSCTL_STAT_ADD32(ctx, child, "cmd_active",
2263 &stats->st_cmd_active, "Active numbers in Command queue");
2264 UATH_SYSCTL_STAT_ADD32(ctx, child, "cmd_inactive",
2265 &stats->st_cmd_inactive, "Inactive numbers in Command queue");
2266 UATH_SYSCTL_STAT_ADD32(ctx, child, "cmd_pending",
2267 &stats->st_cmd_pending, "Pending numbers in Command queue");
2268 UATH_SYSCTL_STAT_ADD32(ctx, child, "cmd_waiting",
2269 &stats->st_cmd_waiting, "Waiting numbers in Command queue");
2270 UATH_SYSCTL_STAT_ADD32(ctx, child, "rx_active",
2271 &stats->st_rx_active, "Active numbers in RX queue");
2272 UATH_SYSCTL_STAT_ADD32(ctx, child, "rx_inactive",
2273 &stats->st_rx_inactive, "Inactive numbers in RX queue");
2274 UATH_SYSCTL_STAT_ADD32(ctx, child, "tx_active",
2275 &stats->st_tx_active, "Active numbers in TX queue");
2276 UATH_SYSCTL_STAT_ADD32(ctx, child, "tx_inactive",
2277 &stats->st_tx_inactive, "Inactive numbers in TX queue");
2278 UATH_SYSCTL_STAT_ADD32(ctx, child, "tx_pending",
2279 &stats->st_tx_pending, "Pending numbers in TX queue");
2282 #undef UATH_SYSCTL_STAT_ADD32
2285 uath_cmdeof(struct uath_softc *sc, struct uath_cmd *cmd)
2287 struct uath_cmd_hdr *hdr;
2290 hdr = (struct uath_cmd_hdr *)cmd->buf;
2291 /* NB: msgid is passed thru w/o byte swapping */
2293 if (sc->sc_debug & UATH_DEBUG_CMDS) {
2294 int len = be32toh(hdr->len);
2295 printf("%s: %s [ix %u] len %u status %u\n",
2296 __func__, uath_codename(be32toh(hdr->code)),
2297 hdr->msgid, len, be32toh(hdr->magic));
2298 if (sc->sc_debug & UATH_DEBUG_CMDS_DUMP)
2299 uath_dump_cmd(cmd->buf,
2300 len > UATH_MAX_CMDSZ ? sizeof(*hdr) : len, '-');
2303 hdr->code = be32toh(hdr->code);
2304 hdr->len = be32toh(hdr->len);
2305 hdr->magic = be32toh(hdr->magic); /* target status on return */
2307 switch (hdr->code & 0xff) {
2308 /* reply to a read command */
2310 dlen = hdr->len - sizeof(*hdr);
2312 device_printf(sc->sc_dev,
2313 "Invalid header length %d\n", dlen);
2316 DPRINTF(sc, UATH_DEBUG_RX_PROC | UATH_DEBUG_RECV_ALL,
2317 "%s: code %d data len %u\n",
2318 __func__, hdr->code & 0xff, dlen);
2320 * The first response from the target after the
2321 * HOST_AVAILABLE has an invalid msgid so we must
2322 * treat it specially.
2324 if (hdr->msgid < UATH_CMD_LIST_COUNT) {
2325 uint32_t *rp = (uint32_t *)(hdr+1);
2328 if (!(sizeof(*hdr) <= hdr->len &&
2329 hdr->len < UATH_MAX_CMDSZ)) {
2330 device_printf(sc->sc_dev,
2331 "%s: invalid WDC msg length %u; "
2332 "msg ignored\n", __func__, hdr->len);
2336 * Calculate return/receive payload size; the
2337 * first word, if present, always gives the
2338 * number of bytes--unless it's 0 in which
2339 * case a single 32-bit word should be present.
2341 if (dlen >= (int)sizeof(uint32_t)) {
2342 olen = be32toh(rp[0]);
2343 dlen -= sizeof(uint32_t);
2345 /* convention is 0 =>'s one word */
2346 olen = sizeof(uint32_t);
2347 /* XXX KASSERT(olen == dlen ) */
2351 if (cmd->odata != NULL) {
2352 /* NB: cmd->olen validated in uath_cmd */
2353 if (olen > (u_int)cmd->olen) {
2355 device_printf(sc->sc_dev,
2356 "%s: cmd 0x%x olen %u cmd olen %u\n",
2357 __func__, hdr->code, olen,
2361 if (olen > (u_int)dlen) {
2362 /* XXX complain, shouldn't happen */
2363 device_printf(sc->sc_dev,
2364 "%s: cmd 0x%x olen %u dlen %u\n",
2365 __func__, hdr->code, olen, dlen);
2368 /* XXX have submitter do this */
2369 /* copy answer into caller's supplied buffer */
2370 bcopy(&rp[1], cmd->odata, olen);
2374 wakeup_one(cmd); /* wake up caller */
2377 case WDCMSG_TARGET_START:
2378 if (hdr->msgid >= UATH_CMD_LIST_COUNT) {
2382 dlen = hdr->len - sizeof(*hdr);
2383 if (dlen != (int)sizeof(uint32_t)) {
2384 /* XXX something wrong */
2387 /* XXX have submitter do this */
2388 /* copy answer into caller's supplied buffer */
2389 bcopy(hdr+1, cmd->odata, sizeof(uint32_t));
2390 cmd->olen = sizeof(uint32_t);
2391 wakeup_one(cmd); /* wake up caller */
2394 case WDCMSG_SEND_COMPLETE:
2395 /* this notification is sent when UATH_TX_NOTIFY is set */
2396 DPRINTF(sc, UATH_DEBUG_RX_PROC | UATH_DEBUG_RECV_ALL,
2397 "%s: received Tx notification\n", __func__);
2400 case WDCMSG_TARGET_GET_STATS:
2401 DPRINTF(sc, UATH_DEBUG_RX_PROC | UATH_DEBUG_RECV_ALL,
2402 "%s: received device statistics\n", __func__);
2403 callout_reset(&sc->stat_ch, hz, uath_stat, sc);
2409 uath_intr_rx_callback(struct usb_xfer *xfer, usb_error_t error)
2411 struct uath_softc *sc = usbd_xfer_softc(xfer);
2412 struct uath_cmd *cmd;
2413 struct usb_page_cache *pc;
2416 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
2418 UATH_ASSERT_LOCKED(sc);
2420 switch (USB_GET_STATE(xfer)) {
2421 case USB_ST_TRANSFERRED:
2422 cmd = STAILQ_FIRST(&sc->sc_cmd_waiting);
2425 STAILQ_REMOVE_HEAD(&sc->sc_cmd_waiting, next);
2426 UATH_STAT_DEC(sc, st_cmd_waiting);
2427 STAILQ_INSERT_TAIL(&sc->sc_cmd_inactive, cmd, next);
2428 UATH_STAT_INC(sc, st_cmd_inactive);
2430 KASSERT(actlen >= (int)sizeof(struct uath_cmd_hdr),
2431 ("short xfer error"));
2432 pc = usbd_xfer_get_frame(xfer, 0);
2433 usbd_copy_out(pc, 0, cmd->buf, actlen);
2434 uath_cmdeof(sc, cmd);
2437 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
2438 usbd_transfer_submit(xfer);
2441 if (error != USB_ERR_CANCELLED) {
2442 usbd_xfer_set_stall(xfer);
2450 uath_intr_tx_callback(struct usb_xfer *xfer, usb_error_t error)
2452 struct uath_softc *sc = usbd_xfer_softc(xfer);
2453 struct uath_cmd *cmd;
2455 UATH_ASSERT_LOCKED(sc);
2457 cmd = STAILQ_FIRST(&sc->sc_cmd_active);
2458 if (cmd != NULL && USB_GET_STATE(xfer) != USB_ST_SETUP) {
2459 STAILQ_REMOVE_HEAD(&sc->sc_cmd_active, next);
2460 UATH_STAT_DEC(sc, st_cmd_active);
2461 STAILQ_INSERT_TAIL((cmd->flags & UATH_CMD_FLAG_READ) ?
2462 &sc->sc_cmd_waiting : &sc->sc_cmd_inactive, cmd, next);
2463 if (cmd->flags & UATH_CMD_FLAG_READ)
2464 UATH_STAT_INC(sc, st_cmd_waiting);
2466 UATH_STAT_INC(sc, st_cmd_inactive);
2469 switch (USB_GET_STATE(xfer)) {
2470 case USB_ST_TRANSFERRED:
2473 cmd = STAILQ_FIRST(&sc->sc_cmd_pending);
2475 DPRINTF(sc, UATH_DEBUG_XMIT, "%s: empty pending queue\n",
2479 STAILQ_REMOVE_HEAD(&sc->sc_cmd_pending, next);
2480 UATH_STAT_DEC(sc, st_cmd_pending);
2481 STAILQ_INSERT_TAIL((cmd->flags & UATH_CMD_FLAG_ASYNC) ?
2482 &sc->sc_cmd_inactive : &sc->sc_cmd_active, cmd, next);
2483 if (cmd->flags & UATH_CMD_FLAG_ASYNC)
2484 UATH_STAT_INC(sc, st_cmd_inactive);
2486 UATH_STAT_INC(sc, st_cmd_active);
2488 usbd_xfer_set_frame_data(xfer, 0, cmd->buf, cmd->buflen);
2489 usbd_transfer_submit(xfer);
2492 if (error != USB_ERR_CANCELLED) {
2493 usbd_xfer_set_stall(xfer);
2501 uath_update_rxstat(struct uath_softc *sc, uint32_t status)
2505 case UATH_STATUS_STOP_IN_PROGRESS:
2506 UATH_STAT_INC(sc, st_stopinprogress);
2508 case UATH_STATUS_CRC_ERR:
2509 UATH_STAT_INC(sc, st_crcerr);
2511 case UATH_STATUS_PHY_ERR:
2512 UATH_STAT_INC(sc, st_phyerr);
2514 case UATH_STATUS_DECRYPT_CRC_ERR:
2515 UATH_STAT_INC(sc, st_decrypt_crcerr);
2517 case UATH_STATUS_DECRYPT_MIC_ERR:
2518 UATH_STAT_INC(sc, st_decrypt_micerr);
2520 case UATH_STATUS_DECOMP_ERR:
2521 UATH_STAT_INC(sc, st_decomperr);
2523 case UATH_STATUS_KEY_ERR:
2524 UATH_STAT_INC(sc, st_keyerr);
2526 case UATH_STATUS_ERR:
2527 UATH_STAT_INC(sc, st_err);
2534 static struct mbuf *
2535 uath_data_rxeof(struct usb_xfer *xfer, struct uath_data *data,
2536 struct uath_rx_desc **pdesc)
2538 struct uath_softc *sc = usbd_xfer_softc(xfer);
2539 struct ifnet *ifp = sc->sc_ifp;
2540 struct ieee80211com *ic = ifp->if_l2com;
2541 struct uath_chunk *chunk;
2542 struct uath_rx_desc *desc;
2543 struct mbuf *m = data->m, *mnew, *mp;
2547 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
2549 if (actlen < (int)UATH_MIN_RXBUFSZ) {
2550 DPRINTF(sc, UATH_DEBUG_RECV | UATH_DEBUG_RECV_ALL,
2551 "%s: wrong xfer size (len=%d)\n", __func__, actlen);
2556 chunk = (struct uath_chunk *)data->buf;
2557 if (chunk->seqnum == 0 && chunk->flags == 0 && chunk->length == 0) {
2558 device_printf(sc->sc_dev, "%s: strange response\n", __func__);
2560 UATH_RESET_INTRX(sc);
2564 if (chunk->seqnum != sc->sc_intrx_nextnum) {
2565 DPRINTF(sc, UATH_DEBUG_XMIT, "invalid seqnum %d, expected %d\n",
2566 chunk->seqnum, sc->sc_intrx_nextnum);
2567 UATH_STAT_INC(sc, st_badchunkseqnum);
2568 if (sc->sc_intrx_head != NULL)
2569 m_freem(sc->sc_intrx_head);
2570 UATH_RESET_INTRX(sc);
2574 /* check multi-chunk frames */
2575 if ((chunk->seqnum == 0 && !(chunk->flags & UATH_CFLAGS_FINAL)) ||
2576 (chunk->seqnum != 0 && (chunk->flags & UATH_CFLAGS_FINAL)) ||
2577 chunk->flags & UATH_CFLAGS_RXMSG)
2578 UATH_STAT_INC(sc, st_multichunk);
2580 chunklen = be16toh(chunk->length);
2581 if (chunk->flags & UATH_CFLAGS_FINAL)
2582 chunklen -= sizeof(struct uath_rx_desc);
2585 (!(chunk->flags & UATH_CFLAGS_FINAL) || !(chunk->seqnum == 0))) {
2586 /* we should use intermediate RX buffer */
2587 if (chunk->seqnum == 0)
2588 UATH_RESET_INTRX(sc);
2589 if ((sc->sc_intrx_len + sizeof(struct uath_rx_desc) +
2590 chunklen) > UATH_MAX_INTRX_SIZE) {
2591 UATH_STAT_INC(sc, st_invalidlen);
2593 if (sc->sc_intrx_head != NULL)
2594 m_freem(sc->sc_intrx_head);
2595 UATH_RESET_INTRX(sc);
2599 m->m_len = chunklen;
2600 m->m_data += sizeof(struct uath_chunk);
2602 if (sc->sc_intrx_head == NULL) {
2603 sc->sc_intrx_head = m;
2604 sc->sc_intrx_tail = m;
2606 m->m_flags &= ~M_PKTHDR;
2607 sc->sc_intrx_tail->m_next = m;
2608 sc->sc_intrx_tail = m;
2611 sc->sc_intrx_len += chunklen;
2613 mnew = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
2615 DPRINTF(sc, UATH_DEBUG_RECV | UATH_DEBUG_RECV_ALL,
2616 "%s: can't get new mbuf, drop frame\n", __func__);
2618 if (sc->sc_intrx_head != NULL)
2619 m_freem(sc->sc_intrx_head);
2620 UATH_RESET_INTRX(sc);
2625 data->buf = mtod(mnew, uint8_t *);
2627 /* if the frame is not final continue the transfer */
2628 if (!(chunk->flags & UATH_CFLAGS_FINAL)) {
2629 sc->sc_intrx_nextnum++;
2630 UATH_RESET_INTRX(sc);
2635 * if the frame is not set UATH_CFLAGS_RXMSG, then rx descriptor is
2636 * located at the end, 32-bit aligned
2638 desc = (chunk->flags & UATH_CFLAGS_RXMSG) ?
2639 (struct uath_rx_desc *)(chunk + 1) :
2640 (struct uath_rx_desc *)(((uint8_t *)chunk) +
2641 sizeof(struct uath_chunk) + be16toh(chunk->length) -
2642 sizeof(struct uath_rx_desc));
2645 DPRINTF(sc, UATH_DEBUG_RECV | UATH_DEBUG_RECV_ALL,
2646 "%s: frame len %u code %u status %u rate %u antenna %u "
2647 "rssi %d channel %u phyerror %u connix %u decrypterror %u "
2648 "keycachemiss %u\n", __func__, be32toh(desc->framelen)
2649 , be32toh(desc->code), be32toh(desc->status), be32toh(desc->rate)
2650 , be32toh(desc->antenna), be32toh(desc->rssi), be32toh(desc->channel)
2651 , be32toh(desc->phyerror), be32toh(desc->connix)
2652 , be32toh(desc->decrypterror), be32toh(desc->keycachemiss));
2654 if (be32toh(desc->len) > MCLBYTES) {
2655 DPRINTF(sc, UATH_DEBUG_RECV | UATH_DEBUG_RECV_ALL,
2656 "%s: bad descriptor (len=%d)\n", __func__,
2657 be32toh(desc->len));
2659 UATH_STAT_INC(sc, st_toobigrxpkt);
2660 if (sc->sc_intrx_head != NULL)
2661 m_freem(sc->sc_intrx_head);
2662 UATH_RESET_INTRX(sc);
2666 uath_update_rxstat(sc, be32toh(desc->status));
2669 if (sc->sc_intrx_head == NULL) {
2670 m->m_pkthdr.rcvif = ifp;
2671 m->m_pkthdr.len = m->m_len =
2672 be32toh(desc->framelen) - UATH_RX_DUMMYSIZE;
2673 m->m_data += sizeof(struct uath_chunk);
2675 mp = sc->sc_intrx_head;
2676 mp->m_pkthdr.rcvif = ifp;
2677 mp->m_flags |= M_PKTHDR;
2678 mp->m_pkthdr.len = sc->sc_intrx_len;
2682 /* there are a lot more fields in the RX descriptor */
2683 if ((sc->sc_flags & UATH_FLAG_INVALID) == 0 &&
2684 ieee80211_radiotap_active(ic)) {
2685 struct uath_rx_radiotap_header *tap = &sc->sc_rxtap;
2686 uint32_t tsf_hi = be32toh(desc->tstamp_high);
2687 uint32_t tsf_lo = be32toh(desc->tstamp_low);
2689 /* XXX only get low order 24bits of tsf from h/w */
2690 tap->wr_tsf = htole64(((uint64_t)tsf_hi << 32) | tsf_lo);
2692 if (be32toh(desc->status) == UATH_STATUS_CRC_ERR)
2693 tap->wr_flags |= IEEE80211_RADIOTAP_F_BADFCS;
2694 /* XXX map other status to BADFCS? */
2695 /* XXX ath h/w rate code, need to map */
2696 tap->wr_rate = be32toh(desc->rate);
2697 tap->wr_antenna = be32toh(desc->antenna);
2698 tap->wr_antsignal = -95 + be32toh(desc->rssi);
2699 tap->wr_antnoise = -95;
2703 UATH_RESET_INTRX(sc);
2709 uath_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error)
2711 struct uath_softc *sc = usbd_xfer_softc(xfer);
2712 struct ifnet *ifp = sc->sc_ifp;
2713 struct ieee80211com *ic = ifp->if_l2com;
2714 struct ieee80211_frame *wh;
2715 struct ieee80211_node *ni;
2716 struct mbuf *m = NULL;
2717 struct uath_data *data;
2718 struct uath_rx_desc *desc = NULL;
2721 UATH_ASSERT_LOCKED(sc);
2723 switch (USB_GET_STATE(xfer)) {
2724 case USB_ST_TRANSFERRED:
2725 data = STAILQ_FIRST(&sc->sc_rx_active);
2728 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next);
2729 UATH_STAT_DEC(sc, st_rx_active);
2730 m = uath_data_rxeof(xfer, data, &desc);
2731 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next);
2732 UATH_STAT_INC(sc, st_rx_inactive);
2736 data = STAILQ_FIRST(&sc->sc_rx_inactive);
2739 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next);
2740 UATH_STAT_DEC(sc, st_rx_inactive);
2741 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next);
2742 UATH_STAT_INC(sc, st_rx_active);
2743 usbd_xfer_set_frame_data(xfer, 0, data->buf, MCLBYTES);
2744 usbd_transfer_submit(xfer);
2747 * To avoid LOR we should unlock our private mutex here to call
2748 * ieee80211_input() because here is at the end of a USB
2749 * callback and safe to unlock.
2751 if (sc->sc_flags & UATH_FLAG_INVALID) {
2757 if (m != NULL && desc != NULL) {
2758 wh = mtod(m, struct ieee80211_frame *);
2759 ni = ieee80211_find_rxnode(ic,
2760 (struct ieee80211_frame_min *)wh);
2763 (void) ieee80211_input(ni, m,
2764 (int)be32toh(desc->rssi), nf);
2765 /* node is no longer needed */
2766 ieee80211_free_node(ni);
2768 (void) ieee80211_input_all(ic, m,
2769 (int)be32toh(desc->rssi), nf);
2773 if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0 &&
2774 !IFQ_IS_EMPTY(&ifp->if_snd))
2779 /* needs it to the inactive queue due to a error. */
2780 data = STAILQ_FIRST(&sc->sc_rx_active);
2782 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next);
2783 UATH_STAT_DEC(sc, st_rx_active);
2784 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next);
2785 UATH_STAT_INC(sc, st_rx_inactive);
2787 if (error != USB_ERR_CANCELLED) {
2788 usbd_xfer_set_stall(xfer);
2797 uath_data_txeof(struct usb_xfer *xfer, struct uath_data *data)
2799 struct uath_softc *sc = usbd_xfer_softc(xfer);
2800 struct ifnet *ifp = sc->sc_ifp;
2803 UATH_ASSERT_LOCKED(sc);
2806 * Do any tx complete callback. Note this must be done before releasing
2807 * the node reference.
2811 if (m->m_flags & M_TXCB &&
2812 (sc->sc_flags & UATH_FLAG_INVALID) == 0) {
2814 ieee80211_process_callback(data->ni, m, 0);
2820 if ((sc->sc_flags & UATH_FLAG_INVALID) == 0)
2821 ieee80211_free_node(data->ni);
2824 sc->sc_tx_timer = 0;
2826 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
2830 uath_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error)
2832 struct uath_softc *sc = usbd_xfer_softc(xfer);
2833 struct ifnet *ifp = sc->sc_ifp;
2834 struct uath_data *data;
2836 UATH_ASSERT_LOCKED(sc);
2838 switch (USB_GET_STATE(xfer)) {
2839 case USB_ST_TRANSFERRED:
2840 data = STAILQ_FIRST(&sc->sc_tx_active);
2843 STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next);
2844 UATH_STAT_DEC(sc, st_tx_active);
2845 uath_data_txeof(xfer, data);
2846 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next);
2847 UATH_STAT_INC(sc, st_tx_inactive);
2851 data = STAILQ_FIRST(&sc->sc_tx_pending);
2853 DPRINTF(sc, UATH_DEBUG_XMIT, "%s: empty pending queue\n",
2857 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next);
2858 UATH_STAT_DEC(sc, st_tx_pending);
2859 STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next);
2860 UATH_STAT_INC(sc, st_tx_active);
2862 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen);
2863 usbd_transfer_submit(xfer);
2870 data = STAILQ_FIRST(&sc->sc_tx_active);
2873 if (data->ni != NULL) {
2874 if ((sc->sc_flags & UATH_FLAG_INVALID) == 0)
2875 ieee80211_free_node(data->ni);
2879 if (error != USB_ERR_CANCELLED) {
2880 usbd_xfer_set_stall(xfer);
2887 static device_method_t uath_methods[] = {
2888 DEVMETHOD(device_probe, uath_match),
2889 DEVMETHOD(device_attach, uath_attach),
2890 DEVMETHOD(device_detach, uath_detach),
2893 static driver_t uath_driver = {
2895 .methods = uath_methods,
2896 .size = sizeof(struct uath_softc)
2898 static devclass_t uath_devclass;
2900 DRIVER_MODULE(uath, uhub, uath_driver, uath_devclass, NULL, 0);
2901 MODULE_DEPEND(uath, wlan, 1, 1, 1);
2902 MODULE_DEPEND(uath, usb, 1, 1, 1);
2903 MODULE_VERSION(uath, 1);