sys/dev/usb/wlan/if_ural.c

   1 /*      $FreeBSD$       */
   2
   3 /*-
   4  * Copyright (c) 2005, 2006
   5  *      Damien Bergamini <damien.bergamini@free.fr>
   6  *
   7  * Copyright (c) 2006, 2008
   8  *      Hans Petter Selasky <hselasky@FreeBSD.org>
   9  *
  10  * Permission to use, copy, modify, and distribute this software for any
  11  * purpose with or without fee is hereby granted, provided that the above
  12  * copyright notice and this permission notice appear in all copies.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  15  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  16  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  17  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  18  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  19  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  20  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  21  */
  22
  23 #include <sys/cdefs.h>
  24 __FBSDID("$FreeBSD$");
  25
  26 /*-
  27  * Ralink Technology RT2500USB chipset driver
  28  * http://www.ralinktech.com/
  29  */
  30
  31 #include <sys/param.h>
  32 #include <sys/sockio.h>
  33 #include <sys/sysctl.h>
  34 #include <sys/lock.h>
  35 #include <sys/mutex.h>
  36 #include <sys/mbuf.h>
  37 #include <sys/kernel.h>
  38 #include <sys/socket.h>
  39 #include <sys/systm.h>
  40 #include <sys/malloc.h>
  41 #include <sys/module.h>
  42 #include <sys/bus.h>
  43 #include <sys/endian.h>
  44 #include <sys/kdb.h>
  45
  46 #include <machine/bus.h>
  47 #include <machine/resource.h>
  48 #include <sys/rman.h>
  49
  50 #include <net/bpf.h>
  51 #include <net/if.h>
  52 #include <net/if_arp.h>
  53 #include <net/ethernet.h>
  54 #include <net/if_dl.h>
  55 #include <net/if_media.h>
  56 #include <net/if_types.h>
  57
  58 #ifdef INET
  59 #include <netinet/in.h>
  60 #include <netinet/in_systm.h>
  61 #include <netinet/in_var.h>
  62 #include <netinet/if_ether.h>
  63 #include <netinet/ip.h>
  64 #endif
  65
  66 #include <net80211/ieee80211_var.h>
  67 #include <net80211/ieee80211_regdomain.h>
  68 #include <net80211/ieee80211_radiotap.h>
  69 #include <net80211/ieee80211_ratectl.h>
  70
  71 #include <dev/usb/usb.h>
  72 #include <dev/usb/usbdi.h>
  73 #include "usbdevs.h"
  74
  75 #define USB_DEBUG_VAR ural_debug
  76 #include <dev/usb/usb_debug.h>
  77
  78 #include <dev/usb/wlan/if_uralreg.h>
  79 #include <dev/usb/wlan/if_uralvar.h>
  80
  81 #ifdef USB_DEBUG
  82 static int ural_debug = 0;
  83
  84 static SYSCTL_NODE(_hw_usb, OID_AUTO, ural, CTLFLAG_RW, 0, "USB ural");
  85 SYSCTL_INT(_hw_usb_ural, OID_AUTO, debug, CTLFLAG_RW, &ural_debug, 0,
  86     "Debug level");
  87 #endif
  88
  89 #define URAL_RSSI(rssi)                                 \
  90         ((rssi) > (RAL_NOISE_FLOOR + RAL_RSSI_CORR) ?   \
  91          ((rssi) - (RAL_NOISE_FLOOR + RAL_RSSI_CORR)) : 0)
  92
  93 /* various supported device vendors/products */
  94 static const STRUCT_USB_HOST_ID ural_devs[] = {
  95 #define URAL_DEV(v,p)  { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) }
  96         URAL_DEV(ASUS, WL167G),
  97         URAL_DEV(ASUS, RT2570),
  98         URAL_DEV(BELKIN, F5D7050),
  99         URAL_DEV(BELKIN, F5D7051),
 100         URAL_DEV(CISCOLINKSYS, HU200TS),
 101         URAL_DEV(CISCOLINKSYS, WUSB54G),
 102         URAL_DEV(CISCOLINKSYS, WUSB54GP),
 103         URAL_DEV(CONCEPTRONIC2, C54RU),
 104         URAL_DEV(DLINK, DWLG122),
 105         URAL_DEV(GIGABYTE, GN54G),
 106         URAL_DEV(GIGABYTE, GNWBKG),
 107         URAL_DEV(GUILLEMOT, HWGUSB254),
 108         URAL_DEV(MELCO, KG54),
 109         URAL_DEV(MELCO, KG54AI),
 110         URAL_DEV(MELCO, KG54YB),
 111         URAL_DEV(MELCO, NINWIFI),
 112         URAL_DEV(MSI, RT2570),
 113         URAL_DEV(MSI, RT2570_2),
 114         URAL_DEV(MSI, RT2570_3),
 115         URAL_DEV(NOVATECH, NV902),
 116         URAL_DEV(RALINK, RT2570),
 117         URAL_DEV(RALINK, RT2570_2),
 118         URAL_DEV(RALINK, RT2570_3),
 119         URAL_DEV(SIEMENS2, WL54G),
 120         URAL_DEV(SMC, 2862WG),
 121         URAL_DEV(SPHAIRON, UB801R),
 122         URAL_DEV(SURECOM, RT2570),
 123         URAL_DEV(VTECH, RT2570),
 124         URAL_DEV(ZINWELL, RT2570),
 125 #undef URAL_DEV
 126 };
 127
 128 static usb_callback_t ural_bulk_read_callback;
 129 static usb_callback_t ural_bulk_write_callback;
 130
 131 static usb_error_t      ural_do_request(struct ural_softc *sc,
 132                             struct usb_device_request *req, void *data);
 133 static struct ieee80211vap *ural_vap_create(struct ieee80211com *,
 134                             const char [IFNAMSIZ], int, enum ieee80211_opmode,
 135                             int, const uint8_t [IEEE80211_ADDR_LEN],
 136                             const uint8_t [IEEE80211_ADDR_LEN]);
 137 static void             ural_vap_delete(struct ieee80211vap *);
 138 static void             ural_tx_free(struct ural_tx_data *, int);
 139 static void             ural_setup_tx_list(struct ural_softc *);
 140 static void             ural_unsetup_tx_list(struct ural_softc *);
 141 static int              ural_newstate(struct ieee80211vap *,
 142                             enum ieee80211_state, int);
 143 static void             ural_setup_tx_desc(struct ural_softc *,
 144                             struct ural_tx_desc *, uint32_t, int, int);
 145 static int              ural_tx_bcn(struct ural_softc *, struct mbuf *,
 146                             struct ieee80211_node *);
 147 static int              ural_tx_mgt(struct ural_softc *, struct mbuf *,
 148                             struct ieee80211_node *);
 149 static int              ural_tx_data(struct ural_softc *, struct mbuf *,
 150                             struct ieee80211_node *);
 151 static void             ural_start(struct ifnet *);
 152 static int              ural_ioctl(struct ifnet *, u_long, caddr_t);
 153 static void             ural_set_testmode(struct ural_softc *);
 154 static void             ural_eeprom_read(struct ural_softc *, uint16_t, void *,
 155                             int);
 156 static uint16_t         ural_read(struct ural_softc *, uint16_t);
 157 static void             ural_read_multi(struct ural_softc *, uint16_t, void *,
 158                             int);
 159 static void             ural_write(struct ural_softc *, uint16_t, uint16_t);
 160 static void             ural_write_multi(struct ural_softc *, uint16_t, void *,
 161                             int) __unused;
 162 static void             ural_bbp_write(struct ural_softc *, uint8_t, uint8_t);
 163 static uint8_t          ural_bbp_read(struct ural_softc *, uint8_t);
 164 static void             ural_rf_write(struct ural_softc *, uint8_t, uint32_t);
 165 static void             ural_scan_start(struct ieee80211com *);
 166 static void             ural_scan_end(struct ieee80211com *);
 167 static void             ural_set_channel(struct ieee80211com *);
 168 static void             ural_set_chan(struct ural_softc *,
 169                             struct ieee80211_channel *);
 170 static void             ural_disable_rf_tune(struct ural_softc *);
 171 static void             ural_enable_tsf_sync(struct ural_softc *);
 172 static void             ural_enable_tsf(struct ural_softc *);
 173 static void             ural_update_slot(struct ifnet *);
 174 static void             ural_set_txpreamble(struct ural_softc *);
 175 static void             ural_set_basicrates(struct ural_softc *,
 176                             const struct ieee80211_channel *);
 177 static void             ural_set_bssid(struct ural_softc *, const uint8_t *);
 178 static void             ural_set_macaddr(struct ural_softc *, uint8_t *);
 179 static void             ural_update_promisc(struct ifnet *);
 180 static void             ural_setpromisc(struct ural_softc *);
 181 static const char       *ural_get_rf(int);
 182 static void             ural_read_eeprom(struct ural_softc *);
 183 static int              ural_bbp_init(struct ural_softc *);
 184 static void             ural_set_txantenna(struct ural_softc *, int);
 185 static void             ural_set_rxantenna(struct ural_softc *, int);
 186 static void             ural_init_locked(struct ural_softc *);
 187 static void             ural_init(void *);
 188 static void             ural_stop(struct ural_softc *);
 189 static int              ural_raw_xmit(struct ieee80211_node *, struct mbuf *,
 190                             const struct ieee80211_bpf_params *);
 191 static void             ural_ratectl_start(struct ural_softc *,
 192                             struct ieee80211_node *);
 193 static void             ural_ratectl_timeout(void *);
 194 static void             ural_ratectl_task(void *, int);
 195 static int              ural_pause(struct ural_softc *sc, int timeout);
 196
 197 /*
 198  * Default values for MAC registers; values taken from the reference driver.
 199  */
 200 static const struct {
 201         uint16_t        reg;
 202         uint16_t        val;
 203 } ural_def_mac[] = {
 204         { RAL_TXRX_CSR5,  0x8c8d },
 205         { RAL_TXRX_CSR6,  0x8b8a },
 206         { RAL_TXRX_CSR7,  0x8687 },
 207         { RAL_TXRX_CSR8,  0x0085 },
 208         { RAL_MAC_CSR13,  0x1111 },
 209         { RAL_MAC_CSR14,  0x1e11 },
 210         { RAL_TXRX_CSR21, 0xe78f },
 211         { RAL_MAC_CSR9,   0xff1d },
 212         { RAL_MAC_CSR11,  0x0002 },
 213         { RAL_MAC_CSR22,  0x0053 },
 214         { RAL_MAC_CSR15,  0x0000 },
 215         { RAL_MAC_CSR8,   RAL_FRAME_SIZE },
 216         { RAL_TXRX_CSR19, 0x0000 },
 217         { RAL_TXRX_CSR18, 0x005a },
 218         { RAL_PHY_CSR2,   0x0000 },
 219         { RAL_TXRX_CSR0,  0x1ec0 },
 220         { RAL_PHY_CSR4,   0x000f }
 221 };
 222
 223 /*
 224  * Default values for BBP registers; values taken from the reference driver.
 225  */
 226 static const struct {
 227         uint8_t reg;
 228         uint8_t val;
 229 } ural_def_bbp[] = {
 230         {  3, 0x02 },
 231         {  4, 0x19 },
 232         { 14, 0x1c },
 233         { 15, 0x30 },
 234         { 16, 0xac },
 235         { 17, 0x48 },
 236         { 18, 0x18 },
 237         { 19, 0xff },
 238         { 20, 0x1e },
 239         { 21, 0x08 },
 240         { 22, 0x08 },
 241         { 23, 0x08 },
 242         { 24, 0x80 },
 243         { 25, 0x50 },
 244         { 26, 0x08 },
 245         { 27, 0x23 },
 246         { 30, 0x10 },
 247         { 31, 0x2b },
 248         { 32, 0xb9 },
 249         { 34, 0x12 },
 250         { 35, 0x50 },
 251         { 39, 0xc4 },
 252         { 40, 0x02 },
 253         { 41, 0x60 },
 254         { 53, 0x10 },
 255         { 54, 0x18 },
 256         { 56, 0x08 },
 257         { 57, 0x10 },
 258         { 58, 0x08 },
 259         { 61, 0x60 },
 260         { 62, 0x10 },
 261         { 75, 0xff }
 262 };
 263
 264 /*
 265  * Default values for RF register R2 indexed by channel numbers.
 266  */
 267 static const uint32_t ural_rf2522_r2[] = {
 268         0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814,
 269         0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e
 270 };
 271
 272 static const uint32_t ural_rf2523_r2[] = {
 273         0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
 274         0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
 275 };
 276
 277 static const uint32_t ural_rf2524_r2[] = {
 278         0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
 279         0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
 280 };
 281
 282 static const uint32_t ural_rf2525_r2[] = {
 283         0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d,
 284         0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346
 285 };
 286
 287 static const uint32_t ural_rf2525_hi_r2[] = {
 288         0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345,
 289         0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e
 290 };
 291
 292 static const uint32_t ural_rf2525e_r2[] = {
 293         0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463,
 294         0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b
 295 };
 296
 297 static const uint32_t ural_rf2526_hi_r2[] = {
 298         0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d,
 299         0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241
 300 };
 301
 302 static const uint32_t ural_rf2526_r2[] = {
 303         0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229,
 304         0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d
 305 };
 306
 307 /*
 308  * For dual-band RF, RF registers R1 and R4 also depend on channel number;
 309  * values taken from the reference driver.
 310  */
 311 static const struct {
 312         uint8_t         chan;
 313         uint32_t        r1;
 314         uint32_t        r2;
 315         uint32_t        r4;
 316 } ural_rf5222[] = {
 317         {   1, 0x08808, 0x0044d, 0x00282 },
 318         {   2, 0x08808, 0x0044e, 0x00282 },
 319         {   3, 0x08808, 0x0044f, 0x00282 },
 320         {   4, 0x08808, 0x00460, 0x00282 },
 321         {   5, 0x08808, 0x00461, 0x00282 },
 322         {   6, 0x08808, 0x00462, 0x00282 },
 323         {   7, 0x08808, 0x00463, 0x00282 },
 324         {   8, 0x08808, 0x00464, 0x00282 },
 325         {   9, 0x08808, 0x00465, 0x00282 },
 326         {  10, 0x08808, 0x00466, 0x00282 },
 327         {  11, 0x08808, 0x00467, 0x00282 },
 328         {  12, 0x08808, 0x00468, 0x00282 },
 329         {  13, 0x08808, 0x00469, 0x00282 },
 330         {  14, 0x08808, 0x0046b, 0x00286 },
 331
 332         {  36, 0x08804, 0x06225, 0x00287 },
 333         {  40, 0x08804, 0x06226, 0x00287 },
 334         {  44, 0x08804, 0x06227, 0x00287 },
 335         {  48, 0x08804, 0x06228, 0x00287 },
 336         {  52, 0x08804, 0x06229, 0x00287 },
 337         {  56, 0x08804, 0x0622a, 0x00287 },
 338         {  60, 0x08804, 0x0622b, 0x00287 },
 339         {  64, 0x08804, 0x0622c, 0x00287 },
 340
 341         { 100, 0x08804, 0x02200, 0x00283 },
 342         { 104, 0x08804, 0x02201, 0x00283 },
 343         { 108, 0x08804, 0x02202, 0x00283 },
 344         { 112, 0x08804, 0x02203, 0x00283 },
 345         { 116, 0x08804, 0x02204, 0x00283 },
 346         { 120, 0x08804, 0x02205, 0x00283 },
 347         { 124, 0x08804, 0x02206, 0x00283 },
 348         { 128, 0x08804, 0x02207, 0x00283 },
 349         { 132, 0x08804, 0x02208, 0x00283 },
 350         { 136, 0x08804, 0x02209, 0x00283 },
 351         { 140, 0x08804, 0x0220a, 0x00283 },
 352
 353         { 149, 0x08808, 0x02429, 0x00281 },
 354         { 153, 0x08808, 0x0242b, 0x00281 },
 355         { 157, 0x08808, 0x0242d, 0x00281 },
 356         { 161, 0x08808, 0x0242f, 0x00281 }
 357 };
 358
 359 static const struct usb_config ural_config[URAL_N_TRANSFER] = {
 360         [URAL_BULK_WR] = {
 361                 .type = UE_BULK,
 362                 .endpoint = UE_ADDR_ANY,
 363                 .direction = UE_DIR_OUT,
 364                 .bufsize = (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE + 4),
 365                 .flags = {.pipe_bof = 1,.force_short_xfer = 1,},
 366                 .callback = ural_bulk_write_callback,
 367                 .timeout = 5000,        /* ms */
 368         },
 369         [URAL_BULK_RD] = {
 370                 .type = UE_BULK,
 371                 .endpoint = UE_ADDR_ANY,
 372                 .direction = UE_DIR_IN,
 373                 .bufsize = (RAL_FRAME_SIZE + RAL_RX_DESC_SIZE),
 374                 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
 375                 .callback = ural_bulk_read_callback,
 376         },
 377 };
 378
 379 static device_probe_t ural_match;
 380 static device_attach_t ural_attach;
 381 static device_detach_t ural_detach;
 382
 383 static device_method_t ural_methods[] = {
 384         /* Device interface */
 385         DEVMETHOD(device_probe,         ural_match),
 386         DEVMETHOD(device_attach,        ural_attach),
 387         DEVMETHOD(device_detach,        ural_detach),
 388         DEVMETHOD_END
 389 };
 390
 391 static driver_t ural_driver = {
 392         .name = "ural",
 393         .methods = ural_methods,
 394         .size = sizeof(struct ural_softc),
 395 };
 396
 397 static devclass_t ural_devclass;
 398
 399 DRIVER_MODULE(ural, uhub, ural_driver, ural_devclass, NULL, 0);
 400 MODULE_DEPEND(ural, usb, 1, 1, 1);
 401 MODULE_DEPEND(ural, wlan, 1, 1, 1);
 402 MODULE_VERSION(ural, 1);
 403
 404 static int
 405 ural_match(device_t self)
 406 {
 407         struct usb_attach_arg *uaa = device_get_ivars(self);
 408
 409         if (uaa->usb_mode != USB_MODE_HOST)
 410                 return (ENXIO);
 411         if (uaa->info.bConfigIndex != 0)
 412                 return (ENXIO);
 413         if (uaa->info.bIfaceIndex != RAL_IFACE_INDEX)
 414                 return (ENXIO);
 415
 416         return (usbd_lookup_id_by_uaa(ural_devs, sizeof(ural_devs), uaa));
 417 }
 418
 419 static int
 420 ural_attach(device_t self)
 421 {
 422         struct usb_attach_arg *uaa = device_get_ivars(self);
 423         struct ural_softc *sc = device_get_softc(self);
 424         struct ifnet *ifp;
 425         struct ieee80211com *ic;
 426         uint8_t iface_index, bands;
 427         int error;
 428
 429         device_set_usb_desc(self);
 430         sc->sc_udev = uaa->device;
 431         sc->sc_dev = self;
 432
 433         mtx_init(&sc->sc_mtx, device_get_nameunit(self),
 434             MTX_NETWORK_LOCK, MTX_DEF);
 435
 436         iface_index = RAL_IFACE_INDEX;
 437         error = usbd_transfer_setup(uaa->device,
 438             &iface_index, sc->sc_xfer, ural_config,
 439             URAL_N_TRANSFER, sc, &sc->sc_mtx);
 440         if (error) {
 441                 device_printf(self, "could not allocate USB transfers, "
 442                     "err=%s\n", usbd_errstr(error));
 443                 goto detach;
 444         }
 445
 446         RAL_LOCK(sc);
 447         /* retrieve RT2570 rev. no */
 448         sc->asic_rev = ural_read(sc, RAL_MAC_CSR0);
 449
 450         /* retrieve MAC address and various other things from EEPROM */
 451         ural_read_eeprom(sc);
 452         RAL_UNLOCK(sc);
 453
 454         device_printf(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n",
 455             sc->asic_rev, ural_get_rf(sc->rf_rev));
 456
 457         ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
 458         if (ifp == NULL) {
 459                 device_printf(sc->sc_dev, "can not if_alloc()\n");
 460                 goto detach;
 461         }
 462         ic = ifp->if_l2com;
 463
 464         ifp->if_softc = sc;
 465         if_initname(ifp, "ural", device_get_unit(sc->sc_dev));
 466         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
 467         ifp->if_init = ural_init;
 468         ifp->if_ioctl = ural_ioctl;
 469         ifp->if_start = ural_start;
 470         IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
 471         ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
 472         IFQ_SET_READY(&ifp->if_snd);
 473
 474         ic->ic_ifp = ifp;
 475         ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
 476
 477         /* set device capabilities */
 478         ic->ic_caps =
 479               IEEE80211_C_STA           /* station mode supported */
 480             | IEEE80211_C_IBSS          /* IBSS mode supported */
 481             | IEEE80211_C_MONITOR       /* monitor mode supported */
 482             | IEEE80211_C_HOSTAP        /* HostAp mode supported */
 483             | IEEE80211_C_TXPMGT        /* tx power management */
 484             | IEEE80211_C_SHPREAMBLE    /* short preamble supported */
 485             | IEEE80211_C_SHSLOT        /* short slot time supported */
 486             | IEEE80211_C_BGSCAN        /* bg scanning supported */
 487             | IEEE80211_C_WPA           /* 802.11i */
 488             ;
 489
 490         bands = 0;
 491         setbit(&bands, IEEE80211_MODE_11B);
 492         setbit(&bands, IEEE80211_MODE_11G);
 493         if (sc->rf_rev == RAL_RF_5222)
 494                 setbit(&bands, IEEE80211_MODE_11A);
 495         ieee80211_init_channels(ic, NULL, &bands);
 496
 497         ieee80211_ifattach(ic, sc->sc_bssid);
 498         ic->ic_update_promisc = ural_update_promisc;
 499         ic->ic_raw_xmit = ural_raw_xmit;
 500         ic->ic_scan_start = ural_scan_start;
 501         ic->ic_scan_end = ural_scan_end;
 502         ic->ic_set_channel = ural_set_channel;
 503
 504         ic->ic_vap_create = ural_vap_create;
 505         ic->ic_vap_delete = ural_vap_delete;
 506
 507         ieee80211_radiotap_attach(ic,
 508             &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
 509                 RAL_TX_RADIOTAP_PRESENT,
 510             &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
 511                 RAL_RX_RADIOTAP_PRESENT);
 512
 513         if (bootverbose)
 514                 ieee80211_announce(ic);
 515
 516         return (0);
 517
 518 detach:
 519         ural_detach(self);
 520         return (ENXIO);                 /* failure */
 521 }
 522
 523 static int
 524 ural_detach(device_t self)
 525 {
 526         struct ural_softc *sc = device_get_softc(self);
 527         struct ifnet *ifp = sc->sc_ifp;
 528         struct ieee80211com *ic;
 529
 530         /* prevent further ioctls */
 531         RAL_LOCK(sc);
 532         sc->sc_detached = 1;
 533         RAL_UNLOCK(sc);
 534
 535         /* stop all USB transfers */
 536         usbd_transfer_unsetup(sc->sc_xfer, URAL_N_TRANSFER);
 537
 538         /* free TX list, if any */
 539         RAL_LOCK(sc);
 540         ural_unsetup_tx_list(sc);
 541         RAL_UNLOCK(sc);
 542
 543         if (ifp) {
 544                 ic = ifp->if_l2com;
 545                 ieee80211_ifdetach(ic);
 546                 if_free(ifp);
 547         }
 548         mtx_destroy(&sc->sc_mtx);
 549
 550         return (0);
 551 }
 552
 553 static usb_error_t
 554 ural_do_request(struct ural_softc *sc,
 555     struct usb_device_request *req, void *data)
 556 {
 557         usb_error_t err;
 558         int ntries = 10;
 559
 560         while (ntries--) {
 561                 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx,
 562                     req, data, 0, NULL, 250 /* ms */);
 563                 if (err == 0)
 564                         break;
 565
 566                 DPRINTFN(1, "Control request failed, %s (retrying)\n",
 567                     usbd_errstr(err));
 568                 if (ural_pause(sc, hz / 100))
 569                         break;
 570         }
 571         return (err);
 572 }
 573
 574 static struct ieee80211vap *
 575 ural_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
 576     enum ieee80211_opmode opmode, int flags,
 577     const uint8_t bssid[IEEE80211_ADDR_LEN],
 578     const uint8_t mac[IEEE80211_ADDR_LEN])
 579 {
 580         struct ural_softc *sc = ic->ic_ifp->if_softc;
 581         struct ural_vap *uvp;
 582         struct ieee80211vap *vap;
 583
 584         if (!TAILQ_EMPTY(&ic->ic_vaps))         /* only one at a time */
 585                 return NULL;
 586         uvp = (struct ural_vap *) malloc(sizeof(struct ural_vap),
 587             M_80211_VAP, M_NOWAIT | M_ZERO);
 588         if (uvp == NULL)
 589                 return NULL;
 590         vap = &uvp->vap;
 591         /* enable s/w bmiss handling for sta mode */
 592         ieee80211_vap_setup(ic, vap, name, unit, opmode,
 593             flags | IEEE80211_CLONE_NOBEACONS, bssid, mac);
 594
 595         /* override state transition machine */
 596         uvp->newstate = vap->iv_newstate;
 597         vap->iv_newstate = ural_newstate;
 598
 599         usb_callout_init_mtx(&uvp->ratectl_ch, &sc->sc_mtx, 0);
 600         TASK_INIT(&uvp->ratectl_task, 0, ural_ratectl_task, uvp);
 601         ieee80211_ratectl_init(vap);
 602         ieee80211_ratectl_setinterval(vap, 1000 /* 1 sec */);
 603
 604         /* complete setup */
 605         ieee80211_vap_attach(vap, ieee80211_media_change, ieee80211_media_status);
 606         ic->ic_opmode = opmode;
 607         return vap;
 608 }
 609
 610 static void
 611 ural_vap_delete(struct ieee80211vap *vap)
 612 {
 613         struct ural_vap *uvp = URAL_VAP(vap);
 614         struct ieee80211com *ic = vap->iv_ic;
 615
 616         usb_callout_drain(&uvp->ratectl_ch);
 617         ieee80211_draintask(ic, &uvp->ratectl_task);
 618         ieee80211_ratectl_deinit(vap);
 619         ieee80211_vap_detach(vap);
 620         free(uvp, M_80211_VAP);
 621 }
 622
 623 static void
 624 ural_tx_free(struct ural_tx_data *data, int txerr)
 625 {
 626         struct ural_softc *sc = data->sc;
 627
 628         if (data->m != NULL) {
 629                 if (data->m->m_flags & M_TXCB)
 630                         ieee80211_process_callback(data->ni, data->m,
 631                             txerr ? ETIMEDOUT : 0);
 632                 m_freem(data->m);
 633                 data->m = NULL;
 634
 635                 ieee80211_free_node(data->ni);
 636                 data->ni = NULL;
 637         }
 638         STAILQ_INSERT_TAIL(&sc->tx_free, data, next);
 639         sc->tx_nfree++;
 640 }
 641
 642 static void
 643 ural_setup_tx_list(struct ural_softc *sc)
 644 {
 645         struct ural_tx_data *data;
 646         int i;
 647
 648         sc->tx_nfree = 0;
 649         STAILQ_INIT(&sc->tx_q);
 650         STAILQ_INIT(&sc->tx_free);
 651
 652         for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
 653                 data = &sc->tx_data[i];
 654
 655                 data->sc = sc;
 656                 STAILQ_INSERT_TAIL(&sc->tx_free, data, next);
 657                 sc->tx_nfree++;
 658         }
 659 }
 660
 661 static void
 662 ural_unsetup_tx_list(struct ural_softc *sc)
 663 {
 664         struct ural_tx_data *data;
 665         int i;
 666
 667         /* make sure any subsequent use of the queues will fail */
 668         sc->tx_nfree = 0;
 669         STAILQ_INIT(&sc->tx_q);
 670         STAILQ_INIT(&sc->tx_free);
 671
 672         /* free up all node references and mbufs */
 673         for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
 674                 data = &sc->tx_data[i];
 675
 676                 if (data->m != NULL) {
 677                         m_freem(data->m);
 678                         data->m = NULL;
 679                 }
 680                 if (data->ni != NULL) {
 681                         ieee80211_free_node(data->ni);
 682                         data->ni = NULL;
 683                 }
 684         }
 685 }
 686
 687 static int
 688 ural_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
 689 {
 690         struct ural_vap *uvp = URAL_VAP(vap);
 691         struct ieee80211com *ic = vap->iv_ic;
 692         struct ural_softc *sc = ic->ic_ifp->if_softc;
 693         const struct ieee80211_txparam *tp;
 694         struct ieee80211_node *ni;
 695         struct mbuf *m;
 696
 697         DPRINTF("%s -> %s\n",
 698                 ieee80211_state_name[vap->iv_state],
 699                 ieee80211_state_name[nstate]);
 700
 701         IEEE80211_UNLOCK(ic);
 702         RAL_LOCK(sc);
 703         usb_callout_stop(&uvp->ratectl_ch);
 704
 705         switch (nstate) {
 706         case IEEE80211_S_INIT:
 707                 if (vap->iv_state == IEEE80211_S_RUN) {
 708                         /* abort TSF synchronization */
 709                         ural_write(sc, RAL_TXRX_CSR19, 0);
 710
 711                         /* force tx led to stop blinking */
 712                         ural_write(sc, RAL_MAC_CSR20, 0);
 713                 }
 714                 break;
 715
 716         case IEEE80211_S_RUN:
 717                 ni = ieee80211_ref_node(vap->iv_bss);
 718
 719                 if (vap->iv_opmode != IEEE80211_M_MONITOR) {
 720                         if (ic->ic_bsschan == IEEE80211_CHAN_ANYC) {
 721                                 RAL_UNLOCK(sc);
 722                                 IEEE80211_LOCK(ic);
 723                                 ieee80211_free_node(ni);
 724                                 return (-1);
 725                         }
 726                         ural_update_slot(ic->ic_ifp);
 727                         ural_set_txpreamble(sc);
 728                         ural_set_basicrates(sc, ic->ic_bsschan);
 729                         IEEE80211_ADDR_COPY(sc->sc_bssid, ni->ni_bssid);
 730                         ural_set_bssid(sc, sc->sc_bssid);
 731                 }
 732
 733                 if (vap->iv_opmode == IEEE80211_M_HOSTAP ||
 734                     vap->iv_opmode == IEEE80211_M_IBSS) {
 735                         m = ieee80211_beacon_alloc(ni, &uvp->bo);
 736                         if (m == NULL) {
 737                                 device_printf(sc->sc_dev,
 738                                     "could not allocate beacon\n");
 739                                 RAL_UNLOCK(sc);
 740                                 IEEE80211_LOCK(ic);
 741                                 ieee80211_free_node(ni);
 742                                 return (-1);
 743                         }
 744                         ieee80211_ref_node(ni);
 745                         if (ural_tx_bcn(sc, m, ni) != 0) {
 746                                 device_printf(sc->sc_dev,
 747                                     "could not send beacon\n");
 748                                 RAL_UNLOCK(sc);
 749                                 IEEE80211_LOCK(ic);
 750                                 ieee80211_free_node(ni);
 751                                 return (-1);
 752                         }
 753                 }
 754
 755                 /* make tx led blink on tx (controlled by ASIC) */
 756                 ural_write(sc, RAL_MAC_CSR20, 1);
 757
 758                 if (vap->iv_opmode != IEEE80211_M_MONITOR)
 759                         ural_enable_tsf_sync(sc);
 760                 else
 761                         ural_enable_tsf(sc);
 762
 763                 /* enable automatic rate adaptation */
 764                 /* XXX should use ic_bsschan but not valid until after newstate call below */
 765                 tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)];
 766                 if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE)
 767                         ural_ratectl_start(sc, ni);
 768                 ieee80211_free_node(ni);
 769                 break;
 770
 771         default:
 772                 break;
 773         }
 774         RAL_UNLOCK(sc);
 775         IEEE80211_LOCK(ic);
 776         return (uvp->newstate(vap, nstate, arg));
 777 }
 778
 779
 780 static void
 781 ural_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
 782 {
 783         struct ural_softc *sc = usbd_xfer_softc(xfer);
 784         struct ifnet *ifp = sc->sc_ifp;
 785         struct ieee80211vap *vap;
 786         struct ural_tx_data *data;
 787         struct mbuf *m;
 788         struct usb_page_cache *pc;
 789         int len;
 790
 791         usbd_xfer_status(xfer, &len, NULL, NULL, NULL);
 792
 793         switch (USB_GET_STATE(xfer)) {
 794         case USB_ST_TRANSFERRED:
 795                 DPRINTFN(11, "transfer complete, %d bytes\n", len);
 796
 797                 /* free resources */
 798                 data = usbd_xfer_get_priv(xfer);
 799                 ural_tx_free(data, 0);
 800                 usbd_xfer_set_priv(xfer, NULL);
 801
 802                 ifp->if_opackets++;
 803                 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
 804
 805                 /* FALLTHROUGH */
 806         case USB_ST_SETUP:
 807 tr_setup:
 808                 data = STAILQ_FIRST(&sc->tx_q);
 809                 if (data) {
 810                         STAILQ_REMOVE_HEAD(&sc->tx_q, next);
 811                         m = data->m;
 812
 813                         if (m->m_pkthdr.len > (int)(RAL_FRAME_SIZE + RAL_TX_DESC_SIZE)) {
 814                                 DPRINTFN(0, "data overflow, %u bytes\n",
 815                                     m->m_pkthdr.len);
 816                                 m->m_pkthdr.len = (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE);
 817                         }
 818                         pc = usbd_xfer_get_frame(xfer, 0);
 819                         usbd_copy_in(pc, 0, &data->desc, RAL_TX_DESC_SIZE);
 820                         usbd_m_copy_in(pc, RAL_TX_DESC_SIZE, m, 0,
 821                             m->m_pkthdr.len);
 822
 823                         vap = data->ni->ni_vap;
 824                         if (ieee80211_radiotap_active_vap(vap)) {
 825                                 struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
 826
 827                                 tap->wt_flags = 0;
 828                                 tap->wt_rate = data->rate;
 829                                 tap->wt_antenna = sc->tx_ant;
 830
 831                                 ieee80211_radiotap_tx(vap, m);
 832                         }
 833
 834                         /* xfer length needs to be a multiple of two! */
 835                         len = (RAL_TX_DESC_SIZE + m->m_pkthdr.len + 1) & ~1;
 836                         if ((len % 64) == 0)
 837                                 len += 2;
 838
 839                         DPRINTFN(11, "sending frame len=%u xferlen=%u\n",
 840                             m->m_pkthdr.len, len);
 841
 842                         usbd_xfer_set_frame_len(xfer, 0, len);
 843                         usbd_xfer_set_priv(xfer, data);
 844
 845                         usbd_transfer_submit(xfer);
 846                 }
 847                 RAL_UNLOCK(sc);
 848                 ural_start(ifp);
 849                 RAL_LOCK(sc);
 850                 break;
 851
 852         default:                        /* Error */
 853                 DPRINTFN(11, "transfer error, %s\n",
 854                     usbd_errstr(error));
 855
 856                 ifp->if_oerrors++;
 857                 data = usbd_xfer_get_priv(xfer);
 858                 if (data != NULL) {
 859                         ural_tx_free(data, error);
 860                         usbd_xfer_set_priv(xfer, NULL);
 861                 }
 862
 863                 if (error == USB_ERR_STALLED) {
 864                         /* try to clear stall first */
 865                         usbd_xfer_set_stall(xfer);
 866                         goto tr_setup;
 867                 }
 868                 if (error == USB_ERR_TIMEOUT)
 869                         device_printf(sc->sc_dev, "device timeout\n");
 870                 break;
 871         }
 872 }
 873
 874 static void
 875 ural_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
 876 {
 877         struct ural_softc *sc = usbd_xfer_softc(xfer);
 878         struct ifnet *ifp = sc->sc_ifp;
 879         struct ieee80211com *ic = ifp->if_l2com;
 880         struct ieee80211_node *ni;
 881         struct mbuf *m = NULL;
 882         struct usb_page_cache *pc;
 883         uint32_t flags;
 884         int8_t rssi = 0, nf = 0;
 885         int len;
 886
 887         usbd_xfer_status(xfer, &len, NULL, NULL, NULL);
 888
 889         switch (USB_GET_STATE(xfer)) {
 890         case USB_ST_TRANSFERRED:
 891
 892                 DPRINTFN(15, "rx done, actlen=%d\n", len);
 893
 894                 if (len < (int)(RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN)) {
 895                         DPRINTF("%s: xfer too short %d\n",
 896                             device_get_nameunit(sc->sc_dev), len);
 897                         ifp->if_ierrors++;
 898                         goto tr_setup;
 899                 }
 900
 901                 len -= RAL_RX_DESC_SIZE;
 902                 /* rx descriptor is located at the end */
 903                 pc = usbd_xfer_get_frame(xfer, 0);
 904                 usbd_copy_out(pc, len, &sc->sc_rx_desc, RAL_RX_DESC_SIZE);
 905
 906                 rssi = URAL_RSSI(sc->sc_rx_desc.rssi);
 907                 nf = RAL_NOISE_FLOOR;
 908                 flags = le32toh(sc->sc_rx_desc.flags);
 909                 if (flags & (RAL_RX_PHY_ERROR | RAL_RX_CRC_ERROR)) {
 910                         /*
 911                          * This should not happen since we did not
 912                          * request to receive those frames when we
 913                          * filled RAL_TXRX_CSR2:
 914                          */
 915                         DPRINTFN(5, "PHY or CRC error\n");
 916                         ifp->if_ierrors++;
 917                         goto tr_setup;
 918                 }
 919
 920                 m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
 921                 if (m == NULL) {
 922                         DPRINTF("could not allocate mbuf\n");
 923                         ifp->if_ierrors++;
 924                         goto tr_setup;
 925                 }
 926                 usbd_copy_out(pc, 0, mtod(m, uint8_t *), len);
 927
 928                 /* finalize mbuf */
 929                 m->m_pkthdr.rcvif = ifp;
 930                 m->m_pkthdr.len = m->m_len = (flags >> 16) & 0xfff;
 931
 932                 if (ieee80211_radiotap_active(ic)) {
 933                         struct ural_rx_radiotap_header *tap = &sc->sc_rxtap;
 934
 935                         /* XXX set once */
 936                         tap->wr_flags = 0;
 937                         tap->wr_rate = ieee80211_plcp2rate(sc->sc_rx_desc.rate,
 938                             (flags & RAL_RX_OFDM) ?
 939                             IEEE80211_T_OFDM : IEEE80211_T_CCK);
 940                         tap->wr_antenna = sc->rx_ant;
 941                         tap->wr_antsignal = nf + rssi;
 942                         tap->wr_antnoise = nf;
 943                 }
 944                 /* Strip trailing 802.11 MAC FCS. */
 945                 m_adj(m, -IEEE80211_CRC_LEN);
 946
 947                 /* FALLTHROUGH */
 948         case USB_ST_SETUP:
 949 tr_setup:
 950                 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
 951                 usbd_transfer_submit(xfer);
 952
 953                 /*
 954                  * At the end of a USB callback it is always safe to unlock
 955                  * the private mutex of a device! That is why we do the
 956                  * "ieee80211_input" here, and not some lines up!
 957                  */
 958                 RAL_UNLOCK(sc);
 959                 if (m) {
 960                         ni = ieee80211_find_rxnode(ic,
 961                             mtod(m, struct ieee80211_frame_min *));
 962                         if (ni != NULL) {
 963                                 (void) ieee80211_input(ni, m, rssi, nf);
 964                                 ieee80211_free_node(ni);
 965                         } else
 966                                 (void) ieee80211_input_all(ic, m, rssi, nf);
 967                 }
 968                 if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0 &&
 969                     !IFQ_IS_EMPTY(&ifp->if_snd))
 970                         ural_start(ifp);
 971                 RAL_LOCK(sc);
 972                 return;
 973
 974         default:                        /* Error */
 975                 if (error != USB_ERR_CANCELLED) {
 976                         /* try to clear stall first */
 977                         usbd_xfer_set_stall(xfer);
 978                         goto tr_setup;
 979                 }
 980                 return;
 981         }
 982 }
 983
 984 static uint8_t
 985 ural_plcp_signal(int rate)
 986 {
 987         switch (rate) {
 988         /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
 989         case 12:        return 0xb;
 990         case 18:        return 0xf;
 991         case 24:        return 0xa;
 992         case 36:        return 0xe;
 993         case 48:        return 0x9;
 994         case 72:        return 0xd;
 995         case 96:        return 0x8;
 996         case 108:       return 0xc;
 997
 998         /* CCK rates (NB: not IEEE std, device-specific) */
 999         case 2:         return 0x0;
1000         case 4:         return 0x1;
1001         case 11:        return 0x2;
1002         case 22:        return 0x3;
1003         }
1004         return 0xff;            /* XXX unsupported/unknown rate */
1005 }
1006
1007 static void
1008 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc,
1009     uint32_t flags, int len, int rate)
1010 {
1011         struct ifnet *ifp = sc->sc_ifp;
1012         struct ieee80211com *ic = ifp->if_l2com;
1013         uint16_t plcp_length;
1014         int remainder;
1015
1016         desc->flags = htole32(flags);
1017         desc->flags |= htole32(RAL_TX_NEWSEQ);
1018         desc->flags |= htole32(len << 16);
1019
1020         desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5));
1021         desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame)));
1022
1023         /* setup PLCP fields */
1024         desc->plcp_signal  = ural_plcp_signal(rate);
1025         desc->plcp_service = 4;
1026
1027         len += IEEE80211_CRC_LEN;
1028         if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) {
1029                 desc->flags |= htole32(RAL_TX_OFDM);
1030
1031                 plcp_length = len & 0xfff;
1032                 desc->plcp_length_hi = plcp_length >> 6;
1033                 desc->plcp_length_lo = plcp_length & 0x3f;
1034         } else {
1035                 plcp_length = (16 * len + rate - 1) / rate;
1036                 if (rate == 22) {
1037                         remainder = (16 * len) % 22;
1038                         if (remainder != 0 && remainder < 7)
1039                                 desc->plcp_service |= RAL_PLCP_LENGEXT;
1040                 }
1041                 desc->plcp_length_hi = plcp_length >> 8;
1042                 desc->plcp_length_lo = plcp_length & 0xff;
1043
1044                 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1045                         desc->plcp_signal |= 0x08;
1046         }
1047
1048         desc->iv = 0;
1049         desc->eiv = 0;
1050 }
1051
1052 #define RAL_TX_TIMEOUT  5000
1053
1054 static int
1055 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1056 {
1057         struct ieee80211vap *vap = ni->ni_vap;
1058         struct ieee80211com *ic = ni->ni_ic;
1059         struct ifnet *ifp = sc->sc_ifp;
1060         const struct ieee80211_txparam *tp;
1061         struct ural_tx_data *data;
1062
1063         if (sc->tx_nfree == 0) {
1064                 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1065                 m_freem(m0);
1066                 ieee80211_free_node(ni);
1067                 return (EIO);
1068         }
1069         if (ic->ic_bsschan == IEEE80211_CHAN_ANYC) {
1070                 m_freem(m0);
1071                 ieee80211_free_node(ni);
1072                 return (ENXIO);
1073         }
1074         data = STAILQ_FIRST(&sc->tx_free);
1075         STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1076         sc->tx_nfree--;
1077         tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_bsschan)];
1078
1079         data->m = m0;
1080         data->ni = ni;
1081         data->rate = tp->mgmtrate;
1082
1083         ural_setup_tx_desc(sc, &data->desc,
1084             RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, m0->m_pkthdr.len,
1085             tp->mgmtrate);
1086
1087         DPRINTFN(10, "sending beacon frame len=%u rate=%u\n",
1088             m0->m_pkthdr.len, tp->mgmtrate);
1089
1090         STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1091         usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1092
1093         return (0);
1094 }
1095
1096 static int
1097 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1098 {
1099         struct ieee80211vap *vap = ni->ni_vap;
1100         struct ieee80211com *ic = ni->ni_ic;
1101         const struct ieee80211_txparam *tp;
1102         struct ural_tx_data *data;
1103         struct ieee80211_frame *wh;
1104         struct ieee80211_key *k;
1105         uint32_t flags;
1106         uint16_t dur;
1107
1108         RAL_LOCK_ASSERT(sc, MA_OWNED);
1109
1110         data = STAILQ_FIRST(&sc->tx_free);
1111         STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1112         sc->tx_nfree--;
1113
1114         tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)];
1115
1116         wh = mtod(m0, struct ieee80211_frame *);
1117         if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1118                 k = ieee80211_crypto_encap(ni, m0);
1119                 if (k == NULL) {
1120                         m_freem(m0);
1121                         return ENOBUFS;
1122                 }
1123                 wh = mtod(m0, struct ieee80211_frame *);
1124         }
1125
1126         data->m = m0;
1127         data->ni = ni;
1128         data->rate = tp->mgmtrate;
1129
1130         flags = 0;
1131         if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1132                 flags |= RAL_TX_ACK;
1133
1134                 dur = ieee80211_ack_duration(ic->ic_rt, tp->mgmtrate,
1135                     ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1136                 *(uint16_t *)wh->i_dur = htole16(dur);
1137
1138                 /* tell hardware to add timestamp for probe responses */
1139                 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
1140                     IEEE80211_FC0_TYPE_MGT &&
1141                     (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
1142                     IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1143                         flags |= RAL_TX_TIMESTAMP;
1144         }
1145
1146         ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, tp->mgmtrate);
1147
1148         DPRINTFN(10, "sending mgt frame len=%u rate=%u\n",
1149             m0->m_pkthdr.len, tp->mgmtrate);
1150
1151         STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1152         usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1153
1154         return 0;
1155 }
1156
1157 static int
1158 ural_sendprot(struct ural_softc *sc,
1159     const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate)
1160 {
1161         struct ieee80211com *ic = ni->ni_ic;
1162         const struct ieee80211_frame *wh;
1163         struct ural_tx_data *data;
1164         struct mbuf *mprot;
1165         int protrate, ackrate, pktlen, flags, isshort;
1166         uint16_t dur;
1167
1168         KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY,
1169             ("protection %d", prot));
1170
1171         wh = mtod(m, const struct ieee80211_frame *);
1172         pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN;
1173
1174         protrate = ieee80211_ctl_rate(ic->ic_rt, rate);
1175         ackrate = ieee80211_ack_rate(ic->ic_rt, rate);
1176
1177         isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0;
1178         dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort)
1179             + ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1180         flags = RAL_TX_RETRY(7);
1181         if (prot == IEEE80211_PROT_RTSCTS) {
1182                 /* NB: CTS is the same size as an ACK */
1183                 dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1184                 flags |= RAL_TX_ACK;
1185                 mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur);
1186         } else {
1187                 mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur);
1188         }
1189         if (mprot == NULL) {
1190                 /* XXX stat + msg */
1191                 return ENOBUFS;
1192         }
1193         data = STAILQ_FIRST(&sc->tx_free);
1194         STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1195         sc->tx_nfree--;
1196
1197         data->m = mprot;
1198         data->ni = ieee80211_ref_node(ni);
1199         data->rate = protrate;
1200         ural_setup_tx_desc(sc, &data->desc, flags, mprot->m_pkthdr.len, protrate);
1201
1202         STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1203         usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1204
1205         return 0;
1206 }
1207
1208 static int
1209 ural_tx_raw(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni,
1210     const struct ieee80211_bpf_params *params)
1211 {
1212         struct ieee80211com *ic = ni->ni_ic;
1213         struct ural_tx_data *data;
1214         uint32_t flags;
1215         int error;
1216         int rate;
1217
1218         RAL_LOCK_ASSERT(sc, MA_OWNED);
1219         KASSERT(params != NULL, ("no raw xmit params"));
1220
1221         rate = params->ibp_rate0;
1222         if (!ieee80211_isratevalid(ic->ic_rt, rate)) {
1223                 m_freem(m0);
1224                 return EINVAL;
1225         }
1226         flags = 0;
1227         if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0)
1228                 flags |= RAL_TX_ACK;
1229         if (params->ibp_flags & (IEEE80211_BPF_RTS|IEEE80211_BPF_CTS)) {
1230                 error = ural_sendprot(sc, m0, ni,
1231                     params->ibp_flags & IEEE80211_BPF_RTS ?
1232                          IEEE80211_PROT_RTSCTS : IEEE80211_PROT_CTSONLY,
1233                     rate);
1234                 if (error || sc->tx_nfree == 0) {
1235                         m_freem(m0);
1236                         return ENOBUFS;
1237                 }
1238                 flags |= RAL_TX_IFS_SIFS;
1239         }
1240
1241         data = STAILQ_FIRST(&sc->tx_free);
1242         STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1243         sc->tx_nfree--;
1244
1245         data->m = m0;
1246         data->ni = ni;
1247         data->rate = rate;
1248
1249         /* XXX need to setup descriptor ourself */
1250         ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, rate);
1251
1252         DPRINTFN(10, "sending raw frame len=%u rate=%u\n",
1253             m0->m_pkthdr.len, rate);
1254
1255         STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1256         usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1257
1258         return 0;
1259 }
1260
1261 static int
1262 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1263 {
1264         struct ieee80211vap *vap = ni->ni_vap;
1265         struct ieee80211com *ic = ni->ni_ic;
1266         struct ural_tx_data *data;
1267         struct ieee80211_frame *wh;
1268         const struct ieee80211_txparam *tp;
1269         struct ieee80211_key *k;
1270         uint32_t flags = 0;
1271         uint16_t dur;
1272         int error, rate;
1273
1274         RAL_LOCK_ASSERT(sc, MA_OWNED);
1275
1276         wh = mtod(m0, struct ieee80211_frame *);
1277
1278         tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
1279         if (IEEE80211_IS_MULTICAST(wh->i_addr1))
1280                 rate = tp->mcastrate;
1281         else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
1282                 rate = tp->ucastrate;
1283         else
1284                 rate = ni->ni_txrate;
1285
1286         if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1287                 k = ieee80211_crypto_encap(ni, m0);
1288                 if (k == NULL) {
1289                         m_freem(m0);
1290                         return ENOBUFS;
1291                 }
1292                 /* packet header may have moved, reset our local pointer */
1293                 wh = mtod(m0, struct ieee80211_frame *);
1294         }
1295
1296         if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1297                 int prot = IEEE80211_PROT_NONE;
1298                 if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold)
1299                         prot = IEEE80211_PROT_RTSCTS;
1300                 else if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1301                     ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM)
1302                         prot = ic->ic_protmode;
1303                 if (prot != IEEE80211_PROT_NONE) {
1304                         error = ural_sendprot(sc, m0, ni, prot, rate);
1305                         if (error || sc->tx_nfree == 0) {
1306                                 m_freem(m0);
1307                                 return ENOBUFS;
1308                         }
1309                         flags |= RAL_TX_IFS_SIFS;
1310                 }
1311         }
1312
1313         data = STAILQ_FIRST(&sc->tx_free);
1314         STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1315         sc->tx_nfree--;
1316
1317         data->m = m0;
1318         data->ni = ni;
1319         data->rate = rate;
1320
1321         if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1322                 flags |= RAL_TX_ACK;
1323                 flags |= RAL_TX_RETRY(7);
1324
1325                 dur = ieee80211_ack_duration(ic->ic_rt, rate,
1326                     ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1327                 *(uint16_t *)wh->i_dur = htole16(dur);
1328         }
1329
1330         ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, rate);
1331
1332         DPRINTFN(10, "sending data frame len=%u rate=%u\n",
1333             m0->m_pkthdr.len, rate);
1334
1335         STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1336         usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1337
1338         return 0;
1339 }
1340
1341 static void
1342 ural_start(struct ifnet *ifp)
1343 {
1344         struct ural_softc *sc = ifp->if_softc;
1345         struct ieee80211_node *ni;
1346         struct mbuf *m;
1347
1348         RAL_LOCK(sc);
1349         if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1350                 RAL_UNLOCK(sc);
1351                 return;
1352         }
1353         for (;;) {
1354                 IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
1355                 if (m == NULL)
1356                         break;
1357                 if (sc->tx_nfree < RAL_TX_MINFREE) {
1358                         IFQ_DRV_PREPEND(&ifp->if_snd, m);
1359                         ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1360                         break;
1361                 }
1362                 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1363                 if (ural_tx_data(sc, m, ni) != 0) {
1364                         ieee80211_free_node(ni);
1365                         ifp->if_oerrors++;
1366                         break;
1367                 }
1368         }
1369         RAL_UNLOCK(sc);
1370 }
1371
1372 static int
1373 ural_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1374 {
1375         struct ural_softc *sc = ifp->if_softc;
1376         struct ieee80211com *ic = ifp->if_l2com;
1377         struct ifreq *ifr = (struct ifreq *) data;
1378         int error;
1379         int startall = 0;
1380
1381         RAL_LOCK(sc);
1382         error = sc->sc_detached ? ENXIO : 0;
1383         RAL_UNLOCK(sc);
1384         if (error)
1385                 return (error);
1386
1387         switch (cmd) {
1388         case SIOCSIFFLAGS:
1389                 RAL_LOCK(sc);
1390                 if (ifp->if_flags & IFF_UP) {
1391                         if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1392                                 ural_init_locked(sc);
1393                                 startall = 1;
1394                         } else
1395                                 ural_setpromisc(sc);
1396                 } else {
1397                         if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1398                                 ural_stop(sc);
1399                 }
1400                 RAL_UNLOCK(sc);
1401                 if (startall)
1402                         ieee80211_start_all(ic);
1403                 break;
1404         case SIOCGIFMEDIA:
1405         case SIOCSIFMEDIA:
1406                 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
1407                 break;
1408         default:
1409                 error = ether_ioctl(ifp, cmd, data);
1410                 break;
1411         }
1412         return error;
1413 }
1414
1415 static void
1416 ural_set_testmode(struct ural_softc *sc)
1417 {
1418         struct usb_device_request req;
1419         usb_error_t error;
1420
1421         req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1422         req.bRequest = RAL_VENDOR_REQUEST;
1423         USETW(req.wValue, 4);
1424         USETW(req.wIndex, 1);
1425         USETW(req.wLength, 0);
1426
1427         error = ural_do_request(sc, &req, NULL);
1428         if (error != 0) {
1429                 device_printf(sc->sc_dev, "could not set test mode: %s\n",
1430                     usbd_errstr(error));
1431         }
1432 }
1433
1434 static void
1435 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len)
1436 {
1437         struct usb_device_request req;
1438         usb_error_t error;
1439
1440         req.bmRequestType = UT_READ_VENDOR_DEVICE;
1441         req.bRequest = RAL_READ_EEPROM;
1442         USETW(req.wValue, 0);
1443         USETW(req.wIndex, addr);
1444         USETW(req.wLength, len);
1445
1446         error = ural_do_request(sc, &req, buf);
1447         if (error != 0) {
1448                 device_printf(sc->sc_dev, "could not read EEPROM: %s\n",
1449                     usbd_errstr(error));
1450         }
1451 }
1452
1453 static uint16_t
1454 ural_read(struct ural_softc *sc, uint16_t reg)
1455 {
1456         struct usb_device_request req;
1457         usb_error_t error;
1458         uint16_t val;
1459
1460         req.bmRequestType = UT_READ_VENDOR_DEVICE;
1461         req.bRequest = RAL_READ_MAC;
1462         USETW(req.wValue, 0);
1463         USETW(req.wIndex, reg);
1464         USETW(req.wLength, sizeof (uint16_t));
1465
1466         error = ural_do_request(sc, &req, &val);
1467         if (error != 0) {
1468                 device_printf(sc->sc_dev, "could not read MAC register: %s\n",
1469                     usbd_errstr(error));
1470                 return 0;
1471         }
1472
1473         return le16toh(val);
1474 }
1475
1476 static void
1477 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1478 {
1479         struct usb_device_request req;
1480         usb_error_t error;
1481
1482         req.bmRequestType = UT_READ_VENDOR_DEVICE;
1483         req.bRequest = RAL_READ_MULTI_MAC;
1484         USETW(req.wValue, 0);
1485         USETW(req.wIndex, reg);
1486         USETW(req.wLength, len);
1487
1488         error = ural_do_request(sc, &req, buf);
1489         if (error != 0) {
1490                 device_printf(sc->sc_dev, "could not read MAC register: %s\n",
1491                     usbd_errstr(error));
1492         }
1493 }
1494
1495 static void
1496 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val)
1497 {
1498         struct usb_device_request req;
1499         usb_error_t error;
1500
1501         req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1502         req.bRequest = RAL_WRITE_MAC;
1503         USETW(req.wValue, val);
1504         USETW(req.wIndex, reg);
1505         USETW(req.wLength, 0);
1506
1507         error = ural_do_request(sc, &req, NULL);
1508         if (error != 0) {
1509                 device_printf(sc->sc_dev, "could not write MAC register: %s\n",
1510                     usbd_errstr(error));
1511         }
1512 }
1513
1514 static void
1515 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1516 {
1517         struct usb_device_request req;
1518         usb_error_t error;
1519
1520         req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1521         req.bRequest = RAL_WRITE_MULTI_MAC;
1522         USETW(req.wValue, 0);
1523         USETW(req.wIndex, reg);
1524         USETW(req.wLength, len);
1525
1526         error = ural_do_request(sc, &req, buf);
1527         if (error != 0) {
1528                 device_printf(sc->sc_dev, "could not write MAC register: %s\n",
1529                     usbd_errstr(error));
1530         }
1531 }
1532
1533 static void
1534 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val)
1535 {
1536         uint16_t tmp;
1537         int ntries;
1538
1539         for (ntries = 0; ntries < 100; ntries++) {
1540                 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1541                         break;
1542                 if (ural_pause(sc, hz / 100))
1543                         break;
1544         }
1545         if (ntries == 100) {
1546                 device_printf(sc->sc_dev, "could not write to BBP\n");
1547                 return;
1548         }
1549
1550         tmp = reg << 8 | val;
1551         ural_write(sc, RAL_PHY_CSR7, tmp);
1552 }
1553
1554 static uint8_t
1555 ural_bbp_read(struct ural_softc *sc, uint8_t reg)
1556 {
1557         uint16_t val;
1558         int ntries;
1559
1560         val = RAL_BBP_WRITE | reg << 8;
1561         ural_write(sc, RAL_PHY_CSR7, val);
1562
1563         for (ntries = 0; ntries < 100; ntries++) {
1564                 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1565                         break;
1566                 if (ural_pause(sc, hz / 100))
1567                         break;
1568         }
1569         if (ntries == 100) {
1570                 device_printf(sc->sc_dev, "could not read BBP\n");
1571                 return 0;
1572         }
1573
1574         return ural_read(sc, RAL_PHY_CSR7) & 0xff;
1575 }
1576
1577 static void
1578 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val)
1579 {
1580         uint32_t tmp;
1581         int ntries;
1582
1583         for (ntries = 0; ntries < 100; ntries++) {
1584                 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY))
1585                         break;
1586                 if (ural_pause(sc, hz / 100))
1587                         break;
1588         }
1589         if (ntries == 100) {
1590                 device_printf(sc->sc_dev, "could not write to RF\n");
1591                 return;
1592         }
1593
1594         tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3);
1595         ural_write(sc, RAL_PHY_CSR9,  tmp & 0xffff);
1596         ural_write(sc, RAL_PHY_CSR10, tmp >> 16);
1597
1598         /* remember last written value in sc */
1599         sc->rf_regs[reg] = val;
1600
1601         DPRINTFN(15, "RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff);
1602 }
1603
1604 static void
1605 ural_scan_start(struct ieee80211com *ic)
1606 {
1607         struct ifnet *ifp = ic->ic_ifp;
1608         struct ural_softc *sc = ifp->if_softc;
1609
1610         RAL_LOCK(sc);
1611         ural_write(sc, RAL_TXRX_CSR19, 0);
1612         ural_set_bssid(sc, ifp->if_broadcastaddr);
1613         RAL_UNLOCK(sc);
1614 }
1615
1616 static void
1617 ural_scan_end(struct ieee80211com *ic)
1618 {
1619         struct ural_softc *sc = ic->ic_ifp->if_softc;
1620
1621         RAL_LOCK(sc);
1622         ural_enable_tsf_sync(sc);
1623         ural_set_bssid(sc, sc->sc_bssid);
1624         RAL_UNLOCK(sc);
1625
1626 }
1627
1628 static void
1629 ural_set_channel(struct ieee80211com *ic)
1630 {
1631         struct ural_softc *sc = ic->ic_ifp->if_softc;
1632
1633         RAL_LOCK(sc);
1634         ural_set_chan(sc, ic->ic_curchan);
1635         RAL_UNLOCK(sc);
1636 }
1637
1638 static void
1639 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c)
1640 {
1641         struct ifnet *ifp = sc->sc_ifp;
1642         struct ieee80211com *ic = ifp->if_l2com;
1643         uint8_t power, tmp;
1644         int i, chan;
1645
1646         chan = ieee80211_chan2ieee(ic, c);
1647         if (chan == 0 || chan == IEEE80211_CHAN_ANY)
1648                 return;
1649
1650         if (IEEE80211_IS_CHAN_2GHZ(c))
1651                 power = min(sc->txpow[chan - 1], 31);
1652         else
1653                 power = 31;
1654
1655         /* adjust txpower using ifconfig settings */
1656         power -= (100 - ic->ic_txpowlimit) / 8;
1657
1658         DPRINTFN(2, "setting channel to %u, txpower to %u\n", chan, power);
1659
1660         switch (sc->rf_rev) {
1661         case RAL_RF_2522:
1662                 ural_rf_write(sc, RAL_RF1, 0x00814);
1663                 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]);
1664                 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1665                 break;
1666
1667         case RAL_RF_2523:
1668                 ural_rf_write(sc, RAL_RF1, 0x08804);
1669                 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]);
1670                 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044);
1671                 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1672                 break;
1673
1674         case RAL_RF_2524:
1675                 ural_rf_write(sc, RAL_RF1, 0x0c808);
1676                 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]);
1677                 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1678                 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1679                 break;
1680
1681         case RAL_RF_2525:
1682                 ural_rf_write(sc, RAL_RF1, 0x08808);
1683                 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]);
1684                 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1685                 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1686
1687                 ural_rf_write(sc, RAL_RF1, 0x08808);
1688                 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]);
1689                 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1690                 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1691                 break;
1692
1693         case RAL_RF_2525E:
1694                 ural_rf_write(sc, RAL_RF1, 0x08808);
1695                 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]);
1696                 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1697                 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282);
1698                 break;
1699
1700         case RAL_RF_2526:
1701                 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]);
1702                 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1703                 ural_rf_write(sc, RAL_RF1, 0x08804);
1704
1705                 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]);
1706                 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1707                 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1708                 break;
1709
1710         /* dual-band RF */
1711         case RAL_RF_5222:
1712                 for (i = 0; ural_rf5222[i].chan != chan; i++);
1713
1714                 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1);
1715                 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2);
1716                 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1717                 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4);
1718                 break;
1719         }
1720
1721         if (ic->ic_opmode != IEEE80211_M_MONITOR &&
1722             (ic->ic_flags & IEEE80211_F_SCAN) == 0) {
1723                 /* set Japan filter bit for channel 14 */
1724                 tmp = ural_bbp_read(sc, 70);
1725
1726                 tmp &= ~RAL_JAPAN_FILTER;
1727                 if (chan == 14)
1728                         tmp |= RAL_JAPAN_FILTER;
1729
1730                 ural_bbp_write(sc, 70, tmp);
1731
1732                 /* clear CRC errors */
1733                 ural_read(sc, RAL_STA_CSR0);
1734
1735                 ural_pause(sc, hz / 100);
1736                 ural_disable_rf_tune(sc);
1737         }
1738
1739         /* XXX doesn't belong here */
1740         /* update basic rate set */
1741         ural_set_basicrates(sc, c);
1742
1743         /* give the hardware some time to do the switchover */
1744         ural_pause(sc, hz / 100);
1745 }
1746
1747 /*
1748  * Disable RF auto-tuning.
1749  */
1750 static void
1751 ural_disable_rf_tune(struct ural_softc *sc)
1752 {
1753         uint32_t tmp;
1754
1755         if (sc->rf_rev != RAL_RF_2523) {
1756                 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE;
1757                 ural_rf_write(sc, RAL_RF1, tmp);
1758         }
1759
1760         tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE;
1761         ural_rf_write(sc, RAL_RF3, tmp);
1762
1763         DPRINTFN(2, "disabling RF autotune\n");
1764 }
1765
1766 /*
1767  * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF
1768  * synchronization.
1769  */
1770 static void
1771 ural_enable_tsf_sync(struct ural_softc *sc)
1772 {
1773         struct ifnet *ifp = sc->sc_ifp;
1774         struct ieee80211com *ic = ifp->if_l2com;
1775         struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
1776         uint16_t logcwmin, preload, tmp;
1777
1778         /* first, disable TSF synchronization */
1779         ural_write(sc, RAL_TXRX_CSR19, 0);
1780
1781         tmp = (16 * vap->iv_bss->ni_intval) << 4;
1782         ural_write(sc, RAL_TXRX_CSR18, tmp);
1783
1784         logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0;
1785         preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6;
1786         tmp = logcwmin << 12 | preload;
1787         ural_write(sc, RAL_TXRX_CSR20, tmp);
1788
1789         /* finally, enable TSF synchronization */
1790         tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN;
1791         if (ic->ic_opmode == IEEE80211_M_STA)
1792                 tmp |= RAL_ENABLE_TSF_SYNC(1);
1793         else
1794                 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR;
1795         ural_write(sc, RAL_TXRX_CSR19, tmp);
1796
1797         DPRINTF("enabling TSF synchronization\n");
1798 }
1799
1800 static void
1801 ural_enable_tsf(struct ural_softc *sc)
1802 {
1803         /* first, disable TSF synchronization */
1804         ural_write(sc, RAL_TXRX_CSR19, 0);
1805         ural_write(sc, RAL_TXRX_CSR19, RAL_ENABLE_TSF | RAL_ENABLE_TSF_SYNC(2));
1806 }
1807
1808 #define RAL_RXTX_TURNAROUND     5       /* us */
1809 static void
1810 ural_update_slot(struct ifnet *ifp)
1811 {
1812         struct ural_softc *sc = ifp->if_softc;
1813         struct ieee80211com *ic = ifp->if_l2com;
1814         uint16_t slottime, sifs, eifs;
1815
1816         slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
1817
1818         /*
1819          * These settings may sound a bit inconsistent but this is what the
1820          * reference driver does.
1821          */
1822         if (ic->ic_curmode == IEEE80211_MODE_11B) {
1823                 sifs = 16 - RAL_RXTX_TURNAROUND;
1824                 eifs = 364;
1825         } else {
1826                 sifs = 10 - RAL_RXTX_TURNAROUND;
1827                 eifs = 64;
1828         }
1829
1830         ural_write(sc, RAL_MAC_CSR10, slottime);
1831         ural_write(sc, RAL_MAC_CSR11, sifs);
1832         ural_write(sc, RAL_MAC_CSR12, eifs);
1833 }
1834
1835 static void
1836 ural_set_txpreamble(struct ural_softc *sc)
1837 {
1838         struct ifnet *ifp = sc->sc_ifp;
1839         struct ieee80211com *ic = ifp->if_l2com;
1840         uint16_t tmp;
1841
1842         tmp = ural_read(sc, RAL_TXRX_CSR10);
1843
1844         tmp &= ~RAL_SHORT_PREAMBLE;
1845         if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
1846                 tmp |= RAL_SHORT_PREAMBLE;
1847
1848         ural_write(sc, RAL_TXRX_CSR10, tmp);
1849 }
1850
1851 static void
1852 ural_set_basicrates(struct ural_softc *sc, const struct ieee80211_channel *c)
1853 {
1854         /* XXX wrong, take from rate set */
1855         /* update basic rate set */
1856         if (IEEE80211_IS_CHAN_5GHZ(c)) {
1857                 /* 11a basic rates: 6, 12, 24Mbps */
1858                 ural_write(sc, RAL_TXRX_CSR11, 0x150);
1859         } else if (IEEE80211_IS_CHAN_ANYG(c)) {
1860                 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */
1861                 ural_write(sc, RAL_TXRX_CSR11, 0x15f);
1862         } else {
1863                 /* 11b basic rates: 1, 2Mbps */
1864                 ural_write(sc, RAL_TXRX_CSR11, 0x3);
1865         }
1866 }
1867
1868 static void
1869 ural_set_bssid(struct ural_softc *sc, const uint8_t *bssid)
1870 {
1871         uint16_t tmp;
1872
1873         tmp = bssid[0] | bssid[1] << 8;
1874         ural_write(sc, RAL_MAC_CSR5, tmp);
1875
1876         tmp = bssid[2] | bssid[3] << 8;
1877         ural_write(sc, RAL_MAC_CSR6, tmp);
1878
1879         tmp = bssid[4] | bssid[5] << 8;
1880         ural_write(sc, RAL_MAC_CSR7, tmp);
1881
1882         DPRINTF("setting BSSID to %6D\n", bssid, ":");
1883 }
1884
1885 static void
1886 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr)
1887 {
1888         uint16_t tmp;
1889
1890         tmp = addr[0] | addr[1] << 8;
1891         ural_write(sc, RAL_MAC_CSR2, tmp);
1892
1893         tmp = addr[2] | addr[3] << 8;
1894         ural_write(sc, RAL_MAC_CSR3, tmp);
1895
1896         tmp = addr[4] | addr[5] << 8;
1897         ural_write(sc, RAL_MAC_CSR4, tmp);
1898
1899         DPRINTF("setting MAC address to %6D\n", addr, ":");
1900 }
1901
1902 static void
1903 ural_setpromisc(struct ural_softc *sc)
1904 {
1905         struct ifnet *ifp = sc->sc_ifp;
1906         uint32_t tmp;
1907
1908         tmp = ural_read(sc, RAL_TXRX_CSR2);
1909
1910         tmp &= ~RAL_DROP_NOT_TO_ME;
1911         if (!(ifp->if_flags & IFF_PROMISC))
1912                 tmp |= RAL_DROP_NOT_TO_ME;
1913
1914         ural_write(sc, RAL_TXRX_CSR2, tmp);
1915
1916         DPRINTF("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
1917             "entering" : "leaving");
1918 }
1919
1920 static void
1921 ural_update_promisc(struct ifnet *ifp)
1922 {
1923         struct ural_softc *sc = ifp->if_softc;
1924
1925         if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
1926                 return;
1927
1928         RAL_LOCK(sc);
1929         ural_setpromisc(sc);
1930         RAL_UNLOCK(sc);
1931 }
1932
1933 static const char *
1934 ural_get_rf(int rev)
1935 {
1936         switch (rev) {
1937         case RAL_RF_2522:       return "RT2522";
1938         case RAL_RF_2523:       return "RT2523";
1939         case RAL_RF_2524:       return "RT2524";
1940         case RAL_RF_2525:       return "RT2525";
1941         case RAL_RF_2525E:      return "RT2525e";
1942         case RAL_RF_2526:       return "RT2526";
1943         case RAL_RF_5222:       return "RT5222";
1944         default:                return "unknown";
1945         }
1946 }
1947
1948 static void
1949 ural_read_eeprom(struct ural_softc *sc)
1950 {
1951         uint16_t val;
1952
1953         ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2);
1954         val = le16toh(val);
1955         sc->rf_rev =   (val >> 11) & 0x7;
1956         sc->hw_radio = (val >> 10) & 0x1;
1957         sc->led_mode = (val >> 6)  & 0x7;
1958         sc->rx_ant =   (val >> 4)  & 0x3;
1959         sc->tx_ant =   (val >> 2)  & 0x3;
1960         sc->nb_ant =   val & 0x3;
1961
1962         /* read MAC address */
1963         ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, sc->sc_bssid, 6);
1964
1965         /* read default values for BBP registers */
1966         ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16);
1967
1968         /* read Tx power for all b/g channels */
1969         ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14);
1970 }
1971
1972 static int
1973 ural_bbp_init(struct ural_softc *sc)
1974 {
1975 #define N(a)    ((int)(sizeof (a) / sizeof ((a)[0])))
1976         int i, ntries;
1977
1978         /* wait for BBP to be ready */
1979         for (ntries = 0; ntries < 100; ntries++) {
1980                 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0)
1981                         break;
1982                 if (ural_pause(sc, hz / 100))
1983                         break;
1984         }
1985         if (ntries == 100) {
1986                 device_printf(sc->sc_dev, "timeout waiting for BBP\n");
1987                 return EIO;
1988         }
1989
1990         /* initialize BBP registers to default values */
1991         for (i = 0; i < N(ural_def_bbp); i++)
1992                 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val);
1993
1994 #if 0
1995         /* initialize BBP registers to values stored in EEPROM */
1996         for (i = 0; i < 16; i++) {
1997                 if (sc->bbp_prom[i].reg == 0xff)
1998                         continue;
1999                 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2000         }
2001 #endif
2002
2003         return 0;
2004 #undef N
2005 }
2006
2007 static void
2008 ural_set_txantenna(struct ural_softc *sc, int antenna)
2009 {
2010         uint16_t tmp;
2011         uint8_t tx;
2012
2013         tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK;
2014         if (antenna == 1)
2015                 tx |= RAL_BBP_ANTA;
2016         else if (antenna == 2)
2017                 tx |= RAL_BBP_ANTB;
2018         else
2019                 tx |= RAL_BBP_DIVERSITY;
2020
2021         /* need to force I/Q flip for RF 2525e, 2526 and 5222 */
2022         if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 ||
2023             sc->rf_rev == RAL_RF_5222)
2024                 tx |= RAL_BBP_FLIPIQ;
2025
2026         ural_bbp_write(sc, RAL_BBP_TX, tx);
2027
2028         /* update values in PHY_CSR5 and PHY_CSR6 */
2029         tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7;
2030         ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7));
2031
2032         tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7;
2033         ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7));
2034 }
2035
2036 static void
2037 ural_set_rxantenna(struct ural_softc *sc, int antenna)
2038 {
2039         uint8_t rx;
2040
2041         rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK;
2042         if (antenna == 1)
2043                 rx |= RAL_BBP_ANTA;
2044         else if (antenna == 2)
2045                 rx |= RAL_BBP_ANTB;
2046         else
2047                 rx |= RAL_BBP_DIVERSITY;
2048
2049         /* need to force no I/Q flip for RF 2525e and 2526 */
2050         if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526)
2051                 rx &= ~RAL_BBP_FLIPIQ;
2052
2053         ural_bbp_write(sc, RAL_BBP_RX, rx);
2054 }
2055
2056 static void
2057 ural_init_locked(struct ural_softc *sc)
2058 {
2059 #define N(a)    ((int)(sizeof (a) / sizeof ((a)[0])))
2060         struct ifnet *ifp = sc->sc_ifp;
2061         struct ieee80211com *ic = ifp->if_l2com;
2062         uint16_t tmp;
2063         int i, ntries;
2064
2065         RAL_LOCK_ASSERT(sc, MA_OWNED);
2066
2067         ural_set_testmode(sc);
2068         ural_write(sc, 0x308, 0x00f0);  /* XXX magic */
2069
2070         ural_stop(sc);
2071
2072         /* initialize MAC registers to default values */
2073         for (i = 0; i < N(ural_def_mac); i++)
2074                 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val);
2075
2076         /* wait for BBP and RF to wake up (this can take a long time!) */
2077         for (ntries = 0; ntries < 100; ntries++) {
2078                 tmp = ural_read(sc, RAL_MAC_CSR17);
2079                 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) ==
2080                     (RAL_BBP_AWAKE | RAL_RF_AWAKE))
2081                         break;
2082                 if (ural_pause(sc, hz / 100))
2083                         break;
2084         }
2085         if (ntries == 100) {
2086                 device_printf(sc->sc_dev,
2087                     "timeout waiting for BBP/RF to wakeup\n");
2088                 goto fail;
2089         }
2090
2091         /* we're ready! */
2092         ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY);
2093
2094         /* set basic rate set (will be updated later) */
2095         ural_write(sc, RAL_TXRX_CSR11, 0x15f);
2096
2097         if (ural_bbp_init(sc) != 0)
2098                 goto fail;
2099
2100         ural_set_chan(sc, ic->ic_curchan);
2101
2102         /* clear statistic registers (STA_CSR0 to STA_CSR10) */
2103         ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
2104
2105         ural_set_txantenna(sc, sc->tx_ant);
2106         ural_set_rxantenna(sc, sc->rx_ant);
2107
2108         ural_set_macaddr(sc, IF_LLADDR(ifp));
2109
2110         /*
2111          * Allocate Tx and Rx xfer queues.
2112          */
2113         ural_setup_tx_list(sc);
2114
2115         /* kick Rx */
2116         tmp = RAL_DROP_PHY | RAL_DROP_CRC;
2117         if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2118                 tmp |= RAL_DROP_CTL | RAL_DROP_BAD_VERSION;
2119                 if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2120                         tmp |= RAL_DROP_TODS;
2121                 if (!(ifp->if_flags & IFF_PROMISC))
2122                         tmp |= RAL_DROP_NOT_TO_ME;
2123         }
2124         ural_write(sc, RAL_TXRX_CSR2, tmp);
2125
2126         ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
2127         ifp->if_drv_flags |= IFF_DRV_RUNNING;
2128         usbd_xfer_set_stall(sc->sc_xfer[URAL_BULK_WR]);
2129         usbd_transfer_start(sc->sc_xfer[URAL_BULK_RD]);
2130         return;
2131
2132 fail:   ural_stop(sc);
2133 #undef N
2134 }
2135
2136 static void
2137 ural_init(void *priv)
2138 {
2139         struct ural_softc *sc = priv;
2140         struct ifnet *ifp = sc->sc_ifp;
2141         struct ieee80211com *ic = ifp->if_l2com;
2142
2143         RAL_LOCK(sc);
2144         ural_init_locked(sc);
2145         RAL_UNLOCK(sc);
2146
2147         if (ifp->if_drv_flags & IFF_DRV_RUNNING)
2148                 ieee80211_start_all(ic);                /* start all vap's */
2149 }
2150
2151 static void
2152 ural_stop(struct ural_softc *sc)
2153 {
2154         struct ifnet *ifp = sc->sc_ifp;
2155
2156         RAL_LOCK_ASSERT(sc, MA_OWNED);
2157
2158         ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
2159
2160         /*
2161          * Drain all the transfers, if not already drained:
2162          */
2163         RAL_UNLOCK(sc);
2164         usbd_transfer_drain(sc->sc_xfer[URAL_BULK_WR]);
2165         usbd_transfer_drain(sc->sc_xfer[URAL_BULK_RD]);
2166         RAL_LOCK(sc);
2167
2168         ural_unsetup_tx_list(sc);
2169
2170         /* disable Rx */
2171         ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX);
2172         /* reset ASIC and BBP (but won't reset MAC registers!) */
2173         ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP);
2174         /* wait a little */
2175         ural_pause(sc, hz / 10);
2176         ural_write(sc, RAL_MAC_CSR1, 0);
2177         /* wait a little */
2178         ural_pause(sc, hz / 10);
2179 }
2180
2181 static int
2182 ural_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
2183         const struct ieee80211_bpf_params *params)
2184 {
2185         struct ieee80211com *ic = ni->ni_ic;
2186         struct ifnet *ifp = ic->ic_ifp;
2187         struct ural_softc *sc = ifp->if_softc;
2188
2189         RAL_LOCK(sc);
2190         /* prevent management frames from being sent if we're not ready */
2191         if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
2192                 RAL_UNLOCK(sc);
2193                 m_freem(m);
2194                 ieee80211_free_node(ni);
2195                 return ENETDOWN;
2196         }
2197         if (sc->tx_nfree < RAL_TX_MINFREE) {
2198                 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
2199                 RAL_UNLOCK(sc);
2200                 m_freem(m);
2201                 ieee80211_free_node(ni);
2202                 return EIO;
2203         }
2204
2205         ifp->if_opackets++;
2206
2207         if (params == NULL) {
2208                 /*
2209                  * Legacy path; interpret frame contents to decide
2210                  * precisely how to send the frame.
2211                  */
2212                 if (ural_tx_mgt(sc, m, ni) != 0)
2213                         goto bad;
2214         } else {
2215                 /*
2216                  * Caller supplied explicit parameters to use in
2217                  * sending the frame.
2218                  */
2219                 if (ural_tx_raw(sc, m, ni, params) != 0)
2220                         goto bad;
2221         }
2222         RAL_UNLOCK(sc);
2223         return 0;
2224 bad:
2225         ifp->if_oerrors++;
2226         RAL_UNLOCK(sc);
2227         ieee80211_free_node(ni);
2228         return EIO;             /* XXX */
2229 }
2230
2231 static void
2232 ural_ratectl_start(struct ural_softc *sc, struct ieee80211_node *ni)
2233 {
2234         struct ieee80211vap *vap = ni->ni_vap;
2235         struct ural_vap *uvp = URAL_VAP(vap);
2236
2237         /* clear statistic registers (STA_CSR0 to STA_CSR10) */
2238         ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
2239
2240         usb_callout_reset(&uvp->ratectl_ch, hz, ural_ratectl_timeout, uvp);
2241 }
2242
2243 static void
2244 ural_ratectl_timeout(void *arg)
2245 {
2246         struct ural_vap *uvp = arg;
2247         struct ieee80211vap *vap = &uvp->vap;
2248         struct ieee80211com *ic = vap->iv_ic;
2249
2250         ieee80211_runtask(ic, &uvp->ratectl_task);
2251 }
2252
2253 static void
2254 ural_ratectl_task(void *arg, int pending)
2255 {
2256         struct ural_vap *uvp = arg;
2257         struct ieee80211vap *vap = &uvp->vap;
2258         struct ieee80211com *ic = vap->iv_ic;
2259         struct ifnet *ifp = ic->ic_ifp;
2260         struct ural_softc *sc = ifp->if_softc;
2261         struct ieee80211_node *ni;
2262         int ok, fail;
2263         int sum, retrycnt;
2264
2265         ni = ieee80211_ref_node(vap->iv_bss);
2266         RAL_LOCK(sc);
2267         /* read and clear statistic registers (STA_CSR0 to STA_CSR10) */
2268         ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta));
2269
2270         ok = sc->sta[7] +               /* TX ok w/o retry */
2271              sc->sta[8];                /* TX ok w/ retry */
2272         fail = sc->sta[9];              /* TX retry-fail count */
2273         sum = ok+fail;
2274         retrycnt = sc->sta[8] + fail;
2275
2276         ieee80211_ratectl_tx_update(vap, ni, &sum, &ok, &retrycnt);
2277         (void) ieee80211_ratectl_rate(ni, NULL, 0);
2278
2279         ifp->if_oerrors += fail;        /* count TX retry-fail as Tx errors */
2280
2281         usb_callout_reset(&uvp->ratectl_ch, hz, ural_ratectl_timeout, uvp);
2282         RAL_UNLOCK(sc);
2283         ieee80211_free_node(ni);
2284 }
2285
2286 static int
2287 ural_pause(struct ural_softc *sc, int timeout)
2288 {
2289
2290         usb_pause_mtx(&sc->sc_mtx, timeout);
2291         return (0);
2292 }