2 * Copyright (c) 2013 Tsubai Masanari
3 * Copyright (c) 2013 Bryan Venteicher <bryanv@FreeBSD.org>
5 * Permission to use, copy, modify, and distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
25 struct vmxnet3_dma_alloc {
28 bus_dma_tag_t dma_tag;
34 * The number of Rx/Tx queues this driver supports.
36 #define VMXNET3_RX_QUEUES 1
37 #define VMXNET3_TX_QUEUES 1
40 * The number of Rx rings in each Rx queue.
42 #define VMXNET3_RXRINGS_PERQ 2
45 * The number of descriptors in each Rx/Tx ring.
47 #define VMXNET3_DEF_TX_NDESC 512
48 #define VMXNET3_MAX_TX_NDESC 4096
49 #define VMXNET3_MIN_TX_NDESC 32
50 #define VMXNET3_MASK_TX_NDESC 0x1F
51 #define VMXNET3_DEF_RX_NDESC 256
52 #define VMXNET3_MAX_RX_NDESC 2048
53 #define VMXNET3_MIN_RX_NDESC 32
54 #define VMXNET3_MASK_RX_NDESC 0x1F
56 #define VMXNET3_MAX_TX_NCOMPDESC VMXNET3_MAX_TX_NDESC
57 #define VMXNET3_MAX_RX_NCOMPDESC \
58 (VMXNET3_MAX_RX_NDESC * VMXNET3_RXRINGS_PERQ)
60 struct vmxnet3_txbuf {
61 bus_dmamap_t vtxb_dmamap;
65 struct vmxnet3_txring {
66 struct vmxnet3_txbuf *vxtxr_txbuf;
71 bus_dma_tag_t vxtxr_txtag;
72 struct vmxnet3_txdesc *vxtxr_txd;
73 struct vmxnet3_dma_alloc vxtxr_dma;
77 VMXNET3_TXRING_AVAIL(struct vmxnet3_txring *txr)
79 int avail = txr->vxtxr_next - txr->vxtxr_head - 1;
80 return (avail < 0 ? txr->vxtxr_ndesc + avail : avail);
83 struct vmxnet3_rxbuf {
84 bus_dmamap_t vrxb_dmamap;
88 struct vmxnet3_rxring {
89 struct vmxnet3_rxbuf *vxrxr_rxbuf;
90 struct vmxnet3_rxdesc *vxrxr_rxd;
95 bus_dma_tag_t vxrxr_rxtag;
96 struct vmxnet3_dma_alloc vxrxr_dma;
97 bus_dmamap_t vxrxr_spare_dmap;
101 vmxnet3_rxr_increment_fill(struct vmxnet3_rxring *rxr)
104 if (++rxr->vxrxr_fill == rxr->vxrxr_ndesc) {
110 struct vmxnet3_comp_ring {
112 struct vmxnet3_txcompdesc *txcd;
113 struct vmxnet3_rxcompdesc *rxcd;
118 struct vmxnet3_dma_alloc vxcr_dma;
121 struct vmxnet3_txq_stats {
123 uint64_t vtxrs_offload_failed;
126 struct vmxnet3_txqueue {
127 struct mtx vxtxq_mtx;
128 struct vmxnet3_softc *vxtxq_sc;
132 struct vmxnet3_txring vxtxq_cmd_ring;
133 struct vmxnet3_comp_ring vxtxq_comp_ring;
134 struct vmxnet3_txq_stats vxtxq_stats;
135 struct vmxnet3_txq_shared *vxtxq_ts;
136 struct sysctl_oid_list *vxtxq_sysctl;
140 #define VMXNET3_TXQ_LOCK(_txq) mtx_lock(&(_txq)->vxtxq_mtx)
141 #define VMXNET3_TXQ_TRYLOCK(_txq) mtx_trylock(&(_txq)->vxtxq_mtx)
142 #define VMXNET3_TXQ_UNLOCK(_txq) mtx_unlock(&(_txq)->vxtxq_mtx)
143 #define VMXNET3_TXQ_LOCK_ASSERT(_txq) \
144 mtx_assert(&(_txq)->vxtxq_mtx, MA_OWNED)
145 #define VMXNET3_TXQ_LOCK_ASSERT_NOTOWNED(_txq) \
146 mtx_assert(&(_txq)->vxtxq_mtx, MA_NOTOWNED)
148 struct vmxnet3_rxq_stats {
152 struct vmxnet3_rxqueue {
153 struct mtx vxrxq_mtx;
154 struct vmxnet3_softc *vxrxq_sc;
157 struct vmxnet3_rxring vxrxq_cmd_ring[VMXNET3_RXRINGS_PERQ];
158 struct vmxnet3_comp_ring vxrxq_comp_ring;
159 struct vmxnet3_rxq_stats vxrxq_stats;
160 struct vmxnet3_rxq_shared *vxrxq_rs;
161 struct sysctl_oid_list *vxrxq_sysctl;
165 #define VMXNET3_RXQ_LOCK(_rxq) mtx_lock(&(_rxq)->vxrxq_mtx)
166 #define VMXNET3_RXQ_UNLOCK(_rxq) mtx_unlock(&(_rxq)->vxrxq_mtx)
167 #define VMXNET3_RXQ_LOCK_ASSERT(_rxq) \
168 mtx_assert(&(_rxq)->vxrxq_mtx, MA_OWNED)
169 #define VMXNET3_RXQ_LOCK_ASSERT_NOTOWNED(_rxq) \
170 mtx_assert(&(_rxq)->vxrxq_mtx, MA_NOTOWNED)
172 struct vmxnet3_statistics {
173 uint32_t vmst_collapsed;
174 uint32_t vmst_mgetcl_failed;
175 uint32_t vmst_mbuf_load_failed;
179 struct vmxnet3_interrupt {
180 struct resource *vmxi_irq;
185 struct vmxnet3_softc {
187 struct ifnet *vmx_ifp;
188 struct vmxnet3_driver_shared *vmx_ds;
190 #define VMXNET3_FLAG_NO_MSIX 0x0001
192 struct vmxnet3_rxqueue *vmx_rxq;
193 struct vmxnet3_txqueue *vmx_txq;
195 struct resource *vmx_res0;
196 bus_space_tag_t vmx_iot0;
197 bus_space_handle_t vmx_ioh0;
198 struct resource *vmx_res1;
199 bus_space_tag_t vmx_iot1;
200 bus_space_handle_t vmx_ioh1;
201 struct resource *vmx_msix_res;
211 int vmx_rx_max_chain;
213 struct vmxnet3_statistics vmx_stats;
216 int vmx_intr_mask_mode;
217 int vmx_event_intr_idx;
219 struct vmxnet3_interrupt vmx_intrs[VMXNET3_MAX_INTRS];
224 struct callout vmx_tick;
225 struct vmxnet3_dma_alloc vmx_ds_dma;
226 struct vmxnet3_dma_alloc vmx_qs_dma;
227 struct vmxnet3_dma_alloc vmx_mcast_dma;
228 struct ifmedia vmx_media;
229 eventhandler_tag vmx_vlan_attach;
230 eventhandler_tag vmx_vlan_detach;
231 uint32_t vmx_vlan_filter[4096/32];
232 uint8_t vmx_lladdr[ETHER_ADDR_LEN];
235 #define VMXNET3_CORE_LOCK_INIT(_sc, _name) \
236 mtx_init(&(_sc)->vmx_mtx, _name, "VMXNET3 Lock", MTX_DEF)
237 #define VMXNET3_CORE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->vmx_mtx)
238 #define VMXNET3_CORE_LOCK(_sc) mtx_lock(&(_sc)->vmx_mtx)
239 #define VMXNET3_CORE_UNLOCK(_sc) mtx_unlock(&(_sc)->vmx_mtx)
240 #define VMXNET3_CORE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->vmx_mtx, MA_OWNED)
241 #define VMXNET3_CORE_LOCK_ASSERT_NOTOWNED(_sc) \
242 mtx_assert(&(_sc)->vmx_mtx, MA_NOTOWNED)
245 * Our driver version we report to the hypervisor; we just keep
246 * this value constant.
248 #define VMXNET3_DRIVER_VERSION 0x00010000
251 * Convert the FreeBSD version in to something the hypervisor
252 * understands. This is apparently what VMware's driver reports
253 * so mimic it even though it probably is not required.
255 #define VMXNET3_GUEST_OS_VERSION \
256 (((__FreeBSD_version / 100000) << 14) | \
257 (((__FreeBSD_version / 1000) % 100) << 6 ) | \
258 (((__FreeBSD_version / 100) % 10) << 30) | \
259 ((__FreeBSD_version % 100) << 22))
262 * Max descriptors per Tx packet. We must limit the size of the
263 * any TSO packets based on the number of segments.
265 #define VMXNET3_TX_MAXSEGS 32
266 #define VMXNET3_TSO_MAXSIZE 65550
269 * Maximum support Tx segments size. The length field in the
270 * Tx descriptor is 14 bits.
272 #define VMXNET3_TX_MAXSEGSIZE (1 << 14)
275 * The maximum number of Rx segments we accept. When LRO is enabled,
276 * this allows us to receive the maximum sized frame with one MCLBYTES
277 * cluster followed by 16 MJUMPAGESIZE clusters.
279 #define VMXNET3_MAX_RX_SEGS 17
282 * Predetermined size of the multicast MACs filter table. If the
283 * number of multicast addresses exceeds this size, then the
284 * ALL_MULTI mode is use instead.
286 #define VMXNET3_MULTICAST_MAX 32
289 * Our Tx watchdog timeout.
291 #define VMXNET3_WATCHDOG_TIMEOUT 5
294 * IP protocols that we can perform Tx checksum offloading of.
296 #define VMXNET3_CSUM_OFFLOAD (CSUM_TCP | CSUM_UDP)
297 #define VMXNET3_CSUM_OFFLOAD_IPV6 (CSUM_TCP_IPV6 | CSUM_UDP_IPV6)
299 #define VMXNET3_CSUM_ALL_OFFLOAD \
300 (VMXNET3_CSUM_OFFLOAD | VMXNET3_CSUM_OFFLOAD_IPV6 | CSUM_TSO)
303 * Compat macros to keep this driver compiling on old releases.
306 #if !defined(SYSCTL_ADD_UQUAD)
307 #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD
310 #if !defined(IFCAP_TXCSUM_IPV6)
311 #define IFCAP_TXCSUM_IPV6 0
314 #if !defined(IFCAP_RXCSUM_IPV6)
315 #define IFCAP_RXCSUM_IPV6 0
318 #if !defined(CSUM_TCP_IPV6)
319 #define CSUM_TCP_IPV6 0
322 #if !defined(CSUM_UDP_IPV6)
323 #define CSUM_UDP_IPV6 0
326 #endif /* _IF_VMXVAR_H */