2 * Copyright (c) 2011 Chelsio Communications, Inc.
4 * Written by: Navdeep Parhar <np@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
32 #include <sys/ioctl.h>
34 #include <sys/socket.h>
37 #include <arpa/inet.h>
38 #include <net/ethernet.h>
39 #include <net/sff8472.h>
40 #include <netinet/in.h>
55 #define in_range(val, lo, hi) ( val < 0 || (val <= hi && val >= lo))
56 #define max(x, y) ((x) > (y) ? (x) : (y))
58 static const char *progname, *nexus;
59 static int chip_id; /* 4 for T4, 5 for T5 */
69 const struct reg_info *ri;
73 const char *name; /* Field name */
74 unsigned short start; /* Start bit position */
75 unsigned short end; /* End bit position */
76 unsigned char shift; /* # of low order bits omitted and implicitly 0 */
77 unsigned char hex; /* Print field in hex instead of decimal */
78 unsigned char islog2; /* Field contains the base-2 log of the value */
81 #include "reg_defs_t4.c"
82 #include "reg_defs_t5.c"
83 #include "reg_defs_t6.c"
84 #include "reg_defs_t4vf.c"
89 fprintf(fp, "Usage: %s <nexus> [operation]\n", progname);
91 "\tclearstats <port> clear port statistics\n"
92 "\tcontext <type> <id> show an SGE context\n"
93 "\tfilter <idx> [<param> <val>] ... set a filter\n"
94 "\tfilter <idx> delete|clear delete a filter\n"
95 "\tfilter list list all filters\n"
96 "\tfilter mode [<match>] ... get/set global filter mode\n"
97 "\ti2c <port> <devaddr> <addr> [<len>] read from i2c device\n"
98 "\tloadfw <fw-image.bin> install firmware\n"
99 "\tmemdump <addr> <len> dump a memory range\n"
100 "\tmodinfo <port> [raw] optics/cable information\n"
101 "\treg <address>[=<val>] read/write register\n"
102 "\treg64 <address>[=<val>] read/write 64 bit register\n"
103 "\tregdump [<module>] ... dump registers\n"
104 "\tsched-class params <param> <val> .. configure TX scheduler class\n"
105 "\tsched-queue <port> <queue> <class> bind NIC queues to TX Scheduling class\n"
106 "\tstdio interactive mode\n"
107 "\ttcb <tid> read TCB\n"
108 "\ttracer <idx> tx<n>|rx<n> set and enable a tracer\n"
109 "\ttracer <idx> disable|enable disable or enable a tracer\n"
110 "\ttracer list list all tracers\n"
114 static inline unsigned int
115 get_card_vers(unsigned int version)
117 return (version & 0x3ff);
121 real_doit(unsigned long cmd, void *data, const char *cmdstr)
129 snprintf(buf, sizeof(buf), "/dev/%s", nexus);
130 if ((fd = open(buf, O_RDWR)) < 0) {
131 warn("open(%s)", nexus);
135 chip_id = nexus[1] - '0';
138 rc = ioctl(fd, cmd, data);
146 #define doit(x, y) real_doit(x, y, #x)
149 str_to_number(const char *s, long *val, long long *vall)
154 *vall = strtoll(s, &p, 0);
156 *val = strtol(s, &p, 0);
164 read_reg(long addr, int size, long long *val)
169 reg.addr = (uint32_t) addr;
170 reg.size = (uint32_t) size;
173 rc = doit(CHELSIO_T4_GETREG, ®);
181 write_reg(long addr, int size, long long val)
185 reg.addr = (uint32_t) addr;
186 reg.size = (uint32_t) size;
187 reg.val = (uint64_t) val;
189 return doit(CHELSIO_T4_SETREG, ®);
193 register_io(int argc, const char *argv[], int size)
201 /* <reg> OR <reg>=<value> */
203 p = str_to_number(argv[0], &addr, NULL);
206 warnx("invalid register \"%s\"", argv[0]);
212 p = str_to_number(v, NULL, &val);
215 warnx("invalid value \"%s\"", v);
220 } else if (argc == 2) {
225 p = str_to_number(argv[0], &addr, NULL);
227 warnx("invalid register \"%s\"", argv[0]);
231 p = str_to_number(argv[1], NULL, &val);
233 warnx("invalid value \"%s\"", argv[1]);
237 warnx("reg: invalid number of arguments (%d)", argc);
242 rc = write_reg(addr, size, val);
244 rc = read_reg(addr, size, &val);
246 printf("0x%llx [%llu]\n", val, val);
252 static inline uint32_t
253 xtract(uint32_t val, int shift, int len)
255 return (val >> shift) & ((1 << len) - 1);
259 dump_block_regs(const struct reg_info *reg_array, const uint32_t *regs)
261 uint32_t reg_val = 0;
263 for ( ; reg_array->name; ++reg_array)
264 if (!reg_array->len) {
265 reg_val = regs[reg_array->addr / 4];
266 printf("[%#7x] %-47s %#-10x %u\n", reg_array->addr,
267 reg_array->name, reg_val, reg_val);
269 uint32_t v = xtract(reg_val, reg_array->addr,
272 printf(" %*u:%u %-47s %#-10x %u\n",
273 reg_array->addr < 10 ? 3 : 2,
274 reg_array->addr + reg_array->len - 1,
275 reg_array->addr, reg_array->name, v, v);
282 dump_regs_table(int argc, const char *argv[], const uint32_t *regs,
283 const struct mod_regs *modtab, int nmodules)
287 for (i = 0; i < argc; i++) {
288 for (j = 0; j < nmodules; j++) {
289 if (!strcmp(argv[i], modtab[j].name))
294 warnx("invalid register block \"%s\"", argv[i]);
295 fprintf(stderr, "\nAvailable blocks:");
296 for ( ; nmodules; nmodules--, modtab++)
297 fprintf(stderr, " %s", modtab->name);
298 fprintf(stderr, "\n");
303 for ( ; nmodules; nmodules--, modtab++) {
305 match = argc == 0 ? 1 : 0;
306 for (i = 0; !match && i < argc; i++) {
307 if (!strcmp(argv[i], modtab->name))
312 dump_block_regs(modtab->ri, regs);
318 #define T4_MODREGS(name) { #name, t4_##name##_regs }
320 dump_regs_t4(int argc, const char *argv[], const uint32_t *regs)
322 static struct mod_regs t4_mod[] = {
324 { "pci", t4_pcie_regs },
328 { "edc0", t4_edc_0_regs },
329 { "edc1", t4_edc_1_regs },
334 { "pmrx", t4_pm_rx_regs },
335 { "pmtx", t4_pm_tx_regs },
337 { "cplsw", t4_cpl_switch_regs },
339 { "i2c", t4_i2cm_regs },
350 return dump_regs_table(argc, argv, regs, t4_mod, nitems(t4_mod));
354 #define T5_MODREGS(name) { #name, t5_##name##_regs }
356 dump_regs_t5(int argc, const char *argv[], const uint32_t *regs)
358 static struct mod_regs t5_mod[] = {
360 { "pci", t5_pcie_regs },
362 { "mc0", t5_mc_0_regs },
363 { "mc1", t5_mc_1_regs },
365 { "edc0", t5_edc_t50_regs },
366 { "edc1", t5_edc_t51_regs },
369 { "ulprx", t5_ulp_rx_regs },
370 { "ulptx", t5_ulp_tx_regs },
371 { "pmrx", t5_pm_rx_regs },
372 { "pmtx", t5_pm_tx_regs },
374 { "cplsw", t5_cpl_switch_regs },
376 { "i2c", t5_i2cm_regs },
385 { "hma", t5_hma_t5_regs }
388 return dump_regs_table(argc, argv, regs, t5_mod, nitems(t5_mod));
392 #define T6_MODREGS(name) { #name, t6_##name##_regs }
394 dump_regs_t6(int argc, const char *argv[], const uint32_t *regs)
396 static struct mod_regs t6_mod[] = {
398 { "pci", t6_pcie_regs },
400 { "mc0", t6_mc_0_regs },
402 { "edc0", t6_edc_t60_regs },
403 { "edc1", t6_edc_t61_regs },
406 { "ulprx", t6_ulp_rx_regs },
407 { "ulptx", t6_ulp_tx_regs },
408 { "pmrx", t6_pm_rx_regs },
409 { "pmtx", t6_pm_tx_regs },
411 { "cplsw", t6_cpl_switch_regs },
413 { "i2c", t6_i2cm_regs },
422 { "hma", t6_hma_t6_regs }
425 return dump_regs_table(argc, argv, regs, t6_mod, nitems(t6_mod));
430 dump_regs_t4vf(int argc, const char *argv[], const uint32_t *regs)
432 static struct mod_regs t4vf_mod[] = {
433 { "sge", t4vf_sge_regs },
434 { "mps", t4vf_mps_regs },
435 { "pl", t4vf_pl_regs },
436 { "mbdata", t4vf_mbdata_regs },
437 { "cim", t4vf_cim_regs },
440 return dump_regs_table(argc, argv, regs, t4vf_mod, nitems(t4vf_mod));
444 dump_regs_t5vf(int argc, const char *argv[], const uint32_t *regs)
446 static struct mod_regs t5vf_mod[] = {
447 { "sge", t5vf_sge_regs },
448 { "mps", t4vf_mps_regs },
449 { "pl", t5vf_pl_regs },
450 { "mbdata", t4vf_mbdata_regs },
451 { "cim", t4vf_cim_regs },
454 return dump_regs_table(argc, argv, regs, t5vf_mod, nitems(t5vf_mod));
458 dump_regs_t6vf(int argc, const char *argv[], const uint32_t *regs)
460 static struct mod_regs t6vf_mod[] = {
461 { "sge", t5vf_sge_regs },
462 { "mps", t4vf_mps_regs },
463 { "pl", t6vf_pl_regs },
464 { "mbdata", t4vf_mbdata_regs },
465 { "cim", t4vf_cim_regs },
468 return dump_regs_table(argc, argv, regs, t6vf_mod, nitems(t6vf_mod));
472 dump_regs(int argc, const char *argv[])
474 int vers, revision, rc;
475 struct t4_regdump regs;
478 len = max(T4_REGDUMP_SIZE, T5_REGDUMP_SIZE);
479 regs.data = calloc(1, len);
480 if (regs.data == NULL) {
481 warnc(ENOMEM, "regdump");
486 rc = doit(CHELSIO_T4_REGDUMP, ®s);
490 vers = get_card_vers(regs.version);
491 revision = (regs.version >> 10) & 0x3f;
494 if (revision == 0x3f)
495 rc = dump_regs_t4vf(argc, argv, regs.data);
497 rc = dump_regs_t4(argc, argv, regs.data);
498 } else if (vers == 5) {
499 if (revision == 0x3f)
500 rc = dump_regs_t5vf(argc, argv, regs.data);
502 rc = dump_regs_t5(argc, argv, regs.data);
503 } else if (vers == 6) {
504 if (revision == 0x3f)
505 rc = dump_regs_t6vf(argc, argv, regs.data);
507 rc = dump_regs_t6(argc, argv, regs.data);
509 warnx("%s (type %d, rev %d) is not a known card.",
510 nexus, vers, revision);
519 do_show_info_header(uint32_t mode)
523 printf("%4s %8s", "Idx", "Hits");
524 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) {
535 if (mode & T4_FILTER_IC_VNIC)
536 printf(" VFvld:PF:VF");
538 printf(" vld:oVLAN");
545 case T4_FILTER_IP_TOS:
549 case T4_FILTER_IP_PROTO:
553 case T4_FILTER_ETH_TYPE:
557 case T4_FILTER_MAC_IDX:
561 case T4_FILTER_MPS_HIT_TYPE:
565 case T4_FILTER_IP_FRAGMENT:
570 /* compressed filter field not enabled */
574 printf(" %20s %20s %9s %9s %s\n",
575 "DIP", "SIP", "DPORT", "SPORT", "Action");
579 * Parse an argument sub-vector as a { <parameter name> <value>[:<mask>] }
580 * ordered tuple. If the parameter name in the argument sub-vector does not
581 * match the passed in parameter name, then a zero is returned for the
582 * function and no parsing is performed. If there is a match, then the value
583 * and optional mask are parsed and returned in the provided return value
584 * pointers. If no optional mask is specified, then a default mask of all 1s
587 * An error in parsing the value[:mask] will result in an error message and
588 * program termination.
591 parse_val_mask(const char *param, const char *args[], uint32_t *val,
596 if (strcmp(param, args[0]) != 0)
599 *val = strtoul(args[1], &p, 0);
606 if (p[0] == ':' && p[1] != 0) {
607 *mask = strtoul(p+1, &p, 0);
613 warnx("parameter \"%s\" has bad \"value[:mask]\" %s",
620 * Parse an argument sub-vector as a { <parameter name> <addr>[/<mask>] }
621 * ordered tuple. If the parameter name in the argument sub-vector does not
622 * match the passed in parameter name, then a zero is returned for the
623 * function and no parsing is performed. If there is a match, then the value
624 * and optional mask are parsed and returned in the provided return value
625 * pointers. If no optional mask is specified, then a default mask of all 1s
628 * The value return parameter "afp" is used to specify the expected address
629 * family -- IPv4 or IPv6 -- of the address[/mask] and return its actual
630 * format. A passed in value of AF_UNSPEC indicates that either IPv4 or IPv6
631 * is acceptable; AF_INET means that only IPv4 addresses are acceptable; and
632 * AF_INET6 means that only IPv6 are acceptable. AF_INET is returned for IPv4
633 * and AF_INET6 for IPv6 addresses, respectively. IPv4 address/mask pairs are
634 * returned in the first four bytes of the address and mask return values with
635 * the address A.B.C.D returned with { A, B, C, D } returned in addresses { 0,
636 * 1, 2, 3}, respectively.
638 * An error in parsing the value[:mask] will result in an error message and
639 * program termination.
642 parse_ipaddr(const char *param, const char *args[], int *afp, uint8_t addr[],
645 const char *colon, *afn;
649 unsigned int masksize;
652 * Is this our parameter?
654 if (strcmp(param, args[0]) != 0)
658 * Fundamental IPv4 versus IPv6 selection.
660 colon = strchr(args[1], ':');
670 if (*afp == AF_UNSPEC)
672 else if (*afp != af) {
673 warnx("address %s is not of expected family %s",
674 args[1], *afp == AF_INET ? "IP" : "IPv6");
679 * Parse address (temporarily stripping off any "/mask"
682 slash = strchr(args[1], '/');
685 ret = inet_pton(af, args[1], addr);
689 warnx("Cannot parse %s %s address %s", param, afn, args[1]);
694 * Parse optional mask specification.
698 unsigned int prefix = strtoul(slash + 1, &p, 10);
700 if (p == slash + 1) {
701 warnx("missing address prefix for %s", param);
705 warnx("%s is not a valid address prefix", slash + 1);
708 if (prefix > masksize) {
709 warnx("prefix %u is too long for an %s address",
713 memset(mask, 0, masksize / 8);
720 for (m = mask; masksize >= 8; m++, masksize -= 8)
723 *m = ~0 << (8 - masksize);
729 * Parse an argument sub-vector as a { <parameter name> <value> } ordered
730 * tuple. If the parameter name in the argument sub-vector does not match the
731 * passed in parameter name, then a zero is returned for the function and no
732 * parsing is performed. If there is a match, then the value is parsed and
733 * returned in the provided return value pointer.
736 parse_val(const char *param, const char *args[], uint32_t *val)
740 if (strcmp(param, args[0]) != 0)
743 *val = strtoul(args[1], &p, 0);
744 if (p > args[1] && p[0] == 0)
747 warnx("parameter \"%s\" has bad \"value\" %s", args[0], args[1]);
752 filters_show_ipaddr(int type, uint8_t *addr, uint8_t *addrm)
763 for (octet = 0; octet < noctets; octet++)
764 printf("%02x", addr[octet]);
766 for (octet = 0; octet < noctets; octet++)
767 printf("%02x", addrm[octet]);
771 do_show_one_filter_info(struct t4_filter *t, uint32_t mode)
775 printf("%4d", t->idx);
776 if (t->hits == UINT64_MAX)
779 printf(" %8ju", t->hits);
782 * Compressed header portion of filter.
784 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) {
787 printf(" %1d/%1d", t->fs.val.fcoe, t->fs.mask.fcoe);
791 printf(" %1d/%1d", t->fs.val.iport, t->fs.mask.iport);
795 if (mode & T4_FILTER_IC_VNIC) {
796 printf(" %1d:%1x:%02x/%1d:%1x:%02x",
798 (t->fs.val.vnic >> 13) & 0x7,
799 t->fs.val.vnic & 0x1fff,
801 (t->fs.mask.vnic >> 13) & 0x7,
802 t->fs.mask.vnic & 0x1fff);
804 printf(" %1d:%04x/%1d:%04x",
805 t->fs.val.ovlan_vld, t->fs.val.vnic,
806 t->fs.mask.ovlan_vld, t->fs.mask.vnic);
811 printf(" %1d:%04x/%1d:%04x",
812 t->fs.val.vlan_vld, t->fs.val.vlan,
813 t->fs.mask.vlan_vld, t->fs.mask.vlan);
816 case T4_FILTER_IP_TOS:
817 printf(" %02x/%02x", t->fs.val.tos, t->fs.mask.tos);
820 case T4_FILTER_IP_PROTO:
821 printf(" %02x/%02x", t->fs.val.proto, t->fs.mask.proto);
824 case T4_FILTER_ETH_TYPE:
825 printf(" %04x/%04x", t->fs.val.ethtype,
829 case T4_FILTER_MAC_IDX:
830 printf(" %03x/%03x", t->fs.val.macidx,
834 case T4_FILTER_MPS_HIT_TYPE:
835 printf(" %1x/%1x", t->fs.val.matchtype,
836 t->fs.mask.matchtype);
839 case T4_FILTER_IP_FRAGMENT:
840 printf(" %1d/%1d", t->fs.val.frag, t->fs.mask.frag);
844 /* compressed filter field not enabled */
850 * Fixed portion of filter.
852 filters_show_ipaddr(t->fs.type, t->fs.val.dip, t->fs.mask.dip);
853 filters_show_ipaddr(t->fs.type, t->fs.val.sip, t->fs.mask.sip);
854 printf(" %04x/%04x %04x/%04x",
855 t->fs.val.dport, t->fs.mask.dport,
856 t->fs.val.sport, t->fs.mask.sport);
859 * Variable length filter action.
861 if (t->fs.action == FILTER_DROP)
863 else if (t->fs.action == FILTER_SWITCH) {
864 printf(" Switch: port=%d", t->fs.eport);
867 ", dmac=%02x:%02x:%02x:%02x:%02x:%02x "
869 t->fs.dmac[0], t->fs.dmac[1],
870 t->fs.dmac[2], t->fs.dmac[3],
871 t->fs.dmac[4], t->fs.dmac[5],
875 ", smac=%02x:%02x:%02x:%02x:%02x:%02x "
877 t->fs.smac[0], t->fs.smac[1],
878 t->fs.smac[2], t->fs.smac[3],
879 t->fs.smac[4], t->fs.smac[5],
881 if (t->fs.newvlan == VLAN_REMOVE)
882 printf(", vlan=none");
883 else if (t->fs.newvlan == VLAN_INSERT)
884 printf(", vlan=insert(%x)", t->fs.vlan);
885 else if (t->fs.newvlan == VLAN_REWRITE)
886 printf(", vlan=rewrite(%x)", t->fs.vlan);
889 if (t->fs.dirsteer == 0) {
892 printf("(TCB=hash)");
894 printf("%d", t->fs.iq);
895 if (t->fs.dirsteerhash == 0)
911 uint32_t mode = 0, header = 0;
915 /* Get the global filter mode first */
916 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode);
921 for (t.idx = 0; ; t.idx++) {
922 rc = doit(CHELSIO_T4_GET_FILTER, &t);
923 if (rc != 0 || t.idx == 0xffffffff)
927 do_show_info_header(mode);
930 do_show_one_filter_info(&t, mode);
937 get_filter_mode(void)
942 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode);
946 if (mode & T4_FILTER_IPv4)
949 if (mode & T4_FILTER_IPv6)
952 if (mode & T4_FILTER_IP_SADDR)
955 if (mode & T4_FILTER_IP_DADDR)
958 if (mode & T4_FILTER_IP_SPORT)
961 if (mode & T4_FILTER_IP_DPORT)
964 if (mode & T4_FILTER_IP_FRAGMENT)
967 if (mode & T4_FILTER_MPS_HIT_TYPE)
968 printf("matchtype ");
970 if (mode & T4_FILTER_MAC_IDX)
973 if (mode & T4_FILTER_ETH_TYPE)
976 if (mode & T4_FILTER_IP_PROTO)
979 if (mode & T4_FILTER_IP_TOS)
982 if (mode & T4_FILTER_VLAN)
985 if (mode & T4_FILTER_VNIC) {
986 if (mode & T4_FILTER_IC_VNIC)
992 if (mode & T4_FILTER_PORT)
995 if (mode & T4_FILTER_FCoE)
1004 set_filter_mode(int argc, const char *argv[])
1007 int vnic = 0, ovlan = 0;
1009 for (; argc; argc--, argv++) {
1010 if (!strcmp(argv[0], "frag"))
1011 mode |= T4_FILTER_IP_FRAGMENT;
1013 if (!strcmp(argv[0], "matchtype"))
1014 mode |= T4_FILTER_MPS_HIT_TYPE;
1016 if (!strcmp(argv[0], "macidx"))
1017 mode |= T4_FILTER_MAC_IDX;
1019 if (!strcmp(argv[0], "ethtype"))
1020 mode |= T4_FILTER_ETH_TYPE;
1022 if (!strcmp(argv[0], "proto"))
1023 mode |= T4_FILTER_IP_PROTO;
1025 if (!strcmp(argv[0], "tos"))
1026 mode |= T4_FILTER_IP_TOS;
1028 if (!strcmp(argv[0], "vlan"))
1029 mode |= T4_FILTER_VLAN;
1031 if (!strcmp(argv[0], "ovlan")) {
1032 mode |= T4_FILTER_VNIC;
1036 if (!strcmp(argv[0], "vnic_id")) {
1037 mode |= T4_FILTER_VNIC;
1038 mode |= T4_FILTER_IC_VNIC;
1042 if (!strcmp(argv[0], "iport"))
1043 mode |= T4_FILTER_PORT;
1045 if (!strcmp(argv[0], "fcoe"))
1046 mode |= T4_FILTER_FCoE;
1049 if (vnic > 0 && ovlan > 0) {
1050 warnx("\"vnic_id\" and \"ovlan\" are mutually exclusive.");
1054 return doit(CHELSIO_T4_SET_FILTER_MODE, &mode);
1058 del_filter(uint32_t idx)
1064 return doit(CHELSIO_T4_DEL_FILTER, &t);
1068 set_filter(uint32_t idx, int argc, const char *argv[])
1070 int af = AF_UNSPEC, start_arg = 0;
1074 warnc(EINVAL, "%s", __func__);
1077 bzero(&t, sizeof (t));
1081 for (start_arg = 0; start_arg + 2 <= argc; start_arg += 2) {
1082 const char **args = &argv[start_arg];
1085 if (!strcmp(argv[start_arg], "type")) {
1087 if (!strcasecmp(argv[start_arg + 1], "ipv4"))
1089 else if (!strcasecmp(argv[start_arg + 1], "ipv6"))
1092 warnx("invalid type \"%s\"; "
1093 "must be one of \"ipv4\" or \"ipv6\"",
1094 argv[start_arg + 1]);
1098 if (af != AF_UNSPEC && af != newaf) {
1099 warnx("conflicting IPv4/IPv6 specifications.");
1103 } else if (!parse_val_mask("fcoe", args, &val, &mask)) {
1104 t.fs.val.fcoe = val;
1105 t.fs.mask.fcoe = mask;
1106 } else if (!parse_val_mask("iport", args, &val, &mask)) {
1107 t.fs.val.iport = val;
1108 t.fs.mask.iport = mask;
1109 } else if (!parse_val_mask("ovlan", args, &val, &mask)) {
1110 t.fs.val.vnic = val;
1111 t.fs.mask.vnic = mask;
1112 t.fs.val.ovlan_vld = 1;
1113 t.fs.mask.ovlan_vld = 1;
1114 } else if (!parse_val_mask("ivlan", args, &val, &mask)) {
1115 t.fs.val.vlan = val;
1116 t.fs.mask.vlan = mask;
1117 t.fs.val.vlan_vld = 1;
1118 t.fs.mask.vlan_vld = 1;
1119 } else if (!parse_val_mask("pf", args, &val, &mask)) {
1120 t.fs.val.vnic &= 0x1fff;
1121 t.fs.val.vnic |= (val & 0x7) << 13;
1122 t.fs.mask.vnic &= 0x1fff;
1123 t.fs.mask.vnic |= (mask & 0x7) << 13;
1124 t.fs.val.pfvf_vld = 1;
1125 t.fs.mask.pfvf_vld = 1;
1126 } else if (!parse_val_mask("vf", args, &val, &mask)) {
1127 t.fs.val.vnic &= 0xe000;
1128 t.fs.val.vnic |= val & 0x1fff;
1129 t.fs.mask.vnic &= 0xe000;
1130 t.fs.mask.vnic |= mask & 0x1fff;
1131 t.fs.val.pfvf_vld = 1;
1132 t.fs.mask.pfvf_vld = 1;
1133 } else if (!parse_val_mask("tos", args, &val, &mask)) {
1135 t.fs.mask.tos = mask;
1136 } else if (!parse_val_mask("proto", args, &val, &mask)) {
1137 t.fs.val.proto = val;
1138 t.fs.mask.proto = mask;
1139 } else if (!parse_val_mask("ethtype", args, &val, &mask)) {
1140 t.fs.val.ethtype = val;
1141 t.fs.mask.ethtype = mask;
1142 } else if (!parse_val_mask("macidx", args, &val, &mask)) {
1143 t.fs.val.macidx = val;
1144 t.fs.mask.macidx = mask;
1145 } else if (!parse_val_mask("matchtype", args, &val, &mask)) {
1146 t.fs.val.matchtype = val;
1147 t.fs.mask.matchtype = mask;
1148 } else if (!parse_val_mask("frag", args, &val, &mask)) {
1149 t.fs.val.frag = val;
1150 t.fs.mask.frag = mask;
1151 } else if (!parse_val_mask("dport", args, &val, &mask)) {
1152 t.fs.val.dport = val;
1153 t.fs.mask.dport = mask;
1154 } else if (!parse_val_mask("sport", args, &val, &mask)) {
1155 t.fs.val.sport = val;
1156 t.fs.mask.sport = mask;
1157 } else if (!parse_ipaddr("dip", args, &af, t.fs.val.dip,
1160 } else if (!parse_ipaddr("sip", args, &af, t.fs.val.sip,
1163 } else if (!strcmp(argv[start_arg], "action")) {
1164 if (!strcmp(argv[start_arg + 1], "pass"))
1165 t.fs.action = FILTER_PASS;
1166 else if (!strcmp(argv[start_arg + 1], "drop"))
1167 t.fs.action = FILTER_DROP;
1168 else if (!strcmp(argv[start_arg + 1], "switch"))
1169 t.fs.action = FILTER_SWITCH;
1171 warnx("invalid action \"%s\"; must be one of"
1172 " \"pass\", \"drop\" or \"switch\"",
1173 argv[start_arg + 1]);
1176 } else if (!parse_val("hitcnts", args, &val)) {
1178 } else if (!parse_val("prio", args, &val)) {
1180 } else if (!parse_val("rpttid", args, &val)) {
1182 } else if (!parse_val("queue", args, &val)) {
1185 } else if (!parse_val("tcbhash", args, &val)) {
1187 t.fs.dirsteerhash = 1;
1188 } else if (!parse_val("eport", args, &val)) {
1190 } else if (!strcmp(argv[start_arg], "dmac")) {
1191 struct ether_addr *daddr;
1193 daddr = ether_aton(argv[start_arg + 1]);
1194 if (daddr == NULL) {
1195 warnx("invalid dmac address \"%s\"",
1196 argv[start_arg + 1]);
1199 memcpy(t.fs.dmac, daddr, ETHER_ADDR_LEN);
1201 } else if (!strcmp(argv[start_arg], "smac")) {
1202 struct ether_addr *saddr;
1204 saddr = ether_aton(argv[start_arg + 1]);
1205 if (saddr == NULL) {
1206 warnx("invalid smac address \"%s\"",
1207 argv[start_arg + 1]);
1210 memcpy(t.fs.smac, saddr, ETHER_ADDR_LEN);
1212 } else if (!strcmp(argv[start_arg], "vlan")) {
1214 if (!strcmp(argv[start_arg + 1], "none")) {
1215 t.fs.newvlan = VLAN_REMOVE;
1216 } else if (argv[start_arg + 1][0] == '=') {
1217 t.fs.newvlan = VLAN_REWRITE;
1218 } else if (argv[start_arg + 1][0] == '+') {
1219 t.fs.newvlan = VLAN_INSERT;
1220 } else if (isdigit(argv[start_arg + 1][0]) &&
1221 !parse_val_mask("vlan", args, &val, &mask)) {
1222 t.fs.val.vlan = val;
1223 t.fs.mask.vlan = mask;
1224 t.fs.val.vlan_vld = 1;
1225 t.fs.mask.vlan_vld = 1;
1227 warnx("unknown vlan parameter \"%s\"; must"
1228 " be one of \"none\", \"=<vlan>\", "
1229 " \"+<vlan>\", or \"<vlan>\"",
1230 argv[start_arg + 1]);
1233 if (t.fs.newvlan == VLAN_REWRITE ||
1234 t.fs.newvlan == VLAN_INSERT) {
1235 t.fs.vlan = strtoul(argv[start_arg + 1] + 1,
1237 if (p == argv[start_arg + 1] + 1 || p[0] != 0) {
1238 warnx("invalid vlan \"%s\"",
1239 argv[start_arg + 1]);
1244 warnx("invalid parameter \"%s\"", argv[start_arg]);
1248 if (start_arg != argc) {
1249 warnx("no value for \"%s\"", argv[start_arg]);
1254 * Check basic sanity of option combinations.
1256 if (t.fs.action != FILTER_SWITCH &&
1257 (t.fs.eport || t.fs.newdmac || t.fs.newsmac || t.fs.newvlan)) {
1258 warnx("prio, port dmac, smac and vlan only make sense with"
1259 " \"action switch\"");
1262 if (t.fs.action != FILTER_PASS &&
1263 (t.fs.rpttid || t.fs.dirsteer || t.fs.maskhash)) {
1264 warnx("rpttid, queue and tcbhash don't make sense with"
1265 " action \"drop\" or \"switch\"");
1268 if (t.fs.val.ovlan_vld && t.fs.val.pfvf_vld) {
1269 warnx("ovlan and vnic_id (pf/vf) are mutually exclusive");
1273 t.fs.type = (af == AF_INET6 ? 1 : 0); /* default IPv4 */
1274 return doit(CHELSIO_T4_SET_FILTER, &t);
1278 filter_cmd(int argc, const char *argv[])
1285 warnx("filter: no arguments.");
1290 if (strcmp(argv[0], "list") == 0) {
1292 warnx("trailing arguments after \"list\" ignored.");
1294 return show_filters();
1298 if (argc == 1 && strcmp(argv[0], "mode") == 0)
1299 return get_filter_mode();
1302 if (strcmp(argv[0], "mode") == 0)
1303 return set_filter_mode(argc - 1, argv + 1);
1306 s = str_to_number(argv[0], NULL, &val);
1307 if (*s || val > 0xffffffffU) {
1308 warnx("\"%s\" is neither an index nor a filter subcommand.",
1312 idx = (uint32_t) val;
1314 /* <idx> delete|clear */
1316 (strcmp(argv[1], "delete") == 0 || strcmp(argv[1], "clear") == 0)) {
1317 return del_filter(idx);
1320 /* <idx> [<param> <val>] ... */
1321 return set_filter(idx, argc - 1, argv + 1);
1325 * Shows the fields of a multi-word structure. The structure is considered to
1326 * consist of @nwords 32-bit words (i.e, it's an (@nwords * 32)-bit structure)
1327 * whose fields are described by @fd. The 32-bit words are given in @words
1328 * starting with the least significant 32-bit word.
1331 show_struct(const uint32_t *words, int nwords, const struct field_desc *fd)
1334 const struct field_desc *p;
1336 for (p = fd; p->name; p++)
1337 w = max(w, strlen(p->name));
1340 unsigned long long data;
1341 int first_word = fd->start / 32;
1342 int shift = fd->start % 32;
1343 int width = fd->end - fd->start + 1;
1344 unsigned long long mask = (1ULL << width) - 1;
1346 data = (words[first_word] >> shift) |
1347 ((uint64_t)words[first_word + 1] << (32 - shift));
1349 data |= ((uint64_t)words[first_word + 2] << (64 - shift));
1353 printf("%-*s ", w, fd->name);
1354 printf(fd->hex ? "%#llx\n" : "%llu\n", data << fd->shift);
1359 #define FIELD(name, start, end) { name, start, end, 0, 0, 0 }
1360 #define FIELD1(name, start) FIELD(name, start, start)
1363 show_t5t6_ctxt(const struct t4_sge_context *p, int vers)
1365 static struct field_desc egress_t5[] = {
1366 FIELD("DCA_ST:", 181, 191),
1367 FIELD1("StatusPgNS:", 180),
1368 FIELD1("StatusPgRO:", 179),
1369 FIELD1("FetchNS:", 178),
1370 FIELD1("FetchRO:", 177),
1371 FIELD1("Valid:", 176),
1372 FIELD("PCIeDataChannel:", 174, 175),
1373 FIELD1("StatusPgTPHintEn:", 173),
1374 FIELD("StatusPgTPHint:", 171, 172),
1375 FIELD1("FetchTPHintEn:", 170),
1376 FIELD("FetchTPHint:", 168, 169),
1377 FIELD1("FCThreshOverride:", 167),
1378 { "WRLength:", 162, 166, 9, 0, 1 },
1379 FIELD1("WRLengthKnown:", 161),
1380 FIELD1("ReschedulePending:", 160),
1381 FIELD1("OnChipQueue:", 159),
1382 FIELD1("FetchSizeMode:", 158),
1383 { "FetchBurstMin:", 156, 157, 4, 0, 1 },
1384 FIELD1("FLMPacking:", 155),
1385 FIELD("FetchBurstMax:", 153, 154),
1386 FIELD("uPToken:", 133, 152),
1387 FIELD1("uPTokenEn:", 132),
1388 FIELD1("UserModeIO:", 131),
1389 FIELD("uPFLCredits:", 123, 130),
1390 FIELD1("uPFLCreditEn:", 122),
1391 FIELD("FID:", 111, 121),
1392 FIELD("HostFCMode:", 109, 110),
1393 FIELD1("HostFCOwner:", 108),
1394 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1395 FIELD("CIDX:", 89, 104),
1396 FIELD("PIDX:", 73, 88),
1397 { "BaseAddress:", 18, 72, 9, 1 },
1398 FIELD("QueueSize:", 2, 17),
1399 FIELD1("QueueType:", 1),
1400 FIELD1("CachePriority:", 0),
1403 static struct field_desc egress_t6[] = {
1404 FIELD("DCA_ST:", 181, 191),
1405 FIELD1("StatusPgNS:", 180),
1406 FIELD1("StatusPgRO:", 179),
1407 FIELD1("FetchNS:", 178),
1408 FIELD1("FetchRO:", 177),
1409 FIELD1("Valid:", 176),
1410 FIELD1("ReschedulePending_1:", 175),
1411 FIELD1("PCIeDataChannel:", 174),
1412 FIELD1("StatusPgTPHintEn:", 173),
1413 FIELD("StatusPgTPHint:", 171, 172),
1414 FIELD1("FetchTPHintEn:", 170),
1415 FIELD("FetchTPHint:", 168, 169),
1416 FIELD1("FCThreshOverride:", 167),
1417 { "WRLength:", 162, 166, 9, 0, 1 },
1418 FIELD1("WRLengthKnown:", 161),
1419 FIELD1("ReschedulePending:", 160),
1420 FIELD("TimerIx:", 157, 159),
1421 FIELD1("FetchBurstMin:", 156),
1422 FIELD1("FLMPacking:", 155),
1423 FIELD("FetchBurstMax:", 153, 154),
1424 FIELD("uPToken:", 133, 152),
1425 FIELD1("uPTokenEn:", 132),
1426 FIELD1("UserModeIO:", 131),
1427 FIELD("uPFLCredits:", 123, 130),
1428 FIELD1("uPFLCreditEn:", 122),
1429 FIELD("FID:", 111, 121),
1430 FIELD("HostFCMode:", 109, 110),
1431 FIELD1("HostFCOwner:", 108),
1432 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1433 FIELD("CIDX:", 89, 104),
1434 FIELD("PIDX:", 73, 88),
1435 { "BaseAddress:", 18, 72, 9, 1 },
1436 FIELD("QueueSize:", 2, 17),
1437 FIELD1("QueueType:", 1),
1438 FIELD1("FetchSizeMode:", 0),
1441 static struct field_desc fl_t5[] = {
1442 FIELD("DCA_ST:", 181, 191),
1443 FIELD1("StatusPgNS:", 180),
1444 FIELD1("StatusPgRO:", 179),
1445 FIELD1("FetchNS:", 178),
1446 FIELD1("FetchRO:", 177),
1447 FIELD1("Valid:", 176),
1448 FIELD("PCIeDataChannel:", 174, 175),
1449 FIELD1("StatusPgTPHintEn:", 173),
1450 FIELD("StatusPgTPHint:", 171, 172),
1451 FIELD1("FetchTPHintEn:", 170),
1452 FIELD("FetchTPHint:", 168, 169),
1453 FIELD1("FCThreshOverride:", 167),
1454 FIELD1("ReschedulePending:", 160),
1455 FIELD1("OnChipQueue:", 159),
1456 FIELD1("FetchSizeMode:", 158),
1457 { "FetchBurstMin:", 156, 157, 4, 0, 1 },
1458 FIELD1("FLMPacking:", 155),
1459 FIELD("FetchBurstMax:", 153, 154),
1460 FIELD1("FLMcongMode:", 152),
1461 FIELD("MaxuPFLCredits:", 144, 151),
1462 FIELD("FLMcontextID:", 133, 143),
1463 FIELD1("uPTokenEn:", 132),
1464 FIELD1("UserModeIO:", 131),
1465 FIELD("uPFLCredits:", 123, 130),
1466 FIELD1("uPFLCreditEn:", 122),
1467 FIELD("FID:", 111, 121),
1468 FIELD("HostFCMode:", 109, 110),
1469 FIELD1("HostFCOwner:", 108),
1470 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1471 FIELD("CIDX:", 89, 104),
1472 FIELD("PIDX:", 73, 88),
1473 { "BaseAddress:", 18, 72, 9, 1 },
1474 FIELD("QueueSize:", 2, 17),
1475 FIELD1("QueueType:", 1),
1476 FIELD1("CachePriority:", 0),
1479 static struct field_desc ingress_t5[] = {
1480 FIELD("DCA_ST:", 143, 153),
1481 FIELD1("ISCSICoalescing:", 142),
1482 FIELD1("Queue_Valid:", 141),
1483 FIELD1("TimerPending:", 140),
1484 FIELD1("DropRSS:", 139),
1485 FIELD("PCIeChannel:", 137, 138),
1486 FIELD1("SEInterruptArmed:", 136),
1487 FIELD1("CongestionMgtEnable:", 135),
1488 FIELD1("NoSnoop:", 134),
1489 FIELD1("RelaxedOrdering:", 133),
1490 FIELD1("GTSmode:", 132),
1491 FIELD1("TPHintEn:", 131),
1492 FIELD("TPHint:", 129, 130),
1493 FIELD1("UpdateScheduling:", 128),
1494 FIELD("UpdateDelivery:", 126, 127),
1495 FIELD1("InterruptSent:", 125),
1496 FIELD("InterruptIDX:", 114, 124),
1497 FIELD1("InterruptDestination:", 113),
1498 FIELD1("InterruptArmed:", 112),
1499 FIELD("RxIntCounter:", 106, 111),
1500 FIELD("RxIntCounterThreshold:", 104, 105),
1501 FIELD1("Generation:", 103),
1502 { "BaseAddress:", 48, 102, 9, 1 },
1503 FIELD("PIDX:", 32, 47),
1504 FIELD("CIDX:", 16, 31),
1505 { "QueueSize:", 4, 15, 4, 0 },
1506 { "QueueEntrySize:", 2, 3, 4, 0, 1 },
1507 FIELD1("QueueEntryOverride:", 1),
1508 FIELD1("CachePriority:", 0),
1511 static struct field_desc ingress_t6[] = {
1512 FIELD1("SP_NS:", 158),
1513 FIELD1("SP_RO:", 157),
1514 FIELD1("SP_TPHintEn:", 156),
1515 FIELD("SP_TPHint:", 154, 155),
1516 FIELD("DCA_ST:", 143, 153),
1517 FIELD1("ISCSICoalescing:", 142),
1518 FIELD1("Queue_Valid:", 141),
1519 FIELD1("TimerPending:", 140),
1520 FIELD1("DropRSS:", 139),
1521 FIELD("PCIeChannel:", 137, 138),
1522 FIELD1("SEInterruptArmed:", 136),
1523 FIELD1("CongestionMgtEnable:", 135),
1524 FIELD1("NoSnoop:", 134),
1525 FIELD1("RelaxedOrdering:", 133),
1526 FIELD1("GTSmode:", 132),
1527 FIELD1("TPHintEn:", 131),
1528 FIELD("TPHint:", 129, 130),
1529 FIELD1("UpdateScheduling:", 128),
1530 FIELD("UpdateDelivery:", 126, 127),
1531 FIELD1("InterruptSent:", 125),
1532 FIELD("InterruptIDX:", 114, 124),
1533 FIELD1("InterruptDestination:", 113),
1534 FIELD1("InterruptArmed:", 112),
1535 FIELD("RxIntCounter:", 106, 111),
1536 FIELD("RxIntCounterThreshold:", 104, 105),
1537 FIELD1("Generation:", 103),
1538 { "BaseAddress:", 48, 102, 9, 1 },
1539 FIELD("PIDX:", 32, 47),
1540 FIELD("CIDX:", 16, 31),
1541 { "QueueSize:", 4, 15, 4, 0 },
1542 { "QueueEntrySize:", 2, 3, 4, 0, 1 },
1543 FIELD1("QueueEntryOverride:", 1),
1544 FIELD1("CachePriority:", 0),
1547 static struct field_desc flm_t5[] = {
1548 FIELD1("Valid:", 89),
1549 FIELD("SplitLenMode:", 87, 88),
1550 FIELD1("TPHintEn:", 86),
1551 FIELD("TPHint:", 84, 85),
1552 FIELD1("NoSnoop:", 83),
1553 FIELD1("RelaxedOrdering:", 82),
1554 FIELD("DCA_ST:", 71, 81),
1555 FIELD("EQid:", 54, 70),
1556 FIELD("SplitEn:", 52, 53),
1557 FIELD1("PadEn:", 51),
1558 FIELD1("PackEn:", 50),
1559 FIELD1("Cache_Lock :", 49),
1560 FIELD1("CongDrop:", 48),
1561 FIELD("PackOffset:", 16, 47),
1562 FIELD("CIDX:", 8, 15),
1563 FIELD("PIDX:", 0, 7),
1566 static struct field_desc flm_t6[] = {
1567 FIELD1("Valid:", 89),
1568 FIELD("SplitLenMode:", 87, 88),
1569 FIELD1("TPHintEn:", 86),
1570 FIELD("TPHint:", 84, 85),
1571 FIELD1("NoSnoop:", 83),
1572 FIELD1("RelaxedOrdering:", 82),
1573 FIELD("DCA_ST:", 71, 81),
1574 FIELD("EQid:", 54, 70),
1575 FIELD("SplitEn:", 52, 53),
1576 FIELD1("PadEn:", 51),
1577 FIELD1("PackEn:", 50),
1578 FIELD1("Cache_Lock :", 49),
1579 FIELD1("CongDrop:", 48),
1580 FIELD1("Inflight:", 47),
1581 FIELD1("CongEn:", 46),
1582 FIELD1("CongMode:", 45),
1583 FIELD("PackOffset:", 20, 39),
1584 FIELD("CIDX:", 8, 15),
1585 FIELD("PIDX:", 0, 7),
1588 static struct field_desc conm_t5[] = {
1589 FIELD1("CngMPSEnable:", 21),
1590 FIELD("CngTPMode:", 19, 20),
1591 FIELD1("CngDBPHdr:", 18),
1592 FIELD1("CngDBPData:", 17),
1593 FIELD1("CngIMSG:", 16),
1594 { "CngChMap:", 0, 15, 0, 1, 0 },
1598 if (p->mem_id == SGE_CONTEXT_EGRESS) {
1600 show_struct(p->data, 6, fl_t5);
1602 show_struct(p->data, 6, egress_t5);
1604 show_struct(p->data, 6, egress_t6);
1605 } else if (p->mem_id == SGE_CONTEXT_FLM)
1606 show_struct(p->data, 3, vers == 5 ? flm_t5 : flm_t6);
1607 else if (p->mem_id == SGE_CONTEXT_INGRESS)
1608 show_struct(p->data, 5, vers == 5 ? ingress_t5 : ingress_t6);
1609 else if (p->mem_id == SGE_CONTEXT_CNM)
1610 show_struct(p->data, 1, conm_t5);
1614 show_t4_ctxt(const struct t4_sge_context *p)
1616 static struct field_desc egress_t4[] = {
1617 FIELD1("StatusPgNS:", 180),
1618 FIELD1("StatusPgRO:", 179),
1619 FIELD1("FetchNS:", 178),
1620 FIELD1("FetchRO:", 177),
1621 FIELD1("Valid:", 176),
1622 FIELD("PCIeDataChannel:", 174, 175),
1623 FIELD1("DCAEgrQEn:", 173),
1624 FIELD("DCACPUID:", 168, 172),
1625 FIELD1("FCThreshOverride:", 167),
1626 FIELD("WRLength:", 162, 166),
1627 FIELD1("WRLengthKnown:", 161),
1628 FIELD1("ReschedulePending:", 160),
1629 FIELD1("OnChipQueue:", 159),
1630 FIELD1("FetchSizeMode", 158),
1631 { "FetchBurstMin:", 156, 157, 4, 0, 1 },
1632 { "FetchBurstMax:", 153, 154, 6, 0, 1 },
1633 FIELD("uPToken:", 133, 152),
1634 FIELD1("uPTokenEn:", 132),
1635 FIELD1("UserModeIO:", 131),
1636 FIELD("uPFLCredits:", 123, 130),
1637 FIELD1("uPFLCreditEn:", 122),
1638 FIELD("FID:", 111, 121),
1639 FIELD("HostFCMode:", 109, 110),
1640 FIELD1("HostFCOwner:", 108),
1641 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1642 FIELD("CIDX:", 89, 104),
1643 FIELD("PIDX:", 73, 88),
1644 { "BaseAddress:", 18, 72, 9, 1 },
1645 FIELD("QueueSize:", 2, 17),
1646 FIELD1("QueueType:", 1),
1647 FIELD1("CachePriority:", 0),
1650 static struct field_desc fl_t4[] = {
1651 FIELD1("StatusPgNS:", 180),
1652 FIELD1("StatusPgRO:", 179),
1653 FIELD1("FetchNS:", 178),
1654 FIELD1("FetchRO:", 177),
1655 FIELD1("Valid:", 176),
1656 FIELD("PCIeDataChannel:", 174, 175),
1657 FIELD1("DCAEgrQEn:", 173),
1658 FIELD("DCACPUID:", 168, 172),
1659 FIELD1("FCThreshOverride:", 167),
1660 FIELD1("ReschedulePending:", 160),
1661 FIELD1("OnChipQueue:", 159),
1662 FIELD1("FetchSizeMode", 158),
1663 { "FetchBurstMin:", 156, 157, 4, 0, 1 },
1664 { "FetchBurstMax:", 153, 154, 6, 0, 1 },
1665 FIELD1("FLMcongMode:", 152),
1666 FIELD("MaxuPFLCredits:", 144, 151),
1667 FIELD("FLMcontextID:", 133, 143),
1668 FIELD1("uPTokenEn:", 132),
1669 FIELD1("UserModeIO:", 131),
1670 FIELD("uPFLCredits:", 123, 130),
1671 FIELD1("uPFLCreditEn:", 122),
1672 FIELD("FID:", 111, 121),
1673 FIELD("HostFCMode:", 109, 110),
1674 FIELD1("HostFCOwner:", 108),
1675 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1676 FIELD("CIDX:", 89, 104),
1677 FIELD("PIDX:", 73, 88),
1678 { "BaseAddress:", 18, 72, 9, 1 },
1679 FIELD("QueueSize:", 2, 17),
1680 FIELD1("QueueType:", 1),
1681 FIELD1("CachePriority:", 0),
1684 static struct field_desc ingress_t4[] = {
1685 FIELD1("NoSnoop:", 145),
1686 FIELD1("RelaxedOrdering:", 144),
1687 FIELD1("GTSmode:", 143),
1688 FIELD1("ISCSICoalescing:", 142),
1689 FIELD1("Valid:", 141),
1690 FIELD1("TimerPending:", 140),
1691 FIELD1("DropRSS:", 139),
1692 FIELD("PCIeChannel:", 137, 138),
1693 FIELD1("SEInterruptArmed:", 136),
1694 FIELD1("CongestionMgtEnable:", 135),
1695 FIELD1("DCAIngQEnable:", 134),
1696 FIELD("DCACPUID:", 129, 133),
1697 FIELD1("UpdateScheduling:", 128),
1698 FIELD("UpdateDelivery:", 126, 127),
1699 FIELD1("InterruptSent:", 125),
1700 FIELD("InterruptIDX:", 114, 124),
1701 FIELD1("InterruptDestination:", 113),
1702 FIELD1("InterruptArmed:", 112),
1703 FIELD("RxIntCounter:", 106, 111),
1704 FIELD("RxIntCounterThreshold:", 104, 105),
1705 FIELD1("Generation:", 103),
1706 { "BaseAddress:", 48, 102, 9, 1 },
1707 FIELD("PIDX:", 32, 47),
1708 FIELD("CIDX:", 16, 31),
1709 { "QueueSize:", 4, 15, 4, 0 },
1710 { "QueueEntrySize:", 2, 3, 4, 0, 1 },
1711 FIELD1("QueueEntryOverride:", 1),
1712 FIELD1("CachePriority:", 0),
1715 static struct field_desc flm_t4[] = {
1716 FIELD1("NoSnoop:", 79),
1717 FIELD1("RelaxedOrdering:", 78),
1718 FIELD1("Valid:", 77),
1719 FIELD("DCACPUID:", 72, 76),
1720 FIELD1("DCAFLEn:", 71),
1721 FIELD("EQid:", 54, 70),
1722 FIELD("SplitEn:", 52, 53),
1723 FIELD1("PadEn:", 51),
1724 FIELD1("PackEn:", 50),
1725 FIELD1("DBpriority:", 48),
1726 FIELD("PackOffset:", 16, 47),
1727 FIELD("CIDX:", 8, 15),
1728 FIELD("PIDX:", 0, 7),
1731 static struct field_desc conm_t4[] = {
1732 FIELD1("CngDBPHdr:", 6),
1733 FIELD1("CngDBPData:", 5),
1734 FIELD1("CngIMSG:", 4),
1735 { "CngChMap:", 0, 3, 0, 1, 0},
1739 if (p->mem_id == SGE_CONTEXT_EGRESS)
1740 show_struct(p->data, 6, (p->data[0] & 2) ? fl_t4 : egress_t4);
1741 else if (p->mem_id == SGE_CONTEXT_FLM)
1742 show_struct(p->data, 3, flm_t4);
1743 else if (p->mem_id == SGE_CONTEXT_INGRESS)
1744 show_struct(p->data, 5, ingress_t4);
1745 else if (p->mem_id == SGE_CONTEXT_CNM)
1746 show_struct(p->data, 1, conm_t4);
1753 get_sge_context(int argc, const char *argv[])
1758 struct t4_sge_context cntxt = {0};
1761 warnx("sge_context: incorrect number of arguments.");
1765 if (!strcmp(argv[0], "egress"))
1766 cntxt.mem_id = SGE_CONTEXT_EGRESS;
1767 else if (!strcmp(argv[0], "ingress"))
1768 cntxt.mem_id = SGE_CONTEXT_INGRESS;
1769 else if (!strcmp(argv[0], "fl"))
1770 cntxt.mem_id = SGE_CONTEXT_FLM;
1771 else if (!strcmp(argv[0], "cong"))
1772 cntxt.mem_id = SGE_CONTEXT_CNM;
1774 warnx("unknown context type \"%s\"; known types are egress, "
1775 "ingress, fl, and cong.", argv[0]);
1779 p = str_to_number(argv[1], &cid, NULL);
1781 warnx("invalid context id \"%s\"", argv[1]);
1786 rc = doit(CHELSIO_T4_GET_SGE_CONTEXT, &cntxt);
1791 show_t4_ctxt(&cntxt);
1793 show_t5t6_ctxt(&cntxt, chip_id);
1799 loadfw(int argc, const char *argv[])
1802 struct t4_data data = {0};
1803 const char *fname = argv[0];
1804 struct stat st = {0};
1807 warnx("loadfw: incorrect number of arguments.");
1811 fd = open(fname, O_RDONLY);
1813 warn("open(%s)", fname);
1817 if (fstat(fd, &st) < 0) {
1823 data.len = st.st_size;
1824 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0);
1825 if (data.data == MAP_FAILED) {
1831 rc = doit(CHELSIO_T4_LOAD_FW, &data);
1832 munmap(data.data, data.len);
1838 read_mem(uint32_t addr, uint32_t len, void (*output)(uint32_t *, uint32_t))
1841 struct t4_mem_range mr;
1845 mr.data = malloc(mr.len);
1848 warn("read_mem: malloc");
1852 rc = doit(CHELSIO_T4_GET_MEM, &mr);
1857 (*output)(mr.data, mr.len);
1864 * Display memory as list of 'n' 4-byte values per line.
1867 show_mem(uint32_t *buf, uint32_t len)
1873 for (i = 0; len && i < n; i++, buf++, len -= 4) {
1875 printf("%s%08x", s, htonl(*buf));
1882 memdump(int argc, const char *argv[])
1889 warnx("incorrect number of arguments.");
1893 p = str_to_number(argv[0], &l, NULL);
1895 warnx("invalid address \"%s\"", argv[0]);
1900 p = str_to_number(argv[1], &l, NULL);
1902 warnx("memdump: invalid length \"%s\"", argv[1]);
1907 return (read_mem(addr, len, show_mem));
1911 * Display TCB as list of 'n' 4-byte values per line.
1914 show_tcb(uint32_t *buf, uint32_t len)
1920 for (i = 0; len && i < n; i++, buf++, len -= 4) {
1922 printf("%s%08x", s, htonl(*buf));
1928 #define A_TP_CMM_TCB_BASE 0x7d10
1929 #define TCB_SIZE 128
1931 read_tcb(int argc, const char *argv[])
1941 warnx("incorrect number of arguments.");
1945 p = str_to_number(argv[0], &l, NULL);
1947 warnx("invalid tid \"%s\"", argv[0]);
1952 rc = read_reg(A_TP_CMM_TCB_BASE, 4, &val);
1956 addr = val + tid * TCB_SIZE;
1958 return (read_mem(addr, TCB_SIZE, show_tcb));
1962 read_i2c(int argc, const char *argv[])
1966 struct t4_i2c_data i2cd;
1969 if (argc < 3 || argc > 4) {
1970 warnx("incorrect number of arguments.");
1974 p = str_to_number(argv[0], &l, NULL);
1975 if (*p || l > UCHAR_MAX) {
1976 warnx("invalid port id \"%s\"", argv[0]);
1981 p = str_to_number(argv[1], &l, NULL);
1982 if (*p || l > UCHAR_MAX) {
1983 warnx("invalid i2c device address \"%s\"", argv[1]);
1988 p = str_to_number(argv[2], &l, NULL);
1989 if (*p || l > UCHAR_MAX) {
1990 warnx("invalid byte offset \"%s\"", argv[2]);
1996 p = str_to_number(argv[3], &l, NULL);
1997 if (*p || l > sizeof(i2cd.data)) {
1998 warnx("invalid number of bytes \"%s\"", argv[3]);
2005 rc = doit(CHELSIO_T4_GET_I2C, &i2cd);
2009 for (i = 0; i < i2cd.len; i++)
2010 printf("0x%x [%u]\n", i2cd.data[i], i2cd.data[i]);
2016 clearstats(int argc, const char *argv[])
2023 warnx("incorrect number of arguments.");
2027 p = str_to_number(argv[0], &l, NULL);
2029 warnx("invalid port id \"%s\"", argv[0]);
2034 return doit(CHELSIO_T4_CLEAR_STATS, &port);
2042 int rc, port_idx, i;
2045 /* Magic values: MPS_TRC_CFG = 0x9800. MPS_TRC_CFG[1:1] = TrcEn */
2046 rc = read_reg(0x9800, 4, &val);
2049 printf("tracing is %s\n", val & 2 ? "ENABLED" : "DISABLED");
2052 for (t.idx = 0; ; t.idx++) {
2053 rc = doit(CHELSIO_T4_GET_TRACER, &t);
2054 if (rc != 0 || t.idx == 0xff)
2057 if (t.tp.port < 4) {
2059 port_idx = t.tp.port;
2060 } else if (t.tp.port < 8) {
2062 port_idx = t.tp.port - 4;
2063 } else if (t.tp.port < 12) {
2065 port_idx = t.tp.port - 8;
2066 } else if (t.tp.port < 16) {
2068 port_idx = t.tp.port - 12;
2069 } else if (t.tp.port < 20) {
2071 port_idx = t.tp.port - 16;
2074 port_idx = t.tp.port;
2077 printf("\ntracer %u (currently %s) captures ", t.idx,
2078 t.enabled ? "ENABLED" : "DISABLED");
2080 printf("port %u %s, ", port_idx, s);
2082 printf("%s %u, ", s, port_idx);
2083 printf("snap length: %u, min length: %u\n", t.tp.snap_len,
2085 printf("packets captured %smatch filter\n",
2086 t.tp.invert ? "do not " : "");
2087 if (t.tp.skip_ofst) {
2088 printf("filter pattern: ");
2089 for (i = 0; i < t.tp.skip_ofst * 2; i += 2)
2090 printf("%08x%08x", t.tp.data[i],
2093 for (i = 0; i < t.tp.skip_ofst * 2; i += 2)
2094 printf("%08x%08x", t.tp.mask[i],
2098 printf("filter pattern: ");
2099 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2)
2100 printf("%08x%08x", t.tp.data[i], t.tp.data[i + 1]);
2102 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2)
2103 printf("%08x%08x", t.tp.mask[i], t.tp.mask[i + 1]);
2104 printf("@%u\n", (t.tp.skip_ofst + t.tp.skip_len) * 8);
2111 tracer_onoff(uint8_t idx, int enabled)
2116 t.enabled = enabled;
2119 return doit(CHELSIO_T4_SET_TRACER, &t);
2123 create_tracing_ifnet()
2126 "/sbin/ifconfig", __DECONST(char *, nexus), "create", NULL
2128 char *env[] = {NULL};
2131 close(STDERR_FILENO);
2132 execve(cmd[0], cmd, env);
2138 * XXX: Allow user to specify snaplen, minlen, and pattern (including inverted
2139 * matching). Right now this is a quick-n-dirty implementation that traces the
2140 * first 128B of all tx or rx on a port
2143 set_tracer(uint8_t idx, int argc, const char *argv[])
2148 bzero(&t, sizeof (t));
2154 warnx("must specify tx<n> or rx<n>.");
2158 len = strlen(argv[0]);
2160 warnx("argument must be 3 characters (tx<n> or rx<n>)");
2164 if (strncmp(argv[0], "tx", 2) == 0) {
2165 port = argv[0][2] - '0';
2166 if (port < 0 || port > 3) {
2167 warnx("'%c' in %s is invalid", argv[0][2], argv[0]);
2171 } else if (strncmp(argv[0], "rx", 2) == 0) {
2172 port = argv[0][2] - '0';
2173 if (port < 0 || port > 3) {
2174 warnx("'%c' in %s is invalid", argv[0][2], argv[0]);
2178 warnx("argument '%s' isn't tx<n> or rx<n>", argv[0]);
2182 t.tp.snap_len = 128;
2189 create_tracing_ifnet();
2190 return doit(CHELSIO_T4_SET_TRACER, &t);
2194 tracer_cmd(int argc, const char *argv[])
2201 warnx("tracer: no arguments.");
2206 if (strcmp(argv[0], "list") == 0) {
2208 warnx("trailing arguments after \"list\" ignored.");
2210 return show_tracers();
2214 s = str_to_number(argv[0], NULL, &val);
2215 if (*s || val > 0xff) {
2216 warnx("\"%s\" is neither an index nor a tracer subcommand.",
2223 if (argc == 2 && strcmp(argv[1], "disable") == 0)
2224 return tracer_onoff(idx, 0);
2227 if (argc == 2 && strcmp(argv[1], "enable") == 0)
2228 return tracer_onoff(idx, 1);
2231 return set_tracer(idx, argc - 1, argv + 1);
2235 modinfo_raw(int port_id)
2238 struct t4_i2c_data i2cd;
2241 for (offset = 0; offset < 96; offset += sizeof(i2cd.data)) {
2242 bzero(&i2cd, sizeof(i2cd));
2243 i2cd.port_id = port_id;
2244 i2cd.dev_addr = 0xa0;
2245 i2cd.offset = offset;
2246 i2cd.len = sizeof(i2cd.data);
2247 rc = doit(CHELSIO_T4_GET_I2C, &i2cd);
2250 printf("%02x: %02x %02x %02x %02x %02x %02x %02x %02x",
2251 offset, i2cd.data[0], i2cd.data[1], i2cd.data[2],
2252 i2cd.data[3], i2cd.data[4], i2cd.data[5], i2cd.data[6],
2255 printf(" %c%c%c%c %c%c%c%c\n",
2256 isprint(i2cd.data[0]) ? i2cd.data[0] : '.',
2257 isprint(i2cd.data[1]) ? i2cd.data[1] : '.',
2258 isprint(i2cd.data[2]) ? i2cd.data[2] : '.',
2259 isprint(i2cd.data[3]) ? i2cd.data[3] : '.',
2260 isprint(i2cd.data[4]) ? i2cd.data[4] : '.',
2261 isprint(i2cd.data[5]) ? i2cd.data[5] : '.',
2262 isprint(i2cd.data[6]) ? i2cd.data[6] : '.',
2263 isprint(i2cd.data[7]) ? i2cd.data[7] : '.');
2270 modinfo(int argc, const char *argv[])
2273 char string[16], *p;
2274 struct t4_i2c_data i2cd;
2276 uint16_t temp, vcc, tx_bias, tx_power, rx_power;
2279 warnx("must supply a port");
2284 warnx("too many arguments");
2288 p = str_to_number(argv[0], &port, NULL);
2289 if (*p || port > UCHAR_MAX) {
2290 warnx("invalid port id \"%s\"", argv[0]);
2295 if (!strcmp(argv[1], "raw"))
2296 return (modinfo_raw(port));
2298 warnx("second argument can only be \"raw\"");
2303 bzero(&i2cd, sizeof(i2cd));
2305 i2cd.port_id = port;
2306 i2cd.dev_addr = SFF_8472_BASE;
2308 i2cd.offset = SFF_8472_ID;
2309 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2312 if (i2cd.data[0] > SFF_8472_ID_LAST)
2313 printf("Unknown ID\n");
2315 printf("ID: %s\n", sff_8472_id[i2cd.data[0]]);
2317 bzero(&string, sizeof(string));
2318 for (i = SFF_8472_VENDOR_START; i < SFF_8472_VENDOR_END; i++) {
2320 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2322 string[i - SFF_8472_VENDOR_START] = i2cd.data[0];
2324 printf("Vendor %s\n", string);
2326 bzero(&string, sizeof(string));
2327 for (i = SFF_8472_SN_START; i < SFF_8472_SN_END; i++) {
2329 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2331 string[i - SFF_8472_SN_START] = i2cd.data[0];
2333 printf("SN %s\n", string);
2335 bzero(&string, sizeof(string));
2336 for (i = SFF_8472_PN_START; i < SFF_8472_PN_END; i++) {
2338 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2340 string[i - SFF_8472_PN_START] = i2cd.data[0];
2342 printf("PN %s\n", string);
2344 bzero(&string, sizeof(string));
2345 for (i = SFF_8472_REV_START; i < SFF_8472_REV_END; i++) {
2347 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2349 string[i - SFF_8472_REV_START] = i2cd.data[0];
2351 printf("Rev %s\n", string);
2353 i2cd.offset = SFF_8472_DIAG_TYPE;
2354 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2357 if ((char )i2cd.data[0] & (SFF_8472_DIAG_IMPL |
2358 SFF_8472_DIAG_INTERNAL)) {
2360 /* Switch to reading from the Diagnostic address. */
2361 i2cd.dev_addr = SFF_8472_DIAG;
2364 i2cd.offset = SFF_8472_TEMP;
2365 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2367 temp = i2cd.data[0] << 8;
2369 if ((temp & SFF_8472_TEMP_SIGN) == SFF_8472_TEMP_SIGN)
2373 printf("%dC\n", (temp & SFF_8472_TEMP_MSK) >>
2374 SFF_8472_TEMP_SHIFT);
2376 i2cd.offset = SFF_8472_VCC;
2377 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2379 vcc = i2cd.data[0] << 8;
2380 printf("Vcc %fV\n", vcc / SFF_8472_VCC_FACTOR);
2382 i2cd.offset = SFF_8472_TX_BIAS;
2383 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2385 tx_bias = i2cd.data[0] << 8;
2386 printf("TX Bias %fuA\n", tx_bias / SFF_8472_BIAS_FACTOR);
2388 i2cd.offset = SFF_8472_TX_POWER;
2389 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2391 tx_power = i2cd.data[0] << 8;
2392 printf("TX Power %fmW\n", tx_power / SFF_8472_POWER_FACTOR);
2394 i2cd.offset = SFF_8472_RX_POWER;
2395 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2397 rx_power = i2cd.data[0] << 8;
2398 printf("RX Power %fmW\n", rx_power / SFF_8472_POWER_FACTOR);
2401 printf("Diagnostics not supported.\n");
2407 warnx("No module/cable in port %ld", port);
2412 /* XXX: pass in a low/high and do range checks as well */
2414 get_sched_param(const char *param, const char *args[], long *val)
2418 if (strcmp(param, args[0]) != 0)
2421 p = str_to_number(args[1], val, NULL);
2423 warnx("parameter \"%s\" has bad value \"%s\"", args[0],
2432 sched_class(int argc, const char *argv[])
2434 struct t4_sched_params op;
2437 memset(&op, 0xff, sizeof(op));
2441 warnx("missing scheduling sub-command");
2444 if (!strcmp(argv[0], "config")) {
2445 op.subcmd = SCHED_CLASS_SUBCMD_CONFIG;
2446 op.u.config.minmax = -1;
2447 } else if (!strcmp(argv[0], "params")) {
2448 op.subcmd = SCHED_CLASS_SUBCMD_PARAMS;
2449 op.u.params.level = op.u.params.mode = op.u.params.rateunit =
2450 op.u.params.ratemode = op.u.params.channel =
2451 op.u.params.cl = op.u.params.minrate = op.u.params.maxrate =
2452 op.u.params.weight = op.u.params.pktsize = -1;
2454 warnx("invalid scheduling sub-command \"%s\"", argv[0]);
2458 /* Decode remaining arguments ... */
2460 for (i = 1; i < argc; i += 2) {
2461 const char **args = &argv[i];
2464 if (i + 1 == argc) {
2465 warnx("missing argument for \"%s\"", args[0]);
2470 if (!strcmp(args[0], "type")) {
2471 if (!strcmp(args[1], "packet"))
2472 op.type = SCHED_CLASS_TYPE_PACKET;
2474 warnx("invalid type parameter \"%s\"", args[1]);
2481 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) {
2482 if(!get_sched_param("minmax", args, &l))
2483 op.u.config.minmax = (int8_t)l;
2485 warnx("unknown scheduler config parameter "
2493 /* Rest applies only to SUBCMD_PARAMS */
2494 if (op.subcmd != SCHED_CLASS_SUBCMD_PARAMS)
2497 if (!strcmp(args[0], "level")) {
2498 if (!strcmp(args[1], "cl-rl"))
2499 op.u.params.level = SCHED_CLASS_LEVEL_CL_RL;
2500 else if (!strcmp(args[1], "cl-wrr"))
2501 op.u.params.level = SCHED_CLASS_LEVEL_CL_WRR;
2502 else if (!strcmp(args[1], "ch-rl"))
2503 op.u.params.level = SCHED_CLASS_LEVEL_CH_RL;
2505 warnx("invalid level parameter \"%s\"",
2509 } else if (!strcmp(args[0], "mode")) {
2510 if (!strcmp(args[1], "class"))
2511 op.u.params.mode = SCHED_CLASS_MODE_CLASS;
2512 else if (!strcmp(args[1], "flow"))
2513 op.u.params.mode = SCHED_CLASS_MODE_FLOW;
2515 warnx("invalid mode parameter \"%s\"", args[1]);
2518 } else if (!strcmp(args[0], "rate-unit")) {
2519 if (!strcmp(args[1], "bits"))
2520 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_BITS;
2521 else if (!strcmp(args[1], "pkts"))
2522 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_PKTS;
2524 warnx("invalid rate-unit parameter \"%s\"",
2528 } else if (!strcmp(args[0], "rate-mode")) {
2529 if (!strcmp(args[1], "relative"))
2530 op.u.params.ratemode = SCHED_CLASS_RATEMODE_REL;
2531 else if (!strcmp(args[1], "absolute"))
2532 op.u.params.ratemode = SCHED_CLASS_RATEMODE_ABS;
2534 warnx("invalid rate-mode parameter \"%s\"",
2538 } else if (!get_sched_param("channel", args, &l))
2539 op.u.params.channel = (int8_t)l;
2540 else if (!get_sched_param("class", args, &l))
2541 op.u.params.cl = (int8_t)l;
2542 else if (!get_sched_param("min-rate", args, &l))
2543 op.u.params.minrate = (int32_t)l;
2544 else if (!get_sched_param("max-rate", args, &l))
2545 op.u.params.maxrate = (int32_t)l;
2546 else if (!get_sched_param("weight", args, &l))
2547 op.u.params.weight = (int16_t)l;
2548 else if (!get_sched_param("pkt-size", args, &l))
2549 op.u.params.pktsize = (int16_t)l;
2551 warnx("unknown scheduler parameter \"%s\"", args[0]);
2557 * Catch some logical fallacies in terms of argument combinations here
2558 * so we can offer more than just the EINVAL return from the driver.
2559 * The driver will be able to catch a lot more issues since it knows
2560 * the specifics of the device hardware capabilities like how many
2561 * channels, classes, etc. the device supports.
2564 warnx("sched \"type\" parameter missing");
2567 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) {
2568 if (op.u.config.minmax < 0) {
2569 warnx("sched config \"minmax\" parameter missing");
2573 if (op.subcmd == SCHED_CLASS_SUBCMD_PARAMS) {
2574 if (op.u.params.level < 0) {
2575 warnx("sched params \"level\" parameter missing");
2578 if (op.u.params.mode < 0) {
2579 warnx("sched params \"mode\" parameter missing");
2582 if (op.u.params.rateunit < 0) {
2583 warnx("sched params \"rate-unit\" parameter missing");
2586 if (op.u.params.ratemode < 0) {
2587 warnx("sched params \"rate-mode\" parameter missing");
2590 if (op.u.params.channel < 0) {
2591 warnx("sched params \"channel\" missing");
2594 if (op.u.params.cl < 0) {
2595 warnx("sched params \"class\" missing");
2598 if (op.u.params.maxrate < 0 &&
2599 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL ||
2600 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) {
2601 warnx("sched params \"max-rate\" missing for "
2602 "rate-limit level");
2605 if (op.u.params.weight < 0 &&
2606 op.u.params.level == SCHED_CLASS_LEVEL_CL_WRR) {
2607 warnx("sched params \"weight\" missing for "
2608 "weighted-round-robin level");
2611 if (op.u.params.pktsize < 0 &&
2612 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL ||
2613 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) {
2614 warnx("sched params \"pkt-size\" missing for "
2615 "rate-limit level");
2618 if (op.u.params.mode == SCHED_CLASS_MODE_FLOW &&
2619 op.u.params.ratemode != SCHED_CLASS_RATEMODE_ABS) {
2620 warnx("sched params mode flow needs rate-mode absolute");
2623 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_REL &&
2624 !in_range(op.u.params.maxrate, 1, 100)) {
2625 warnx("sched params \"max-rate\" takes "
2626 "percentage value(1-100) for rate-mode relative");
2629 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_ABS &&
2630 !in_range(op.u.params.maxrate, 1, 100000000)) {
2631 warnx("sched params \"max-rate\" takes "
2632 "value(1-100000000) for rate-mode absolute");
2635 if (op.u.params.maxrate > 0 &&
2636 op.u.params.maxrate < op.u.params.minrate) {
2637 warnx("sched params \"max-rate\" is less than "
2644 warnx("%d error%s in sched-class command", errs,
2645 errs == 1 ? "" : "s");
2649 return doit(CHELSIO_T4_SCHED_CLASS, &op);
2653 sched_queue(int argc, const char *argv[])
2655 struct t4_sched_queue op = {0};
2660 /* need "<port> <queue> <class> */
2661 warnx("incorrect number of arguments.");
2665 p = str_to_number(argv[0], &val, NULL);
2666 if (*p || val > UCHAR_MAX) {
2667 warnx("invalid port id \"%s\"", argv[0]);
2670 op.port = (uint8_t)val;
2672 if (!strcmp(argv[1], "all") || !strcmp(argv[1], "*"))
2675 p = str_to_number(argv[1], &val, NULL);
2676 if (*p || val < -1) {
2677 warnx("invalid queue \"%s\"", argv[1]);
2680 op.queue = (int8_t)val;
2683 if (!strcmp(argv[2], "unbind") || !strcmp(argv[2], "clear"))
2686 p = str_to_number(argv[2], &val, NULL);
2687 if (*p || val < -1) {
2688 warnx("invalid class \"%s\"", argv[2]);
2691 op.cl = (int8_t)val;
2694 return doit(CHELSIO_T4_SCHED_QUEUE, &op);
2698 run_cmd(int argc, const char *argv[])
2701 const char *cmd = argv[0];
2707 if (!strcmp(cmd, "reg") || !strcmp(cmd, "reg32"))
2708 rc = register_io(argc, argv, 4);
2709 else if (!strcmp(cmd, "reg64"))
2710 rc = register_io(argc, argv, 8);
2711 else if (!strcmp(cmd, "regdump"))
2712 rc = dump_regs(argc, argv);
2713 else if (!strcmp(cmd, "filter"))
2714 rc = filter_cmd(argc, argv);
2715 else if (!strcmp(cmd, "context"))
2716 rc = get_sge_context(argc, argv);
2717 else if (!strcmp(cmd, "loadfw"))
2718 rc = loadfw(argc, argv);
2719 else if (!strcmp(cmd, "memdump"))
2720 rc = memdump(argc, argv);
2721 else if (!strcmp(cmd, "tcb"))
2722 rc = read_tcb(argc, argv);
2723 else if (!strcmp(cmd, "i2c"))
2724 rc = read_i2c(argc, argv);
2725 else if (!strcmp(cmd, "clearstats"))
2726 rc = clearstats(argc, argv);
2727 else if (!strcmp(cmd, "tracer"))
2728 rc = tracer_cmd(argc, argv);
2729 else if (!strcmp(cmd, "modinfo"))
2730 rc = modinfo(argc, argv);
2731 else if (!strcmp(cmd, "sched-class"))
2732 rc = sched_class(argc, argv);
2733 else if (!strcmp(cmd, "sched-queue"))
2734 rc = sched_queue(argc, argv);
2737 warnx("invalid command \"%s\"", cmd);
2748 char buffer[128], *buf;
2749 const char *args[MAX_ARGS + 1];
2752 * Simple loop: displays a "> " prompt and processes any input as a
2753 * cxgbetool command. You're supposed to enter only the part after
2754 * "cxgbetool t4nexX". Use "quit" or "exit" to exit.
2757 fprintf(stdout, "> ");
2759 buf = fgets(buffer, sizeof(buffer), stdin);
2761 if (ferror(stdin)) {
2762 warn("stdin error");
2763 rc = errno; /* errno from fgets */
2769 while ((args[i] = strsep(&buf, " \t\n")) != NULL) {
2770 if (args[i][0] != 0 && ++i == MAX_ARGS)
2776 continue; /* skip empty line */
2778 if (!strcmp(args[0], "quit") || !strcmp(args[0], "exit"))
2781 rc = run_cmd(i, args);
2784 /* rc normally comes from the last command (not including quit/exit) */
2789 main(int argc, const char *argv[])
2796 if (!strcmp(argv[1], "-h") || !strcmp(argv[1], "--help")) {
2809 /* progname and nexus */
2813 if (argc == 1 && !strcmp(argv[0], "stdio"))
2814 rc = run_cmd_loop();
2816 rc = run_cmd(argc, argv);