ian [Sat, 17 May 2014 22:50:16 +0000 (22:50 +0000)]
MFC 264990, 264994, 265020, 265025:
Call cpu_icache_sync_range() rather than sync_all since we know the range
and flushing the entire icache is needlessly expensive.
Provide a proper armv7 implementation of icache_sync_all rather than
using armv7_idcache_wbinv_all, because wbinv_all doesn't broadcast the
operation to other cores. In elf_cpu_load_file() use icache_sync_all()
and explain why it's needed (and why other sync operations aren't).
Remove cpu_idcache_wbinv_all() from kdb_cpu_trap(), it's no longer needed.
Explain why wbinv_all is SMP-safe when dumping, and add a missing l2 cache
flush. (Either it was missing here, or it isn't needed in the minidump
case. Adding it here seems like the safer path to consistancy.)
ian [Sat, 17 May 2014 22:29:24 +0000 (22:29 +0000)]
MFC 264977:
Stop calling imx51_ccm_foo() clock functions from imx6 code. Instead
define a few imx_ccm_foo() functions that are implemented by the imx51
or imx6 ccm code.
ian [Sat, 17 May 2014 21:07:54 +0000 (21:07 +0000)]
MFC 264128, 264129, 264130, 264135,
Fix TTB set operation for armv7. Perform sychronization (by "isb" barrier)
after TTB is set.
Fix TLB maintenance issues for armv6 and armv7.
- Add cpu_cpwait to comply with the convention.
- Add missing TLB invalidations, especially in pmap_kenter & pmap_kremove
with distinguishing between D and ID pages.
- Modify pmap init/bootstrap invalidations to ID, just to be safe.
- Fix TLB-inv and PTE_SYNC ordering.
Allocate per-cpu resources for doing pmap_zero_page() and pmap_copy_page().
This is performance enhancement rather than bugfix.
We don't support any ARM systems with an ISA bus and don't need a freelist
of memory to support ISA addressing limitations.
Actually save the mpcore clock frequency retrieved from fdt data.
imx6..
- Don't call sdhci_init_slot() until after handling the FDT properties
related to detecting card presence.
- Flag several sysctl variables as tunables.
- Rework the cpu frequency management code for imx6 to add "operating
points" and min/max frequency controls.
generic timer...
- Setup both secure and non-secure timer IRQs.
We don't know our ARM security state, so one of them will operate.
- Don't set frequency, since it's unpossible in non-secure state.
Only rely on DTS clock-frequency value or get clock from timer.
Add support for event timers whose clock frequency can change while running.
Apparently all ARM configs build kern_et.c, but only a few of them also
build kern_clocksource.c, un-break the build by not referencing functions in
kern_clocksource if NO_EVENTTIMERS is defined.
Add variable-frequency support to the arm mpcore eventtimer driver.
mpcore_timer: Disable the timer and clear any pending bit, then setup the
new counter register values, then restart the timer. Also re-nest the parens
properly for casting the result of converting time and frequency to a count.
Add more flags for the fpexc register from the ARM1176JZF-S Manual
Initialise fpscr to a sane value when we create the pcb. This sets NaNs to
be the default NaN and for denormalised numbers to be flushed to zero.
VFP fixes/cleanups for ARM11:
* Save the required VFP registers on context switch. If the exception bit
is set we need to save and restore the FPINST register, and if the fp2v
bit is also set we need to save and restore FPINST2.
* Move saving and restoring the floating point control registers to C.
* Clear the fpexc exception and fp2v flags on a floating-point exception.
* Signal a SIGFPE if the fpexc exception flag is set on an undefined
instruction. This is how the ARM core signals to software there is a
floating-point exception.
Add Cortex-A15 cpu id revisions.
Exynos/Arndale...
- Merge SoC-common parts
- Enable iicbus device
- Directly call kmem_alloc_contig to allocate framebuffer memory
and pass VM_MEMATTR_UNCACHEABLE (no-cache, no-buffer).
This fixes screen refreshing problem when data is updated too slowly.
- Add support for keyboard used in Samsung Chromebook (ARM machine)
Support covers device drivers for:
- Interrupt Combiner
- gpio/pad, External Interrupts Controller (pad)
- I2C Interface
- Chrome Embedded Controller
- Chrome Keyboard
- Use new gpio dev class in EHCI driver
- Expand device tree information
- Release i2c bus on detach.
loos [Sat, 17 May 2014 19:16:45 +0000 (19:16 +0000)]
MFC r265013
Revert r258678. Make the led gpio-specifier match again the #gpio-cells
settings from the GPIO controller, which i had broken in r258678. Restore
the active-low flag.
jhb [Sat, 17 May 2014 19:11:08 +0000 (19:11 +0000)]
MFC 259641,259863,259924,259937,259961,259978,260380,260383,260410,260466,
260531,260532,260550,260619,261170,261453,261621,263280,263290,264516:
Add support for local APIC hardware-assist.
- Restructure vlapic access and register handling to support hardware-assist
for the local APIC.
- Use the 'Virtual Interrupt Delivery' and 'Posted Interrupt Processing'
feature of Intel VT-x if supported by hardware.
- Add an API to rendezvous all active vcpus in a virtual machine and use
it to support level triggered interrupts with VT-x 'Virtual Interrupt
Delivery'.
- Use a cheaper IPI handler than IPI_AST for nested page table shootdowns
and avoid doing unnecessary nested TLB invalidations.
Use the same cache terminology as the ARM docs in comments. No
functional changes.
Use armv7 TLB flush code, not arm11, for cortex-a processors.
Exynos/ Arndale...
- Disable debugging by default.
- Add display-related and clk devices to the tree
- Prevent resources intersection with EHCI driver
- Add display-related and clk devices to the tree
- Prevent resources intersection with EHCI driver
- Add driver for Display Controller.
- Add support for Samsung Chromebook (ARM Cortex A15 machine).
- Rename mct and ehci drivers files to match common naming.
ian [Sat, 17 May 2014 17:34:37 +0000 (17:34 +0000)]
MFC 263301
In kernel config files, it is supposed to be 'options<space><tab>' not
'options<tab><tab>', per long standing (but recently not so strictly
enforced) convention.
Export _libc_arm_fpu_present as a private symbol to be used by other
system libraries, for example libm.
On armv6 access both the softfloat and, when available, the vfp to get and
set the floating-point environment.
Build fenv-vfp.c with the softfp float abi. Without this gcc generates an
incorrect assembly file that doesn't allow for vfp instructions.
Only build the vfp/softfp switching code on armv6 as we don't support vfp
on anything earlier than this. This should fix the armeb and arm builds
when using gcc.
Add an optimised version of the float and double helper functions.
Remove all the redundant external declarations of exception vectors and
runtime setting of the pointers that's scattered around various places.
Remove all traces of support for ARM chips prior to the arm9 series.
Make the default exception handler vectors point to where I thought they
were already pointing: the default handlers (not a panic that says there
is no default handler).
Eliminate irq_dispatch.S. Move the data items it contained into
arm/intr.c and the functionality it provided into arm/exception.S.
Move the exception vector table (so-called "page0" data) into exception.S
and eliminate vectors.S.
Change the way the asm GET_CURTHREAD_PTR() macro is defined so that code
using it doesn't have to have an "AST_LOCALS" macro somewhere in the file.
Arrange for arm fork_trampoline() to return to userland via the standard
swi_exit code in exception.S instead of having its own inline expansion
of the DO_AST and PULLFRAME macros.
Now that the PUSHFRAME and PULLFRAME macros are used only in the swi
entry/exit code, they don't need to be macros. Except that didn't work
and the whole change was reverted.
Remove some unnecessary indirection and jump right to the handler functions.
Use panic rather than printf to "handle" an arm26 address exception
(should never happen on arm32).
Remove the unreferenced DATA() macro.
Remove #include <machine/asmacros.h> from files that don't need it.
dim [Sat, 17 May 2014 12:47:11 +0000 (12:47 +0000)]
MFC r266053:
Use the new -d option that was added to tblgen between llvm/clang 3.3
and 3.4 to generate dependency files for the '.inc.h' files generated
from .td files, and .sinclude those dependency files in clang.build.mk.
This will make future incremental builds of lib/clang and usr.bin/clang
work correctly, whenever any of the .td files get modified.
Note that this will not fix any problems with incremental builds from
*before* this revision, since there will not yet be any generated
dependency files. A quick workaround is to run the following:
find /usr/obj -type f -name '*.inc.h' | xargs rm
and then a regular incremental buildworld (e.g. with -DNO_CLEAN).
kib [Sat, 17 May 2014 11:36:31 +0000 (11:36 +0000)]
MFC r265843:
For the upgrade case in vm_fault_copy_entry(), when the entry does not
need COW and is writeable, do not create a new backing object for the entry.
bdrewery [Sat, 17 May 2014 02:45:59 +0000 (02:45 +0000)]
MFC r265267:
Fix width/alignment of JID column. Make it support up to the maximum 7-wide
JIDs. On a system using jails for common tasks the JID can quickly increase.
bdrewery [Sat, 17 May 2014 02:39:20 +0000 (02:39 +0000)]
MFC r265249,r265250,r265251:
- Add -J command/flag to filter by jail name/jid. This will automatically
display the JID as well (the -j command/flag).
- Add a hint for 'u' and 'J' command that '+' displays all.
- Add J command to help.
imx6: Add a tunable to set the number of active cores, enable SMP by default.
ffec: Fix multicast filtering.
Allwinner a10/a20...
- Add gpio and clock bits for A10/A20's EMAC ethernet controller driver
- EMAC gpio configuration
- EMAC clock activation
- Add Static Random Access Memory controller driver for A10/A20.
A10/A20's SRAM is used by devices, such as CPU, EMAC,
for extra fast memory or as cache.
- Add EMAC 10/100 Ethernet controller driver for A10/A20.
It is available mostly in A10 devices like Hackberry, Marsboard,
Mele A1000, A2000, A100 HTPC, cubieboard1 and A20 device
like cubieboard2.
TX performance can be improved using both channels 0 and 1.
RX performance is poor and needs improvement with the assistance of
external DMA controller in case there
- Add EMAC and SRAM controller entries to FDT.
- Add EMAC device to kernel config files and enable EMAC, SRAM drivers.
OMAP: When calculating the MPU freq, make sure not to overflow.
Vybrid:
- Add driver for Port control and interrupts (PORT).
- Export panel info to DTS
- Reset all the layers before setup first one
- Enable display
nandfs: Slight code reordering to make error branch last.
Add option TMPFS to arm/conf/DEFAULTS, remove it from the few configs
that have it individually. Concensus on freebsd-arm@ is that it should
be included in all ARM kernels.
Fix the arm sys_sigreturn(): its argument is a struct ucontext, not a
struct sigframe containing the struct ucontext.
Integrate device-tree upstream files into the build process:
(1) Invoke cpp to bring in files via #include (although the old
/include/ stuff is supported still).
(2) bring in files from either vendor tree or freebsd-custom files
when building.
(3) move all dts* files from sys/boot/fdt/dts to
sys/boot/fdt/dts/${MACHINE} as appropriate.
(4) encode all the magic to do the build in sys/tools/fdt/make_dtb.sh
so that the different places in the tree use the exact same logic.
(5) switch back to gpl dtc by default. the bsdl one in the tree has
significant issues not easily addressed by those unfamiliar with
the code.
Only try to build the static dtb when we're building a static dtb.
Use proper include path for dtc as well as cpp.
Fix syntax errors (missing ; other minor glitches) in existing dts files.
r260522:
Add the manual page for geom_uncompress(4).
r260523:
Build the geom_uncompress(4) module by default.
Fix geom_uncompress(4) module loading. Don't link zlib.c (which is a module
itself) directly.
r261439:
Remove some unnecessary code. The offsets read from the first block are
overwritten a few lines bellow.
r261440:
Fix a logic error. Because of this inflateReset() wasn't being called and
the output buffer wasn't being cleared between the inflate() calls,
producing zeroed output after the first inflate() call.
This fixes the read of mkuzip(8) images with geom_uncompress(4).
r261586:
Fix the build with DEBUG enabled. Where possible, fix style(9) issues.
r264504:
Make sure not to do I/O for more than MAXPHYS bytes. Doing so can cause
problems in our providers, such as a KASSERT in md(4). We can initiate
I/O for more than MAXPHYS bytes if we've been given a BIO for MAXPHYS
bytes, the blocks from which we're reading couldn't be compressed and
we had compression in preceeding blocks resulting in misalignment of
the blocks we're trying to read relative to the sector. We're forced to
round up the I/O length to make it an multiple of the sector size.
When we detect the condition, we'll reduce the block count and perform
a "short" read. In g_uzip_done() we need to consider the original I/O
length and stop early if we're about to deflate a block that we didn't
read. By using bio_completed in the cloned BIO and not bio_length to
check for this, we automatically and gracefully handle short reads that
our providers may be doing on top of the short reads we may initiate
ourselves.
r264769:
Keep geom_uncompress(4) in line with geom_uzip(4), bring in the r264504 fix.
Make sure not to start I/O bigger than MAXPHYS bytes.
r265193:
Some style and whitespace fixes. Reduce the difference between geom_uzip(4)
and geom_uncompress(4). Now, they produce an almost clean diff(1) output.
Remove a duplicated variable from g_uncompress.c and an unnecessary header
from g_uzip.c.
r265194:
Actually the FEATURE() macro is defined on sys/sysctl.h.
r265197:
Fix a leak in g_uzip_taste(). After retrieve all the block offsets from
the uzip image, free the last data read.
Initial import of Linux/Vendor DTS files for various embedded boards.
Initial import of DTS files from Linux
Correct initial import script
New AT91 devices or fdt probe added to existing devices. Some of these
are just stubs for testing the new dts.
- nand
- SDRAMC
- shdwc
- tcb
- usb host and gadget
yongari [Fri, 16 May 2014 05:10:16 +0000 (05:10 +0000)]
MFC r265943:
Disable TX IP/TCP/UDP checksum offloading for RTL8168C/RTL8168CP.
Previously only TX IP checksum offloading was disabled but it's
reported that TX checksum offloading for UDP datagrams with IP
options also generates corrupted frames. Reporter's controller is
RTL8168CP but I guess RTL8168C also have the same issue since it
shall share the same core.
Replace many pasted identical definitions of cpu_initclocks() with a common
implementation in arm/machdep.c.
aicasm: Don't complain about missing prototypes to ease bootstrap issues.
Vybrid: Add driver for Inter-Integrated Circuit (I2C).
imx6: Initialize the Low Power Mode bits to keep the ARM cores running
during WFI.
All our current ARM multi-core systems have all cores in one package with
a shared L2 cache, reflect that in the common cpu_topo() routine.
mpcore timer: Supply a DELAY() implementation via weak linkage, so that
SoC-specific code can supply a better implementation.
imx6: Add some rudimentary voltage control.
Add an armv7 implementation of cpu_sleep().
Add __used attribute so that the DELAY implementation doesn't get
optimized away as unreferenced, causing linker errors when trying to
resolve the weak reference to the missing function.
ian [Fri, 16 May 2014 01:30:30 +0000 (01:30 +0000)]
MFC r257854 (discussed with alc@)
As of r257209, all architectures have defined
VM_KMEM_SIZE_SCALE. In other words, every architecture is now
auto-sizing the kmem arena. This revision changes kmeminit() so
that the definition of VM_KMEM_SIZE_SCALE becomes mandatory and
the definition of VM_KMEM_SIZE becomes optional.
Replace or eliminate all existing definitions of VM_KMEM_SIZE.
With auto-sizing enabled, VM_KMEM_SIZE effectively became an
alternate spelling for VM_KMEM_SIZE_MIN on most architectures.
Use VM_KMEM_SIZE_MIN for clarity.
Move the declaration for mpentry() into a header file instead of pasting
it into a bunch of different .c files.
If the L2 cache type is PIPT, pass a physical address for a flush.
Actually set the proper bit to indicate TTB shared memory.
Add a new cache maintenance function, idcache_inv_all, to the table, and
implementations for each of the chips we support.
Invalidate caches immediately upon entry to init_secondary(). Also set
the Bufferable bit in the PDE entries of the secondary processor startup
pagetables.
Add the bits needed to run SMP on imx6.
Invalidate the SCU cache tag ram on all 4 cores, not just 1-3.
Minor tweaks to the imx GPT timer
Vybrid enhancements...
- Pin configuration is a complete iomux register now and includes
drive strength, pull mode, mux mode, speed, etc.
- Add i2c devices to the tree
- Add IPG clock
- Add support for Quartz Module.
- Pin configuration is a complete iomux register now and includes
drive strength, pull mode, mux mode, speed, etc.
- Add i2c devices to the tree
- Add IPG clock
Add a driver to provide access to imx6 on-chip one-time-programmble data.
Make it possible to access the ocotp registers before the ocotp device
is attached, by establishing a temporary mapping of the registers when
necessary.
It turns out Freescale cleverly made the ocotp device compatible across
several different families of SoCs, so move it to the freescale directory
and prefix everything with fsl rather than imx6.
Convert the imx6 sdhci "R1B fix" from a busy-loop in the interrupt handler
to a callout.
Increase the wait time for acquiring the SD bus from 10 to 250ms.
If no compatible cards were found after probing the SD bus, say so.
Add timeout logic to sdhci, separate from the timeouts done by the hardware.
After a timeout, reset the controller using SDHCI_RESET_CMD|SDHCI_RESET_DATA
rather than SDHCI_RESET_ALL; the latter turns off clocks and power, removing
any possibility of recovering from the error.
Add a helper routine to depth-search the device tree for a node with a
matching 'compatible' property.
On armv6 and later, use the WriteNotRead bit of the fault status register
to decide what protections are required by the faulting access.
Use the right symbols for determining arm architecture. Include the
necessary header file which has the new FAULT_WNR symbol defined in it.
Allow the kernel to be loaded at any 1MiB address. This requirement is
because we use the 1MiB section maps as they only need a single pagetable.
Add function for configuring Vybrid PLL4 (Audio) clock frequency output.
imx6 changes ...
- Fix the definition of the SDHCI_STATE_DAT and SDHCI_STATE_CMD fields,
and add SDHCI_RETUNE_REQUEST. None of these are actually used in the
code yet.
- Write translation code for the SDHCI_PRESENT_STATE register.
Freescale moved some bits around in their version of the register,
adjust things so that the sdhci code sees the standard layout.
- Add standard non-removable and cd-gpios properties to the usdhc
devices. That generates references to gpio devices, so uncomment them
even though there isn't a gpio driver to do anything with them yet.
- Add handling of standard "non-removable" property, and also some
workaround code so that if card detect is wired to a gpio pin, for now
we just treat it the same as non-removable (because there isn't a gpio
driver yet).
- Enable both sdcard slots, but not the sdio-based wifi that we don't
yet have a driver for.
ian [Thu, 15 May 2014 21:41:32 +0000 (21:41 +0000)]
MFC r261786, r261789
Rework the EARLY_PRINTF mechanism. Instead of defining a special eprintf()
routine, now a platform can provide a pointer to an early_putc() routine
which is used instead of cn_putc(). Control can be handed off from early
printf support to standard console support by NULLing out the pointer
during standard console init.
Convert two while(1); statements into proper panics.
Better nomatch messages: include compat string. Also, flag devices as
disabled in the successful probe message, but leave what that means to
the actual driver (no semantic changes).
Fix Embest board name and id.
Honor the disabled status by only grabbing resources and returning
when running under FDT in the AT91 SPI driver.
Consolidate code related to setting up physical memory configuration into
a new physmem.c file.
Replace compile-time constant KERNPHYSADDR with abp_physaddr
Calculate the kernel's load address from the PC in the elf / gzip
trampoline instead of relying on KERNPHYSADDR as a compile-time constant.
It turns out a global variable is the only straightforward way to
communicate the kernel's physical load address from where it's known in
initarm() into cpu_mp_start() which is called from non-arm code and
takes no parameters.
Remove the now unused MMU_INIT macro.
Use vm_paddr_t, not vm_offset_t, when dealing with physical addresses.
No need to set physmem in each initarm() instance anymore, it's handled
in common code now.
Pass the pagetable used from locore.S to initarm to allow it to map data
in as required.
Fix the physmem exclude-region clipping logic for the edge-trim case.
Add some extra debugging output when DEBUG is defined.
Update legacy platforms to use new arm_physmem helper routines.
ian [Thu, 15 May 2014 19:09:31 +0000 (19:09 +0000)]
MFC r257549, r261642
Don't create a distinct free page pool for segregating allocations that are
accessed through the direct map unless the kernel configuration actually
includes a direct map. Only a few configurations do, and for the rest the
unnecessary free page pool is a small pessimization.
Remove the ARM_USE_SMALL_ALLOC option and code related to it.
cperciva [Thu, 15 May 2014 18:07:35 +0000 (18:07 +0000)]
MFC r265876:
In cf_get_method, when we don't already know what clock speed the CPU is
running at, guess the nearest value instead of looking for a value within
25 MHz of the observed frequency.
Prior to this change, if a system booted with Intel Turbo Boost enabled,
the dev.cpu.0.freq sysctl is nonfunctional, since the ACPI-reported
frequency for Turbo Boost states does not match the actual clock frequency
(and thus no levels are within 25 MHz of the observed frequency) and the
current performance level is read before a new level is set.
Relnotes: Bug fix in power management on CPUs with Intel Turbo Boost
Move Open Firmware device root on PowerPC, ARM, and MIPS systems to
a sub-node of nexus (ofwbus) rather than direct attach under nexus. This
fixes FDT on x86 and will make coexistence with ACPI on ARM systems easier.
SPARC is unchanged.
Add the missing ')' at end of sentence. Reword it to use a more common idiom.
Pass the kernel physical address to initarm through the boot param struct.
Make functions only used in vfp.c static, and remove vfp_enable.
Fix __syscall on armeb EABI. As it returns a 64-bit value it needs to
place 32-bit data in r1, not r0. 64-bit data is already packed correctly.
Use abp_physaddr for the physical address over KERNPHYSADDR. This helps us
remove the need to load the kernel at a fixed address.
Remove references to PHYSADDR where it's used only in debugging output.
Dynamically generate the page table. This will allow us to detect the
physical address we are loaded at to change the mapping.
ian [Thu, 15 May 2014 16:59:47 +0000 (16:59 +0000)]
MFC r261414, r261415, r261417, r261418, r261419
Don't call device_set_ivars() for the mmchs
Change the way pcpu and curthread are stored per-core
Invalidate cachelines for bounce pages on PREREAD too, there may still be
stale entries from a previous transfer.
Only use the CPU ID register if SMP is defined. Some non-MPCore armv6 cpu,
such as the one found in the RPi, don't have it, and just hang when we try
to access it.
loos [Thu, 15 May 2014 15:47:52 +0000 (15:47 +0000)]
MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
ian [Thu, 15 May 2014 15:43:33 +0000 (15:43 +0000)]
MFC r261406, r261409: enhance Vybrid support...
o Expand device tree information
o Export iomuxc (pins) configuration to DTS
o Allow devices to assign clocks in DTS
o Split kernel configuration to chip common and board specific parts.
projects / FreeBSD / stable / 10.git / log