1 /* $NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $ */
4 * Copyright (c) 2004 Olivier Houchard
5 * Copyright (c) 1994-1998 Mark Brinicombe.
6 * Copyright (c) 1994 Brini.
9 * This code is derived from software written for Brini by Mark Brinicombe
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by Mark Brinicombe
22 * for the NetBSD Project.
23 * 4. The name of the company nor the name of the author may be used to
24 * endorse or promote products derived from this software without specific
25 * prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
28 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
29 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
30 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
31 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
32 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
33 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * Machine dependant functions for kernel setup
42 * Updated : 18/04/01 updated for new wscons
45 #include "opt_compat.h"
48 #include <sys/cdefs.h>
49 __FBSDID("$FreeBSD$");
51 #include <sys/param.h>
53 #include <sys/systm.h>
60 #include <sys/imgact.h>
61 #include <sys/kernel.h>
63 #include <sys/linker.h>
65 #include <sys/malloc.h>
66 #include <sys/mutex.h>
68 #include <sys/ptrace.h>
69 #include <sys/signalvar.h>
70 #include <sys/sysent.h>
71 #include <sys/sysproto.h>
76 #include <vm/vm_map.h>
77 #include <vm/vm_object.h>
78 #include <vm/vm_page.h>
79 #include <vm/vm_pager.h>
80 #include <vm/vnode_pager.h>
82 #include <machine/armreg.h>
83 #include <machine/cpu.h>
84 #include <machine/machdep.h>
85 #include <machine/md_var.h>
86 #include <machine/metadata.h>
87 #include <machine/pcb.h>
88 #include <machine/pmap.h>
89 #include <machine/reg.h>
90 #include <machine/trap.h>
91 #include <machine/undefined.h>
92 #include <machine/vmparam.h>
93 #include <machine/sysarch.h>
95 uint32_t cpu_reset_address = 0;
97 vm_offset_t vector_page;
101 int (*_arm_memcpy)(void *, void *, int, int) = NULL;
102 int (*_arm_bzero)(void *, int, int) = NULL;
103 int _min_memcpy_size = 0;
104 int _min_bzero_size = 0;
108 extern vm_offset_t ksym_start, ksym_end;
112 sendsig(catcher, ksi, mask)
119 struct trapframe *tf;
120 struct sigframe *fp, frame;
128 PROC_LOCK_ASSERT(p, MA_OWNED);
129 sig = ksi->ksi_signo;
130 code = ksi->ksi_code;
132 mtx_assert(&psp->ps_mtx, MA_OWNED);
134 onstack = sigonstack(tf->tf_usr_sp);
136 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm,
139 /* Allocate and validate space for the signal handler context. */
140 if ((td->td_flags & TDP_ALTSTACK) != 0 && !(onstack) &&
141 SIGISMEMBER(psp->ps_sigonstack, sig)) {
142 fp = (struct sigframe *)(td->td_sigstk.ss_sp +
143 td->td_sigstk.ss_size);
144 #if defined(COMPAT_43)
145 td->td_sigstk.ss_flags |= SS_ONSTACK;
148 fp = (struct sigframe *)td->td_frame->tf_usr_sp;
150 /* make room on the stack */
153 /* make the stack aligned */
154 fp = (struct sigframe *)STACKALIGN(fp);
155 /* Populate the siginfo frame. */
156 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0);
157 frame.sf_si = ksi->ksi_info;
158 frame.sf_uc.uc_sigmask = *mask;
159 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK )
160 ? ((onstack) ? SS_ONSTACK : 0) : SS_DISABLE;
161 frame.sf_uc.uc_stack = td->td_sigstk;
162 mtx_unlock(&psp->ps_mtx);
163 PROC_UNLOCK(td->td_proc);
165 /* Copy the sigframe out to the user's stack. */
166 if (copyout(&frame, fp, sizeof(*fp)) != 0) {
167 /* Process has trashed its stack. Kill it. */
168 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp);
173 /* Translate the signal if appropriate. */
174 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
175 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
178 * Build context to run handler in. We invoke the handler
179 * directly, only returning via the trampoline. Note the
180 * trampoline version numbers are coordinated with machine-
181 * dependent code in libc.
185 tf->tf_r1 = (register_t)&fp->sf_si;
186 tf->tf_r2 = (register_t)&fp->sf_uc;
188 /* the trampoline uses r5 as the uc address */
189 tf->tf_r5 = (register_t)&fp->sf_uc;
190 tf->tf_pc = (register_t)catcher;
191 tf->tf_usr_sp = (register_t)fp;
192 tf->tf_usr_lr = (register_t)(PS_STRINGS - *(p->p_sysent->sv_szsigcode));
194 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_usr_lr,
198 mtx_lock(&psp->ps_mtx);
201 struct kva_md_info kmi;
206 * Initialize the vector page, and select whether or not to
207 * relocate the vectors.
209 * NOTE: We expect the vector page to be mapped at its expected
213 extern unsigned int page0[], page0_data[];
215 arm_vector_init(vm_offset_t va, int which)
217 unsigned int *vectors = (int *) va;
218 unsigned int *vectors_data = vectors + (page0_data - page0);
222 * Loop through the vectors we're taking over, and copy the
223 * vector's insn and data word.
225 for (vec = 0; vec < ARM_NVEC; vec++) {
226 if ((which & (1 << vec)) == 0) {
227 /* Don't want to take over this vector. */
230 vectors[vec] = page0[vec];
231 vectors_data[vec] = page0_data[vec];
234 /* Now sync the vectors. */
235 cpu_icache_sync_range(va, (ARM_NVEC * 2) * sizeof(u_int));
239 if (va == ARM_VECTORS_HIGH) {
241 * Assume the MD caller knows what it's doing here, and
242 * really does want the vector page relocated.
244 * Note: This has to be done here (and not just in
245 * cpu_setup()) because the vector page needs to be
246 * accessible *before* cpu_startup() is called.
249 * NOTE: If the CPU control register is not readable,
250 * this will totally fail! We'll just assume that
251 * any system that has high vector support has a
252 * readable CPU control register, for now. If we
253 * ever encounter one that does not, we'll have to
256 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC);
261 cpu_startup(void *dummy)
263 struct pcb *pcb = thread0.td_pcb;
264 #ifndef ARM_CACHE_LOCK_ENABLE
271 printf("real memory = %ju (%ju MB)\n", (uintmax_t)ptoa(physmem),
272 (uintmax_t)ptoa(physmem) / 1048576);
276 * Display the RAM layout.
281 printf("Physical memory chunk(s):\n");
282 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
285 size = phys_avail[indx + 1] - phys_avail[indx];
286 printf("%#08jx - %#08jx, %ju bytes (%ju pages)\n",
287 (uintmax_t)phys_avail[indx],
288 (uintmax_t)phys_avail[indx + 1] - 1,
289 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
293 vm_ksubmap_init(&kmi);
295 printf("avail memory = %ju (%ju MB)\n",
296 (uintmax_t)ptoa(cnt.v_free_count),
297 (uintmax_t)ptoa(cnt.v_free_count) / 1048576);
300 vm_pager_bufferinit();
301 pcb->un_32.pcb32_und_sp = (u_int)thread0.td_kstack +
302 USPACE_UNDEF_STACK_TOP;
303 pcb->un_32.pcb32_sp = (u_int)thread0.td_kstack +
304 USPACE_SVC_STACK_TOP;
305 vector_page_setprot(VM_PROT_READ);
306 pmap_set_pcb_pagedir(pmap_kernel(), pcb);
308 #ifdef ARM_CACHE_LOCK_ENABLE
309 pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS);
310 arm_lock_cache_line(ARM_TP_ADDRESS);
312 m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO);
313 pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m));
317 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
320 * Flush the D-cache for non-DMA I/O so that the I-cache can
321 * be made coherent later.
324 cpu_flush_dcache(void *ptr, size_t len)
327 cpu_dcache_wb_range((uintptr_t)ptr, len);
328 cpu_l2cache_wb_range((uintptr_t)ptr, len);
331 /* Get current clock frequency for the given cpu id. */
333 cpu_est_clockrate(int cpu_id, uint64_t *rate)
346 cpu_idle_wakeup(int cpu)
353 fill_regs(struct thread *td, struct reg *regs)
355 struct trapframe *tf = td->td_frame;
356 bcopy(&tf->tf_r0, regs->r, sizeof(regs->r));
357 regs->r_sp = tf->tf_usr_sp;
358 regs->r_lr = tf->tf_usr_lr;
359 regs->r_pc = tf->tf_pc;
360 regs->r_cpsr = tf->tf_spsr;
364 fill_fpregs(struct thread *td, struct fpreg *regs)
366 bzero(regs, sizeof(*regs));
371 set_regs(struct thread *td, struct reg *regs)
373 struct trapframe *tf = td->td_frame;
375 bcopy(regs->r, &tf->tf_r0, sizeof(regs->r));
376 tf->tf_usr_sp = regs->r_sp;
377 tf->tf_usr_lr = regs->r_lr;
378 tf->tf_pc = regs->r_pc;
379 tf->tf_spsr &= ~PSR_FLAGS;
380 tf->tf_spsr |= regs->r_cpsr & PSR_FLAGS;
385 set_fpregs(struct thread *td, struct fpreg *regs)
391 fill_dbregs(struct thread *td, struct dbreg *regs)
396 set_dbregs(struct thread *td, struct dbreg *regs)
403 ptrace_read_int(struct thread *td, vm_offset_t addr, u_int32_t *v)
408 PROC_LOCK_ASSERT(td->td_proc, MA_NOTOWNED);
409 iov.iov_base = (caddr_t) v;
410 iov.iov_len = sizeof(u_int32_t);
413 uio.uio_offset = (off_t)addr;
414 uio.uio_resid = sizeof(u_int32_t);
415 uio.uio_segflg = UIO_SYSSPACE;
416 uio.uio_rw = UIO_READ;
418 return proc_rwmem(td->td_proc, &uio);
422 ptrace_write_int(struct thread *td, vm_offset_t addr, u_int32_t v)
427 PROC_LOCK_ASSERT(td->td_proc, MA_NOTOWNED);
428 iov.iov_base = (caddr_t) &v;
429 iov.iov_len = sizeof(u_int32_t);
432 uio.uio_offset = (off_t)addr;
433 uio.uio_resid = sizeof(u_int32_t);
434 uio.uio_segflg = UIO_SYSSPACE;
435 uio.uio_rw = UIO_WRITE;
437 return proc_rwmem(td->td_proc, &uio);
441 ptrace_single_step(struct thread *td)
446 KASSERT(td->td_md.md_ptrace_instr == 0,
447 ("Didn't clear single step"));
450 error = ptrace_read_int(td, td->td_frame->tf_pc + 4,
451 &td->td_md.md_ptrace_instr);
454 error = ptrace_write_int(td, td->td_frame->tf_pc + 4,
457 td->td_md.md_ptrace_instr = 0;
458 td->td_md.md_ptrace_addr = td->td_frame->tf_pc + 4;
465 ptrace_clear_single_step(struct thread *td)
469 if (td->td_md.md_ptrace_instr) {
472 ptrace_write_int(td, td->td_md.md_ptrace_addr,
473 td->td_md.md_ptrace_instr);
475 td->td_md.md_ptrace_instr = 0;
481 ptrace_set_pc(struct thread *td, unsigned long addr)
483 td->td_frame->tf_pc = addr;
488 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
498 if (td->td_md.md_spinlock_count == 0)
499 td->td_md.md_saved_cspr = disable_interrupts(I32_bit | F32_bit);
500 td->td_md.md_spinlock_count++;
511 td->td_md.md_spinlock_count--;
512 if (td->td_md.md_spinlock_count == 0)
513 restore_interrupts(td->td_md.md_saved_cspr);
517 * Clear registers on exec
520 exec_setregs(struct thread *td, u_long entry, u_long stack, u_long ps_strings)
522 struct trapframe *tf = td->td_frame;
524 memset(tf, 0, sizeof(*tf));
525 tf->tf_usr_sp = stack;
526 tf->tf_usr_lr = entry;
527 tf->tf_svc_lr = 0x77777777;
529 tf->tf_spsr = PSR_USR32_MODE;
533 * Get machine context.
536 get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret)
538 struct trapframe *tf = td->td_frame;
539 __greg_t *gr = mcp->__gregs;
541 if (clear_ret & GET_MC_CLEAR_RET)
544 gr[_REG_R0] = tf->tf_r0;
545 gr[_REG_R1] = tf->tf_r1;
546 gr[_REG_R2] = tf->tf_r2;
547 gr[_REG_R3] = tf->tf_r3;
548 gr[_REG_R4] = tf->tf_r4;
549 gr[_REG_R5] = tf->tf_r5;
550 gr[_REG_R6] = tf->tf_r6;
551 gr[_REG_R7] = tf->tf_r7;
552 gr[_REG_R8] = tf->tf_r8;
553 gr[_REG_R9] = tf->tf_r9;
554 gr[_REG_R10] = tf->tf_r10;
555 gr[_REG_R11] = tf->tf_r11;
556 gr[_REG_R12] = tf->tf_r12;
557 gr[_REG_SP] = tf->tf_usr_sp;
558 gr[_REG_LR] = tf->tf_usr_lr;
559 gr[_REG_PC] = tf->tf_pc;
560 gr[_REG_CPSR] = tf->tf_spsr;
566 * Set machine context.
568 * However, we don't set any but the user modifiable flags, and we won't
569 * touch the cs selector.
572 set_mcontext(struct thread *td, const mcontext_t *mcp)
574 struct trapframe *tf = td->td_frame;
575 const __greg_t *gr = mcp->__gregs;
577 tf->tf_r0 = gr[_REG_R0];
578 tf->tf_r1 = gr[_REG_R1];
579 tf->tf_r2 = gr[_REG_R2];
580 tf->tf_r3 = gr[_REG_R3];
581 tf->tf_r4 = gr[_REG_R4];
582 tf->tf_r5 = gr[_REG_R5];
583 tf->tf_r6 = gr[_REG_R6];
584 tf->tf_r7 = gr[_REG_R7];
585 tf->tf_r8 = gr[_REG_R8];
586 tf->tf_r9 = gr[_REG_R9];
587 tf->tf_r10 = gr[_REG_R10];
588 tf->tf_r11 = gr[_REG_R11];
589 tf->tf_r12 = gr[_REG_R12];
590 tf->tf_usr_sp = gr[_REG_SP];
591 tf->tf_usr_lr = gr[_REG_LR];
592 tf->tf_pc = gr[_REG_PC];
593 tf->tf_spsr = gr[_REG_CPSR];
604 struct sigreturn_args /* {
605 const struct __ucontext *sigcntxp;
608 struct proc *p = td->td_proc;
610 struct trapframe *tf;
615 if (copyin(uap->sigcntxp, &sf, sizeof(sf)))
618 * Make sure the processor mode has not been tampered with and
619 * interrupts have not been disabled.
621 spsr = sf.sf_uc.uc_mcontext.__gregs[_REG_CPSR];
622 if ((spsr & PSR_MODE) != PSR_USR32_MODE ||
623 (spsr & (I32_bit | F32_bit)) != 0)
625 /* Restore register context. */
627 set_mcontext(td, &sf.sf_uc.uc_mcontext);
629 /* Restore signal mask. */
631 td->td_sigmask = sf.sf_uc.uc_sigmask;
632 SIG_CANTMASK(td->td_sigmask);
636 return (EJUSTRETURN);
641 * Construct a PCB from a trapframe. This is called from kdb_trap() where
642 * we want to start a backtrace from the function that caused us to enter
643 * the debugger. We have the context in the trapframe, but base the trace
644 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
645 * enough for a backtrace.
648 makectx(struct trapframe *tf, struct pcb *pcb)
650 pcb->un_32.pcb32_r8 = tf->tf_r8;
651 pcb->un_32.pcb32_r9 = tf->tf_r9;
652 pcb->un_32.pcb32_r10 = tf->tf_r10;
653 pcb->un_32.pcb32_r11 = tf->tf_r11;
654 pcb->un_32.pcb32_r12 = tf->tf_r12;
655 pcb->un_32.pcb32_pc = tf->tf_pc;
656 pcb->un_32.pcb32_lr = tf->tf_usr_lr;
657 pcb->un_32.pcb32_sp = tf->tf_usr_sp;
661 * Fake up a boot descriptor table
664 fake_preload_metadata(void)
667 vm_offset_t zstart = 0, zend = 0;
669 vm_offset_t lastaddr;
671 static uint32_t fake_preload[35];
673 fake_preload[i++] = MODINFO_NAME;
674 fake_preload[i++] = strlen("elf kernel") + 1;
675 strcpy((char*)&fake_preload[i++], "elf kernel");
677 fake_preload[i++] = MODINFO_TYPE;
678 fake_preload[i++] = strlen("elf kernel") + 1;
679 strcpy((char*)&fake_preload[i++], "elf kernel");
681 fake_preload[i++] = MODINFO_ADDR;
682 fake_preload[i++] = sizeof(vm_offset_t);
683 fake_preload[i++] = KERNVIRTADDR;
684 fake_preload[i++] = MODINFO_SIZE;
685 fake_preload[i++] = sizeof(uint32_t);
686 fake_preload[i++] = (uint32_t)&end - KERNVIRTADDR;
688 if (*(uint32_t *)KERNVIRTADDR == MAGIC_TRAMP_NUMBER) {
689 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_SSYM;
690 fake_preload[i++] = sizeof(vm_offset_t);
691 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 4);
692 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_ESYM;
693 fake_preload[i++] = sizeof(vm_offset_t);
694 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 8);
695 lastaddr = *(uint32_t *)(KERNVIRTADDR + 8);
697 zstart = *(uint32_t *)(KERNVIRTADDR + 4);
702 lastaddr = (vm_offset_t)&end;
703 fake_preload[i++] = 0;
705 preload_metadata = (void *)fake_preload;