2 * Initial implementation:
3 * Copyright (c) 2001 Robert Drehmel
6 * As long as the above copyright statement and this notice remain
7 * unchanged, you can do what ever you want with this file.
10 * Copyright (c) 2008 Marius Strobl <marius@FreeBSD.org>
11 * All rights reserved.
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 #include <sys/cdefs.h>
36 __FBSDID("$FreeBSD$");
39 * FreeBSD/sparc64 kernel loader - machine dependent part
41 * - implements copyin and readin functions that map kernel
42 * pages on demand. The machine independent code does not
43 * know the size of the kernel early enough to pre-enter
44 * TTEs and install just one 4MB mapping seemed to limiting
50 #include <sys/param.h>
51 #include <sys/queue.h>
52 #include <sys/linker.h>
53 #include <sys/types.h>
56 #include <machine/asi.h>
57 #include <machine/cpufunc.h>
58 #include <machine/elf.h>
59 #include <machine/lsu.h>
60 #include <machine/metadata.h>
61 #include <machine/tte.h>
62 #include <machine/tlb.h>
63 #include <machine/upa.h>
64 #include <machine/ver.h>
65 #include <machine/vmparam.h>
67 #include "bootstrap.h"
71 extern char bootprog_name[], bootprog_rev[], bootprog_date[], bootprog_maker[];
76 LOADSZ = 0x1000000 /* for kernel and modules */
79 static struct mmu_ops {
80 void (*tlb_init)(void);
81 int (*mmu_mapin)(vm_offset_t va, vm_size_t len);
84 typedef void kernel_entry_t(vm_offset_t mdp, u_long o1, u_long o2, u_long o3,
87 static inline u_long dtlb_get_data_sun4u(int slot);
88 static void dtlb_enter_sun4u(u_long vpn, u_long data);
89 static vm_offset_t dtlb_va_to_pa_sun4u(vm_offset_t);
90 static inline u_long itlb_get_data_sun4u(int slot);
91 static void itlb_enter_sun4u(u_long vpn, u_long data);
92 static vm_offset_t itlb_va_to_pa_sun4u(vm_offset_t);
93 static void itlb_relocate_locked0_sun4u(void);
94 extern vm_offset_t md_load(char *, vm_offset_t *);
95 static int sparc64_autoload(void);
96 static ssize_t sparc64_readin(const int, vm_offset_t, const size_t);
97 static ssize_t sparc64_copyin(const void *, vm_offset_t, size_t);
98 static void sparc64_maphint(vm_offset_t, size_t);
99 static vm_offset_t claim_virt(vm_offset_t, size_t, int);
100 static vm_offset_t alloc_phys(size_t, int);
101 static int map_phys(int, size_t, vm_offset_t, vm_offset_t);
102 static void release_phys(vm_offset_t, u_int);
103 static int __elfN(exec)(struct preloaded_file *);
104 static int mmu_mapin_sun4u(vm_offset_t, vm_size_t);
105 static int mmu_mapin_sun4v(vm_offset_t, vm_size_t);
106 static vm_offset_t init_heap(void);
107 static void tlb_init_sun4u(void);
108 static void tlb_init_sun4v(void);
111 typedef u_int64_t tte_t;
113 static void pmap_print_tlb_sun4u(void);
114 static void pmap_print_tte_sun4u(tte_t, tte_t);
117 static struct mmu_ops mmu_ops_sun4u = { tlb_init_sun4u, mmu_mapin_sun4u };
118 static struct mmu_ops mmu_ops_sun4v = { tlb_init_sun4v, mmu_mapin_sun4v };
121 struct tlb_entry *dtlb_store;
122 struct tlb_entry *itlb_store;
126 static int dtlb_slot_max;
127 static int itlb_slot_max;
130 static struct tlb_entry *tlb_store;
131 static int is_sun4v = 0;
133 * no direct TLB access on sun4v
134 * we somewhat arbitrarily declare enough
135 * slots to cover a 4GB AS with 4MB pages
137 #define SUN4V_TLB_SLOT_MAX (1 << 10)
139 static vm_offset_t curkva = 0;
140 static vm_offset_t heapva;
142 static phandle_t root;
145 * Machine dependent structures that the machine independent
148 struct devsw *devsw[] = {
149 #ifdef LOADER_DISK_SUPPORT
152 #ifdef LOADER_NET_SUPPORT
157 struct arch_switch archsw;
159 static struct file_format sparc64_elf = {
163 struct file_format *file_formats[] = {
167 struct fs_ops *file_system[] = {
168 #ifdef LOADER_UFS_SUPPORT
171 #ifdef LOADER_CD9660_SUPPORT
174 #ifdef LOADER_ZIP_SUPPORT
177 #ifdef LOADER_GZIP_SUPPORT
180 #ifdef LOADER_BZIP2_SUPPORT
183 #ifdef LOADER_NFS_SUPPORT
186 #ifdef LOADER_TFTP_SUPPORT
191 struct netif_driver *netif_drivers[] = {
192 #ifdef LOADER_NET_SUPPORT
198 extern struct console ofwconsole;
199 struct console *consoles[] = {
206 watch_phys_set_mask(vm_offset_t pa, u_long mask)
210 stxa(AA_DMMU_PWPR, ASI_DMMU, pa & (((2UL << 38) - 1) << 3));
211 lsucr = ldxa(0, ASI_LSU_CTL_REG);
212 lsucr = ((lsucr | LSU_PW) & ~LSU_PM_MASK) |
213 (mask << LSU_PM_SHIFT);
214 stxa(0, ASI_LSU_CTL_REG, lsucr);
219 watch_phys_set(vm_offset_t pa, int sz)
223 off = (u_long)pa & 7;
224 /* Test for misaligned watch points. */
227 return (watch_phys_set_mask(pa, ((1 << sz) - 1) << off));
232 watch_virt_set_mask(vm_offset_t va, u_long mask)
236 stxa(AA_DMMU_VWPR, ASI_DMMU, va & (((2UL << 41) - 1) << 3));
237 lsucr = ldxa(0, ASI_LSU_CTL_REG);
238 lsucr = ((lsucr | LSU_VW) & ~LSU_VM_MASK) |
239 (mask << LSU_VM_SHIFT);
240 stxa(0, ASI_LSU_CTL_REG, lsucr);
245 watch_virt_set(vm_offset_t va, int sz)
249 off = (u_long)va & 7;
250 /* Test for misaligned watch points. */
253 return (watch_virt_set_mask(va, ((1 << sz) - 1) << off));
261 sparc64_autoload(void)
264 setenv("hw.ata.atapi_dma", "0", 0);
269 sparc64_readin(const int fd, vm_offset_t va, const size_t len)
272 mmu_ops->mmu_mapin(va, len);
273 return (read(fd, (void *)va, len));
277 sparc64_copyin(const void *src, vm_offset_t dest, size_t len)
280 mmu_ops->mmu_mapin(dest, len);
281 memcpy((void *)dest, src, len);
286 sparc64_maphint(vm_offset_t va, size_t len)
291 int i, free_excess = 0;
296 if (tlb_store[va >> 22].te_pa != -1)
299 /* round up to nearest 4MB page */
300 size = (len + PAGE_MASK_4M) & ~PAGE_MASK_4M;
302 pa = alloc_phys(PAGE_SIZE_256M, PAGE_SIZE_256M);
308 pa = alloc_phys(size, PAGE_SIZE_256M);
310 pa = alloc_phys(size, PAGE_SIZE_4M);
312 panic("%s: out of memory", __func__);
314 for (i = 0; i < size; i += PAGE_SIZE_4M) {
315 mva = claim_virt(va + i, PAGE_SIZE_4M, 0);
317 panic("%s: can't claim virtual page "
318 "(wanted %#lx, got %#lx)",
321 tlb_store[mva >> 22].te_pa = pa + i;
322 if (map_phys(-1, PAGE_SIZE_4M, mva, pa + i) != 0)
323 printf("%s: can't map physical page\n", __func__);
326 release_phys(pa, PAGE_SIZE_256M);
333 claim_virt(vm_offset_t virt, size_t size, int align)
337 if (OF_call_method("claim", mmu, 3, 1, virt, size, align, &mva) == -1)
338 return ((vm_offset_t)-1);
343 alloc_phys(size_t size, int align)
345 cell_t phys_hi, phys_low;
347 if (OF_call_method("claim", memory, 2, 2, size, align, &phys_low,
349 return ((vm_offset_t)-1);
350 return ((vm_offset_t)phys_hi << 32 | phys_low);
354 map_phys(int mode, size_t size, vm_offset_t virt, vm_offset_t phys)
357 return (OF_call_method("map", mmu, 5, 0, (uint32_t)phys,
358 (uint32_t)(phys >> 32), virt, size, mode));
362 release_phys(vm_offset_t phys, u_int size)
365 (void)OF_call_method("release", memory, 3, 0, (uint32_t)phys,
366 (uint32_t)(phys >> 32), size);
370 __elfN(exec)(struct preloaded_file *fp)
372 struct file_metadata *fmp;
378 if ((fmp = file_findmetadata(fp, MODINFOMD_ELFHDR)) == 0)
380 e = (Elf_Ehdr *)&fmp->md_data;
382 if ((error = md_load(fp->f_args, &mdp)) != 0)
385 printf("jumping to kernel entry at %#lx.\n", e->e_entry);
387 pmap_print_tlb_sun4u();
392 OF_release((void *)heapva, HEAPSZ);
394 ((kernel_entry_t *)entry)(mdp, 0, 0, 0, openfirmware);
396 panic("%s: exec returned", __func__);
400 dtlb_get_data_sun4u(int slot)
404 * We read ASI_DTLB_DATA_ACCESS_REG twice in order to work
405 * around errata of USIII and beyond.
407 (void)ldxa(TLB_DAR_SLOT(slot), ASI_DTLB_DATA_ACCESS_REG);
408 return (ldxa(TLB_DAR_SLOT(slot), ASI_DTLB_DATA_ACCESS_REG));
412 itlb_get_data_sun4u(int slot)
416 * We read ASI_ITLB_DATA_ACCESS_REG twice in order to work
417 * around errata of USIII and beyond.
419 (void)ldxa(TLB_DAR_SLOT(slot), ASI_ITLB_DATA_ACCESS_REG);
420 return (ldxa(TLB_DAR_SLOT(slot), ASI_ITLB_DATA_ACCESS_REG));
424 dtlb_va_to_pa_sun4u(vm_offset_t va)
429 pstate = rdpr(pstate);
430 wrpr(pstate, pstate & ~PSTATE_IE, 0);
431 for (i = 0; i < dtlb_slot_max; i++) {
432 reg = ldxa(TLB_DAR_SLOT(i), ASI_DTLB_TAG_READ_REG);
433 if (TLB_TAR_VA(reg) != va)
435 reg = dtlb_get_data_sun4u(i);
436 wrpr(pstate, pstate, 0);
438 if (cpu_impl >= CPU_IMPL_ULTRASPARCIII)
439 return (reg & TD_PA_CH_MASK);
440 return (reg & TD_PA_SF_MASK);
442 wrpr(pstate, pstate, 0);
447 itlb_va_to_pa_sun4u(vm_offset_t va)
452 pstate = rdpr(pstate);
453 wrpr(pstate, pstate & ~PSTATE_IE, 0);
454 for (i = 0; i < itlb_slot_max; i++) {
455 reg = ldxa(TLB_DAR_SLOT(i), ASI_ITLB_TAG_READ_REG);
456 if (TLB_TAR_VA(reg) != va)
458 reg = itlb_get_data_sun4u(i);
459 wrpr(pstate, pstate, 0);
461 if (cpu_impl >= CPU_IMPL_ULTRASPARCIII)
462 return (reg & TD_PA_CH_MASK);
463 return (reg & TD_PA_SF_MASK);
465 wrpr(pstate, pstate, 0);
470 dtlb_enter_sun4u(u_long vpn, u_long data)
475 wrpr(pstate, reg & ~PSTATE_IE, 0);
476 stxa(AA_DMMU_TAR, ASI_DMMU,
477 TLB_TAR_VA(vpn) | TLB_TAR_CTX(TLB_CTX_KERNEL));
478 stxa(0, ASI_DTLB_DATA_IN_REG, data);
480 wrpr(pstate, reg, 0);
484 itlb_enter_sun4u(u_long vpn, u_long data)
490 wrpr(pstate, reg & ~PSTATE_IE, 0);
492 if (cpu_impl == CPU_IMPL_ULTRASPARCIIIp) {
494 * Search an unused slot != 0 and explicitly enter the data
495 * and tag there in order to avoid Cheetah+ erratum 34.
497 for (i = 1; i < itlb_slot_max; i++) {
498 if ((itlb_get_data_sun4u(i) & TD_V) != 0)
501 stxa(AA_IMMU_TAR, ASI_IMMU,
502 TLB_TAR_VA(vpn) | TLB_TAR_CTX(TLB_CTX_KERNEL));
503 stxa(TLB_DAR_SLOT(i), ASI_ITLB_DATA_ACCESS_REG, data);
507 wrpr(pstate, reg, 0);
508 if (i == itlb_slot_max)
509 panic("%s: could not find an unused slot", __func__);
513 stxa(AA_IMMU_TAR, ASI_IMMU,
514 TLB_TAR_VA(vpn) | TLB_TAR_CTX(TLB_CTX_KERNEL));
515 stxa(0, ASI_ITLB_DATA_IN_REG, data);
517 wrpr(pstate, reg, 0);
521 itlb_relocate_locked0_sun4u(void)
523 u_long data, pstate, tag;
526 if (cpu_impl != CPU_IMPL_ULTRASPARCIIIp)
529 pstate = rdpr(pstate);
530 wrpr(pstate, pstate & ~PSTATE_IE, 0);
532 data = itlb_get_data_sun4u(0);
533 if ((data & (TD_V | TD_L)) != (TD_V | TD_L)) {
534 wrpr(pstate, pstate, 0);
538 /* Flush the mapping of slot 0. */
539 tag = ldxa(TLB_DAR_SLOT(0), ASI_ITLB_TAG_READ_REG);
540 stxa(TLB_DEMAP_VA(TLB_TAR_VA(tag)) | TLB_DEMAP_PRIMARY |
541 TLB_DEMAP_PAGE, ASI_IMMU_DEMAP, 0);
542 flush(0); /* The USIII-family ignores the address. */
545 * Search a replacement slot != 0 and enter the data and tag
546 * that formerly were in slot 0.
548 for (i = 1; i < itlb_slot_max; i++) {
549 if ((itlb_get_data_sun4u(i) & TD_V) != 0)
552 stxa(AA_IMMU_TAR, ASI_IMMU, tag);
553 stxa(TLB_DAR_SLOT(i), ASI_ITLB_DATA_ACCESS_REG, data);
554 flush(0); /* The USIII-family ignores the address. */
557 wrpr(pstate, pstate, 0);
558 if (i == itlb_slot_max)
559 panic("%s: could not find a replacement slot", __func__);
563 mmu_mapin_sun4u(vm_offset_t va, vm_size_t len)
568 if (va + len > curkva)
571 pa = (vm_offset_t)-1;
572 len += va & PAGE_MASK_4M;
575 if (dtlb_va_to_pa_sun4u(va) == (vm_offset_t)-1 ||
576 itlb_va_to_pa_sun4u(va) == (vm_offset_t)-1) {
577 /* Allocate a physical page, claim the virtual area. */
578 if (pa == (vm_offset_t)-1) {
579 pa = alloc_phys(PAGE_SIZE_4M, PAGE_SIZE_4M);
580 if (pa == (vm_offset_t)-1)
581 panic("%s: out of memory", __func__);
582 mva = claim_virt(va, PAGE_SIZE_4M, 0);
584 panic("%s: can't claim virtual page "
585 "(wanted %#lx, got %#lx)",
588 * The mappings may have changed, be paranoid.
593 * Actually, we can only allocate two pages less at
594 * most (depending on the kernel TSB size).
596 if (dtlb_slot >= dtlb_slot_max)
597 panic("%s: out of dtlb_slots", __func__);
598 if (itlb_slot >= itlb_slot_max)
599 panic("%s: out of itlb_slots", __func__);
600 data = TD_V | TD_4M | TD_PA(pa) | TD_L | TD_CP |
602 dtlb_store[dtlb_slot].te_pa = pa;
603 dtlb_store[dtlb_slot].te_va = va;
604 itlb_store[itlb_slot].te_pa = pa;
605 itlb_store[itlb_slot].te_va = va;
608 dtlb_enter_sun4u(va, data);
609 itlb_enter_sun4u(va, data);
610 pa = (vm_offset_t)-1;
612 len -= len > PAGE_SIZE_4M ? PAGE_SIZE_4M : len;
615 if (pa != (vm_offset_t)-1)
616 release_phys(pa, PAGE_SIZE_4M);
621 mmu_mapin_sun4v(vm_offset_t va, vm_size_t len)
625 if (va + len > curkva)
628 pa = (vm_offset_t)-1;
629 len += va & PAGE_MASK_4M;
632 if ((va >> 22) > SUN4V_TLB_SLOT_MAX)
633 panic("%s: trying to map more than 4GB", __func__);
634 if (tlb_store[va >> 22].te_pa == -1) {
635 /* Allocate a physical page, claim the virtual area */
636 if (pa == (vm_offset_t)-1) {
637 pa = alloc_phys(PAGE_SIZE_4M, PAGE_SIZE_4M);
638 if (pa == (vm_offset_t)-1)
639 panic("%s: out of memory", __func__);
640 mva = claim_virt(va, PAGE_SIZE_4M, 0);
642 panic("%s: can't claim virtual page "
643 "(wanted %#lx, got %#lx)",
647 tlb_store[va >> 22].te_pa = pa;
648 if (map_phys(-1, PAGE_SIZE_4M, va, pa) == -1)
649 printf("%s: can't map physical page\n",
651 pa = (vm_offset_t)-1;
653 len -= len > PAGE_SIZE_4M ? PAGE_SIZE_4M : len;
656 if (pa != (vm_offset_t)-1)
657 release_phys(pa, PAGE_SIZE_4M);
665 /* There is no need for continuous physical heap memory. */
666 heapva = (vm_offset_t)OF_claim((void *)HEAPVA, HEAPSZ, 32);
678 cpu_impl = VER_IMPL(rdpr(ver));
679 bootcpu = UPA_CR_GET_MID(ldxa(0, ASI_UPA_CONFIG_REG));
680 for (child = OF_child(root); child != 0; child = OF_peer(child)) {
681 if (OF_getprop(child, "device_type", buf, sizeof(buf)) <= 0)
683 if (strcmp(buf, "cpu") != 0)
685 if (OF_getprop(child, cpu_impl < CPU_IMPL_ULTRASPARCIII ?
686 "upa-portid" : "portid", &cpu, sizeof(cpu)) <= 0)
692 panic("%s: no node for bootcpu?!?!", __func__);
694 if (OF_getprop(child, "#dtlb-entries", &dtlb_slot_max,
695 sizeof(dtlb_slot_max)) == -1 ||
696 OF_getprop(child, "#itlb-entries", &itlb_slot_max,
697 sizeof(itlb_slot_max)) == -1)
698 panic("%s: can't get TLB slot max.", __func__);
700 if (cpu_impl == CPU_IMPL_ULTRASPARCIIIp) {
702 printf("pre fixup:\n");
703 pmap_print_tlb_sun4u();
707 * Relocate the locked entry in it16 slot 0 (if existent)
708 * as part of working around Cheetah+ erratum 34.
710 itlb_relocate_locked0_sun4u();
713 printf("post fixup:\n");
714 pmap_print_tlb_sun4u();
718 dtlb_store = malloc(dtlb_slot_max * sizeof(*dtlb_store));
719 itlb_store = malloc(itlb_slot_max * sizeof(*itlb_store));
720 if (dtlb_store == NULL || itlb_store == NULL)
721 panic("%s: can't allocate TLB store", __func__);
728 tlb_store = malloc(SUN4V_TLB_SLOT_MAX * sizeof(*tlb_store));
729 memset(tlb_store, 0xFF, SUN4V_TLB_SLOT_MAX * sizeof(*tlb_store));
733 main(int (*openfirm)(void *))
740 * Tell the Open Firmware functions where they find the OFW gate.
744 archsw.arch_getdev = ofw_getdev;
745 archsw.arch_copyin = sparc64_copyin;
746 archsw.arch_copyout = ofw_copyout;
747 archsw.arch_readin = sparc64_readin;
748 archsw.arch_autoload = sparc64_autoload;
749 archsw.arch_maphint = sparc64_maphint;
752 setheap((void *)heapva, (void *)(heapva + HEAPSZ));
755 * Probe for a console.
759 if ((root = OF_peer(0)) == -1)
760 panic("%s: can't get root phandle", __func__);
761 OF_getprop(root, "compatible", compatible, sizeof(compatible));
762 if (!strcmp(compatible, "sun4v")) {
763 printf("\nBooting with sun4v support.\n");
764 mmu_ops = &mmu_ops_sun4v;
767 printf("\nBooting with sun4u support.\n");
768 mmu_ops = &mmu_ops_sun4u;
774 * Initialize devices.
776 for (dp = devsw; *dp != 0; dp++) {
777 if ((*dp)->dv_init != 0)
782 * Set up the current device.
784 OF_getprop(chosen, "bootpath", bootpath, sizeof(bootpath));
787 * Sun compatible bootable CD-ROMs have a disk label placed
788 * before the cd9660 data, with the actual filesystem being
789 * in the first partition, while the other partitions contain
790 * pseudo disk labels with embedded boot blocks for different
791 * architectures, which may be followed by UFS filesystems.
792 * The firmware will set the boot path to the partition it
793 * boots from ('f' in the sun4u case), but we want the kernel
794 * to be loaded from the cd9660 fs ('a'), so the boot path
795 * needs to be altered.
797 if (bootpath[strlen(bootpath) - 2] == ':' &&
798 bootpath[strlen(bootpath) - 1] == 'f') {
799 bootpath[strlen(bootpath) - 1] = 'a';
800 printf("Boot path set to %s\n", bootpath);
803 env_setenv("currdev", EV_VOLATILE, bootpath,
804 ofw_setcurrdev, env_nounset);
805 env_setenv("loaddev", EV_VOLATILE, bootpath,
806 env_noset, env_nounset);
809 printf("%s, Revision %s\n", bootprog_name, bootprog_rev);
810 printf("(%s, %s)\n", bootprog_maker, bootprog_date);
811 printf("bootpath=\"%s\"\n", bootpath);
813 /* Give control to the machine independent loader code. */
818 COMMAND_SET(reboot, "reboot", "reboot the system", command_reboot);
821 command_reboot(int argc, char *argv[])
825 for (i = 0; devsw[i] != NULL; ++i)
826 if (devsw[i]->dv_cleanup != NULL)
827 (devsw[i]->dv_cleanup)();
829 printf("Rebooting...\n");
833 /* provide this for panic, as it's not in the startup code */
842 static const char *const page_sizes[] = {
843 " 8k", " 64k", "512k", " 4m"
847 pmap_print_tte_sun4u(tte_t tag, tte_t tte)
851 page_sizes[(tte >> TD_SIZE_SHIFT) & TD_SIZE_MASK],
852 tag & TD_G ? "G" : " ");
853 printf(tte & TD_W ? "W " : " ");
854 printf(tte & TD_P ? "\e[33mP\e[0m " : " ");
855 printf(tte & TD_E ? "E " : " ");
856 printf(tte & TD_CV ? "CV " : " ");
857 printf(tte & TD_CP ? "CP " : " ");
858 printf(tte & TD_L ? "\e[32mL\e[0m " : " ");
859 printf(tte & TD_IE ? "IE " : " ");
860 printf(tte & TD_NFO ? "NFO " : " ");
861 printf("pa=0x%lx va=0x%lx ctx=%ld\n",
862 TD_PA(tte), TLB_TAR_VA(tag), TLB_TAR_CTX(tag));
866 pmap_print_tlb_sun4u(void)
872 pstate = rdpr(pstate);
873 for (i = 0; i < itlb_slot_max; i++) {
874 wrpr(pstate, pstate & ~PSTATE_IE, 0);
875 tte = itlb_get_data_sun4u(i);
876 wrpr(pstate, pstate, 0);
879 tag = ldxa(TLB_DAR_SLOT(i), ASI_ITLB_TAG_READ_REG);
880 printf("iTLB-%2u: ", i);
881 pmap_print_tte_sun4u(tag, tte);
883 for (i = 0; i < dtlb_slot_max; i++) {
884 wrpr(pstate, pstate & ~PSTATE_IE, 0);
885 tte = dtlb_get_data_sun4u(i);
886 wrpr(pstate, pstate, 0);
889 tag = ldxa(TLB_DAR_SLOT(i), ASI_DTLB_TAG_READ_REG);
890 printf("dTLB-%2u: ", i);
891 pmap_print_tte_sun4u(tag, tte);