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43 #ifndef __CVMX_LOG_H__
44 #define __CVMX_LOG_H__
49 * cvmx-log supplies a fast log buffer implementation. Each core writes
50 * log data to a differnet buffer to avoid synchronization overhead. Function
51 * call logging can be turned on with the GCC option "-pg".
53 * <hr>$Revision: 41586 $<hr>
61 * Enumeration of all supported performance counter types
65 CVMX_LOG_PERF_CNT_NONE = 0, /**< Turn off the performance counter */
66 CVMX_LOG_PERF_CNT_CLK = 1, /**< Conditionally clocked cycles (as opposed to count/cvm_count which count even with no clocks) */
67 CVMX_LOG_PERF_CNT_ISSUE = 2, /**< Instructions issued but not retired */
68 CVMX_LOG_PERF_CNT_RET = 3, /**< Instructions retired */
69 CVMX_LOG_PERF_CNT_NISSUE = 4, /**< Cycles no issue */
70 CVMX_LOG_PERF_CNT_SISSUE = 5, /**< Cycles single issue */
71 CVMX_LOG_PERF_CNT_DISSUE = 6, /**< Cycles dual issue */
72 CVMX_LOG_PERF_CNT_IFI = 7, /**< Cycle ifetch issued (but not necessarily commit to pp_mem) */
73 CVMX_LOG_PERF_CNT_BR = 8, /**< Branches retired */
74 CVMX_LOG_PERF_CNT_BRMIS = 9, /**< Branch mispredicts */
75 CVMX_LOG_PERF_CNT_J = 10, /**< Jumps retired */
76 CVMX_LOG_PERF_CNT_JMIS = 11, /**< Jumps mispredicted */
77 CVMX_LOG_PERF_CNT_REPLAY = 12, /**< Mem Replays */
78 CVMX_LOG_PERF_CNT_IUNA = 13, /**< Cycles idle due to unaligned_replays */
79 CVMX_LOG_PERF_CNT_TRAP = 14, /**< trap_6a signal */
80 CVMX_LOG_PERF_CNT_UULOAD = 16, /**< Unexpected unaligned loads (REPUN=1) */
81 CVMX_LOG_PERF_CNT_UUSTORE = 17, /**< Unexpected unaligned store (REPUN=1) */
82 CVMX_LOG_PERF_CNT_ULOAD = 18, /**< Unaligned loads (REPUN=1 or USEUN=1) */
83 CVMX_LOG_PERF_CNT_USTORE = 19, /**< Unaligned store (REPUN=1 or USEUN=1) */
84 CVMX_LOG_PERF_CNT_EC = 20, /**< Exec clocks(must set CvmCtl[DISCE] for accurate timing) */
85 CVMX_LOG_PERF_CNT_MC = 21, /**< Mul clocks(must set CvmCtl[DISCE] for accurate timing) */
86 CVMX_LOG_PERF_CNT_CC = 22, /**< Crypto clocks(must set CvmCtl[DISCE] for accurate timing) */
87 CVMX_LOG_PERF_CNT_CSRC = 23, /**< Issue_csr clocks(must set CvmCtl[DISCE] for accurate timing) */
88 CVMX_LOG_PERF_CNT_CFETCH = 24, /**< Icache committed fetches (demand+prefetch) */
89 CVMX_LOG_PERF_CNT_CPREF = 25, /**< Icache committed prefetches */
90 CVMX_LOG_PERF_CNT_ICA = 26, /**< Icache aliases */
91 CVMX_LOG_PERF_CNT_II = 27, /**< Icache invalidates */
92 CVMX_LOG_PERF_CNT_IP = 28, /**< Icache parity error */
93 CVMX_LOG_PERF_CNT_CIMISS = 29, /**< Cycles idle due to imiss (must set CvmCtl[DISCE] for accurate timing) */
94 CVMX_LOG_PERF_CNT_WBUF = 32, /**< Number of write buffer entries created */
95 CVMX_LOG_PERF_CNT_WDAT = 33, /**< Number of write buffer data cycles used (may need to set CvmCtl[DISCE] for accurate counts) */
96 CVMX_LOG_PERF_CNT_WBUFLD = 34, /**< Number of write buffer entries forced out by loads */
97 CVMX_LOG_PERF_CNT_WBUFFL = 35, /**< Number of cycles that there was no available write buffer entry (may need to set CvmCtl[DISCE] and CvmMemCtl[MCLK] for accurate counts) */
98 CVMX_LOG_PERF_CNT_WBUFTR = 36, /**< Number of stores that found no available write buffer entries */
99 CVMX_LOG_PERF_CNT_BADD = 37, /**< Number of address bus cycles used (may need to set CvmCtl[DISCE] for accurate counts) */
100 CVMX_LOG_PERF_CNT_BADDL2 = 38, /**< Number of address bus cycles not reflected (i.e. destined for L2) (may need to set CvmCtl[DISCE] for accurate counts) */
101 CVMX_LOG_PERF_CNT_BFILL = 39, /**< Number of fill bus cycles used (may need to set CvmCtl[DISCE] for accurate counts) */
102 CVMX_LOG_PERF_CNT_DDIDS = 40, /**< Number of Dstream DIDs created */
103 CVMX_LOG_PERF_CNT_IDIDS = 41, /**< Number of Istream DIDs created */
104 CVMX_LOG_PERF_CNT_DIDNA = 42, /**< Number of cycles that no DIDs were available (may need to set CvmCtl[DISCE] and CvmMemCtl[MCLK] for accurate counts) */
105 CVMX_LOG_PERF_CNT_LDS = 43, /**< Number of load issues */
106 CVMX_LOG_PERF_CNT_LMLDS = 44, /**< Number of local memory load */
107 CVMX_LOG_PERF_CNT_IOLDS = 45, /**< Number of I/O load issues */
108 CVMX_LOG_PERF_CNT_DMLDS = 46, /**< Number of loads that were not prefetches and missed in the cache */
109 CVMX_LOG_PERF_CNT_STS = 48, /**< Number of store issues */
110 CVMX_LOG_PERF_CNT_LMSTS = 49, /**< Number of local memory store issues */
111 CVMX_LOG_PERF_CNT_IOSTS = 50, /**< Number of I/O store issues */
112 CVMX_LOG_PERF_CNT_IOBDMA = 51, /**< Number of IOBDMAs */
113 CVMX_LOG_PERF_CNT_DTLB = 53, /**< Number of dstream TLB refill, invalid, or modified exceptions */
114 CVMX_LOG_PERF_CNT_DTLBAD = 54, /**< Number of dstream TLB address errors */
115 CVMX_LOG_PERF_CNT_ITLB = 55, /**< Number of istream TLB refill, invalid, or address error exceptions */
116 CVMX_LOG_PERF_CNT_SYNC = 56, /**< Number of SYNC stall cycles (may need to set CvmCtl[DISCE] for accurate counts) */
117 CVMX_LOG_PERF_CNT_SYNCIOB = 57, /**< Number of SYNCIOBDMA stall cycles (may need to set CvmCtl[DISCE] for accurate counts) */
118 CVMX_LOG_PERF_CNT_SYNCW = 58, /**< Number of SYNCWs */
119 } cvmx_log_perf_event_t;
122 * Structure of the performance counter control register
131 uint32_t reserved: 19;
132 cvmx_log_perf_event_t event : 6;
139 } cvmx_log_perf_control_t;
142 * Add CVMX_LOG_DISABLE_PC_LOGGING as an attribute to and function prototype
143 * that you don't want logged when the gcc option "-pg" is supplied. We
144 * use it on the cvmx-log functions since it is pointless to log the
145 * calling of a function than in itself writes to the log.
147 #define CVMX_LOG_DISABLE_PC_LOGGING __attribute__((no_instrument_function))
150 * Log a constant printf style format string with 0 to 4
151 * arguments. The string must persist until the log is read,
152 * but the parameters are copied into the log.
154 * @param format Constant printf style format string.
155 * @param numberx 64bit argument to the printf format string
157 void cvmx_log_printf0(const char *format) CVMX_LOG_DISABLE_PC_LOGGING;
158 void cvmx_log_printf1(const char *format, uint64_t number1) CVMX_LOG_DISABLE_PC_LOGGING;
159 void cvmx_log_printf2(const char *format, uint64_t number1, uint64_t number2) CVMX_LOG_DISABLE_PC_LOGGING;
160 void cvmx_log_printf3(const char *format, uint64_t number1, uint64_t number2, uint64_t number3) CVMX_LOG_DISABLE_PC_LOGGING;
161 void cvmx_log_printf4(const char *format, uint64_t number1, uint64_t number2, uint64_t number3, uint64_t number4) CVMX_LOG_DISABLE_PC_LOGGING;
164 * Log an arbitrary block of 64bit words. At most 255 64bit
165 * words can be logged. The words are copied into the log.
167 * @param size_in_dwords
168 * Number of 64bit dwords to copy into the log.
169 * @param data Array of 64bit dwords to copy
171 void cvmx_log_data(uint64_t size_in_dwords, const uint64_t *data) CVMX_LOG_DISABLE_PC_LOGGING;
174 * Log a structured data object. Post processing will use the
175 * debugging information in the ELF file to determine how to
176 * display the structure. Max of 2032 bytes.
179 * cvmx_log_structure("cvmx_wqe_t", work, sizeof(*work));
181 * @param type C typedef expressed as a string. This will be used to
182 * lookup the structure in the debugging infirmation.
183 * @param data Data to be written to the log.
184 * @param size_in_bytes
185 * Size if the data in bytes. Normally you'll use the
186 * sizeof() operator here.
188 void cvmx_log_structure(const char *type, void *data, int size_in_bytes) CVMX_LOG_DISABLE_PC_LOGGING;
191 * Setup the mips performance counters
193 * @param counter1 Event type for counter 1
194 * @param counter2 Event type for counter 2
196 void cvmx_log_perf_setup(cvmx_log_perf_event_t counter1, cvmx_log_perf_event_t counter2);
199 * Log the performance counters
201 void cvmx_log_perf(void) CVMX_LOG_DISABLE_PC_LOGGING;
204 * Display the current log in a human readable format.
206 void cvmx_log_display(void);