2 * Copyright (c) 1998 - 2008 Søren Schmidt <sos@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
32 #include <sys/module.h>
33 #include <sys/systm.h>
34 #include <sys/kernel.h>
37 #include <sys/endian.h>
38 #include <sys/malloc.h>
40 #include <sys/mutex.h>
42 #include <sys/taskqueue.h>
44 #include <machine/stdarg.h>
45 #include <machine/resource.h>
46 #include <machine/bus.h>
48 #include <dev/pci/pcivar.h>
49 #include <dev/pci/pcireg.h>
50 #include <dev/ata/ata-all.h>
51 #include <dev/ata/ata-pci.h>
54 struct ata_serialize {
55 struct mtx locked_mtx;
60 /* local prototypes */
61 static int ata_acard_chipinit(device_t dev);
62 static int ata_acard_ch_attach(device_t dev);
63 static int ata_acard_status(device_t dev);
64 static void ata_acard_850_setmode(device_t dev, int mode);
65 static void ata_acard_86X_setmode(device_t dev, int mode);
66 static int ata_serialize(device_t dev, int flags);
67 static void ata_serialize_init(struct ata_serialize *serial);
74 * Acard chipset support functions
77 ata_acard_probe(device_t dev)
79 struct ata_pci_controller *ctlr = device_get_softc(dev);
80 static struct ata_chip_id ids[] =
81 {{ ATA_ATP850R, 0, ATP_OLD, 0x00, ATA_UDMA2, "ATP850" },
82 { ATA_ATP860A, 0, 0, 0x00, ATA_UDMA4, "ATP860A" },
83 { ATA_ATP860R, 0, 0, 0x00, ATA_UDMA4, "ATP860R" },
84 { ATA_ATP865A, 0, 0, 0x00, ATA_UDMA6, "ATP865A" },
85 { ATA_ATP865R, 0, 0, 0x00, ATA_UDMA6, "ATP865R" },
88 if (pci_get_vendor(dev) != ATA_ACARD_ID)
91 if (!(ctlr->chip = ata_match_chip(dev, ids)))
95 ctlr->chipinit = ata_acard_chipinit;
96 return (BUS_PROBE_DEFAULT);
100 ata_acard_chipinit(device_t dev)
102 struct ata_pci_controller *ctlr = device_get_softc(dev);
103 struct ata_serialize *serial;
105 if (ata_setup_interrupt(dev, ata_generic_intr))
108 ctlr->ch_attach = ata_acard_ch_attach;
109 ctlr->ch_detach = ata_pci_ch_detach;
110 if (ctlr->chip->cfg1 == ATP_OLD) {
111 ctlr->setmode = ata_acard_850_setmode;
112 ctlr->locking = ata_serialize;
113 serial = malloc(sizeof(struct ata_serialize),
114 M_TEMP, M_WAITOK | M_ZERO);
115 ata_serialize_init(serial);
116 ctlr->chipset_data = serial;
119 ctlr->setmode = ata_acard_86X_setmode;
124 ata_acard_ch_attach(device_t dev)
126 struct ata_channel *ch = device_get_softc(dev);
128 /* setup the usual register normal pci style */
129 if (ata_pci_ch_attach(dev))
132 ch->hw.status = ata_acard_status;
137 ata_acard_status(device_t dev)
139 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
140 struct ata_channel *ch = device_get_softc(dev);
142 if (ctlr->chip->cfg1 == ATP_OLD &&
143 ATA_LOCKING(dev, ATA_LF_WHICH) != ch->unit)
145 if (ch->dma.flags & ATA_DMA_ACTIVE) {
146 int bmstat = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
148 if ((bmstat & (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) !=
149 ATA_BMSTAT_INTERRUPT)
151 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, bmstat & ~ATA_BMSTAT_ERROR);
153 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
154 ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
157 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) {
159 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY)
166 ata_acard_850_setmode(device_t dev, int mode)
168 device_t gparent = GRANDPARENT(dev);
169 struct ata_pci_controller *ctlr = device_get_softc(gparent);
170 struct ata_channel *ch = device_get_softc(device_get_parent(dev));
171 struct ata_device *atadev = device_get_softc(dev);
172 int devno = (ch->unit << 1) + atadev->unit;
175 mode = ata_limit_mode(dev, mode,
176 ata_atapi(dev) ? ATA_PIO_MAX : ctlr->chip->max_dma);
178 /* XXX SOS missing WDMA0+1 + PIO modes */
179 if (mode >= ATA_WDMA2) {
180 error = ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode);
182 device_printf(dev, "%ssetting %s on %s chip\n",
183 (error) ? "FAILURE " : "",
184 ata_mode2str(mode), ctlr->chip->text);
186 u_int8_t reg54 = pci_read_config(gparent, 0x54, 1);
188 reg54 &= ~(0x03 << (devno << 1));
189 if (mode >= ATA_UDMA0)
190 reg54 |= (((mode & ATA_MODE_MASK) + 1) << (devno << 1));
191 pci_write_config(gparent, 0x54, reg54, 1);
192 pci_write_config(gparent, 0x4a, 0xa6, 1);
193 pci_write_config(gparent, 0x40 + (devno << 1), 0x0301, 2);
198 /* we could set PIO mode timings, but we assume the BIOS did that */
202 ata_acard_86X_setmode(device_t dev, int mode)
204 device_t gparent = GRANDPARENT(dev);
205 struct ata_pci_controller *ctlr = device_get_softc(gparent);
206 struct ata_channel *ch = device_get_softc(device_get_parent(dev));
207 struct ata_device *atadev = device_get_softc(dev);
208 int devno = (ch->unit << 1) + atadev->unit;
212 mode = ata_limit_mode(dev, mode,
213 ata_atapi(dev) ? ATA_PIO_MAX : ctlr->chip->max_dma);
215 mode = ata_check_80pin(dev, mode);
217 /* XXX SOS missing WDMA0+1 + PIO modes */
218 if (mode >= ATA_WDMA2) {
219 error = ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode);
221 device_printf(dev, "%ssetting %s on %s chip\n",
222 (error) ? "FAILURE " : "",
223 ata_mode2str(mode), ctlr->chip->text);
225 u_int16_t reg44 = pci_read_config(gparent, 0x44, 2);
227 reg44 &= ~(0x000f << (devno << 2));
228 if (mode >= ATA_UDMA0)
229 reg44 |= (((mode & ATA_MODE_MASK) + 1) << (devno << 2));
230 pci_write_config(gparent, 0x44, reg44, 2);
231 pci_write_config(gparent, 0x4a, 0xa6, 1);
232 pci_write_config(gparent, 0x40 + devno, 0x31, 1);
237 /* we could set PIO mode timings, but we assume the BIOS did that */
241 ata_serialize_init(struct ata_serialize *serial)
244 mtx_init(&serial->locked_mtx, "ATA serialize lock", NULL, MTX_DEF);
245 serial->locked_ch = -1;
246 serial->restart_ch = -1;
250 ata_serialize(device_t dev, int flags)
252 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
253 struct ata_channel *ch = device_get_softc(dev);
254 struct ata_serialize *serial;
257 serial = ctlr->chipset_data;
259 mtx_lock(&serial->locked_mtx);
262 if (serial->locked_ch == -1)
263 serial->locked_ch = ch->unit;
264 if (serial->locked_ch != ch->unit)
265 serial->restart_ch = ch->unit;
269 if (serial->locked_ch == ch->unit) {
270 serial->locked_ch = -1;
271 if (serial->restart_ch != -1) {
272 if ((ch = ctlr->interrupt[serial->restart_ch].argument)) {
273 serial->restart_ch = -1;
274 mtx_unlock(&serial->locked_mtx);
285 res = serial->locked_ch;
286 mtx_unlock(&serial->locked_mtx);
290 ATA_DECLARE_DRIVER(ata_acard);