2 * Copyright (c) 2004 Scott Long
3 * Copyright (c) 2005, 2008 Marius Strobl <marius@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 /* $NetBSD: ncr53c9x.c,v 1.125 2007/01/09 12:53:12 itohy Exp $ */
32 * Copyright (c) 1998, 2002 The NetBSD Foundation, Inc.
33 * All rights reserved.
35 * This code is derived from software contributed to The NetBSD Foundation
36 * by Charles M. Hannum.
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
41 * 1. Redistributions of source code must retain the above copyright
42 * notice, this list of conditions and the following disclaimer.
43 * 2. Redistributions in binary form must reproduce the above copyright
44 * notice, this list of conditions and the following disclaimer in the
45 * documentation and/or other materials provided with the distribution.
46 * 3. All advertising materials mentioning features or use of this software
47 * must display the following acknowledgement:
48 * This product includes software developed by the NetBSD
49 * Foundation, Inc. and its contributors.
50 * 4. Neither the name of The NetBSD Foundation nor the names of its
51 * contributors may be used to endorse or promote products derived
52 * from this software without specific prior written permission.
54 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
55 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
56 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
57 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
58 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
59 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
60 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
61 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
62 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
63 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
64 * POSSIBILITY OF SUCH DAMAGE.
68 * Copyright (c) 1994 Peter Galbavy
69 * Copyright (c) 1995 Paul Kranenburg
70 * All rights reserved.
72 * Redistribution and use in source and binary forms, with or without
73 * modification, are permitted provided that the following conditions
75 * 1. Redistributions of source code must retain the above copyright
76 * notice, this list of conditions and the following disclaimer.
77 * 2. Redistributions in binary form must reproduce the above copyright
78 * notice, this list of conditions and the following disclaimer in the
79 * documentation and/or other materials provided with the distribution.
80 * 3. All advertising materials mentioning features or use of this software
81 * must display the following acknowledgement:
82 * This product includes software developed by Peter Galbavy
83 * 4. The name of the author may not be used to endorse or promote products
84 * derived from this software without specific prior written permission.
86 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
87 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
88 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
89 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
90 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
91 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
92 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
93 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
94 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
95 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
96 * POSSIBILITY OF SUCH DAMAGE.
100 * Based on aic6360 by Jarle Greipsland
102 * Acknowledgements: Many of the algorithms used in this driver are
103 * inspired by the work of Julian Elischer (julian@FreeBSD.org) and
104 * Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million!
107 #include <sys/cdefs.h>
108 __FBSDID("$FreeBSD$");
110 #include <sys/param.h>
111 #include <sys/systm.h>
113 #include <sys/kernel.h>
114 #include <sys/malloc.h>
115 #include <sys/lock.h>
116 #include <sys/module.h>
117 #include <sys/mutex.h>
118 #include <sys/queue.h>
119 #include <sys/time.h>
120 #include <sys/callout.h>
123 #include <cam/cam_ccb.h>
124 #include <cam/cam_debug.h>
125 #include <cam/cam_sim.h>
126 #include <cam/cam_xpt_sim.h>
127 #include <cam/scsi/scsi_all.h>
128 #include <cam/scsi/scsi_message.h>
130 #include <dev/esp/ncr53c9xreg.h>
131 #include <dev/esp/ncr53c9xvar.h>
133 MODULE_DEPEND(esp, cam, 1, 1, 1);
135 #ifdef NCR53C9X_DEBUG
136 static int ncr53c9x_debug =
137 NCR_SHOWMISC /* | NCR_SHOWPHASE | NCR_SHOWTRAC | NCR_SHOWCMDS */;
140 static void ncr53c9x_abort(struct ncr53c9x_softc *sc,
141 struct ncr53c9x_ecb *ecb);
142 static void ncr53c9x_action(struct cam_sim *sim, union ccb *ccb);
143 static void ncr53c9x_async(void *cbarg, uint32_t code,
144 struct cam_path *path, void *arg);
145 static void ncr53c9x_callout(void *arg);
146 static void ncr53c9x_clear(struct ncr53c9x_softc *sc, cam_status result);
147 static void ncr53c9x_clear_target(struct ncr53c9x_softc *sc, int target,
149 static void ncr53c9x_dequeue(struct ncr53c9x_softc *sc,
150 struct ncr53c9x_ecb *ecb);
151 static void ncr53c9x_done(struct ncr53c9x_softc *sc,
152 struct ncr53c9x_ecb *ecb);
153 static void ncr53c9x_free_ecb(struct ncr53c9x_softc *sc,
154 struct ncr53c9x_ecb *ecb);
155 static void ncr53c9x_msgin(struct ncr53c9x_softc *sc);
156 static void ncr53c9x_msgout(struct ncr53c9x_softc *sc);
157 static void ncr53c9x_init(struct ncr53c9x_softc *sc, int doreset);
158 static void ncr53c9x_intr1(struct ncr53c9x_softc *sc);
159 static void ncr53c9x_poll(struct cam_sim *sim);
160 static int ncr53c9x_rdfifo(struct ncr53c9x_softc *sc, int how);
161 static int ncr53c9x_reselect(struct ncr53c9x_softc *sc, int message,
162 int tagtype, int tagid);
163 static void ncr53c9x_reset(struct ncr53c9x_softc *sc);
164 static void ncr53c9x_sense(struct ncr53c9x_softc *sc,
165 struct ncr53c9x_ecb *ecb);
166 static void ncr53c9x_sched(struct ncr53c9x_softc *sc);
167 static void ncr53c9x_select(struct ncr53c9x_softc *sc,
168 struct ncr53c9x_ecb *ecb);
169 static void ncr53c9x_watch(void *arg);
170 static void ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, u_char *p,
173 static struct ncr53c9x_ecb *ncr53c9x_get_ecb(struct ncr53c9x_softc *sc);
174 static struct ncr53c9x_linfo *ncr53c9x_lunsearch(struct ncr53c9x_tinfo *sc,
177 static inline void ncr53c9x_readregs(struct ncr53c9x_softc *sc);
178 static inline void ncr53c9x_setsync(struct ncr53c9x_softc *sc,
179 struct ncr53c9x_tinfo *ti);
180 static inline int ncr53c9x_stp2cpb(struct ncr53c9x_softc *sc,
183 #define NCR_RDFIFO_START 0
184 #define NCR_RDFIFO_CONTINUE 1
186 #define NCR_SET_COUNT(sc, size) do { \
187 NCR_WRITE_REG((sc), NCR_TCL, (size)); \
188 NCR_WRITE_REG((sc), NCR_TCM, (size) >> 8); \
189 if ((sc->sc_cfg2 & NCRCFG2_FE) || \
190 (sc->sc_rev == NCR_VARIANT_FAS366)) { \
191 NCR_WRITE_REG((sc), NCR_TCH, (size) >> 16); \
193 if (sc->sc_rev == NCR_VARIANT_FAS366) { \
194 NCR_WRITE_REG(sc, NCR_RCH, 0); \
200 (((ms) < 0x20000) ? \
201 ((ms +0u) / 1000u) * hz : \
202 ((ms +0u) * hz) /1000u)
206 * Names for the NCR53c9x variants, corresponding to the variant tags
209 static const char *ncr53c9x_variant_names[] = {
226 * Search linked list for LUN info by LUN id.
228 static struct ncr53c9x_linfo *
229 ncr53c9x_lunsearch(struct ncr53c9x_tinfo *ti, int64_t lun)
231 struct ncr53c9x_linfo *li;
233 LIST_FOREACH(li, &ti->luns, link)
240 * Attach this instance, and then all the sub-devices.
243 ncr53c9x_attach(struct ncr53c9x_softc *sc)
245 struct cam_devq *devq;
247 struct cam_path *path;
248 struct ncr53c9x_ecb *ecb;
251 if (NCR_LOCK_INITIALIZED(sc) == 0) {
252 device_printf(sc->sc_dev, "mutex not initialized\n");
256 callout_init_mtx(&sc->sc_watchdog, &sc->sc_lock, 0);
259 * Note, the front-end has set us up to print the chip variation.
261 if (sc->sc_rev >= NCR_VARIANT_MAX) {
262 device_printf(sc->sc_dev, "unknown variant %d, devices not "
263 "attached\n", sc->sc_rev);
267 device_printf(sc->sc_dev, "%s, %dMHz, SCSI ID %d\n",
268 ncr53c9x_variant_names[sc->sc_rev], sc->sc_freq, sc->sc_id);
270 sc->sc_ntarg = (sc->sc_rev == NCR_VARIANT_FAS366) ? 16 : 8;
273 * Allocate SCSI message buffers.
274 * Front-ends can override allocation to avoid alignment
275 * handling in the DMA engines. Note that ncr53c9x_msgout()
276 * can request a 1 byte DMA transfer.
278 if (sc->sc_omess == NULL) {
279 sc->sc_omess_self = 1;
280 sc->sc_omess = malloc(NCR_MAX_MSG_LEN, M_DEVBUF, M_NOWAIT);
281 if (sc->sc_omess == NULL) {
282 device_printf(sc->sc_dev,
283 "cannot allocate MSGOUT buffer\n");
287 sc->sc_omess_self = 0;
289 if (sc->sc_imess == NULL) {
290 sc->sc_imess_self = 1;
291 sc->sc_imess = malloc(NCR_MAX_MSG_LEN + 1, M_DEVBUF, M_NOWAIT);
292 if (sc->sc_imess == NULL) {
293 device_printf(sc->sc_dev,
294 "cannot allocate MSGIN buffer\n");
299 sc->sc_imess_self = 0;
301 sc->sc_tinfo = malloc(sc->sc_ntarg * sizeof(sc->sc_tinfo[0]),
302 M_DEVBUF, M_NOWAIT | M_ZERO);
303 if (sc->sc_tinfo == NULL) {
304 device_printf(sc->sc_dev,
305 "cannot allocate target info buffer\n");
311 * Treat NCR53C90 with the 86C01 DMA chip exactly as ESP100
314 if (sc->sc_rev == NCR_VARIANT_NCR53C90_86C01)
315 sc->sc_rev = NCR_VARIANT_ESP100;
317 sc->sc_ccf = FREQTOCCF(sc->sc_freq);
319 /* The value *must not* be == 1. Make it 2. */
324 * The recommended timeout is 250ms. This register is loaded
325 * with a value calculated as follows, from the docs:
327 * (timout period) x (CLK frequency)
328 * reg = -------------------------------------
329 * 8192 x (Clock Conversion Factor)
331 * Since CCF has a linear relation to CLK, this generally computes
332 * to the constant of 153.
334 sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf);
336 /* The CCF register only has 3 bits; 0 is actually 8. */
342 devq = cam_simq_alloc(sc->sc_ntarg);
344 device_printf(sc->sc_dev, "cannot allocate device queue\n");
349 sim = cam_sim_alloc(ncr53c9x_action, ncr53c9x_poll, "esp", sc,
350 device_get_unit(sc->sc_dev), &sc->sc_lock, 1, NCR_TAG_DEPTH, devq);
352 device_printf(sc->sc_dev, "cannot allocate SIM entry\n");
359 if (xpt_bus_register(sim, sc->sc_dev, 0) != CAM_SUCCESS) {
360 device_printf(sc->sc_dev, "cannot register bus\n");
365 if (xpt_create_path(&path, NULL, cam_sim_path(sim),
366 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
367 device_printf(sc->sc_dev, "cannot create path\n");
372 if (xpt_register_async(AC_LOST_DEVICE, ncr53c9x_async, sim, path) !=
374 device_printf(sc->sc_dev, "cannot register async handler\n");
382 /* Reset state and bus. */
384 sc->sc_cfflags = sc->sc_dev.dv_cfdata->cf_flags;
389 ncr53c9x_init(sc, 1);
391 TAILQ_INIT(&sc->free_list);
393 malloc(sizeof(struct ncr53c9x_ecb) * NCR_TAG_DEPTH, M_DEVBUF,
394 M_NOWAIT | M_ZERO)) == NULL) {
395 device_printf(sc->sc_dev, "cannot allocate ECB array\n");
399 for (i = 0; i < NCR_TAG_DEPTH; i++) {
400 ecb = &sc->ecb_array[i];
403 TAILQ_INSERT_HEAD(&sc->free_list, ecb, free_links);
406 callout_reset(&sc->sc_watchdog, 60 * hz, ncr53c9x_watch, sc);
413 xpt_register_async(0, ncr53c9x_async, sim, path);
417 xpt_bus_deregister(cam_sim_path(sim));
420 cam_sim_free(sim, TRUE);
424 free(sc->sc_tinfo, M_DEVBUF);
426 if (sc->sc_imess_self)
427 free(sc->sc_imess, M_DEVBUF);
429 if (sc->sc_omess_self)
430 free(sc->sc_omess, M_DEVBUF);
435 ncr53c9x_detach(struct ncr53c9x_softc *sc)
437 struct ncr53c9x_linfo *li, *nextli;
440 callout_drain(&sc->sc_watchdog);
445 /* Cancel all commands. */
446 ncr53c9x_clear(sc, CAM_REQ_ABORTED);
448 /* Free logical units. */
449 for (t = 0; t < sc->sc_ntarg; t++) {
450 for (li = LIST_FIRST(&sc->sc_tinfo[t].luns); li;
452 nextli = LIST_NEXT(li, link);
458 xpt_register_async(0, ncr53c9x_async, sc->sc_sim, sc->sc_path);
459 xpt_free_path(sc->sc_path);
460 xpt_bus_deregister(cam_sim_path(sc->sc_sim));
464 cam_sim_free(sc->sc_sim, TRUE);
465 free(sc->ecb_array, M_DEVBUF);
466 free(sc->sc_tinfo, M_DEVBUF);
467 if (sc->sc_imess_self)
468 free(sc->sc_imess, M_DEVBUF);
469 if (sc->sc_omess_self)
470 free(sc->sc_omess, M_DEVBUF);
476 * This is the generic ncr53c9x reset function. It does not reset the SCSI
477 * bus, only this controller, but kills any on-going commands, and also stops
478 * and resets the DMA.
480 * After reset, registers are loaded with the defaults from the attach
484 ncr53c9x_reset(struct ncr53c9x_softc *sc)
487 NCR_LOCK_ASSERT(sc, MA_OWNED);
489 /* Reset DMA first. */
492 /* Reset SCSI chip. */
493 NCRCMD(sc, NCRCMD_RSTCHIP);
494 NCRCMD(sc, NCRCMD_NOP);
497 /* Do these backwards, and fall through. */
498 switch (sc->sc_rev) {
499 case NCR_VARIANT_ESP406:
500 case NCR_VARIANT_FAS408:
501 NCR_WRITE_REG(sc, NCR_CFG5, sc->sc_cfg5 | NCRCFG5_SINT);
502 NCR_WRITE_REG(sc, NCR_CFG4, sc->sc_cfg4);
504 case NCR_VARIANT_AM53C974:
505 case NCR_VARIANT_FAS100A:
506 case NCR_VARIANT_FAS216:
507 case NCR_VARIANT_FAS236:
508 case NCR_VARIANT_NCR53C94:
509 case NCR_VARIANT_NCR53C96:
510 case NCR_VARIANT_ESP200:
511 sc->sc_features |= NCR_F_HASCFG3;
512 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
514 case NCR_VARIANT_ESP100A:
515 sc->sc_features |= NCR_F_SELATN3;
516 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
518 case NCR_VARIANT_ESP100:
519 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
520 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
521 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
522 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
525 case NCR_VARIANT_FAS366:
527 NCR_F_HASCFG3 | NCR_F_FASTSCSI | NCR_F_SELATN3;
528 sc->sc_cfg3 = NCRFASCFG3_FASTCLK | NCRFASCFG3_OBAUTO;
530 sc->sc_cfg3 |= NCRFASCFG3_IDBIT3;
531 sc->sc_cfg3_fscsi = NCRFASCFG3_FASTSCSI;
532 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
533 sc->sc_cfg2 = NCRCFG2_HMEFE | NCRCFG2_HME32;
534 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
535 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
536 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
537 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
538 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
542 device_printf(sc->sc_dev,
543 "unknown revision code, assuming ESP100\n");
544 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
545 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
546 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
547 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
550 if (sc->sc_rev == NCR_VARIANT_AM53C974)
551 NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4);
554 device_printf(sc->sc_dev, "ncr53c9x_reset: revision %d\n",
556 device_printf(sc->sc_dev, "ncr53c9x_reset: cfg1 0x%x, cfg2 0x%x, "
557 "cfg3 0x%x, ccf 0x%x, timeout 0x%x\n",
558 sc->sc_cfg1, sc->sc_cfg2, sc->sc_cfg3, sc->sc_ccf, sc->sc_timeout);
563 * Clear all commands.
566 ncr53c9x_clear(struct ncr53c9x_softc *sc, cam_status result)
568 struct ncr53c9x_ecb *ecb;
571 NCR_LOCK_ASSERT(sc, MA_OWNED);
573 /* Cancel any active commands. */
574 sc->sc_state = NCR_CLEANING;
576 if ((ecb = sc->sc_nexus) != NULL) {
577 ecb->ccb->ccb_h.status = result;
578 ncr53c9x_done(sc, ecb);
580 /* Cancel outstanding disconnected commands. */
581 for (r = 0; r < sc->sc_ntarg; r++)
582 ncr53c9x_clear_target(sc, r, result);
586 * Clear all commands for a specific target.
589 ncr53c9x_clear_target(struct ncr53c9x_softc *sc, int target,
592 struct ncr53c9x_ecb *ecb;
593 struct ncr53c9x_linfo *li;
596 NCR_LOCK_ASSERT(sc, MA_OWNED);
598 /* Cancel outstanding disconnected commands on each LUN. */
599 LIST_FOREACH(li, &sc->sc_tinfo[target].luns, link) {
600 if ((ecb = li->untagged) != NULL) {
603 * XXX should we terminate a command
604 * that never reached the disk?
607 ecb->ccb->ccb_h.status = result;
608 ncr53c9x_done(sc, ecb);
610 for (i = 0; i < NCR_TAG_DEPTH; i++)
611 if ((ecb = li->queued[i])) {
612 li->queued[i] = NULL;
613 ecb->ccb->ccb_h.status = result;
614 ncr53c9x_done(sc, ecb);
621 * Initialize ncr53c9x state machine.
624 ncr53c9x_init(struct ncr53c9x_softc *sc, int doreset)
626 struct ncr53c9x_tinfo *ti;
629 NCR_LOCK_ASSERT(sc, MA_OWNED);
631 NCR_MISC(("[NCR_INIT(%d) %d] ", doreset, sc->sc_state));
633 if (sc->sc_state == 0) {
634 /* First time through; initialize. */
636 TAILQ_INIT(&sc->ready_list);
638 memset(sc->sc_tinfo, 0, sizeof(sc->sc_tinfo));
639 for (r = 0; r < sc->sc_ntarg; r++) {
640 LIST_INIT(&sc->sc_tinfo[r].luns);
643 ncr53c9x_clear(sc, CAM_CMD_TIMEOUT);
646 * Reset the chip to a known state.
651 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0;
652 sc->sc_phase = sc->sc_prevphase = INVALID_PHASE;
655 * If we're the first time through, set the default parameters
656 * for all targets. Otherwise we only clear their current transfer
657 * settings so we'll renegotiate their goal settings with the next
660 if (sc->sc_state == 0) {
661 for (r = 0; r < sc->sc_ntarg; r++) {
662 ti = &sc->sc_tinfo[r];
663 /* XXX - config flags per target: low bits: no reselect; high bits: no synch */
665 ti->flags = ((sc->sc_minsync != 0 &&
666 (sc->sc_cfflags & (1 << ((r & 7) + 8))) == 0) ?
668 ((sc->sc_cfflags & (1 << (r & 7))) == 0 ?
670 ti->curr.period = ti->goal.period = 0;
671 ti->curr.offset = ti->goal.offset = 0;
672 ti->curr.width = ti->goal.width =
673 MSG_EXT_WDTR_BUS_8_BIT;
676 for (r = 0; r < sc->sc_ntarg; r++) {
677 ti = &sc->sc_tinfo[r];
678 ti->flags &= ~(T_SDTRSENT | T_WDTRSENT);
681 ti->curr.width = MSG_EXT_WDTR_BUS_8_BIT;
686 sc->sc_state = NCR_SBR;
687 NCRCMD(sc, NCRCMD_RSTSCSI);
688 /* Give the bus a fighting chance to settle. */
691 sc->sc_state = NCR_IDLE;
697 * Read the NCR registers, and save their contents for later use.
698 * NCR_STAT, NCR_STEP & NCR_INTR are mostly zeroed out when reading
699 * NCR_INTR - so make sure it is the last read.
701 * I think that (from reading the docs) most bits in these registers
702 * only make sense when the DMA CSR has an interrupt showing. Call only
703 * if an interrupt is pending.
706 ncr53c9x_readregs(struct ncr53c9x_softc *sc)
709 NCR_LOCK_ASSERT(sc, MA_OWNED);
711 sc->sc_espstat = NCR_READ_REG(sc, NCR_STAT);
712 /* Only the step bits are of interest. */
713 sc->sc_espstep = NCR_READ_REG(sc, NCR_STEP) & NCRSTEP_MASK;
715 if (sc->sc_rev == NCR_VARIANT_FAS366)
716 sc->sc_espstat2 = NCR_READ_REG(sc, NCR_STAT2);
718 sc->sc_espintr = NCR_READ_REG(sc, NCR_INTR);
720 if (sc->sc_glue->gl_clear_latched_intr != NULL)
721 (*sc->sc_glue->gl_clear_latched_intr)(sc);
724 * Determine the SCSI bus phase, return either a real SCSI bus phase
725 * or some pseudo phase we use to detect certain exceptions.
727 sc->sc_phase = (sc->sc_espintr & NCRINTR_DIS) ?
728 BUSFREE_PHASE : sc->sc_espstat & NCRSTAT_PHASE;
730 NCR_INTS(("regs[intr=%02x,stat=%02x,step=%02x,stat2=%02x] ",
731 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep, sc->sc_espstat2));
735 * Convert Synchronous Transfer Period to chip register Clock Per Byte value.
738 ncr53c9x_stp2cpb(struct ncr53c9x_softc *sc, int period)
742 NCR_LOCK_ASSERT(sc, MA_OWNED);
744 v = (sc->sc_freq * period) / 250;
745 if (ncr53c9x_cpb2stp(sc, v) < period)
746 /* Correct round-down error. */
752 ncr53c9x_setsync(struct ncr53c9x_softc *sc, struct ncr53c9x_tinfo *ti)
754 u_char cfg3, syncoff, synctp;
756 NCR_LOCK_ASSERT(sc, MA_OWNED);
759 if (ti->curr.offset != 0) {
760 syncoff = ti->curr.offset;
761 synctp = ncr53c9x_stp2cpb(sc, ti->curr.period);
762 if (sc->sc_features & NCR_F_FASTSCSI) {
764 * If the period is 200ns or less (ti->period <= 50),
765 * put the chip in Fast SCSI mode.
767 if (ti->curr.period <= 50)
769 * There are (at least) 4 variations of the
770 * configuration 3 register. The drive attach
771 * routine sets the appropriate bit to put the
772 * chip into Fast SCSI mode so that it doesn't
773 * have to be figured out here each time.
775 cfg3 |= sc->sc_cfg3_fscsi;
779 * Am53c974 requires different SYNCTP values when the
782 if (sc->sc_rev == NCR_VARIANT_AM53C974 &&
783 (cfg3 & NCRAMDCFG3_FSCSI) == 0)
790 if (ti->curr.width != MSG_EXT_WDTR_BUS_8_BIT) {
791 if (sc->sc_rev == NCR_VARIANT_FAS366)
792 cfg3 |= NCRFASCFG3_EWIDE;
795 if (sc->sc_features & NCR_F_HASCFG3)
796 NCR_WRITE_REG(sc, NCR_CFG3, cfg3);
798 NCR_WRITE_REG(sc, NCR_SYNCOFF, syncoff);
799 NCR_WRITE_REG(sc, NCR_SYNCTP, synctp);
803 * Send a command to a target, set the driver state to NCR_SELECTING
804 * and let the caller take care of the rest.
806 * Keeping this as a function allows me to say that this may be done
807 * by DMA instead of programmed I/O soon.
810 ncr53c9x_select(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb)
812 struct ncr53c9x_tinfo *ti;
815 int clen, selatn3, selatns;
816 int lun = ecb->ccb->ccb_h.target_lun;
817 int target = ecb->ccb->ccb_h.target_id;
819 NCR_LOCK_ASSERT(sc, MA_OWNED);
821 NCR_TRACE(("[ncr53c9x_select(t%d,l%d,cmd:%x,tag:%x,%x)] ",
822 target, lun, ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1]));
824 ti = &sc->sc_tinfo[target];
825 sc->sc_state = NCR_SELECTING;
827 * Schedule the callout now, the first time we will go away
828 * expecting to come back due to an interrupt, because it is
829 * always possible that the interrupt may never happen.
831 callout_reset(&ecb->ch, mstohz(ecb->timeout), ncr53c9x_callout, ecb);
834 * The docs say the target register is never reset, and I
835 * can't think of a better place to set it.
837 if (sc->sc_rev == NCR_VARIANT_FAS366) {
838 NCRCMD(sc, NCRCMD_FLUSH);
839 NCR_WRITE_REG(sc, NCR_SELID, target | NCR_BUSID_HMEXC32 |
842 NCR_WRITE_REG(sc, NCR_SELID, target);
846 * If we are requesting sense, force a renegotiation if we are
847 * currently using anything different from asynchronous at 8 bit
848 * as the target might have lost our transfer negotiations.
850 if ((ecb->flags & ECB_SENSE) != 0 && (ti->curr.offset != 0 ||
851 ti->curr.width != MSG_EXT_WDTR_BUS_8_BIT)) {
854 ti->curr.width = MSG_EXT_WDTR_BUS_8_BIT;
856 ncr53c9x_setsync(sc, ti);
858 selatn3 = selatns = 0;
859 if (ecb->tag[0] != 0) {
860 if (sc->sc_features & NCR_F_SELATN3)
861 /* Use SELATN3 to send tag messages. */
864 /* We don't have SELATN3; use SELATNS to send tags. */
868 if (ti->curr.period != ti->goal.period ||
869 ti->curr.offset != ti->goal.offset ||
870 ti->curr.width != ti->goal.width) {
871 /* We have to use SELATNS to send sync/wide messages. */
876 cmd = (u_char *)&ecb->cmd.cmd;
879 /* We'll use tags with SELATN3. */
880 clen = ecb->clen + 3;
882 cmd[0] = MSG_IDENTIFY(lun, 1); /* msg[0] */
883 cmd[1] = ecb->tag[0]; /* msg[1] */
884 cmd[2] = ecb->tag[1]; /* msg[2] */
886 /* We don't have tags, or will send messages with SELATNS. */
887 clen = ecb->clen + 1;
889 cmd[0] = MSG_IDENTIFY(lun, (ti->flags & T_RSELECTOFF) == 0);
892 if ((sc->sc_features & NCR_F_DMASELECT) && !selatns) {
893 /* Setup DMA transfer for command. */
895 sc->sc_cmdlen = clen;
897 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize);
898 /* Program the SCSI counter. */
899 NCR_SET_COUNT(sc, dmasize);
901 /* Load the count in. */
902 /* if (sc->sc_rev != NCR_VARIANT_FAS366) */
903 NCRCMD(sc, NCRCMD_NOP | NCRCMD_DMA);
905 /* And get the target's attention. */
907 sc->sc_msgout = SEND_TAG;
908 sc->sc_flags |= NCR_ATN;
909 NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA);
911 NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA);
917 * Who am I? This is where we tell the target that we are
918 * happy for it to disconnect etc.
921 /* Now get the command into the FIFO. */
922 ncr53c9x_wrfifo(sc, cmd, clen);
924 /* And get the target's attention. */
926 NCR_MSGS(("SELATNS \n"));
927 /* Arbitrate, select and stop after IDENTIFY message. */
928 NCRCMD(sc, NCRCMD_SELATNS);
929 } else if (selatn3) {
930 sc->sc_msgout = SEND_TAG;
931 sc->sc_flags |= NCR_ATN;
932 NCRCMD(sc, NCRCMD_SELATN3);
934 NCRCMD(sc, NCRCMD_SELATN);
938 ncr53c9x_free_ecb(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb)
941 NCR_LOCK_ASSERT(sc, MA_OWNED);
944 TAILQ_INSERT_TAIL(&sc->free_list, ecb, free_links);
947 static struct ncr53c9x_ecb *
948 ncr53c9x_get_ecb(struct ncr53c9x_softc *sc)
950 struct ncr53c9x_ecb *ecb;
952 NCR_LOCK_ASSERT(sc, MA_OWNED);
954 ecb = TAILQ_FIRST(&sc->free_list);
957 panic("ecb flags not cleared\n");
958 TAILQ_REMOVE(&sc->free_list, ecb, free_links);
959 ecb->flags = ECB_ALLOC;
960 bzero(&ecb->ccb, sizeof(struct ncr53c9x_ecb) -
961 offsetof(struct ncr53c9x_ecb, ccb));
967 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS:
971 * Start a SCSI-command.
972 * This function is called by the higher level SCSI-driver to queue/run
977 ncr53c9x_action(struct cam_sim *sim, union ccb *ccb)
979 struct ccb_pathinq *cpi;
980 struct ccb_scsiio *csio;
981 struct ccb_trans_settings *cts;
982 struct ccb_trans_settings_scsi *scsi;
983 struct ccb_trans_settings_spi *spi;
984 struct ncr53c9x_ecb *ecb;
985 struct ncr53c9x_softc *sc;
986 struct ncr53c9x_tinfo *ti;
989 sc = cam_sim_softc(sim);
991 NCR_LOCK_ASSERT(sc, MA_OWNED);
993 NCR_TRACE(("[ncr53c9x_action %d]", ccb->ccb_h.func_code));
995 switch (ccb->ccb_h.func_code) {
997 ncr53c9x_init(sc, 1);
998 ccb->ccb_h.status = CAM_REQ_CMP;
1002 case XPT_CALC_GEOMETRY:
1003 cam_calc_geometry(&ccb->ccg, sc->sc_extended_geom);
1009 cpi->version_num = 1;
1010 cpi->hba_inquiry = PI_SDTR_ABLE | PI_TAG_ABLE;
1012 (sc->sc_rev == NCR_VARIANT_FAS366) ? PI_WIDE_16 : 0;
1013 cpi->target_sprt = 0;
1015 cpi->hba_eng_cnt = 0;
1016 cpi->max_target = sc->sc_ntarg - 1;
1018 cpi->initiator_id = sc->sc_id;
1020 cpi->base_transfer_speed = 3300;
1021 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
1022 strncpy(cpi->hba_vid, "Sun", HBA_IDLEN);
1023 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
1024 cpi->unit_number = cam_sim_unit(sim);
1025 cpi->transport = XPORT_SPI;
1026 cpi->transport_version = 2;
1027 cpi->protocol = PROTO_SCSI;
1028 cpi->protocol_version = SCSI_REV_2;
1029 ccb->ccb_h.status = CAM_REQ_CMP;
1033 case XPT_GET_TRAN_SETTINGS:
1035 ti = &sc->sc_tinfo[ccb->ccb_h.target_id];
1036 scsi = &cts->proto_specific.scsi;
1037 spi = &cts->xport_specific.spi;
1039 cts->protocol = PROTO_SCSI;
1040 cts->protocol_version = SCSI_REV_2;
1041 cts->transport = XPORT_SPI;
1042 cts->transport_version = 2;
1044 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
1045 spi->sync_period = ti->curr.period;
1046 spi->sync_offset = ti->curr.offset;
1047 spi->bus_width = ti->curr.width;
1048 if ((ti->flags & T_TAG) != 0) {
1049 spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
1050 scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
1052 spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB;
1053 scsi->flags &= ~CTS_SCSI_FLAGS_TAG_ENB;
1056 if ((ti->flags & T_SYNCHOFF) != 0) {
1057 spi->sync_period = 0;
1058 spi->sync_offset = 0;
1060 spi->sync_period = sc->sc_minsync;
1061 spi->sync_offset = sc->sc_maxoffset;
1063 spi->bus_width = sc->sc_maxwidth;
1064 spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
1065 scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
1068 CTS_SPI_VALID_BUS_WIDTH |
1069 CTS_SPI_VALID_SYNC_RATE |
1070 CTS_SPI_VALID_SYNC_OFFSET |
1072 scsi->valid = CTS_SCSI_VALID_TQ;
1073 ccb->ccb_h.status = CAM_REQ_CMP;
1078 device_printf(sc->sc_dev, "XPT_ABORT called\n");
1079 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
1084 device_printf(sc->sc_dev, "XPT_TERM_IO called\n");
1085 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
1091 if (ccb->ccb_h.target_id < 0 ||
1092 ccb->ccb_h.target_id >= sc->sc_ntarg) {
1093 ccb->ccb_h.status = CAM_PATH_INVALID;
1097 /* Get an ECB to use. */
1098 ecb = ncr53c9x_get_ecb(sc);
1100 * This should never happen as we track resources
1104 xpt_freeze_simq(sim, 1);
1105 ccb->ccb_h.status = CAM_REQUEUE_REQ;
1106 device_printf(sc->sc_dev, "unable to allocate ecb\n");
1111 /* Initialize ecb. */
1113 ecb->timeout = ccb->ccb_h.timeout;
1115 if (ccb->ccb_h.func_code == XPT_RESET_DEV) {
1116 ecb->flags |= ECB_RESET;
1121 if ((ccb->ccb_h.flags & CAM_CDB_POINTER) != 0)
1122 bcopy(csio->cdb_io.cdb_ptr, &ecb->cmd.cmd,
1125 bcopy(csio->cdb_io.cdb_bytes, &ecb->cmd.cmd,
1127 ecb->clen = csio->cdb_len;
1128 ecb->daddr = csio->data_ptr;
1129 ecb->dleft = csio->dxfer_len;
1133 TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain);
1134 ecb->flags |= ECB_READY;
1135 if (sc->sc_state == NCR_IDLE)
1139 case XPT_SET_TRAN_SETTINGS:
1141 target = ccb->ccb_h.target_id;
1142 ti = &sc->sc_tinfo[target];
1143 scsi = &cts->proto_specific.scsi;
1144 spi = &cts->xport_specific.spi;
1146 if ((scsi->valid & CTS_SCSI_VALID_TQ) != 0) {
1147 if ((sc->sc_cfflags & (1<<((target & 7) + 16))) == 0 &&
1148 (scsi->flags & CTS_SCSI_FLAGS_TAG_ENB)) {
1149 NCR_MISC(("%s: target %d: tagged queuing\n",
1150 device_get_nameunit(sc->sc_dev), target));
1153 ti->flags &= ~T_TAG;
1156 if ((spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0) {
1157 NCR_MISC(("%s: target %d: wide negotiation\n",
1158 device_get_nameunit(sc->sc_dev), target));
1159 ti->goal.width = spi->bus_width;
1162 if ((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0) {
1163 NCR_MISC(("%s: target %d: sync period negotiation\n",
1164 device_get_nameunit(sc->sc_dev), target));
1165 ti->goal.period = spi->sync_period;
1168 if ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0) {
1169 NCR_MISC(("%s: target %d: sync offset negotiation\n",
1170 device_get_nameunit(sc->sc_dev), target));
1171 ti->goal.offset = spi->sync_offset;
1174 ccb->ccb_h.status = CAM_REQ_CMP;
1179 device_printf(sc->sc_dev, "Unhandled function code %d\n",
1180 ccb->ccb_h.func_code);
1181 ccb->ccb_h.status = CAM_PROVIDE_FAIL;
1188 * Used when interrupt driven I/O is not allowed, e.g. during boot.
1191 ncr53c9x_poll(struct cam_sim *sim)
1193 struct ncr53c9x_softc *sc;
1195 sc = cam_sim_softc(sim);
1197 NCR_LOCK_ASSERT(sc, MA_OWNED);
1199 NCR_TRACE(("[ncr53c9x_poll] "));
1201 if (NCRDMA_ISINTR(sc))
1206 * Asynchronous notification handler
1209 ncr53c9x_async(void *cbarg, uint32_t code, struct cam_path *path, void *arg)
1211 struct ncr53c9x_softc *sc;
1212 struct ncr53c9x_tinfo *ti;
1215 sc = cam_sim_softc(cbarg);
1217 NCR_LOCK_ASSERT(sc, MA_OWNED);
1220 case AC_LOST_DEVICE:
1221 target = xpt_path_target_id(path);
1222 if (target < 0 || target >= sc->sc_ntarg)
1225 /* Cancel outstanding disconnected commands. */
1226 ncr53c9x_clear_target(sc, target, CAM_REQ_ABORTED);
1228 /* Set the default parameters for the target. */
1229 ti = &sc->sc_tinfo[target];
1230 /* XXX - config flags per target: low bits: no reselect; high bits: no synch */
1231 ti->flags = ((sc->sc_minsync != 0 &&
1232 (sc->sc_cfflags & (1 << ((target & 7) + 8))) == 0) ?
1234 ((sc->sc_cfflags & (1 << (target & 7))) == 0 ?
1236 ti->curr.period = ti->goal.period = 0;
1237 ti->curr.offset = ti->goal.offset = 0;
1238 ti->curr.width = ti->goal.width = MSG_EXT_WDTR_BUS_8_BIT;
1244 * LOW LEVEL SCSI UTILITIES
1248 * Schedule a SCSI operation. This has now been pulled out of the interrupt
1249 * handler so that we may call it from ncr53c9x_action and ncr53c9x_done.
1250 * This may save us an unnecessary interrupt just to get things going.
1251 * Should only be called when state == NCR_IDLE and with sc_lock held.
1254 ncr53c9x_sched(struct ncr53c9x_softc *sc)
1256 struct ncr53c9x_ecb *ecb;
1257 struct ncr53c9x_linfo *li;
1258 struct ncr53c9x_tinfo *ti;
1261 NCR_LOCK_ASSERT(sc, MA_OWNED);
1263 NCR_TRACE(("[ncr53c9x_sched] "));
1265 if (sc->sc_state != NCR_IDLE)
1266 panic("ncr53c9x_sched: not IDLE (state=%d)", sc->sc_state);
1269 * Find first ecb in ready queue that is for a target/lunit
1270 * combinations that is not busy.
1272 TAILQ_FOREACH(ecb, &sc->ready_list, chain) {
1273 ti = &sc->sc_tinfo[ecb->ccb->ccb_h.target_id];
1274 lun = ecb->ccb->ccb_h.target_lun;
1276 /* Select type of tag for this command */
1277 if ((ti->flags & (T_RSELECTOFF | T_TAG)) != T_TAG)
1279 else if ((ecb->flags & ECB_SENSE) != 0)
1281 else if ((ecb->ccb->ccb_h.flags & CAM_TAG_ACTION_VALID) == 0)
1283 else if (ecb->ccb->csio.tag_action == CAM_TAG_ACTION_NONE)
1286 tag = ecb->ccb->csio.tag_action;
1288 li = TINFO_LUN(ti, lun);
1290 /* Initialize LUN info and add to list. */
1291 if ((li = malloc(sizeof(*li),
1292 M_DEVBUF, M_NOWAIT | M_ZERO)) == NULL) {
1297 LIST_INSERT_HEAD(&ti->luns, li, link);
1301 li->last_used = time_second;
1303 /* Try to issue this as an untagged command. */
1304 if (li->untagged == NULL)
1307 if (li->untagged != NULL) {
1309 if ((li->busy != 1) && li->used == 0) {
1311 * We need to issue this untagged command
1316 /* not ready, yet */
1322 li->queued[ecb->tag_id] = ecb;
1323 ecb->tag[1] = ecb->tag_id;
1326 if (li->untagged != NULL && (li->busy != 1)) {
1328 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1329 ecb->flags &= ~ECB_READY;
1331 ncr53c9x_select(sc, ecb);
1334 if (li->untagged == NULL && tag != 0) {
1335 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1336 ecb->flags &= ~ECB_READY;
1338 ncr53c9x_select(sc, ecb);
1341 NCR_TRACE(("%d:%d busy\n",
1342 ecb->ccb->ccb_h.target_id,
1343 ecb->ccb->ccb_h.target_lun));
1349 ncr53c9x_sense(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb)
1351 union ccb *ccb = ecb->ccb;
1352 struct ncr53c9x_linfo *li;
1353 struct ncr53c9x_tinfo *ti;
1354 struct scsi_request_sense *ss = (void *)&ecb->cmd.cmd;
1357 NCR_LOCK_ASSERT(sc, MA_OWNED);
1359 NCR_TRACE(("requesting sense "));
1361 lun = ccb->ccb_h.target_lun;
1362 ti = &sc->sc_tinfo[ccb->ccb_h.target_id];
1364 /* Next, setup a REQUEST SENSE command block. */
1365 memset(ss, 0, sizeof(*ss));
1366 ss->opcode = REQUEST_SENSE;
1367 ss->byte2 = ccb->ccb_h.target_lun << SCSI_CMD_LUN_SHIFT;
1368 ss->length = sizeof(struct scsi_sense_data);
1369 ecb->clen = sizeof(*ss);
1370 ecb->daddr = (char *)&ecb->ccb->csio.sense_data;
1371 ecb->dleft = sizeof(struct scsi_sense_data);
1372 ecb->flags |= ECB_SENSE;
1373 ecb->timeout = NCR_SENSE_TIMEOUT;
1375 li = TINFO_LUN(ti, lun);
1378 ncr53c9x_dequeue(sc, ecb);
1379 li->untagged = ecb; /* Must be executed first to fix C/A. */
1381 if (ecb == sc->sc_nexus) {
1382 ncr53c9x_select(sc, ecb);
1384 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
1385 ecb->flags |= ECB_READY;
1386 if (sc->sc_state == NCR_IDLE)
1392 * POST PROCESSING OF SCSI_CMD (usually current)
1395 ncr53c9x_done(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb)
1397 union ccb *ccb = ecb->ccb;
1398 struct ncr53c9x_linfo *li;
1399 struct ncr53c9x_tinfo *ti;
1402 NCR_LOCK_ASSERT(sc, MA_OWNED);
1404 NCR_TRACE(("[ncr53c9x_done(status:%x)] ", ccb->ccb_h.status));
1406 ti = &sc->sc_tinfo[ccb->ccb_h.target_id];
1407 lun = ccb->ccb_h.target_lun;
1408 li = TINFO_LUN(ti, lun);
1410 callout_stop(&ecb->ch);
1413 * Now, if we've come here with no error code, i.e. we've kept the
1414 * initial CAM_REQ_CMP, and the status code signals that we should
1415 * check sense, we'll need to set up a request sense cmd block and
1416 * push the command back into the ready queue *before* any other
1417 * commands for this target/lunit, else we lose the sense info.
1418 * We don't support chk sense conditions for the request sense cmd.
1420 if (ccb->ccb_h.status == CAM_REQ_CMP) {
1421 ccb->csio.scsi_status = ecb->stat;
1422 if ((ecb->flags & ECB_ABORT) != 0) {
1423 ccb->ccb_h.status = CAM_CMD_TIMEOUT;
1424 } else if ((ecb->flags & ECB_SENSE) != 0 &&
1425 (ecb->stat != SCSI_STATUS_CHECK_COND)) {
1426 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND;
1427 ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR |
1429 } else if (ecb->stat == SCSI_STATUS_CHECK_COND) {
1430 if ((ecb->flags & ECB_SENSE) != 0)
1431 ccb->ccb_h.status = CAM_AUTOSENSE_FAIL;
1433 /* First, save the return values. */
1434 ccb->csio.resid = ecb->dleft;
1435 if ((ccb->ccb_h.flags & CAM_DIS_AUTOSENSE) ==
1437 ncr53c9x_sense(sc, ecb);
1440 ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;
1443 ccb->csio.resid = ecb->dleft;
1445 if (ecb->stat == SCSI_STATUS_QUEUE_FULL)
1446 ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;
1447 else if (ecb->stat == SCSI_STATUS_BUSY)
1448 ccb->ccb_h.status = CAM_SCSI_BUSY;
1451 #ifdef NCR53C9X_DEBUG
1452 if (ncr53c9x_debug & NCR_SHOWTRAC) {
1453 if (ccb->csio.resid != 0)
1454 printf("resid=%d ", ccb->csio.resid);
1455 if ((ccb->ccb_h.status & CAM_AUTOSNS_VALID) != 0)
1456 printf("sense=0x%02x\n",
1457 ccb->csio.sense_data.error_code);
1459 printf("status SCSI=0x%x CAM=0x%x\n",
1460 ccb->csio.scsi_status, ccb->ccb_h.status);
1465 * Remove the ECB from whatever queue it's on.
1467 ncr53c9x_dequeue(sc, ecb);
1468 if (ecb == sc->sc_nexus) {
1469 sc->sc_nexus = NULL;
1470 if (sc->sc_state != NCR_CLEANING) {
1471 sc->sc_state = NCR_IDLE;
1476 if (ccb->ccb_h.status == CAM_SEL_TIMEOUT) {
1477 /* Selection timeout -- discard this LUN if empty. */
1478 if (li->untagged == NULL && li->used == 0) {
1480 ti->lun[lun] = NULL;
1481 LIST_REMOVE(li, link);
1486 ncr53c9x_free_ecb(sc, ecb);
1492 ncr53c9x_dequeue(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb)
1494 struct ncr53c9x_linfo *li;
1495 struct ncr53c9x_tinfo *ti;
1498 NCR_LOCK_ASSERT(sc, MA_OWNED);
1500 ti = &sc->sc_tinfo[ecb->ccb->ccb_h.target_id];
1501 lun = ecb->ccb->ccb_h.target_lun;
1502 li = TINFO_LUN(ti, lun);
1504 if (li == NULL || li->lun != lun)
1505 panic("ncr53c9x_dequeue: lun %qx for ecb %p does not exist",
1506 (long long)lun, ecb);
1508 if (li->untagged == ecb) {
1510 li->untagged = NULL;
1512 if (ecb->tag[0] && li->queued[ecb->tag[1]] != NULL) {
1514 if (li->queued[ecb->tag[1]] != NULL &&
1515 (li->queued[ecb->tag[1]] != ecb))
1516 panic("ncr53c9x_dequeue: slot %d for lun %qx has %p "
1517 "instead of ecb %p\n", ecb->tag[1],
1518 (long long)lun, li->queued[ecb->tag[1]], ecb);
1520 li->queued[ecb->tag[1]] = NULL;
1523 ecb->tag[0] = ecb->tag[1] = 0;
1525 if ((ecb->flags & ECB_READY) != 0) {
1526 ecb->flags &= ~ECB_READY;
1527 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1532 * INTERRUPT/PROTOCOL ENGINE
1536 * Schedule an outgoing message by prioritizing it, and asserting
1537 * attention on the bus. We can only do this when we are the initiator
1538 * else there will be an illegal command interrupt.
1540 #define ncr53c9x_sched_msgout(m) do { \
1541 NCR_MSGS(("ncr53c9x_sched_msgout %x %d", m, __LINE__)); \
1542 NCRCMD(sc, NCRCMD_SETATN); \
1543 sc->sc_flags |= NCR_ATN; \
1544 sc->sc_msgpriq |= (m); \
1548 ncr53c9x_flushfifo(struct ncr53c9x_softc *sc)
1551 NCR_LOCK_ASSERT(sc, MA_OWNED);
1553 NCR_TRACE(("[flushfifo] "));
1555 NCRCMD(sc, NCRCMD_FLUSH);
1557 if (sc->sc_phase == COMMAND_PHASE ||
1558 sc->sc_phase == MESSAGE_OUT_PHASE)
1563 ncr53c9x_rdfifo(struct ncr53c9x_softc *sc, int how)
1568 NCR_LOCK_ASSERT(sc, MA_OWNED);
1571 case NCR_RDFIFO_START:
1572 ibuf = sc->sc_imess;
1576 case NCR_RDFIFO_CONTINUE:
1577 ibuf = sc->sc_imess + sc->sc_imlen;
1581 panic("ncr53c9x_rdfifo: bad flag");
1586 * XXX buffer (sc_imess) size for message
1589 n = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF;
1591 if (sc->sc_rev == NCR_VARIANT_FAS366) {
1594 for (i = 0; i < n; i++)
1595 ibuf[i] = NCR_READ_REG(sc, NCR_FIFO);
1597 if (sc->sc_espstat2 & NCRFAS_STAT2_ISHUTTLE) {
1599 NCR_WRITE_REG(sc, NCR_FIFO, 0);
1600 ibuf[i++] = NCR_READ_REG(sc, NCR_FIFO);
1602 NCR_READ_REG(sc, NCR_FIFO);
1604 ncr53c9x_flushfifo(sc);
1607 for (i = 0; i < n; i++)
1608 ibuf[i] = NCR_READ_REG(sc, NCR_FIFO);
1614 #ifdef NCR53C9X_DEBUG
1615 NCR_TRACE(("\n[rdfifo %s (%d):",
1616 (how == NCR_RDFIFO_START) ? "start" : "cont", (int)sc->sc_imlen));
1617 if (ncr53c9x_debug & NCR_SHOWTRAC) {
1618 for (i = 0; i < sc->sc_imlen; i++)
1619 printf(" %02x", sc->sc_imess[i]);
1624 return (sc->sc_imlen);
1628 ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, u_char *p, int len)
1632 NCR_LOCK_ASSERT(sc, MA_OWNED);
1634 #ifdef NCR53C9X_DEBUG
1635 NCR_MSGS(("[wrfifo(%d):", len));
1636 if (ncr53c9x_debug & NCR_SHOWMSGS) {
1637 for (i = 0; i < len; i++)
1638 printf(" %02x", p[i]);
1643 for (i = 0; i < len; i++) {
1644 NCR_WRITE_REG(sc, NCR_FIFO, p[i]);
1646 if (sc->sc_rev == NCR_VARIANT_FAS366)
1647 NCR_WRITE_REG(sc, NCR_FIFO, 0);
1652 ncr53c9x_reselect(struct ncr53c9x_softc *sc, int message, int tagtype,
1655 struct ncr53c9x_ecb *ecb = NULL;
1656 struct ncr53c9x_linfo *li;
1657 struct ncr53c9x_tinfo *ti;
1658 u_char lun, selid, target;
1660 NCR_LOCK_ASSERT(sc, MA_OWNED);
1662 if (sc->sc_rev == NCR_VARIANT_FAS366) {
1663 target = sc->sc_selid;
1666 * The SCSI chip made a snapshot of the data bus
1667 * while the reselection was being negotiated.
1668 * This enables us to determine which target did
1671 selid = sc->sc_selid & ~(1 << sc->sc_id);
1672 if (selid & (selid - 1)) {
1673 device_printf(sc->sc_dev, "reselect with invalid "
1674 "selid %02x; sending DEVICE RESET\n", selid);
1678 target = ffs(selid) - 1;
1680 lun = message & 0x07;
1683 * Search wait queue for disconnected command.
1684 * The list should be short, so I haven't bothered with
1685 * any more sophisticated structures than a simple
1686 * singly linked list.
1688 ti = &sc->sc_tinfo[target];
1689 li = TINFO_LUN(ti, lun);
1692 * We can get as far as the LUN with the IDENTIFY
1693 * message. Check to see if we're running an
1694 * untagged command. Otherwise ack the IDENTIFY
1695 * and wait for a tag message.
1698 if (li->untagged != NULL && li->busy)
1700 else if (tagtype != MSG_SIMPLE_Q_TAG) {
1701 /* Wait for tag to come by. */
1702 sc->sc_state = NCR_IDENTIFIED;
1705 ecb = li->queued[tagid];
1708 device_printf(sc->sc_dev, "reselect from target %d lun %d "
1709 "tag %x:%x with no nexus; sending ABORT\n",
1710 target, lun, tagtype, tagid);
1714 /* Make this nexus active again. */
1715 sc->sc_state = NCR_CONNECTED;
1717 ncr53c9x_setsync(sc, ti);
1719 if (ecb->flags & ECB_RESET)
1720 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1721 else if (ecb->flags & ECB_ABORT)
1722 ncr53c9x_sched_msgout(SEND_ABORT);
1724 /* Do an implicit RESTORE POINTERS. */
1725 sc->sc_dp = ecb->daddr;
1726 sc->sc_dleft = ecb->dleft;
1731 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1735 ncr53c9x_sched_msgout(SEND_ABORT);
1739 /* From NetBSD; these should go into CAM at some point. */
1740 #define MSG_ISEXTENDED(m) ((m) == MSG_EXTENDED)
1741 #define MSG_IS1BYTE(m) \
1742 ((!MSG_ISEXTENDED(m) && (m) < 0x20) || MSG_ISIDENTIFY(m))
1743 #define MSG_IS2BYTE(m) (((m) & 0xf0) == 0x20)
1746 __verify_msg_format(u_char *p, int len)
1749 if (len == 1 && MSG_IS1BYTE(p[0]))
1751 if (len == 2 && MSG_IS2BYTE(p[0]))
1753 if (len >= 3 && MSG_ISEXTENDED(p[0]) &&
1761 * Get an incoming message as initiator.
1763 * The SCSI bus must already be in MESSAGE_IN_PHASE and there is a
1767 ncr53c9x_msgin(struct ncr53c9x_softc *sc)
1769 struct ncr53c9x_ecb *ecb;
1770 struct ncr53c9x_linfo *li;
1771 struct ncr53c9x_tinfo *ti;
1775 NCR_LOCK_ASSERT(sc, MA_OWNED);
1777 NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld)] ", (long)sc->sc_imlen));
1779 if (sc->sc_imlen == 0) {
1780 device_printf(sc->sc_dev, "msgin: no msg byte available\n");
1785 * Prepare for a new message. A message should (according
1786 * to the SCSI standard) be transmitted in one single
1787 * MESSAGE_IN_PHASE. If we have been in some other phase,
1788 * then this is a new message.
1790 if (sc->sc_prevphase != MESSAGE_IN_PHASE &&
1791 sc->sc_state != NCR_RESELECTED) {
1792 device_printf(sc->sc_dev, "phase change, dropping message, "
1793 "prev %d, state %d\n", sc->sc_prevphase, sc->sc_state);
1794 sc->sc_flags &= ~NCR_DROP_MSGI;
1799 * If we're going to reject the message, don't bother storing
1800 * the incoming bytes. But still, we need to ACK them.
1802 if ((sc->sc_flags & NCR_DROP_MSGI) != 0) {
1803 NCRCMD(sc, NCRCMD_MSGOK);
1804 device_printf(sc->sc_dev, "<dropping msg byte %x>",
1805 sc->sc_imess[sc->sc_imlen]);
1809 if (sc->sc_imlen >= NCR_MAX_MSG_LEN) {
1810 ncr53c9x_sched_msgout(SEND_REJECT);
1811 sc->sc_flags |= NCR_DROP_MSGI;
1813 switch (sc->sc_state) {
1815 * if received message is the first of reselection
1816 * then first byte is selid, and then message
1818 case NCR_RESELECTED:
1819 pb = sc->sc_imess + 1;
1820 plen = sc->sc_imlen - 1;
1825 plen = sc->sc_imlen;
1828 if (__verify_msg_format(pb, plen))
1832 /* Acknowledge what we have so far. */
1833 NCRCMD(sc, NCRCMD_MSGOK);
1837 NCR_MSGS(("gotmsg(%x) state %d", sc->sc_imess[0], sc->sc_state));
1839 * We got a complete message, flush the imess.
1840 * XXX nobody uses imlen below.
1844 * Now we should have a complete message (1 byte, 2 byte
1845 * and moderately long extended messages). We only handle
1846 * extended messages which total length is shorter than
1847 * NCR_MAX_MSG_LEN. Longer messages will be amputated.
1849 switch (sc->sc_state) {
1852 ti = &sc->sc_tinfo[ecb->ccb->ccb_h.target_id];
1854 switch (sc->sc_imess[0]) {
1855 case MSG_CMDCOMPLETE:
1856 NCR_MSGS(("cmdcomplete "));
1857 if (sc->sc_dleft < 0) {
1858 xpt_print_path(ecb->ccb->ccb_h.path);
1859 printf("got %ld extra bytes\n",
1860 -(long)sc->sc_dleft);
1863 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) ?
1865 if ((ecb->flags & ECB_SENSE) == 0)
1866 ecb->ccb->csio.resid = ecb->dleft;
1867 sc->sc_state = NCR_CMDCOMPLETE;
1870 case MSG_MESSAGE_REJECT:
1871 NCR_MSGS(("msg reject (msgout=%x) ", sc->sc_msgout));
1872 switch (sc->sc_msgout) {
1875 * Target does not like tagged queuing.
1876 * - Flush the command queue
1877 * - Disable tagged queuing for the target
1878 * - Dequeue ecb from the queued array.
1880 device_printf(sc->sc_dev, "tagged queuing "
1881 "rejected: target %d\n",
1882 ecb->ccb->ccb_h.target_id);
1884 NCR_MSGS(("(rejected sent tag)"));
1885 NCRCMD(sc, NCRCMD_FLUSH);
1887 ti->flags &= ~T_TAG;
1888 lun = ecb->ccb->ccb_h.target_lun;
1889 li = TINFO_LUN(ti, lun);
1891 li->queued[ecb->tag[1]] != NULL) {
1892 li->queued[ecb->tag[1]] = NULL;
1895 ecb->tag[0] = ecb->tag[1] = 0;
1901 device_printf(sc->sc_dev, "sync transfer "
1902 "rejected: target %d\n",
1903 ecb->ccb->ccb_h.target_id);
1905 ti->flags &= ~T_SDTRSENT;
1906 ti->curr.period = ti->goal.period = 0;
1907 ti->curr.offset = ti->goal.offset = 0;
1908 ncr53c9x_setsync(sc, ti);
1912 device_printf(sc->sc_dev, "wide transfer "
1913 "rejected: target %d\n",
1914 ecb->ccb->ccb_h.target_id);
1916 ti->flags &= ~T_WDTRSENT;
1917 ti->curr.width = ti->goal.width =
1918 MSG_EXT_WDTR_BUS_8_BIT;
1919 ncr53c9x_setsync(sc, ti);
1922 case SEND_INIT_DET_ERR:
1928 NCR_MSGS(("noop "));
1931 case MSG_HEAD_OF_Q_TAG:
1932 case MSG_SIMPLE_Q_TAG:
1933 case MSG_ORDERED_Q_TAG:
1934 NCR_MSGS(("TAG %x:%x",
1935 sc->sc_imess[0], sc->sc_imess[1]));
1938 case MSG_DISCONNECT:
1939 NCR_MSGS(("disconnect "));
1941 sc->sc_state = NCR_DISCONNECT;
1944 * Mark the fact that all bytes have moved. The
1945 * target may not bother to do a SAVE POINTERS
1946 * at this stage. This flag will set the residual
1947 * count to zero on MSG COMPLETE.
1949 if (sc->sc_dleft == 0)
1950 ecb->flags |= ECB_TENTATIVE_DONE;
1953 case MSG_SAVEDATAPOINTER:
1954 NCR_MSGS(("save datapointer "));
1955 ecb->daddr = sc->sc_dp;
1956 ecb->dleft = sc->sc_dleft;
1959 case MSG_RESTOREPOINTERS:
1960 NCR_MSGS(("restore datapointer "));
1961 sc->sc_dp = ecb->daddr;
1962 sc->sc_dleft = ecb->dleft;
1966 NCR_MSGS(("extended(%x) ", sc->sc_imess[2]));
1967 switch (sc->sc_imess[2]) {
1969 NCR_MSGS(("SDTR period %d, offset %d ",
1970 sc->sc_imess[3], sc->sc_imess[4]));
1971 if (sc->sc_imess[1] != 3)
1973 ti->curr.period = sc->sc_imess[3];
1974 ti->curr.offset = sc->sc_imess[4];
1975 if (sc->sc_minsync == 0 ||
1976 ti->curr.offset == 0 ||
1977 ti->curr.period > 124) {
1979 #ifdef NCR53C9X_DEBUG
1980 xpt_print_path(ecb->ccb->ccb_h.path);
1981 printf("async mode\n");
1984 if ((ti->flags & T_SDTRSENT) == 0) {
1986 * target initiated negotiation
1988 ti->curr.offset = 0;
1989 ncr53c9x_sched_msgout(
1994 ncr53c9x_cpb2stp(sc,
1995 ncr53c9x_stp2cpb(sc,
1997 if ((ti->flags & T_SDTRSENT) == 0) {
1999 * target initiated negotiation
2001 if (ti->curr.period <
2005 if (ti->curr.offset >
2009 ncr53c9x_sched_msgout(
2013 ti->flags &= ~T_SDTRSENT;
2014 ti->goal.period = ti->curr.period;
2015 ti->goal.offset = ti->curr.offset;
2016 ncr53c9x_setsync(sc, ti);
2020 NCR_MSGS(("wide mode %d ", sc->sc_imess[3]));
2021 ti->curr.width = sc->sc_imess[3];
2022 if (!(ti->flags & T_WDTRSENT))
2024 * target initiated negotiation
2026 ncr53c9x_sched_msgout(SEND_WDTR);
2027 ti->flags &= ~T_WDTRSENT;
2028 ti->goal.width = ti->curr.width;
2029 ncr53c9x_setsync(sc, ti);
2033 xpt_print_path(ecb->ccb->ccb_h.path);
2034 printf("unrecognized MESSAGE EXTENDED;"
2035 " sending REJECT\n");
2041 NCR_MSGS(("ident "));
2042 xpt_print_path(ecb->ccb->ccb_h.path);
2043 printf("unrecognized MESSAGE; sending REJECT\n");
2046 ncr53c9x_sched_msgout(SEND_REJECT);
2051 case NCR_IDENTIFIED:
2053 * IDENTIFY message was received and queue tag is expected
2056 if ((sc->sc_imess[0] != MSG_SIMPLE_Q_TAG) ||
2057 (sc->sc_msgify == 0)) {
2058 device_printf(sc->sc_dev, "TAG reselect without "
2059 "IDENTIFY; MSG %x; sending DEVICE RESET\n",
2063 (void) ncr53c9x_reselect(sc, sc->sc_msgify,
2064 sc->sc_imess[0], sc->sc_imess[1]);
2067 case NCR_RESELECTED:
2068 if (MSG_ISIDENTIFY(sc->sc_imess[1])) {
2069 sc->sc_msgify = sc->sc_imess[1];
2071 device_printf(sc->sc_dev, "reselect without IDENTIFY;"
2072 " MSG %x; sending DEVICE RESET\n", sc->sc_imess[1]);
2075 (void) ncr53c9x_reselect(sc, sc->sc_msgify, 0, 0);
2079 device_printf(sc->sc_dev, "unexpected MESSAGE IN; "
2080 "sending DEVICE RESET\n");
2083 ncr53c9x_sched_msgout(SEND_DEV_RESET);
2087 ncr53c9x_sched_msgout(SEND_ABORT);
2090 /* If we have more messages to send set ATN. */
2091 if (sc->sc_msgpriq) {
2092 NCRCMD(sc, NCRCMD_SETATN);
2093 sc->sc_flags |= NCR_ATN;
2096 /* Acknowledge last message byte. */
2097 NCRCMD(sc, NCRCMD_MSGOK);
2099 /* Done, reset message pointer. */
2100 sc->sc_flags &= ~NCR_DROP_MSGI;
2105 * Send the highest priority, scheduled message.
2108 ncr53c9x_msgout(struct ncr53c9x_softc *sc)
2110 struct ncr53c9x_tinfo *ti;
2111 struct ncr53c9x_ecb *ecb;
2113 #ifdef NCR53C9X_DEBUG
2117 NCR_LOCK_ASSERT(sc, MA_OWNED);
2119 NCR_TRACE(("[ncr53c9x_msgout(priq:%x, prevphase:%x)]",
2120 sc->sc_msgpriq, sc->sc_prevphase));
2123 * XXX - the NCR_ATN flag is not in sync with the actual ATN
2124 * condition on the SCSI bus. The 53c9x chip
2125 * automatically turns off ATN before sending the
2126 * message byte. (See also the comment below in the
2127 * default case when picking out a message to send.)
2129 if (sc->sc_flags & NCR_ATN) {
2130 if (sc->sc_prevphase != MESSAGE_OUT_PHASE) {
2132 NCRCMD(sc, NCRCMD_FLUSH);
2138 if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
2139 ncr53c9x_sched_msgout(sc->sc_msgoutq);
2142 device_printf(sc->sc_dev, "at line %d: unexpected "
2143 "MESSAGE OUT phase\n", __LINE__);
2147 if (sc->sc_omlen == 0) {
2148 /* Pick up highest priority message. */
2149 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq;
2150 sc->sc_msgoutq |= sc->sc_msgout;
2151 sc->sc_msgpriq &= ~sc->sc_msgout;
2152 sc->sc_omlen = 1; /* "Default" message len */
2153 switch (sc->sc_msgout) {
2156 ti = &sc->sc_tinfo[ecb->ccb->ccb_h.target_id];
2157 sc->sc_omess[0] = MSG_EXTENDED;
2158 sc->sc_omess[1] = MSG_EXT_SDTR_LEN;
2159 sc->sc_omess[2] = MSG_EXT_SDTR;
2160 sc->sc_omess[3] = ti->goal.period;
2161 sc->sc_omess[4] = ti->goal.offset;
2167 ti = &sc->sc_tinfo[ecb->ccb->ccb_h.target_id];
2168 sc->sc_omess[0] = MSG_EXTENDED;
2169 sc->sc_omess[1] = MSG_EXT_WDTR_LEN;
2170 sc->sc_omess[2] = MSG_EXT_WDTR;
2171 sc->sc_omess[3] = ti->goal.width;
2176 if (sc->sc_state != NCR_CONNECTED) {
2177 device_printf(sc->sc_dev, "at line %d: no "
2178 "nexus\n", __LINE__);
2182 MSG_IDENTIFY(ecb->ccb->ccb_h.target_lun, 0);
2186 if (sc->sc_state != NCR_CONNECTED) {
2187 device_printf(sc->sc_dev, "at line %d: no "
2188 "nexus\n", __LINE__);
2191 sc->sc_omess[0] = ecb->tag[0];
2192 sc->sc_omess[1] = ecb->tag[1];
2196 case SEND_DEV_RESET:
2197 sc->sc_flags |= NCR_ABORTING;
2198 sc->sc_omess[0] = MSG_BUS_DEV_RESET;
2200 ti = &sc->sc_tinfo[ecb->ccb->ccb_h.target_id];
2201 ti->curr.period = 0;
2202 ti->curr.offset = 0;
2203 ti->curr.width = MSG_EXT_WDTR_BUS_8_BIT;
2206 case SEND_PARITY_ERROR:
2207 sc->sc_omess[0] = MSG_PARITY_ERROR;
2211 sc->sc_flags |= NCR_ABORTING;
2212 sc->sc_omess[0] = MSG_ABORT;
2215 case SEND_INIT_DET_ERR:
2216 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
2220 sc->sc_omess[0] = MSG_MESSAGE_REJECT;
2225 * We normally do not get here, since the chip
2226 * automatically turns off ATN before the last
2227 * byte of a message is sent to the target.
2228 * However, if the target rejects our (multi-byte)
2229 * message early by switching to MSG IN phase
2230 * ATN remains on, so the target may return to
2231 * MSG OUT phase. If there are no scheduled messages
2232 * left we send a NO-OP.
2234 * XXX - Note that this leaves no useful purpose for
2237 sc->sc_flags &= ~NCR_ATN;
2238 sc->sc_omess[0] = MSG_NOOP;
2240 sc->sc_omp = sc->sc_omess;
2243 #ifdef NCR53C9X_DEBUG
2244 if (ncr53c9x_debug & NCR_SHOWMSGS) {
2245 NCR_MSGS(("<msgout:"));
2246 for (i = 0; i < sc->sc_omlen; i++)
2247 NCR_MSGS((" %02x", sc->sc_omess[i]));
2251 if (sc->sc_rev == NCR_VARIANT_FAS366) {
2255 ncr53c9x_flushfifo(sc);
2256 ncr53c9x_wrfifo(sc, sc->sc_omp, sc->sc_omlen);
2257 NCRCMD(sc, NCRCMD_TRANS);
2259 /* (Re)send the message. */
2260 size = ulmin(sc->sc_omlen, sc->sc_maxxfer);
2261 NCRDMA_SETUP(sc, &sc->sc_omp, &sc->sc_omlen, 0, &size);
2262 /* Program the SCSI counter. */
2263 NCR_SET_COUNT(sc, size);
2265 /* Load the count in and start the message-out transfer. */
2266 NCRCMD(sc, NCRCMD_NOP | NCRCMD_DMA);
2267 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA);
2273 ncr53c9x_intr(void *arg)
2275 struct ncr53c9x_softc *sc = arg;
2277 if (!NCRDMA_ISINTR(sc))
2288 * This is the most critical part of the driver, and has to know
2289 * how to deal with *all* error conditions and phases from the SCSI
2290 * bus. If there are no errors and the DMA was active, then call the
2291 * DMA pseudo-interrupt handler. If this returns 1, then that was it
2292 * and we can return from here without further processing.
2294 * Most of this needs verifying.
2297 ncr53c9x_intr1(struct ncr53c9x_softc *sc)
2299 struct ncr53c9x_ecb *ecb;
2300 struct ncr53c9x_linfo *li;
2301 struct ncr53c9x_tinfo *ti;
2302 struct timeval cur, wait;
2307 NCR_LOCK_ASSERT(sc, MA_OWNED);
2309 NCR_INTS(("[ncr53c9x_intr: state %d]", sc->sc_state));
2312 /* and what do the registers say... */
2313 ncr53c9x_readregs(sc);
2316 * At the moment, only a SCSI Bus Reset or Illegal
2317 * Command are classed as errors. A disconnect is a
2318 * valid condition, and we let the code check is the
2319 * "NCR_BUSFREE_OK" flag was set before declaring it
2322 * Also, the status register tells us about "Gross
2323 * Errors" and "Parity errors". Only the Gross Error
2324 * is really bad, and the parity errors are dealt
2328 * If there are too many parity error, go to slow
2332 if ((sc->sc_espintr & NCRINTR_SBR) != 0) {
2333 if ((NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) != 0) {
2334 NCRCMD(sc, NCRCMD_FLUSH);
2337 if (sc->sc_state != NCR_SBR) {
2338 device_printf(sc->sc_dev, "SCSI bus reset\n");
2339 ncr53c9x_init(sc, 0); /* Restart everything. */
2343 /*XXX*/ device_printf(sc->sc_dev, "<expected bus reset: "
2344 "[intr %x, stat %x, step %d]>\n",
2345 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
2347 if (sc->sc_nexus != NULL)
2348 panic("%s: nexus in reset state",
2349 device_get_nameunit(sc->sc_dev));
2355 #define NCRINTR_ERR (NCRINTR_SBR | NCRINTR_ILL)
2356 if (sc->sc_espintr & NCRINTR_ERR ||
2357 sc->sc_espstat & NCRSTAT_GE) {
2358 if ((sc->sc_espstat & NCRSTAT_GE) != 0) {
2359 /* Gross Error; no target? */
2360 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2361 NCRCMD(sc, NCRCMD_FLUSH);
2364 if (sc->sc_state == NCR_CONNECTED ||
2365 sc->sc_state == NCR_SELECTING) {
2366 ecb->ccb->ccb_h.status = CAM_SEL_TIMEOUT;
2367 ncr53c9x_done(sc, ecb);
2372 if ((sc->sc_espintr & NCRINTR_ILL) != 0) {
2373 if ((sc->sc_flags & NCR_EXPECT_ILLCMD) != 0) {
2375 * Eat away "Illegal command" interrupt
2376 * on a ESP100 caused by a re-selection
2377 * while we were trying to select
2381 device_printf(sc->sc_dev, "ESP100 work-around "
2384 sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
2387 /* Illegal command, out of sync? */
2388 device_printf(sc->sc_dev, "illegal command: 0x%x "
2389 "(state %d, phase %x, prevphase %x)\n",
2391 sc->sc_state, sc->sc_phase, sc->sc_prevphase);
2392 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2393 NCRCMD(sc, NCRCMD_FLUSH);
2399 sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
2402 * Call if DMA is active.
2404 * If DMA_INTR returns true, then maybe go 'round the loop
2405 * again in case there is no more DMA queued, but a phase
2406 * change is expected.
2408 if (NCRDMA_ISACTIVE(sc)) {
2409 if (NCRDMA_INTR(sc) == -1) {
2410 device_printf(sc->sc_dev, "DMA error; resetting\n");
2413 /* If DMA active here, then go back to work... */
2414 if (NCRDMA_ISACTIVE(sc))
2417 if ((sc->sc_espstat & NCRSTAT_TC) == 0) {
2419 * DMA not completed. If we can not find a
2420 * acceptable explanation, print a diagnostic.
2422 if (sc->sc_state == NCR_SELECTING)
2424 * This can happen if we are reselected
2425 * while using DMA to select a target.
2428 else if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
2430 * Our (multi-byte) message (eg SDTR) was
2431 * interrupted by the target to send
2433 * Print diagnostic if current phase
2434 * is not MESSAGE IN.
2436 if (sc->sc_phase != MESSAGE_IN_PHASE)
2437 device_printf(sc->sc_dev,"!TC on MSGOUT"
2438 " [intr %x, stat %x, step %d]"
2439 " prevphase %x, resid %lx\n",
2444 (u_long)sc->sc_omlen);
2445 } else if (sc->sc_dleft == 0) {
2447 * The DMA operation was started for
2448 * a DATA transfer. Print a diagnostic
2449 * if the DMA counter and TC bit
2450 * appear to be out of sync.
2452 * XXX This is fatal and usually means that
2453 * the DMA engine is hopelessly out of
2454 * sync with reality. A disk is likely
2455 * getting spammed at this point.
2457 device_printf(sc->sc_dev, "!TC on DATA XFER"
2458 " [intr %x, stat %x, step %d]"
2459 " prevphase %x, resid %x\n",
2464 ecb ? ecb->dleft : -1);
2471 * Check for less serious errors.
2473 if ((sc->sc_espstat & NCRSTAT_PE) != 0) {
2474 device_printf(sc->sc_dev, "SCSI bus parity error\n");
2475 if (sc->sc_prevphase == MESSAGE_IN_PHASE)
2476 ncr53c9x_sched_msgout(SEND_PARITY_ERROR);
2478 ncr53c9x_sched_msgout(SEND_INIT_DET_ERR);
2481 if ((sc->sc_espintr & NCRINTR_DIS) != 0) {
2483 NCR_INTS(("<DISC [intr %x, stat %x, step %d]>",
2484 sc->sc_espintr,sc->sc_espstat,sc->sc_espstep));
2485 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2486 NCRCMD(sc, NCRCMD_FLUSH);
2490 * This command must (apparently) be issued within
2491 * 250mS of a disconnect. So here you are...
2493 NCRCMD(sc, NCRCMD_ENSEL);
2495 switch (sc->sc_state) {
2496 case NCR_RESELECTED:
2500 ecb->ccb->ccb_h.status = CAM_SEL_TIMEOUT;
2502 /* Selection timeout -- discard all LUNs if empty. */
2503 ti = &sc->sc_tinfo[ecb->ccb->ccb_h.target_id];
2504 li = LIST_FIRST(&ti->luns);
2505 while (li != NULL) {
2506 if (li->untagged == NULL && li->used == 0) {
2507 if (li->lun < NCR_NLUN)
2508 ti->lun[li->lun] = NULL;
2509 LIST_REMOVE(li, link);
2512 * Restart the search at the beginning.
2514 li = LIST_FIRST(&ti->luns);
2517 li = LIST_NEXT(li, link);
2523 ti = &sc->sc_tinfo[ecb->ccb->ccb_h.target_id];
2524 if ((ti->flags & T_SDTRSENT) != 0) {
2525 xpt_print_path(ecb->ccb->ccb_h.path);
2526 printf("sync nego not completed!\n");
2527 ti->flags &= ~T_SDTRSENT;
2528 ti->curr.period = ti->goal.period = 0;
2529 ti->curr.offset = ti->goal.offset = 0;
2530 ncr53c9x_setsync(sc, ti);
2532 if ((ti->flags & T_WDTRSENT) != 0) {
2533 xpt_print_path(ecb->ccb->ccb_h.path);
2534 printf("wide nego not completed!\n");
2535 ti->flags &= ~T_WDTRSENT;
2536 ti->curr.width = ti->goal.width =
2537 MSG_EXT_WDTR_BUS_8_BIT;
2538 ncr53c9x_setsync(sc, ti);
2542 /* It may be OK to disconnect. */
2543 if ((sc->sc_flags & NCR_ABORTING) == 0) {
2545 * Section 5.1.1 of the SCSI 2 spec
2546 * suggests issuing a REQUEST SENSE
2547 * following an unexpected disconnect.
2548 * Some devices go into a contingent
2549 * allegiance condition when
2550 * disconnecting, and this is necessary
2551 * to clean up their state.
2553 device_printf(sc->sc_dev, "unexpected "
2554 "disconnect [state %d, intr %x, stat %x, "
2555 "phase(c %x, p %x)]; ", sc->sc_state,
2556 sc->sc_espintr, sc->sc_espstat,
2557 sc->sc_phase, sc->sc_prevphase);
2560 * XXX This will cause a chip reset and will
2561 * prevent us from finding out the real
2562 * problem with the device. However, it's
2563 * neccessary until a way can be found to
2564 * safely cancel the DMA that is in
2567 if (1 || (ecb->flags & ECB_SENSE) != 0) {
2568 printf("resetting\n");
2571 printf("sending REQUEST SENSE\n");
2572 callout_stop(&ecb->ch);
2573 ncr53c9x_sense(sc, ecb);
2575 } else if (ecb != NULL &&
2576 (ecb->flags & ECB_RESET) != 0) {
2577 ecb->ccb->ccb_h.status = CAM_REQ_CMP;
2581 ecb->ccb->ccb_h.status = CAM_CMD_TIMEOUT;
2584 case NCR_DISCONNECT:
2585 sc->sc_nexus = NULL;
2588 case NCR_CMDCOMPLETE:
2589 ecb->ccb->ccb_h.status = CAM_REQ_CMP;
2594 switch (sc->sc_state) {
2596 device_printf(sc->sc_dev, "waiting for Bus Reset to happen\n");
2599 case NCR_RESELECTED:
2601 * We must be continuing a message?
2603 device_printf(sc->sc_dev, "unhandled reselect continuation, "
2604 "state %d, intr %02x\n", sc->sc_state, sc->sc_espintr);
2608 case NCR_IDENTIFIED:
2610 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2611 i = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF;
2613 * Things are seriously screwed up.
2614 * Pull the brakes, i.e. reset.
2616 device_printf(sc->sc_dev, "target didn't send tag: %d "
2617 "bytes in FIFO\n", i);
2618 /* Drain and display FIFO. */
2620 printf("[%d] ", NCR_READ_REG(sc, NCR_FIFO));
2629 if (sc->sc_espintr & NCRINTR_RESEL) {
2630 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0;
2633 * If we're trying to select a
2634 * target ourselves, push our command
2635 * back into the ready list.
2637 if (sc->sc_state == NCR_SELECTING) {
2638 NCR_INTS(("backoff selector "));
2639 callout_stop(&ecb->ch);
2640 ncr53c9x_dequeue(sc, ecb);
2641 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
2642 ecb->flags |= ECB_READY;
2643 ecb = sc->sc_nexus = NULL;
2645 sc->sc_state = NCR_RESELECTED;
2646 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2648 * Things are seriously screwed up.
2649 * Pull the brakes, i.e. reset
2651 device_printf(sc->sc_dev, "target didn't "
2656 * The C90 only inhibits FIFO writes until reselection
2657 * is complete instead of waiting until the interrupt
2658 * status register has been read. So, if the reselect
2659 * happens while we were entering command bytes (for
2660 * another target) some of those bytes can appear in
2661 * the FIFO here, after the interrupt is taken.
2663 * To remedy this situation, pull the Selection ID
2664 * and Identify message from the FIFO directly, and
2665 * ignore any extraneous FIFO contents. Also, set
2666 * a flag that allows one Illegal Command Interrupt
2667 * to occur which the chip also generates as a result
2668 * of writing to the FIFO during a reselect.
2670 if (sc->sc_rev == NCR_VARIANT_ESP100) {
2672 NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF;
2673 sc->sc_imess[0] = NCR_READ_REG(sc, NCR_FIFO);
2674 sc->sc_imess[1] = NCR_READ_REG(sc, NCR_FIFO);
2677 /* Flush the rest. */
2678 NCRCMD(sc, NCRCMD_FLUSH);
2680 sc->sc_flags |= NCR_EXPECT_ILLCMD;
2682 nfifo = 2; /* We fixed it... */
2684 nfifo = ncr53c9x_rdfifo(sc, NCR_RDFIFO_START);
2687 device_printf(sc->sc_dev, "RESELECT: %d bytes "
2688 "in FIFO! [intr %x, stat %x, step %d, "
2697 sc->sc_selid = sc->sc_imess[0];
2698 NCR_INTS(("selid=%02x ", sc->sc_selid));
2700 /* Handle IDENTIFY message. */
2703 if (sc->sc_state != NCR_CONNECTED &&
2704 sc->sc_state != NCR_IDENTIFIED) {
2705 /* IDENTIFY fail?! */
2706 device_printf(sc->sc_dev, "identify failed, "
2707 "state %d, intr %02x\n", sc->sc_state,
2711 goto shortcut; /* i.e. next phase expected soon */
2714 #define NCRINTR_DONE (NCRINTR_FC | NCRINTR_BS)
2715 if ((sc->sc_espintr & NCRINTR_DONE) == NCRINTR_DONE) {
2717 * Arbitration won; examine the `step' register
2718 * to determine how far the selection could progress.
2722 * When doing path inquiry during boot
2723 * FAS100A trigger a stray interrupt which
2724 * we just ignore instead of panicing.
2726 if (sc->sc_state == NCR_IDLE &&
2727 sc->sc_espstep == 0)
2729 panic("ncr53c9x: no nexus");
2732 ti = &sc->sc_tinfo[ecb->ccb->ccb_h.target_id];
2734 switch (sc->sc_espstep) {
2737 * The target did not respond with a
2738 * message out phase - probably an old
2739 * device that doesn't recognize ATN.
2740 * Clear ATN and just continue, the
2741 * target should be in the command
2743 * XXX check for command phase?
2745 NCRCMD(sc, NCRCMD_RSTATN);
2749 if (ti->curr.period == ti->goal.period &&
2750 ti->curr.offset == ti->goal.offset &&
2751 ti->curr.width == ti->goal.width &&
2753 device_printf(sc->sc_dev, "step 1 "
2754 "and no negotiation to perform "
2755 "or tag to send\n");
2758 if (sc->sc_phase != MESSAGE_OUT_PHASE) {
2759 device_printf(sc->sc_dev, "step 1 "
2760 "but not in MESSAGE_OUT_PHASE\n");
2763 sc->sc_prevphase = MESSAGE_OUT_PHASE; /* XXX */
2764 if (ecb->flags & ECB_RESET) {
2766 * A DEVICE RESET was scheduled and
2767 * ATNS used. As SEND_DEV_RESET has
2768 * the highest priority, the target
2769 * will reset and disconnect and we
2770 * will end up in ncr53c9x_done w/o
2771 * negotiating or sending a TAG. So
2772 * we just break here in order to
2773 * avoid warnings about negotiation
2774 * not having completed.
2776 ncr53c9x_sched_msgout(SEND_DEV_RESET);
2779 if (ti->curr.width != ti->goal.width) {
2780 ti->flags |= T_WDTRSENT | T_SDTRSENT;
2781 ncr53c9x_sched_msgout(SEND_WDTR |
2784 if (ti->curr.period != ti->goal.period ||
2785 ti->curr.offset != ti->goal.offset) {
2786 ti->flags |= T_SDTRSENT;
2787 ncr53c9x_sched_msgout(SEND_SDTR);
2789 if (ecb->tag[0] != 0)
2790 /* Could not do ATN3 so send TAG. */
2791 ncr53c9x_sched_msgout(SEND_TAG);
2796 * Grr, this is supposed to mean
2797 * "target left command phase prematurely".
2798 * It seems to happen regularly when
2800 * Look at FIFO to see if command went out.
2801 * (Timing problems?)
2803 if (sc->sc_features & NCR_F_DMASELECT) {
2804 if (sc->sc_cmdlen == 0)
2805 /* Hope for the best... */
2807 } else if ((NCR_READ_REG(sc, NCR_FFLAG)
2808 & NCRFIFO_FF) == 0) {
2809 /* Hope for the best... */
2812 xpt_print_path(ecb->ccb->ccb_h.path);
2813 printf("selection failed; %d left in FIFO "
2814 "[intr %x, stat %x, step %d]\n",
2815 NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF,
2816 sc->sc_espintr, sc->sc_espstat,
2818 NCRCMD(sc, NCRCMD_FLUSH);
2819 ncr53c9x_sched_msgout(SEND_ABORT);
2823 /* Select stuck at Command Phase. */
2824 NCRCMD(sc, NCRCMD_FLUSH);
2828 if (sc->sc_features & NCR_F_DMASELECT &&
2829 sc->sc_cmdlen != 0) {
2830 xpt_print_path(ecb->ccb->ccb_h.path);
2831 printf("select; %lu left in DMA buffer "
2832 "[intr %x, stat %x, step %d]\n",
2833 (u_long)sc->sc_cmdlen,
2838 /* So far, everything went fine. */
2842 sc->sc_prevphase = INVALID_PHASE; /* ??? */
2843 /* Do an implicit RESTORE POINTERS. */
2844 sc->sc_dp = ecb->daddr;
2845 sc->sc_dleft = ecb->dleft;
2846 sc->sc_state = NCR_CONNECTED;
2849 device_printf(sc->sc_dev, "unexpected status after "
2850 "select: [intr %x, stat %x, step %x]\n",
2851 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
2852 NCRCMD(sc, NCRCMD_FLUSH);
2856 if (sc->sc_state == NCR_IDLE) {
2857 device_printf(sc->sc_dev, "stray interrupt\n");
2863 if ((sc->sc_flags & NCR_ICCS) != 0) {
2864 /* "Initiate Command Complete Steps" in progress */
2865 sc->sc_flags &= ~NCR_ICCS;
2867 if (!(sc->sc_espintr & NCRINTR_DONE)) {
2868 device_printf(sc->sc_dev, "ICCS: "
2869 ": [intr %x, stat %x, step %x]\n",
2870 sc->sc_espintr, sc->sc_espstat,
2873 ncr53c9x_rdfifo(sc, NCR_RDFIFO_START);
2874 if (sc->sc_imlen < 2)
2875 device_printf(sc->sc_dev, "can't get status, "
2876 "only %d bytes\n", (int)sc->sc_imlen);
2877 ecb->stat = sc->sc_imess[sc->sc_imlen - 2];
2878 msg = sc->sc_imess[sc->sc_imlen - 1];
2879 NCR_PHASE(("<stat:(%x,%x)>", ecb->stat, msg));
2880 if (msg == MSG_CMDCOMPLETE) {
2882 (ecb->flags & ECB_TENTATIVE_DONE) ?
2884 if ((ecb->flags & ECB_SENSE) == 0)
2885 ecb->ccb->csio.resid = ecb->dleft;
2886 sc->sc_state = NCR_CMDCOMPLETE;
2888 device_printf(sc->sc_dev, "STATUS_PHASE: "
2891 NCRCMD(sc, NCRCMD_MSGOK);
2892 goto shortcut; /* i.e. wait for disconnect */
2897 device_printf(sc->sc_dev, "invalid state: %d [intr %x, "
2898 "phase(c %x, p %x)]\n", sc->sc_state,
2899 sc->sc_espintr, sc->sc_phase, sc->sc_prevphase);
2904 * Driver is now in state NCR_CONNECTED, i.e. we
2905 * have a current command working the SCSI bus.
2907 if (sc->sc_state != NCR_CONNECTED || ecb == NULL) {
2908 panic("ncr53c9x: no nexus");
2911 switch (sc->sc_phase) {
2912 case MESSAGE_OUT_PHASE:
2913 NCR_PHASE(("MESSAGE_OUT_PHASE "));
2914 ncr53c9x_msgout(sc);
2915 sc->sc_prevphase = MESSAGE_OUT_PHASE;
2918 case MESSAGE_IN_PHASE:
2920 NCR_PHASE(("MESSAGE_IN_PHASE "));
2921 if ((sc->sc_espintr & NCRINTR_BS) != 0) {
2922 if ((sc->sc_rev != NCR_VARIANT_FAS366) ||
2923 !(sc->sc_espstat2 & NCRFAS_STAT2_EMPTY)) {
2924 NCRCMD(sc, NCRCMD_FLUSH);
2926 sc->sc_flags |= NCR_WAITI;
2927 NCRCMD(sc, NCRCMD_TRANS);
2928 } else if ((sc->sc_espintr & NCRINTR_FC) != 0) {
2929 if ((sc->sc_flags & NCR_WAITI) == 0) {
2930 device_printf(sc->sc_dev, "MSGIN: unexpected "
2931 "FC bit: [intr %x, stat %x, step %x]\n",
2932 sc->sc_espintr, sc->sc_espstat,
2935 sc->sc_flags &= ~NCR_WAITI;
2937 (sc->sc_prevphase == sc->sc_phase) ?
2938 NCR_RDFIFO_CONTINUE : NCR_RDFIFO_START);
2941 device_printf(sc->sc_dev, "MSGIN: weird bits: "
2942 "[intr %x, stat %x, step %x]\n",
2943 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
2945 sc->sc_prevphase = MESSAGE_IN_PHASE;
2946 goto shortcut; /* i.e. expect data to be ready */
2950 * Send the command block. Normally we don't see this
2951 * phase because the SEL_ATN command takes care of
2952 * all this. However, we end up here if either the
2953 * target or we wanted to exchange some more messages
2954 * first (e.g. to start negotiations).
2957 NCR_PHASE(("COMMAND_PHASE 0x%02x (%d) ",
2958 ecb->cmd.cmd.opcode, ecb->clen));
2959 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2960 NCRCMD(sc, NCRCMD_FLUSH);
2964 * If we have more messages to send, e.g. WDTR or SDTR
2965 * after we've sent a TAG, set ATN so we'll go back to
2966 * MESSAGE_OUT_PHASE.
2968 if (sc->sc_msgpriq) {
2969 NCRCMD(sc, NCRCMD_SETATN);
2970 sc->sc_flags |= NCR_ATN;
2972 if (sc->sc_features & NCR_F_DMASELECT) {
2973 /* Setup DMA transfer for command. */
2975 sc->sc_cmdlen = size;
2976 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
2977 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen,
2979 /* Program the SCSI counter. */
2980 NCR_SET_COUNT(sc, size);
2982 /* Load the count in. */
2983 NCRCMD(sc, NCRCMD_NOP | NCRCMD_DMA);
2985 /* Start the command transfer. */
2986 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA);
2989 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen);
2990 NCRCMD(sc, NCRCMD_TRANS);
2992 sc->sc_prevphase = COMMAND_PHASE;
2995 case DATA_OUT_PHASE:
2996 NCR_PHASE(("DATA_OUT_PHASE [%ld] ", (long)sc->sc_dleft));
2997 NCRCMD(sc, NCRCMD_FLUSH);
2998 size = ulmin(sc->sc_dleft, sc->sc_maxxfer);
2999 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 0, &size);
3000 sc->sc_prevphase = DATA_OUT_PHASE;
3004 NCR_PHASE(("DATA_IN_PHASE "));
3005 if (sc->sc_rev == NCR_VARIANT_ESP100)
3006 NCRCMD(sc, NCRCMD_FLUSH);
3007 size = ulmin(sc->sc_dleft, sc->sc_maxxfer);
3008 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 1, &size);
3009 sc->sc_prevphase = DATA_IN_PHASE;
3011 /* Target returned to data phase: wipe "done" memory */
3012 ecb->flags &= ~ECB_TENTATIVE_DONE;
3014 /* Program the SCSI counter. */
3015 NCR_SET_COUNT(sc, size);
3017 /* Load the count in. */
3018 NCRCMD(sc, NCRCMD_NOP | NCRCMD_DMA);
3021 * Note that if `size' is 0, we've already transceived
3022 * all the bytes we want but we're still in DATA PHASE.
3023 * Apparently, the device needs padding. Also, a
3024 * transfer size of 0 means "maximum" to the chip
3028 (size == 0 ? NCRCMD_TRPAD : NCRCMD_TRANS) | NCRCMD_DMA);
3033 NCR_PHASE(("STATUS_PHASE "));
3034 sc->sc_flags |= NCR_ICCS;
3035 NCRCMD(sc, NCRCMD_ICCS);
3036 sc->sc_prevphase = STATUS_PHASE;
3037 goto shortcut; /* i.e. expect status results soon */
3043 device_printf(sc->sc_dev,
3044 "unexpected bus phase; resetting\n");
3051 ncr53c9x_init(sc, 1);
3055 ncr53c9x_done(sc, ecb);
3059 sc->sc_state = NCR_IDLE;
3065 * The idea is that many of the SCSI operations take very little
3066 * time, and going away and getting interrupted is too high an
3067 * overhead to pay. For example, selecting, sending a message
3068 * and command and then doing some work can be done in one "pass".
3070 * The delay is a heuristic. It is 2 when at 20MHz, 2 at 25MHz and 1
3071 * at 40MHz. This needs testing.
3074 wait.tv_usec += 50 / sc->sc_freq;
3075 if (wait.tv_usec > 1000000) {
3077 wait.tv_usec -= 1000000;
3080 if (NCRDMA_ISINTR(sc))
3083 } while (cur.tv_sec <= wait.tv_sec && cur.tv_usec <= wait.tv_usec);
3087 ncr53c9x_abort(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb)
3090 NCR_LOCK_ASSERT(sc, MA_OWNED);
3092 /* 2 secs for the abort */
3093 ecb->timeout = NCR_ABORT_TIMEOUT;
3094 ecb->flags |= ECB_ABORT;
3096 if (ecb == sc->sc_nexus) {
3098 * If we're still selecting, the message will be scheduled
3099 * after selection is complete.
3101 if (sc->sc_state == NCR_CONNECTED)
3102 ncr53c9x_sched_msgout(SEND_ABORT);
3105 * Reschedule callout.
3107 callout_reset(&ecb->ch, mstohz(ecb->timeout),
3108 ncr53c9x_callout, ecb);
3111 * Just leave the command where it is.
3112 * XXX - what choice do we have but to reset the SCSI
3115 if (sc->sc_state == NCR_IDLE)
3121 ncr53c9x_callout(void *arg)
3123 struct ncr53c9x_ecb *ecb = arg;
3124 union ccb *ccb = ecb->ccb;
3125 struct ncr53c9x_softc *sc = ecb->sc;
3126 struct ncr53c9x_tinfo *ti;
3128 NCR_LOCK_ASSERT(sc, MA_OWNED);
3130 ti = &sc->sc_tinfo[ccb->ccb_h.target_id];
3131 xpt_print_path(ccb->ccb_h.path);
3132 device_printf(sc->sc_dev, "timed out [ecb %p (flags 0x%x, dleft %x, "
3133 "stat %x)], <state %d, nexus %p, phase(l %x, c %x, p %x), "
3134 "resid %lx, msg(q %x,o %x) %s>",
3135 ecb, ecb->flags, ecb->dleft, ecb->stat,
3136 sc->sc_state, sc->sc_nexus,
3137 NCR_READ_REG(sc, NCR_STAT),
3138 sc->sc_phase, sc->sc_prevphase,
3139 (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout,
3140 NCRDMA_ISACTIVE(sc) ? "DMA active" : "");
3141 #if defined(NCR53C9X_DEBUG) && NCR53C9X_DEBUG > 1
3142 printf("TRACE: %s.", ecb->trace);
3145 if (ecb->flags & ECB_ABORT) {
3146 /* Abort timed out. */
3148 ncr53c9x_init(sc, 1);
3150 /* Abort the operation that has timed out. */
3152 ccb->ccb_h.status = CAM_CMD_TIMEOUT;
3153 ncr53c9x_abort(sc, ecb);
3155 /* Disable sync mode if stuck in a data phase. */
3156 if (ecb == sc->sc_nexus &&
3157 ti->curr.offset != 0 &&
3158 (sc->sc_phase & (MSGI | CDI)) == 0) {
3159 /* XXX ASYNC CALLBACK! */
3160 ti->goal.offset = 0;
3161 xpt_print_path(ccb->ccb_h.path);
3162 printf("sync negotiation disabled\n");
3168 ncr53c9x_watch(void *arg)
3170 struct ncr53c9x_softc *sc = (struct ncr53c9x_softc *)arg;
3171 struct ncr53c9x_linfo *li;
3172 struct ncr53c9x_tinfo *ti;
3176 NCR_LOCK_ASSERT(sc, MA_OWNED);
3178 /* Delete any structures that have not been used in 10min. */
3179 old = time_second - (10 * 60);
3181 for (t = 0; t < sc->sc_ntarg; t++) {
3182 ti = &sc->sc_tinfo[t];
3183 li = LIST_FIRST(&ti->luns);
3185 if (li->last_used < old &&
3186 li->untagged == NULL &&
3188 if (li->lun < NCR_NLUN)
3189 ti->lun[li->lun] = NULL;
3190 LIST_REMOVE(li, link);
3192 /* Restart the search at the beginning. */
3193 li = LIST_FIRST(&ti->luns);
3196 li = LIST_NEXT(li, link);
3199 callout_reset(&sc->sc_watchdog, 60 * hz, ncr53c9x_watch, sc);