2 * Copyright (c) 1997-2008 by Matthew Jacob
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice immediately at the beginning of the file, without modification,
10 * this list of conditions, and the following disclaimer.
11 * 2. The name of the author may not be used to endorse or promote products
12 * derived from this software without specific prior written permission.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
18 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * PCI specific probe and attach routines for Qlogic ISP SCSI adapters.
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/module.h>
37 #include <sys/linker.h>
38 #include <sys/firmware.h>
40 #include <sys/stdint.h>
41 #include <dev/pci/pcireg.h>
42 #include <dev/pci/pcivar.h>
43 #include <machine/bus.h>
44 #include <machine/resource.h>
46 #include <sys/malloc.h>
49 #include <dev/isp/isp_freebsd.h>
51 static uint32_t isp_pci_rd_reg(ispsoftc_t *, int);
52 static void isp_pci_wr_reg(ispsoftc_t *, int, uint32_t);
53 static uint32_t isp_pci_rd_reg_1080(ispsoftc_t *, int);
54 static void isp_pci_wr_reg_1080(ispsoftc_t *, int, uint32_t);
55 static uint32_t isp_pci_rd_reg_2400(ispsoftc_t *, int);
56 static void isp_pci_wr_reg_2400(ispsoftc_t *, int, uint32_t);
57 static int isp_pci_rd_isr(ispsoftc_t *, uint32_t *, uint16_t *, uint16_t *);
58 static int isp_pci_rd_isr_2300(ispsoftc_t *, uint32_t *, uint16_t *, uint16_t *);
59 static int isp_pci_rd_isr_2400(ispsoftc_t *, uint32_t *, uint16_t *, uint16_t *);
60 static int isp_pci_mbxdma(ispsoftc_t *);
61 static int isp_pci_dmasetup(ispsoftc_t *, XS_T *, void *);
64 static void isp_pci_reset0(ispsoftc_t *);
65 static void isp_pci_reset1(ispsoftc_t *);
66 static void isp_pci_dumpregs(ispsoftc_t *, const char *);
68 static struct ispmdvec mdvec = {
74 isp_common_dmateardown,
79 BIU_BURST_ENABLE|BIU_PCI_CONF1_FIFO_64
82 static struct ispmdvec mdvec_1080 = {
88 isp_common_dmateardown,
93 BIU_BURST_ENABLE|BIU_PCI_CONF1_FIFO_64
96 static struct ispmdvec mdvec_12160 = {
102 isp_common_dmateardown,
107 BIU_BURST_ENABLE|BIU_PCI_CONF1_FIFO_64
110 static struct ispmdvec mdvec_2100 = {
116 isp_common_dmateardown,
122 static struct ispmdvec mdvec_2200 = {
128 isp_common_dmateardown,
134 static struct ispmdvec mdvec_2300 = {
140 isp_common_dmateardown,
146 static struct ispmdvec mdvec_2400 = {
152 isp_common_dmateardown,
158 static struct ispmdvec mdvec_2500 = {
164 isp_common_dmateardown,
170 #ifndef PCIM_CMD_INVEN
171 #define PCIM_CMD_INVEN 0x10
173 #ifndef PCIM_CMD_BUSMASTEREN
174 #define PCIM_CMD_BUSMASTEREN 0x0004
176 #ifndef PCIM_CMD_PERRESPEN
177 #define PCIM_CMD_PERRESPEN 0x0040
179 #ifndef PCIM_CMD_SEREN
180 #define PCIM_CMD_SEREN 0x0100
182 #ifndef PCIM_CMD_INTX_DISABLE
183 #define PCIM_CMD_INTX_DISABLE 0x0400
187 #define PCIR_COMMAND 0x04
190 #ifndef PCIR_CACHELNSZ
191 #define PCIR_CACHELNSZ 0x0c
194 #ifndef PCIR_LATTIMER
195 #define PCIR_LATTIMER 0x0d
199 #define PCIR_ROMADDR 0x30
202 #ifndef PCI_VENDOR_QLOGIC
203 #define PCI_VENDOR_QLOGIC 0x1077
206 #ifndef PCI_PRODUCT_QLOGIC_ISP1020
207 #define PCI_PRODUCT_QLOGIC_ISP1020 0x1020
210 #ifndef PCI_PRODUCT_QLOGIC_ISP1080
211 #define PCI_PRODUCT_QLOGIC_ISP1080 0x1080
214 #ifndef PCI_PRODUCT_QLOGIC_ISP10160
215 #define PCI_PRODUCT_QLOGIC_ISP10160 0x1016
218 #ifndef PCI_PRODUCT_QLOGIC_ISP12160
219 #define PCI_PRODUCT_QLOGIC_ISP12160 0x1216
222 #ifndef PCI_PRODUCT_QLOGIC_ISP1240
223 #define PCI_PRODUCT_QLOGIC_ISP1240 0x1240
226 #ifndef PCI_PRODUCT_QLOGIC_ISP1280
227 #define PCI_PRODUCT_QLOGIC_ISP1280 0x1280
230 #ifndef PCI_PRODUCT_QLOGIC_ISP2100
231 #define PCI_PRODUCT_QLOGIC_ISP2100 0x2100
234 #ifndef PCI_PRODUCT_QLOGIC_ISP2200
235 #define PCI_PRODUCT_QLOGIC_ISP2200 0x2200
238 #ifndef PCI_PRODUCT_QLOGIC_ISP2300
239 #define PCI_PRODUCT_QLOGIC_ISP2300 0x2300
242 #ifndef PCI_PRODUCT_QLOGIC_ISP2312
243 #define PCI_PRODUCT_QLOGIC_ISP2312 0x2312
246 #ifndef PCI_PRODUCT_QLOGIC_ISP2322
247 #define PCI_PRODUCT_QLOGIC_ISP2322 0x2322
250 #ifndef PCI_PRODUCT_QLOGIC_ISP2422
251 #define PCI_PRODUCT_QLOGIC_ISP2422 0x2422
254 #ifndef PCI_PRODUCT_QLOGIC_ISP2432
255 #define PCI_PRODUCT_QLOGIC_ISP2432 0x2432
258 #ifndef PCI_PRODUCT_QLOGIC_ISP2532
259 #define PCI_PRODUCT_QLOGIC_ISP2532 0x2532
262 #ifndef PCI_PRODUCT_QLOGIC_ISP6312
263 #define PCI_PRODUCT_QLOGIC_ISP6312 0x6312
266 #ifndef PCI_PRODUCT_QLOGIC_ISP6322
267 #define PCI_PRODUCT_QLOGIC_ISP6322 0x6322
271 #define PCI_QLOGIC_ISP1020 \
272 ((PCI_PRODUCT_QLOGIC_ISP1020 << 16) | PCI_VENDOR_QLOGIC)
274 #define PCI_QLOGIC_ISP1080 \
275 ((PCI_PRODUCT_QLOGIC_ISP1080 << 16) | PCI_VENDOR_QLOGIC)
277 #define PCI_QLOGIC_ISP10160 \
278 ((PCI_PRODUCT_QLOGIC_ISP10160 << 16) | PCI_VENDOR_QLOGIC)
280 #define PCI_QLOGIC_ISP12160 \
281 ((PCI_PRODUCT_QLOGIC_ISP12160 << 16) | PCI_VENDOR_QLOGIC)
283 #define PCI_QLOGIC_ISP1240 \
284 ((PCI_PRODUCT_QLOGIC_ISP1240 << 16) | PCI_VENDOR_QLOGIC)
286 #define PCI_QLOGIC_ISP1280 \
287 ((PCI_PRODUCT_QLOGIC_ISP1280 << 16) | PCI_VENDOR_QLOGIC)
289 #define PCI_QLOGIC_ISP2100 \
290 ((PCI_PRODUCT_QLOGIC_ISP2100 << 16) | PCI_VENDOR_QLOGIC)
292 #define PCI_QLOGIC_ISP2200 \
293 ((PCI_PRODUCT_QLOGIC_ISP2200 << 16) | PCI_VENDOR_QLOGIC)
295 #define PCI_QLOGIC_ISP2300 \
296 ((PCI_PRODUCT_QLOGIC_ISP2300 << 16) | PCI_VENDOR_QLOGIC)
298 #define PCI_QLOGIC_ISP2312 \
299 ((PCI_PRODUCT_QLOGIC_ISP2312 << 16) | PCI_VENDOR_QLOGIC)
301 #define PCI_QLOGIC_ISP2322 \
302 ((PCI_PRODUCT_QLOGIC_ISP2322 << 16) | PCI_VENDOR_QLOGIC)
304 #define PCI_QLOGIC_ISP2422 \
305 ((PCI_PRODUCT_QLOGIC_ISP2422 << 16) | PCI_VENDOR_QLOGIC)
307 #define PCI_QLOGIC_ISP2432 \
308 ((PCI_PRODUCT_QLOGIC_ISP2432 << 16) | PCI_VENDOR_QLOGIC)
310 #define PCI_QLOGIC_ISP2532 \
311 ((PCI_PRODUCT_QLOGIC_ISP2532 << 16) | PCI_VENDOR_QLOGIC)
313 #define PCI_QLOGIC_ISP6312 \
314 ((PCI_PRODUCT_QLOGIC_ISP6312 << 16) | PCI_VENDOR_QLOGIC)
316 #define PCI_QLOGIC_ISP6322 \
317 ((PCI_PRODUCT_QLOGIC_ISP6322 << 16) | PCI_VENDOR_QLOGIC)
320 * Odd case for some AMI raid cards... We need to *not* attach to this.
322 #define AMI_RAID_SUBVENDOR_ID 0x101e
324 #define IO_MAP_REG 0x10
325 #define MEM_MAP_REG 0x14
327 #define PCI_DFLT_LTNCY 0x40
328 #define PCI_DFLT_LNSZ 0x10
330 static int isp_pci_probe (device_t);
331 static int isp_pci_attach (device_t);
332 static int isp_pci_detach (device_t);
335 #define ISP_PCD(isp) ((struct isp_pcisoftc *)isp)->pci_dev
336 struct isp_pcisoftc {
339 struct resource * pci_reg;
341 int16_t pci_poff[_NREG_BLKS];
347 static device_method_t isp_pci_methods[] = {
348 /* Device interface */
349 DEVMETHOD(device_probe, isp_pci_probe),
350 DEVMETHOD(device_attach, isp_pci_attach),
351 DEVMETHOD(device_detach, isp_pci_detach),
355 static driver_t isp_pci_driver = {
356 "isp", isp_pci_methods, sizeof (struct isp_pcisoftc)
358 static devclass_t isp_devclass;
359 DRIVER_MODULE(isp, pci, isp_pci_driver, isp_devclass, 0, 0);
362 isp_pci_probe(device_t dev)
364 switch ((pci_get_device(dev) << 16) | (pci_get_vendor(dev))) {
365 case PCI_QLOGIC_ISP1020:
366 device_set_desc(dev, "Qlogic ISP 1020/1040 PCI SCSI Adapter");
368 case PCI_QLOGIC_ISP1080:
369 device_set_desc(dev, "Qlogic ISP 1080 PCI SCSI Adapter");
371 case PCI_QLOGIC_ISP1240:
372 device_set_desc(dev, "Qlogic ISP 1240 PCI SCSI Adapter");
374 case PCI_QLOGIC_ISP1280:
375 device_set_desc(dev, "Qlogic ISP 1280 PCI SCSI Adapter");
377 case PCI_QLOGIC_ISP10160:
378 device_set_desc(dev, "Qlogic ISP 10160 PCI SCSI Adapter");
380 case PCI_QLOGIC_ISP12160:
381 if (pci_get_subvendor(dev) == AMI_RAID_SUBVENDOR_ID) {
384 device_set_desc(dev, "Qlogic ISP 12160 PCI SCSI Adapter");
386 case PCI_QLOGIC_ISP2100:
387 device_set_desc(dev, "Qlogic ISP 2100 PCI FC-AL Adapter");
389 case PCI_QLOGIC_ISP2200:
390 device_set_desc(dev, "Qlogic ISP 2200 PCI FC-AL Adapter");
392 case PCI_QLOGIC_ISP2300:
393 device_set_desc(dev, "Qlogic ISP 2300 PCI FC-AL Adapter");
395 case PCI_QLOGIC_ISP2312:
396 device_set_desc(dev, "Qlogic ISP 2312 PCI FC-AL Adapter");
398 case PCI_QLOGIC_ISP2322:
399 device_set_desc(dev, "Qlogic ISP 2322 PCI FC-AL Adapter");
401 case PCI_QLOGIC_ISP2422:
402 device_set_desc(dev, "Qlogic ISP 2422 PCI FC-AL Adapter");
404 case PCI_QLOGIC_ISP2432:
405 device_set_desc(dev, "Qlogic ISP 2432 PCI FC-AL Adapter");
407 case PCI_QLOGIC_ISP2532:
408 device_set_desc(dev, "Qlogic ISP 2532 PCI FC-AL Adapter");
410 case PCI_QLOGIC_ISP6312:
411 device_set_desc(dev, "Qlogic ISP 6312 PCI FC-AL Adapter");
413 case PCI_QLOGIC_ISP6322:
414 device_set_desc(dev, "Qlogic ISP 6322 PCI FC-AL Adapter");
419 if (isp_announced == 0 && bootverbose) {
420 printf("Qlogic ISP Driver, FreeBSD Version %d.%d, "
421 "Core Version %d.%d\n",
422 ISP_PLATFORM_VERSION_MAJOR, ISP_PLATFORM_VERSION_MINOR,
423 ISP_CORE_VERSION_MAJOR, ISP_CORE_VERSION_MINOR);
427 * XXXX: Here is where we might load the f/w module
428 * XXXX: (or increase a reference count to it).
430 return (BUS_PROBE_DEFAULT);
434 isp_get_generic_options(device_t dev, ispsoftc_t *isp, int *nvp)
439 * Figure out if we're supposed to skip this one.
442 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "disable", &tval) == 0 && tval) {
443 device_printf(dev, "disabled at user request\n");
444 isp->isp_osinfo.disabled = 1;
449 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "fwload_disable", &tval) == 0 && tval != 0) {
450 isp->isp_confopts |= ISP_CFG_NORELOAD;
453 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "ignore_nvram", &tval) == 0 && tval != 0) {
454 isp->isp_confopts |= ISP_CFG_NONVRAM;
457 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "debug", &tval);
459 isp->isp_dblev = tval;
461 isp->isp_dblev = ISP_LOGWARN|ISP_LOGERR;
464 isp->isp_dblev |= ISP_LOGCONFIG|ISP_LOGINFO;
466 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "vports", &tval);
467 if (tval > 0 && tval < 127) {
473 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "autoconfig", &tval);
474 isp_autoconfig = tval;
476 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "quickboot_time", &tval);
477 isp_quickboot_time = tval;
480 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "forcemulti", &tval) == 0 && tval != 0) {
481 isp->isp_osinfo.forcemulti = 1;
486 isp_get_pci_options(device_t dev, int *m1, int *m2)
490 * Which we should try first - memory mapping or i/o mapping?
492 * We used to try memory first followed by i/o on alpha, otherwise
493 * the reverse, but we should just try memory first all the time now.
495 *m1 = PCIM_CMD_MEMEN;
496 *m2 = PCIM_CMD_PORTEN;
499 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "prefer_iomap", &tval) == 0 && tval != 0) {
500 *m1 = PCIM_CMD_PORTEN;
501 *m2 = PCIM_CMD_MEMEN;
504 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "prefer_memmap", &tval) == 0 && tval != 0) {
505 *m1 = PCIM_CMD_MEMEN;
506 *m2 = PCIM_CMD_PORTEN;
511 isp_get_specific_options(device_t dev, int chan, ispsoftc_t *isp)
516 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "iid", &tval)) {
518 ISP_FC_PC(isp, chan)->default_id = 109 - chan;
520 ISP_SPI_PC(isp, chan)->iid = 7;
524 ISP_FC_PC(isp, chan)->default_id = tval - chan;
526 ISP_SPI_PC(isp, chan)->iid = tval;
528 isp->isp_confopts |= ISP_CFG_OWNLOOPID;
532 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "role", &tval) == 0) {
535 case ISP_ROLE_INITIATOR:
536 case ISP_ROLE_TARGET:
537 case ISP_ROLE_INITIATOR|ISP_ROLE_TARGET:
538 device_printf(dev, "setting role to 0x%x\n", tval);
546 tval = ISP_DEFAULT_ROLES;
550 ISP_SPI_PC(isp, chan)->role = tval;
553 ISP_FC_PC(isp, chan)->role = tval;
556 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "fullduplex", &tval) == 0 && tval != 0) {
557 isp->isp_confopts |= ISP_CFG_FULL_DUPLEX;
560 if (resource_string_value(device_get_name(dev), device_get_unit(dev), "topology", (const char **) &sptr) == 0 && sptr != 0) {
561 if (strcmp(sptr, "lport") == 0) {
562 isp->isp_confopts |= ISP_CFG_LPORT;
563 } else if (strcmp(sptr, "nport") == 0) {
564 isp->isp_confopts |= ISP_CFG_NPORT;
565 } else if (strcmp(sptr, "lport-only") == 0) {
566 isp->isp_confopts |= ISP_CFG_LPORT_ONLY;
567 } else if (strcmp(sptr, "nport-only") == 0) {
568 isp->isp_confopts |= ISP_CFG_NPORT_ONLY;
573 * Because the resource_*_value functions can neither return
574 * 64 bit integer values, nor can they be directly coerced
575 * to interpret the right hand side of the assignment as
576 * you want them to interpret it, we have to force WWN
577 * hint replacement to specify WWN strings with a leading
578 * 'w' (e..g w50000000aaaa0001). Sigh.
581 tval = resource_string_value(device_get_name(dev), device_get_unit(dev), "portwwn", (const char **) &sptr);
582 if (tval == 0 && sptr != 0 && *sptr++ == 'w') {
584 ISP_FC_PC(isp, chan)->def_wwpn = strtouq(sptr, &eptr, 16);
585 if (eptr < sptr + 16 || ISP_FC_PC(isp, chan)->def_wwpn == -1) {
586 device_printf(dev, "mangled portwwn hint '%s'\n", sptr);
587 ISP_FC_PC(isp, chan)->def_wwpn = 0;
592 tval = resource_string_value(device_get_name(dev), device_get_unit(dev), "nodewwn", (const char **) &sptr);
593 if (tval == 0 && sptr != 0 && *sptr++ == 'w') {
595 ISP_FC_PC(isp, chan)->def_wwnn = strtouq(sptr, &eptr, 16);
596 if (eptr < sptr + 16 || ISP_FC_PC(isp, chan)->def_wwnn == 0) {
597 device_printf(dev, "mangled nodewwn hint '%s'\n", sptr);
598 ISP_FC_PC(isp, chan)->def_wwnn = 0;
603 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "hysteresis", &tval);
604 if (tval >= 0 && tval < 256) {
605 ISP_FC_PC(isp, chan)->hysteresis = tval;
607 ISP_FC_PC(isp, chan)->hysteresis = isp_fabric_hysteresis;
611 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "loop_down_limit", &tval);
612 if (tval >= 0 && tval < 0xffff) {
613 ISP_FC_PC(isp, chan)->loop_down_limit = tval;
615 ISP_FC_PC(isp, chan)->loop_down_limit = isp_loop_down_limit;
619 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "gone_device_time", &tval);
620 if (tval >= 0 && tval < 0xffff) {
621 ISP_FC_PC(isp, chan)->gone_device_time = tval;
623 ISP_FC_PC(isp, chan)->gone_device_time = isp_gone_device_time;
628 isp_pci_attach(device_t dev)
630 struct resource *regs, *irq;
631 int rtp, rgd, iqd, i, m1, m2, locksetup = 0;
633 uint32_t data, cmd, linesz, did;
634 struct isp_pcisoftc *pcs;
635 ispsoftc_t *isp = NULL;
639 pcs = device_get_softc(dev);
641 device_printf(dev, "cannot get softc\n");
644 memset(pcs, 0, sizeof (*pcs));
652 * Get Generic Options
654 isp_get_generic_options(dev, isp, &isp_nvports);
657 * Check to see if options have us disabled
659 if (isp->isp_osinfo.disabled) {
661 * But return zero to preserve unit numbering
667 * Get PCI options- which in this case are just mapping preferences.
669 isp_get_pci_options(dev, &m1, &m2);
671 linesz = PCI_DFLT_LNSZ;
675 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
677 rtp = (m1 == PCIM_CMD_MEMEN)? SYS_RES_MEMORY : SYS_RES_IOPORT;
678 rgd = (m1 == PCIM_CMD_MEMEN)? MEM_MAP_REG : IO_MAP_REG;
679 regs = bus_alloc_resource_any(dev, rtp, &rgd, RF_ACTIVE);
681 if (regs == NULL && (cmd & m2)) {
682 rtp = (m2 == PCIM_CMD_MEMEN)? SYS_RES_MEMORY : SYS_RES_IOPORT;
683 rgd = (m2 == PCIM_CMD_MEMEN)? MEM_MAP_REG : IO_MAP_REG;
684 regs = bus_alloc_resource_any(dev, rtp, &rgd, RF_ACTIVE);
687 device_printf(dev, "unable to map any ports\n");
691 device_printf(dev, "using %s space register mapping\n", (rgd == IO_MAP_REG)? "I/O" : "Memory");
693 isp->isp_bus_tag = rman_get_bustag(regs);
694 isp->isp_bus_handle = rman_get_bushandle(regs);
698 pcs->pci_poff[BIU_BLOCK >> _BLK_REG_SHFT] = BIU_REGS_OFF;
699 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS_OFF;
700 pcs->pci_poff[SXP_BLOCK >> _BLK_REG_SHFT] = PCI_SXP_REGS_OFF;
701 pcs->pci_poff[RISC_BLOCK >> _BLK_REG_SHFT] = PCI_RISC_REGS_OFF;
702 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = DMA_REGS_OFF;
704 switch (pci_get_devid(dev)) {
705 case PCI_QLOGIC_ISP1020:
707 isp->isp_mdvec = &mdvec;
708 isp->isp_type = ISP_HA_SCSI_UNKNOWN;
710 case PCI_QLOGIC_ISP1080:
712 isp->isp_mdvec = &mdvec_1080;
713 isp->isp_type = ISP_HA_SCSI_1080;
714 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
716 case PCI_QLOGIC_ISP1240:
718 isp->isp_mdvec = &mdvec_1080;
719 isp->isp_type = ISP_HA_SCSI_1240;
721 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
723 case PCI_QLOGIC_ISP1280:
725 isp->isp_mdvec = &mdvec_1080;
726 isp->isp_type = ISP_HA_SCSI_1280;
727 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
729 case PCI_QLOGIC_ISP10160:
731 isp->isp_mdvec = &mdvec_12160;
732 isp->isp_type = ISP_HA_SCSI_10160;
733 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
735 case PCI_QLOGIC_ISP12160:
738 isp->isp_mdvec = &mdvec_12160;
739 isp->isp_type = ISP_HA_SCSI_12160;
740 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
742 case PCI_QLOGIC_ISP2100:
744 isp->isp_mdvec = &mdvec_2100;
745 isp->isp_type = ISP_HA_FC_2100;
746 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2100_OFF;
747 if (pci_get_revid(dev) < 3) {
749 * XXX: Need to get the actual revision
750 * XXX: number of the 2100 FB. At any rate,
751 * XXX: lower cache line size for early revision
757 case PCI_QLOGIC_ISP2200:
759 isp->isp_mdvec = &mdvec_2200;
760 isp->isp_type = ISP_HA_FC_2200;
761 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2100_OFF;
763 case PCI_QLOGIC_ISP2300:
765 isp->isp_mdvec = &mdvec_2300;
766 isp->isp_type = ISP_HA_FC_2300;
767 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2300_OFF;
769 case PCI_QLOGIC_ISP2312:
770 case PCI_QLOGIC_ISP6312:
772 isp->isp_mdvec = &mdvec_2300;
773 isp->isp_type = ISP_HA_FC_2312;
774 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2300_OFF;
776 case PCI_QLOGIC_ISP2322:
777 case PCI_QLOGIC_ISP6322:
779 isp->isp_mdvec = &mdvec_2300;
780 isp->isp_type = ISP_HA_FC_2322;
781 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2300_OFF;
783 case PCI_QLOGIC_ISP2422:
784 case PCI_QLOGIC_ISP2432:
786 isp->isp_nchan += isp_nvports;
787 isp->isp_mdvec = &mdvec_2400;
788 isp->isp_type = ISP_HA_FC_2400;
789 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2400_OFF;
791 case PCI_QLOGIC_ISP2532:
793 isp->isp_nchan += isp_nvports;
794 isp->isp_mdvec = &mdvec_2500;
795 isp->isp_type = ISP_HA_FC_2500;
796 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2400_OFF;
799 device_printf(dev, "unknown device type\n");
803 isp->isp_revision = pci_get_revid(dev);
806 psize = sizeof (fcparam);
807 xsize = sizeof (struct isp_fc);
809 psize = sizeof (sdparam);
810 xsize = sizeof (struct isp_spi);
812 psize *= isp->isp_nchan;
813 xsize *= isp->isp_nchan;
814 isp->isp_param = malloc(psize, M_DEVBUF, M_NOWAIT | M_ZERO);
815 if (isp->isp_param == NULL) {
816 device_printf(dev, "cannot allocate parameter data\n");
819 isp->isp_osinfo.pc.ptr = malloc(xsize, M_DEVBUF, M_NOWAIT | M_ZERO);
820 if (isp->isp_osinfo.pc.ptr == NULL) {
821 device_printf(dev, "cannot allocate parameter data\n");
826 * Now that we know who we are (roughly) get/set specific options
828 for (i = 0; i < isp->isp_nchan; i++) {
829 isp_get_specific_options(dev, i, isp);
833 * The 'it' suffix really only matters for SCSI cards in target mode.
835 isp->isp_osinfo.fw = NULL;
836 if (IS_SCSI(isp) && (ISP_SPI_PC(isp, 0)->role & ISP_ROLE_TARGET)) {
837 snprintf(fwname, sizeof (fwname), "isp_%04x_it", did);
838 isp->isp_osinfo.fw = firmware_get(fwname);
839 } else if (IS_24XX(isp) && (isp->isp_nchan > 1 || isp->isp_osinfo.forcemulti)) {
840 snprintf(fwname, sizeof (fwname), "isp_%04x_multi", did);
841 isp->isp_osinfo.fw = firmware_get(fwname);
843 if (isp->isp_osinfo.fw == NULL) {
844 snprintf(fwname, sizeof (fwname), "isp_%04x", did);
845 isp->isp_osinfo.fw = firmware_get(fwname);
847 if (isp->isp_osinfo.fw != NULL) {
848 isp->isp_mdvec->dv_ispfw = isp->isp_osinfo.fw->data;
852 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER
855 cmd |= PCIM_CMD_SEREN | PCIM_CMD_PERRESPEN |
856 PCIM_CMD_BUSMASTEREN | PCIM_CMD_INVEN;
858 if (IS_2300(isp)) { /* per QLogic errata */
859 cmd &= ~PCIM_CMD_INVEN;
862 if (IS_2322(isp) || pci_get_devid(dev) == PCI_QLOGIC_ISP6312) {
863 cmd &= ~PCIM_CMD_INTX_DISABLE;
867 cmd &= ~PCIM_CMD_INTX_DISABLE;
870 pci_write_config(dev, PCIR_COMMAND, cmd, 2);
873 * Make sure the Cache Line Size register is set sensibly.
875 data = pci_read_config(dev, PCIR_CACHELNSZ, 1);
876 if (data == 0 || (linesz != PCI_DFLT_LNSZ && data != linesz)) {
877 isp_prt(isp, ISP_LOGCONFIG, "set PCI line size to %d from %d", linesz, data);
879 pci_write_config(dev, PCIR_CACHELNSZ, data, 1);
883 * Make sure the Latency Timer is sane.
885 data = pci_read_config(dev, PCIR_LATTIMER, 1);
886 if (data < PCI_DFLT_LTNCY) {
887 data = PCI_DFLT_LTNCY;
888 isp_prt(isp, ISP_LOGCONFIG, "set PCI latency to %d", data);
889 pci_write_config(dev, PCIR_LATTIMER, data, 1);
893 * Make sure we've disabled the ROM.
895 data = pci_read_config(dev, PCIR_ROMADDR, 4);
897 pci_write_config(dev, PCIR_ROMADDR, data, 4);
902 * NB: MSI-X needs to be disabled for the 2432 (PCI-Express)
904 if (IS_24XX(isp) || IS_2322(isp)) {
905 pcs->msicount = pci_msi_count(dev);
906 if (pcs->msicount > 1) {
909 if (pci_alloc_msi(dev, &pcs->msicount) == 0) {
915 irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd, RF_ACTIVE | RF_SHAREABLE);
917 device_printf(dev, "could not allocate interrupt\n");
921 /* Make sure the lock is set up. */
922 mtx_init(&isp->isp_osinfo.lock, "isp", NULL, MTX_DEF);
925 if (isp_setup_intr(dev, irq, ISP_IFLAGS, NULL, isp_platform_intr, isp, &pcs->ih)) {
926 device_printf(dev, "could not setup interrupt\n");
931 * Last minute checks...
933 if (IS_23XX(isp) || IS_24XX(isp)) {
934 isp->isp_port = pci_get_function(dev);
938 * Make sure we're in reset state.
942 if (isp->isp_state != ISP_RESETSTATE) {
947 if (isp->isp_state == ISP_INITSTATE) {
948 isp->isp_state = ISP_RUNSTATE;
951 if (isp_attach(isp)) {
960 if (pcs && pcs->ih) {
961 (void) bus_teardown_intr(dev, irq, pcs->ih);
963 if (locksetup && isp) {
964 mtx_destroy(&isp->isp_osinfo.lock);
967 (void) bus_release_resource(dev, SYS_RES_IRQ, iqd, irq);
969 if (pcs && pcs->msicount) {
970 pci_release_msi(dev);
973 (void) bus_release_resource(dev, rtp, rgd, regs);
976 if (pcs->pci_isp.isp_param) {
977 free(pcs->pci_isp.isp_param, M_DEVBUF);
978 pcs->pci_isp.isp_param = NULL;
980 if (pcs->pci_isp.isp_osinfo.pc.ptr) {
981 free(pcs->pci_isp.isp_osinfo.pc.ptr, M_DEVBUF);
982 pcs->pci_isp.isp_osinfo.pc.ptr = NULL;
989 isp_pci_detach(device_t dev)
991 struct isp_pcisoftc *pcs;
994 pcs = device_get_softc(dev);
998 isp = (ispsoftc_t *) pcs;
999 ISP_DISABLE_INTS(isp);
1000 mtx_destroy(&isp->isp_osinfo.lock);
1004 #define IspVirt2Off(a, x) \
1005 (((struct isp_pcisoftc *)a)->pci_poff[((x) & _BLK_REG_MASK) >> \
1006 _BLK_REG_SHFT] + ((x) & 0xfff))
1008 #define BXR2(isp, off) \
1009 bus_space_read_2(isp->isp_bus_tag, isp->isp_bus_handle, off)
1010 #define BXW2(isp, off, v) \
1011 bus_space_write_2(isp->isp_bus_tag, isp->isp_bus_handle, off, v)
1012 #define BXR4(isp, off) \
1013 bus_space_read_4(isp->isp_bus_tag, isp->isp_bus_handle, off)
1014 #define BXW4(isp, off, v) \
1015 bus_space_write_4(isp->isp_bus_tag, isp->isp_bus_handle, off, v)
1018 static ISP_INLINE int
1019 isp_pci_rd_debounced(ispsoftc_t *isp, int off, uint16_t *rp)
1021 uint32_t val0, val1;
1025 val0 = BXR2(isp, IspVirt2Off(isp, off));
1026 val1 = BXR2(isp, IspVirt2Off(isp, off));
1027 } while (val0 != val1 && ++i < 1000);
1036 isp_pci_rd_isr(ispsoftc_t *isp, uint32_t *isrp, uint16_t *semap, uint16_t *mbp)
1041 if (isp_pci_rd_debounced(isp, BIU_ISR, &isr)) {
1044 if (isp_pci_rd_debounced(isp, BIU_SEMA, &sema)) {
1048 isr = BXR2(isp, IspVirt2Off(isp, BIU_ISR));
1049 sema = BXR2(isp, IspVirt2Off(isp, BIU_SEMA));
1051 isp_prt(isp, ISP_LOGDEBUG3, "ISR 0x%x SEMA 0x%x", isr, sema);
1052 isr &= INT_PENDING_MASK(isp);
1053 sema &= BIU_SEMA_LOCK;
1054 if (isr == 0 && sema == 0) {
1058 if ((*semap = sema) != 0) {
1060 if (isp_pci_rd_debounced(isp, OUTMAILBOX0, mbp)) {
1064 *mbp = BXR2(isp, IspVirt2Off(isp, OUTMAILBOX0));
1071 isp_pci_rd_isr_2300(ispsoftc_t *isp, uint32_t *isrp,
1072 uint16_t *semap, uint16_t *mbox0p)
1077 if (!(BXR2(isp, IspVirt2Off(isp, BIU_ISR) & BIU2100_ISR_RISC_INT))) {
1081 r2hisr = BXR4(isp, IspVirt2Off(isp, BIU_R2HSTSLO));
1082 isp_prt(isp, ISP_LOGDEBUG3, "RISC2HOST ISR 0x%x", r2hisr);
1083 if ((r2hisr & BIU_R2HST_INTR) == 0) {
1087 switch (r2hisr & BIU_R2HST_ISTAT_MASK) {
1088 case ISPR2HST_ROM_MBX_OK:
1089 case ISPR2HST_ROM_MBX_FAIL:
1090 case ISPR2HST_MBX_OK:
1091 case ISPR2HST_MBX_FAIL:
1092 case ISPR2HST_ASYNC_EVENT:
1093 *isrp = r2hisr & 0xffff;
1094 *mbox0p = (r2hisr >> 16);
1097 case ISPR2HST_RIO_16:
1098 *isrp = r2hisr & 0xffff;
1099 *mbox0p = ASYNC_RIO1;
1102 case ISPR2HST_FPOST:
1103 *isrp = r2hisr & 0xffff;
1104 *mbox0p = ASYNC_CMD_CMPLT;
1107 case ISPR2HST_FPOST_CTIO:
1108 *isrp = r2hisr & 0xffff;
1109 *mbox0p = ASYNC_CTIO_DONE;
1112 case ISPR2HST_RSPQ_UPDATE:
1113 *isrp = r2hisr & 0xffff;
1118 hccr = ISP_READ(isp, HCCR);
1119 if (hccr & HCCR_PAUSE) {
1120 ISP_WRITE(isp, HCCR, HCCR_RESET);
1121 isp_prt(isp, ISP_LOGERR,
1122 "RISC paused at interrupt (%x->%x)", hccr,
1123 ISP_READ(isp, HCCR));
1124 ISP_WRITE(isp, BIU_ICR, 0);
1126 isp_prt(isp, ISP_LOGERR, "unknown interrupt 0x%x\n",
1134 isp_pci_rd_isr_2400(ispsoftc_t *isp, uint32_t *isrp,
1135 uint16_t *semap, uint16_t *mbox0p)
1139 r2hisr = BXR4(isp, IspVirt2Off(isp, BIU2400_R2HSTSLO));
1140 isp_prt(isp, ISP_LOGDEBUG3, "RISC2HOST ISR 0x%x", r2hisr);
1141 if ((r2hisr & BIU2400_R2HST_INTR) == 0) {
1145 switch (r2hisr & BIU2400_R2HST_ISTAT_MASK) {
1146 case ISP2400R2HST_ROM_MBX_OK:
1147 case ISP2400R2HST_ROM_MBX_FAIL:
1148 case ISP2400R2HST_MBX_OK:
1149 case ISP2400R2HST_MBX_FAIL:
1150 case ISP2400R2HST_ASYNC_EVENT:
1151 *isrp = r2hisr & 0xffff;
1152 *mbox0p = (r2hisr >> 16);
1155 case ISP2400R2HST_RSPQ_UPDATE:
1156 case ISP2400R2HST_ATIO_RSPQ_UPDATE:
1157 case ISP2400R2HST_ATIO_RQST_UPDATE:
1158 *isrp = r2hisr & 0xffff;
1163 ISP_WRITE(isp, BIU2400_HCCR, HCCR_2400_CMD_CLEAR_RISC_INT);
1164 isp_prt(isp, ISP_LOGERR, "unknown interrupt 0x%x\n", r2hisr);
1170 isp_pci_rd_reg(ispsoftc_t *isp, int regoff)
1175 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1177 * We will assume that someone has paused the RISC processor.
1179 oldconf = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1180 BXW2(isp, IspVirt2Off(isp, BIU_CONF1),
1181 oldconf | BIU_PCI_CONF1_SXP);
1182 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
1184 rv = BXR2(isp, IspVirt2Off(isp, regoff));
1185 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1186 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oldconf);
1187 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
1193 isp_pci_wr_reg(ispsoftc_t *isp, int regoff, uint32_t val)
1197 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1199 * We will assume that someone has paused the RISC processor.
1201 oldconf = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1202 BXW2(isp, IspVirt2Off(isp, BIU_CONF1),
1203 oldconf | BIU_PCI_CONF1_SXP);
1204 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
1206 BXW2(isp, IspVirt2Off(isp, regoff), val);
1207 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 2);
1208 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1209 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oldconf);
1210 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
1216 isp_pci_rd_reg_1080(ispsoftc_t *isp, int regoff)
1218 uint32_t rv, oc = 0;
1220 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK ||
1221 (regoff & _BLK_REG_MASK) == (SXP_BLOCK|SXP_BANK1_SELECT)) {
1224 * We will assume that someone has paused the RISC processor.
1226 oc = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1227 tc = oc & ~BIU_PCI1080_CONF1_DMA;
1228 if (regoff & SXP_BANK1_SELECT)
1229 tc |= BIU_PCI1080_CONF1_SXP1;
1231 tc |= BIU_PCI1080_CONF1_SXP0;
1232 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), tc);
1233 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
1234 } else if ((regoff & _BLK_REG_MASK) == DMA_BLOCK) {
1235 oc = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1236 BXW2(isp, IspVirt2Off(isp, BIU_CONF1),
1237 oc | BIU_PCI1080_CONF1_DMA);
1238 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
1240 rv = BXR2(isp, IspVirt2Off(isp, regoff));
1242 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oc);
1243 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
1249 isp_pci_wr_reg_1080(ispsoftc_t *isp, int regoff, uint32_t val)
1253 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK ||
1254 (regoff & _BLK_REG_MASK) == (SXP_BLOCK|SXP_BANK1_SELECT)) {
1257 * We will assume that someone has paused the RISC processor.
1259 oc = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1260 tc = oc & ~BIU_PCI1080_CONF1_DMA;
1261 if (regoff & SXP_BANK1_SELECT)
1262 tc |= BIU_PCI1080_CONF1_SXP1;
1264 tc |= BIU_PCI1080_CONF1_SXP0;
1265 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), tc);
1266 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
1267 } else if ((regoff & _BLK_REG_MASK) == DMA_BLOCK) {
1268 oc = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1269 BXW2(isp, IspVirt2Off(isp, BIU_CONF1),
1270 oc | BIU_PCI1080_CONF1_DMA);
1271 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
1273 BXW2(isp, IspVirt2Off(isp, regoff), val);
1274 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 2);
1276 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oc);
1277 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
1282 isp_pci_rd_reg_2400(ispsoftc_t *isp, int regoff)
1285 int block = regoff & _BLK_REG_MASK;
1291 return (BXR2(isp, IspVirt2Off(isp, regoff)));
1293 isp_prt(isp, ISP_LOGWARN, "SXP_BLOCK read at 0x%x", regoff);
1294 return (0xffffffff);
1296 isp_prt(isp, ISP_LOGWARN, "RISC_BLOCK read at 0x%x", regoff);
1297 return (0xffffffff);
1299 isp_prt(isp, ISP_LOGWARN, "DMA_BLOCK read at 0x%x", regoff);
1300 return (0xffffffff);
1302 isp_prt(isp, ISP_LOGWARN, "unknown block read at 0x%x", regoff);
1303 return (0xffffffff);
1308 case BIU2400_FLASH_ADDR:
1309 case BIU2400_FLASH_DATA:
1313 case BIU2400_REQINP:
1314 case BIU2400_REQOUTP:
1315 case BIU2400_RSPINP:
1316 case BIU2400_RSPOUTP:
1317 case BIU2400_PRI_REQINP:
1318 case BIU2400_PRI_REQOUTP:
1319 case BIU2400_ATIO_RSPINP:
1320 case BIU2400_ATIO_RSPOUTP:
1325 rv = BXR4(isp, IspVirt2Off(isp, regoff));
1327 case BIU2400_R2HSTSLO:
1328 rv = BXR4(isp, IspVirt2Off(isp, regoff));
1330 case BIU2400_R2HSTSHI:
1331 rv = BXR4(isp, IspVirt2Off(isp, regoff)) >> 16;
1334 isp_prt(isp, ISP_LOGERR,
1335 "isp_pci_rd_reg_2400: unknown offset %x", regoff);
1343 isp_pci_wr_reg_2400(ispsoftc_t *isp, int regoff, uint32_t val)
1345 int block = regoff & _BLK_REG_MASK;
1351 BXW2(isp, IspVirt2Off(isp, regoff), val);
1352 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 2);
1355 isp_prt(isp, ISP_LOGWARN, "SXP_BLOCK write at 0x%x", regoff);
1358 isp_prt(isp, ISP_LOGWARN, "RISC_BLOCK write at 0x%x", regoff);
1361 isp_prt(isp, ISP_LOGWARN, "DMA_BLOCK write at 0x%x", regoff);
1364 isp_prt(isp, ISP_LOGWARN, "unknown block write at 0x%x",
1370 case BIU2400_FLASH_ADDR:
1371 case BIU2400_FLASH_DATA:
1375 case BIU2400_REQINP:
1376 case BIU2400_REQOUTP:
1377 case BIU2400_RSPINP:
1378 case BIU2400_RSPOUTP:
1379 case BIU2400_PRI_REQINP:
1380 case BIU2400_PRI_REQOUTP:
1381 case BIU2400_ATIO_RSPINP:
1382 case BIU2400_ATIO_RSPOUTP:
1387 BXW4(isp, IspVirt2Off(isp, regoff), val);
1388 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 4);
1391 isp_prt(isp, ISP_LOGERR,
1392 "isp_pci_wr_reg_2400: bad offset 0x%x", regoff);
1405 static void imc(void *, bus_dma_segment_t *, int, int);
1406 static void imc1(void *, bus_dma_segment_t *, int, int);
1409 imc(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1411 struct imush *imushp = (struct imush *) arg;
1414 imushp->error = error;
1418 imushp->error = EINVAL;
1421 imushp->isp->isp_rquest = imushp->vbase;
1422 imushp->isp->isp_rquest_dma = segs->ds_addr;
1423 segs->ds_addr += ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(imushp->isp));
1424 imushp->vbase += ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(imushp->isp));
1425 imushp->isp->isp_result_dma = segs->ds_addr;
1426 imushp->isp->isp_result = imushp->vbase;
1428 #ifdef ISP_TARGET_MODE
1429 if (IS_24XX(imushp->isp)) {
1430 segs->ds_addr += ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(imushp->isp));
1431 imushp->vbase += ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(imushp->isp));
1432 imushp->isp->isp_atioq_dma = segs->ds_addr;
1433 imushp->isp->isp_atioq = imushp->vbase;
1439 imc1(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1441 struct imush *imushp = (struct imush *) arg;
1443 imushp->error = error;
1447 imushp->error = EINVAL;
1450 FCPARAM(imushp->isp, imushp->chan)->isp_scdma = segs->ds_addr;
1451 FCPARAM(imushp->isp, imushp->chan)->isp_scratch = imushp->vbase;
1455 isp_pci_mbxdma(ispsoftc_t *isp)
1459 int i, error, ns, cmap = 0;
1460 bus_size_t slim; /* segment size */
1461 bus_addr_t llim; /* low limit of unavailable dma */
1462 bus_addr_t hlim; /* high limit of unavailable dma */
1466 * Already been here? If so, leave...
1468 if (isp->isp_rquest) {
1473 if (isp->isp_maxcmds == 0) {
1474 isp_prt(isp, ISP_LOGERR, "maxcmds not set");
1479 hlim = BUS_SPACE_MAXADDR;
1480 if (IS_ULTRA2(isp) || IS_FC(isp) || IS_1240(isp)) {
1481 if (sizeof (bus_size_t) > 4) {
1482 slim = (bus_size_t) (1ULL << 32);
1484 slim = (bus_size_t) (1UL << 31);
1486 llim = BUS_SPACE_MAXADDR;
1488 llim = BUS_SPACE_MAXADDR_32BIT;
1492 len = isp->isp_maxcmds * sizeof (struct isp_pcmd);
1493 isp->isp_osinfo.pcmd_pool = (struct isp_pcmd *) malloc(len, M_DEVBUF, M_WAITOK | M_ZERO);
1494 if (isp->isp_osinfo.pcmd_pool == NULL) {
1495 isp_prt(isp, ISP_LOGERR, "cannot allocate pcmds");
1501 * XXX: We don't really support 64 bit target mode for parallel scsi yet
1503 #ifdef ISP_TARGET_MODE
1504 if (IS_SCSI(isp) && sizeof (bus_addr_t) > 4) {
1505 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1506 isp_prt(isp, ISP_LOGERR, "we cannot do DAC for SPI cards yet");
1512 if (isp_dma_tag_create(BUS_DMA_ROOTARG(ISP_PCD(isp)), 1, slim, llim, hlim, NULL, NULL, BUS_SPACE_MAXSIZE, ISP_NSEGS, slim, 0, &isp->isp_osinfo.dmat)) {
1513 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1515 isp_prt(isp, ISP_LOGERR, "could not create master dma tag");
1519 len = sizeof (XS_T **) * isp->isp_maxcmds;
1520 isp->isp_xflist = (XS_T **) malloc(len, M_DEVBUF, M_WAITOK | M_ZERO);
1521 if (isp->isp_xflist == NULL) {
1522 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1524 isp_prt(isp, ISP_LOGERR, "cannot alloc xflist array");
1527 #ifdef ISP_TARGET_MODE
1528 len = sizeof (void **) * isp->isp_maxcmds;
1529 isp->isp_tgtlist = (void **) malloc(len, M_DEVBUF, M_WAITOK | M_ZERO);
1530 if (isp->isp_tgtlist == NULL) {
1531 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1532 free(isp->isp_xflist, M_DEVBUF);
1534 isp_prt(isp, ISP_LOGERR, "cannot alloc tgtlist array");
1540 * Allocate and map the request and result queues (and ATIO queue
1541 * if we're a 2400 supporting target mode).
1543 len = ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp));
1544 len += ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp));
1545 #ifdef ISP_TARGET_MODE
1547 len += ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp));
1551 ns = (len / PAGE_SIZE) + 1;
1554 * Create a tag for the control spaces. We don't always need this
1555 * to be 32 bits, but we do this for simplicity and speed's sake.
1557 if (isp_dma_tag_create(isp->isp_osinfo.dmat, QENTRY_LEN, slim, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, len, ns, slim, 0, &isp->isp_osinfo.cdmat)) {
1558 isp_prt(isp, ISP_LOGERR, "cannot create a dma tag for control spaces");
1559 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1560 free(isp->isp_xflist, M_DEVBUF);
1561 #ifdef ISP_TARGET_MODE
1562 free(isp->isp_tgtlist, M_DEVBUF);
1568 if (bus_dmamem_alloc(isp->isp_osinfo.cdmat, (void **)&base, BUS_DMA_NOWAIT, &isp->isp_osinfo.cdmap) != 0) {
1569 isp_prt(isp, ISP_LOGERR, "cannot allocate %d bytes of CCB memory", len);
1570 bus_dma_tag_destroy(isp->isp_osinfo.cdmat);
1571 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1572 free(isp->isp_xflist, M_DEVBUF);
1573 #ifdef ISP_TARGET_MODE
1574 free(isp->isp_tgtlist, M_DEVBUF);
1585 bus_dmamap_load(isp->isp_osinfo.cdmat, isp->isp_osinfo.cdmap, base, len, imc, &im, 0);
1587 isp_prt(isp, ISP_LOGERR, "error %d loading dma map for control areas", im.error);
1592 for (cmap = 0; cmap < isp->isp_nchan; cmap++) {
1593 struct isp_fc *fc = ISP_FC_PC(isp, cmap);
1594 if (isp_dma_tag_create(isp->isp_osinfo.dmat, 64, slim, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, ISP_FC_SCRLEN, 1, slim, 0, &fc->tdmat)) {
1597 if (bus_dmamem_alloc(fc->tdmat, (void **)&base, BUS_DMA_NOWAIT, &fc->tdmap) != 0) {
1598 bus_dma_tag_destroy(fc->tdmat);
1605 bus_dmamap_load(fc->tdmat, fc->tdmap, base, ISP_FC_SCRLEN, imc1, &im, 0);
1607 bus_dmamem_free(fc->tdmat, base, fc->tdmap);
1608 bus_dma_tag_destroy(fc->tdmat);
1614 for (i = 0; i < isp->isp_maxcmds; i++) {
1615 struct isp_pcmd *pcmd = &isp->isp_osinfo.pcmd_pool[i];
1616 error = bus_dmamap_create(isp->isp_osinfo.dmat, 0, &pcmd->dmap);
1618 isp_prt(isp, ISP_LOGERR, "error %d creating per-cmd DMA maps", error);
1620 bus_dmamap_destroy(isp->isp_osinfo.dmat, isp->isp_osinfo.pcmd_pool[i].dmap);
1624 callout_init_mtx(&pcmd->wdog, &isp->isp_osinfo.lock, 0);
1625 if (i == isp->isp_maxcmds-1) {
1628 pcmd->next = &isp->isp_osinfo.pcmd_pool[i+1];
1631 isp->isp_osinfo.pcmd_free = &isp->isp_osinfo.pcmd_pool[0];
1636 while (--cmap >= 0) {
1637 struct isp_fc *fc = ISP_FC_PC(isp, cmap);
1638 bus_dmamem_free(fc->tdmat, base, fc->tdmap);
1639 bus_dma_tag_destroy(fc->tdmat);
1641 bus_dmamem_free(isp->isp_osinfo.cdmat, base, isp->isp_osinfo.cdmap);
1642 bus_dma_tag_destroy(isp->isp_osinfo.cdmat);
1643 free(isp->isp_xflist, M_DEVBUF);
1644 #ifdef ISP_TARGET_MODE
1645 free(isp->isp_tgtlist, M_DEVBUF);
1647 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1648 isp->isp_rquest = NULL;
1656 void *rq; /* original request */
1661 #define MUSHERR_NOQENTRIES -2
1663 #ifdef ISP_TARGET_MODE
1664 static void tdma2_2(void *, bus_dma_segment_t *, int, bus_size_t, int);
1665 static void tdma2(void *, bus_dma_segment_t *, int, int);
1668 tdma2_2(void *arg, bus_dma_segment_t *dm_segs, int nseg, bus_size_t mapsize, int error)
1672 mp->mapsize = mapsize;
1673 tdma2(arg, dm_segs, nseg, error);
1677 tdma2(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1681 struct ccb_scsiio *csio;
1685 mp = (mush_t *) arg;
1690 csio = mp->cmd_token;
1694 if (sizeof (bus_addr_t) > 4) {
1695 if (nseg >= ISP_NSEG64_MAX) {
1696 isp_prt(isp, ISP_LOGERR, "number of segments (%d) exceed maximum we can support (%d)", nseg, ISP_NSEG64_MAX);
1700 if (rq->req_header.rqs_entry_type == RQSTYPE_CTIO2) {
1701 rq->req_header.rqs_entry_type = RQSTYPE_CTIO3;
1704 if (nseg >= ISP_NSEG_MAX) {
1705 isp_prt(isp, ISP_LOGERR, "number of segments (%d) exceed maximum we can support (%d)", nseg, ISP_NSEG_MAX);
1710 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
1711 bus_dmamap_sync(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap, BUS_DMASYNC_PREWRITE);
1712 ddir = ISP_TO_DEVICE;
1713 } else if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) {
1714 bus_dmamap_sync(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap, BUS_DMASYNC_PREREAD);
1715 ddir = ISP_FROM_DEVICE;
1725 if (isp_send_tgt_cmd(isp, rq, dm_segs, nseg, XS_XFRLEN(csio), ddir, &csio->sense_data, csio->sense_len) != CMD_QUEUED) {
1726 mp->error = MUSHERR_NOQENTRIES;
1731 static void dma2_2(void *, bus_dma_segment_t *, int, bus_size_t, int);
1732 static void dma2(void *, bus_dma_segment_t *, int, int);
1735 dma2_2(void *arg, bus_dma_segment_t *dm_segs, int nseg, bus_size_t mapsize, int error)
1739 mp->mapsize = mapsize;
1740 dma2(arg, dm_segs, nseg, error);
1744 dma2(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1748 struct ccb_scsiio *csio;
1752 mp = (mush_t *) arg;
1757 csio = mp->cmd_token;
1761 if (sizeof (bus_addr_t) > 4) {
1762 if (nseg >= ISP_NSEG64_MAX) {
1763 isp_prt(isp, ISP_LOGERR, "number of segments (%d) exceed maximum we can support (%d)", nseg, ISP_NSEG64_MAX);
1767 if (rq->req_header.rqs_entry_type == RQSTYPE_T2RQS) {
1768 rq->req_header.rqs_entry_type = RQSTYPE_T3RQS;
1769 } else if (rq->req_header.rqs_entry_type == RQSTYPE_REQUEST) {
1770 rq->req_header.rqs_entry_type = RQSTYPE_A64;
1773 if (nseg >= ISP_NSEG_MAX) {
1774 isp_prt(isp, ISP_LOGERR, "number of segments (%d) exceed maximum we can support (%d)", nseg, ISP_NSEG_MAX);
1779 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
1780 bus_dmamap_sync(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap, BUS_DMASYNC_PREREAD);
1781 ddir = ISP_FROM_DEVICE;
1782 } else if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) {
1783 bus_dmamap_sync(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap, BUS_DMASYNC_PREWRITE);
1784 ddir = ISP_TO_DEVICE;
1794 if (isp_send_cmd(isp, rq, dm_segs, nseg, XS_XFRLEN(csio), ddir) != CMD_QUEUED) {
1795 mp->error = MUSHERR_NOQENTRIES;
1800 isp_pci_dmasetup(ispsoftc_t *isp, struct ccb_scsiio *csio, void *ff)
1803 void (*eptr)(void *, bus_dma_segment_t *, int, int);
1804 void (*eptr2)(void *, bus_dma_segment_t *, int, bus_size_t, int);
1808 mp->cmd_token = csio;
1813 #ifdef ISP_TARGET_MODE
1814 if (csio->ccb_h.func_code == XPT_CONT_TARGET_IO) {
1825 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_NONE || (csio->dxfer_len == 0)) {
1826 (*eptr)(mp, NULL, 0, 0);
1827 } else if ((csio->ccb_h.flags & CAM_SCATTER_VALID) == 0) {
1828 if ((csio->ccb_h.flags & CAM_DATA_PHYS) == 0) {
1830 error = bus_dmamap_load(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap, csio->data_ptr, csio->dxfer_len, eptr, mp, 0);
1832 xpt_print(csio->ccb_h.path, "%s: bus_dmamap_load " "ptr %p len %d returned %d\n", __func__, csio->data_ptr, csio->dxfer_len, error);
1835 if (error == EINPROGRESS) {
1836 bus_dmamap_unload(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap);
1838 isp_prt(isp, ISP_LOGERR, "deferred dma allocation not supported");
1839 } else if (error && mp->error == 0) {
1841 isp_prt(isp, ISP_LOGERR, "error %d in dma mapping code", error);
1846 /* Pointer to physical buffer */
1847 struct bus_dma_segment seg;
1848 seg.ds_addr = (bus_addr_t)(vm_offset_t)csio->data_ptr;
1849 seg.ds_len = csio->dxfer_len;
1850 (*eptr)(mp, &seg, 1, 0);
1853 struct bus_dma_segment *segs;
1855 if ((csio->ccb_h.flags & CAM_DATA_PHYS) != 0) {
1856 isp_prt(isp, ISP_LOGERR, "Physical segment pointers unsupported");
1858 } else if ((csio->ccb_h.flags & CAM_SG_LIST_PHYS) == 0) {
1863 * We're taking advantage of the fact that
1864 * the pointer/length sizes and layout of the iovec
1865 * structure are the same as the bus_dma_segment
1866 * structure. This might be a little dangerous,
1867 * but only if they change the structures, which
1870 KASSERT((sizeof (sguio.uio_iov) == sizeof (csio->data_ptr) &&
1871 sizeof (sguio.uio_iovcnt) >= sizeof (csio->sglist_cnt) &&
1872 sizeof (sguio.uio_resid) >= sizeof (csio->dxfer_len)), ("Ken's assumption failed"));
1873 sguio.uio_iov = (struct iovec *)csio->data_ptr;
1874 sguio.uio_iovcnt = csio->sglist_cnt;
1875 sguio.uio_resid = csio->dxfer_len;
1876 sguio.uio_segflg = UIO_SYSSPACE;
1878 error = bus_dmamap_load_uio(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap, &sguio, eptr2, mp, 0);
1880 if (error != 0 && mp->error == 0) {
1881 isp_prt(isp, ISP_LOGERR, "error %d in dma mapping code", error);
1885 /* Just use the segments provided */
1886 segs = (struct bus_dma_segment *) csio->data_ptr;
1887 (*eptr)(mp, segs, csio->sglist_cnt, 0);
1891 int retval = CMD_COMPLETE;
1892 if (mp->error == MUSHERR_NOQENTRIES) {
1893 retval = CMD_EAGAIN;
1894 } else if (mp->error == EFBIG) {
1895 XS_SETERR(csio, CAM_REQ_TOO_BIG);
1896 } else if (mp->error == EINVAL) {
1897 XS_SETERR(csio, CAM_REQ_INVALID);
1899 XS_SETERR(csio, CAM_UNREC_HBA_ERROR);
1903 return (CMD_QUEUED);
1907 isp_pci_reset0(ispsoftc_t *isp)
1909 ISP_DISABLE_INTS(isp);
1913 isp_pci_reset1(ispsoftc_t *isp)
1915 if (!IS_24XX(isp)) {
1916 /* Make sure the BIOS is disabled */
1917 isp_pci_wr_reg(isp, HCCR, PCI_HCCR_CMD_BIOS);
1919 /* and enable interrupts */
1920 ISP_ENABLE_INTS(isp);
1924 isp_pci_dumpregs(ispsoftc_t *isp, const char *msg)
1926 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *)isp;
1928 printf("%s: %s\n", device_get_nameunit(isp->isp_dev), msg);
1930 printf("%s:\n", device_get_nameunit(isp->isp_dev));
1932 printf(" biu_conf1=%x", ISP_READ(isp, BIU_CONF1));
1934 printf(" biu_csr=%x", ISP_READ(isp, BIU2100_CSR));
1935 printf(" biu_icr=%x biu_isr=%x biu_sema=%x ", ISP_READ(isp, BIU_ICR),
1936 ISP_READ(isp, BIU_ISR), ISP_READ(isp, BIU_SEMA));
1937 printf("risc_hccr=%x\n", ISP_READ(isp, HCCR));
1941 ISP_WRITE(isp, HCCR, HCCR_CMD_PAUSE);
1942 printf(" cdma_conf=%x cdma_sts=%x cdma_fifostat=%x\n",
1943 ISP_READ(isp, CDMA_CONF), ISP_READ(isp, CDMA_STATUS),
1944 ISP_READ(isp, CDMA_FIFO_STS));
1945 printf(" ddma_conf=%x ddma_sts=%x ddma_fifostat=%x\n",
1946 ISP_READ(isp, DDMA_CONF), ISP_READ(isp, DDMA_STATUS),
1947 ISP_READ(isp, DDMA_FIFO_STS));
1948 printf(" sxp_int=%x sxp_gross=%x sxp(scsi_ctrl)=%x\n",
1949 ISP_READ(isp, SXP_INTERRUPT),
1950 ISP_READ(isp, SXP_GROSS_ERR),
1951 ISP_READ(isp, SXP_PINS_CTRL));
1952 ISP_WRITE(isp, HCCR, HCCR_CMD_RELEASE);
1954 printf(" mbox regs: %x %x %x %x %x\n",
1955 ISP_READ(isp, OUTMAILBOX0), ISP_READ(isp, OUTMAILBOX1),
1956 ISP_READ(isp, OUTMAILBOX2), ISP_READ(isp, OUTMAILBOX3),
1957 ISP_READ(isp, OUTMAILBOX4));
1958 printf(" PCI Status Command/Status=%x\n",
1959 pci_read_config(pcs->pci_dev, PCIR_COMMAND, 1));