1 /******************************************************************************
3 Copyright (c) 2001-2009, Intel Corporation
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
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13 notice, this list of conditions and the following disclaimer in the
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32 ******************************************************************************/
35 #include "ixgbe_api.h"
36 #include "ixgbe_common.h"
38 extern s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw);
39 extern s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw);
42 * ixgbe_init_shared_code - Initialize the shared code
43 * @hw: pointer to hardware structure
45 * This will assign function pointers and assign the MAC type and PHY code.
46 * Does not touch the hardware. This function must be called prior to any
47 * other function in the shared code. The ixgbe_hw structure should be
48 * memset to 0 prior to calling this function. The following fields in
49 * hw structure should be filled in prior to calling this function:
50 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
51 * subsystem_vendor_id, and revision_id
53 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
60 ixgbe_set_mac_type(hw);
62 switch (hw->mac.type) {
63 case ixgbe_mac_82598EB:
64 status = ixgbe_init_ops_82598(hw);
66 case ixgbe_mac_82599EB:
67 status = ixgbe_init_ops_82599(hw);
70 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
78 * ixgbe_set_mac_type - Sets MAC type
79 * @hw: pointer to the HW structure
81 * This function sets the mac type of the adapter based on the
82 * vendor ID and device ID stored in the hw structure.
84 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
86 s32 ret_val = IXGBE_SUCCESS;
88 DEBUGFUNC("ixgbe_set_mac_type\n");
90 if (hw->vendor_id == IXGBE_INTEL_VENDOR_ID) {
91 switch (hw->device_id) {
92 case IXGBE_DEV_ID_82598:
93 case IXGBE_DEV_ID_82598_BX:
94 case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
95 case IXGBE_DEV_ID_82598AF_DUAL_PORT:
96 case IXGBE_DEV_ID_82598AT:
97 case IXGBE_DEV_ID_82598EB_CX4:
98 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
99 case IXGBE_DEV_ID_82598_DA_DUAL_PORT:
100 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM:
101 case IXGBE_DEV_ID_82598EB_XF_LR:
102 case IXGBE_DEV_ID_82598EB_SFP_LOM:
103 hw->mac.type = ixgbe_mac_82598EB;
105 case IXGBE_DEV_ID_82599_KX4:
106 case IXGBE_DEV_ID_82599_XAUI_LOM:
107 case IXGBE_DEV_ID_82599_SFP:
108 case IXGBE_DEV_ID_82599_CX4:
109 hw->mac.type = ixgbe_mac_82599EB;
112 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
116 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
119 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n",
120 hw->mac.type, ret_val);
125 * ixgbe_init_hw - Initialize the hardware
126 * @hw: pointer to hardware structure
128 * Initialize the hardware by resetting and then starting the hardware
130 s32 ixgbe_init_hw(struct ixgbe_hw *hw)
132 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw),
133 IXGBE_NOT_IMPLEMENTED);
137 * ixgbe_reset_hw - Performs a hardware reset
138 * @hw: pointer to hardware structure
140 * Resets the hardware by resetting the transmit and receive units, masks and
141 * clears all interrupts, performs a PHY reset, and performs a MAC reset
143 s32 ixgbe_reset_hw(struct ixgbe_hw *hw)
145 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw),
146 IXGBE_NOT_IMPLEMENTED);
150 * ixgbe_start_hw - Prepares hardware for Rx/Tx
151 * @hw: pointer to hardware structure
153 * Starts the hardware by filling the bus info structure and media type,
154 * clears all on chip counters, initializes receive address registers,
155 * multicast table, VLAN filter table, calls routine to setup link and
156 * flow control settings, and leaves transmit and receive units disabled
159 s32 ixgbe_start_hw(struct ixgbe_hw *hw)
161 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw),
162 IXGBE_NOT_IMPLEMENTED);
166 * ixgbe_clear_hw_cntrs - Clear hardware counters
167 * @hw: pointer to hardware structure
169 * Clears all hardware statistics counters by reading them from the hardware
170 * Statistics counters are clear on read.
172 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw)
174 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw),
175 IXGBE_NOT_IMPLEMENTED);
179 * ixgbe_get_media_type - Get media type
180 * @hw: pointer to hardware structure
182 * Returns the media type (fiber, copper, backplane)
184 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw)
186 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw),
187 ixgbe_media_type_unknown);
191 * ixgbe_get_mac_addr - Get MAC address
192 * @hw: pointer to hardware structure
193 * @mac_addr: Adapter MAC address
195 * Reads the adapter's MAC address from the first Receive Address Register
196 * (RAR0) A reset of the adapter must have been performed prior to calling
197 * this function in order for the MAC address to have been loaded from the
200 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr)
202 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr,
203 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED);
207 * ixgbe_get_san_mac_addr - Get SAN MAC address
208 * @hw: pointer to hardware structure
209 * @san_mac_addr: SAN MAC address
211 * Reads the SAN MAC address from the EEPROM, if it's available. This is
212 * per-port, so set_lan_id() must be called before reading the addresses.
214 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
216 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr,
217 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
221 * ixgbe_set_san_mac_addr - Write a SAN MAC address
222 * @hw: pointer to hardware structure
223 * @san_mac_addr: SAN MAC address
225 * Writes A SAN MAC address to the EEPROM.
227 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
229 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr,
230 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
234 * ixgbe_get_device_caps - Get additional device capabilities
235 * @hw: pointer to hardware structure
236 * @device_caps: the EEPROM word for device capabilities
238 * Reads the extra device capabilities from the EEPROM
240 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps)
242 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps,
243 (hw, device_caps), IXGBE_NOT_IMPLEMENTED);
247 * ixgbe_get_bus_info - Set PCI bus info
248 * @hw: pointer to hardware structure
250 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure
252 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw)
254 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw),
255 IXGBE_NOT_IMPLEMENTED);
259 * ixgbe_get_num_of_tx_queues - Get Tx queues
260 * @hw: pointer to hardware structure
262 * Returns the number of transmit queues for the given adapter.
264 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw)
266 return hw->mac.max_tx_queues;
270 * ixgbe_get_num_of_rx_queues - Get Rx queues
271 * @hw: pointer to hardware structure
273 * Returns the number of receive queues for the given adapter.
275 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw)
277 return hw->mac.max_rx_queues;
281 * ixgbe_stop_adapter - Disable Rx/Tx units
282 * @hw: pointer to hardware structure
284 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
285 * disables transmit and receive units. The adapter_stopped flag is used by
286 * the shared code and drivers to determine if the adapter is in a stopped
287 * state and should not touch the hardware.
289 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw)
291 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw),
292 IXGBE_NOT_IMPLEMENTED);
296 * ixgbe_read_pba_num - Reads part number from EEPROM
297 * @hw: pointer to hardware structure
298 * @pba_num: stores the part number from the EEPROM
300 * Reads the part number from the EEPROM.
302 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)
304 return ixgbe_read_pba_num_generic(hw, pba_num);
308 * ixgbe_identify_phy - Get PHY type
309 * @hw: pointer to hardware structure
311 * Determines the physical layer module found on the current adapter.
313 s32 ixgbe_identify_phy(struct ixgbe_hw *hw)
315 s32 status = IXGBE_SUCCESS;
317 if (hw->phy.type == ixgbe_phy_unknown) {
318 status = ixgbe_call_func(hw,
319 hw->phy.ops.identify,
321 IXGBE_NOT_IMPLEMENTED);
328 * ixgbe_reset_phy - Perform a PHY reset
329 * @hw: pointer to hardware structure
331 s32 ixgbe_reset_phy(struct ixgbe_hw *hw)
333 s32 status = IXGBE_SUCCESS;
335 if (hw->phy.type == ixgbe_phy_unknown) {
336 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS)
337 status = IXGBE_ERR_PHY;
340 if (status == IXGBE_SUCCESS) {
341 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw),
342 IXGBE_NOT_IMPLEMENTED);
348 * ixgbe_get_phy_firmware_version -
349 * @hw: pointer to hardware structure
350 * @firmware_version: pointer to firmware version
352 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version)
354 s32 status = IXGBE_SUCCESS;
356 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version,
357 (hw, firmware_version),
358 IXGBE_NOT_IMPLEMENTED);
363 * ixgbe_read_phy_reg - Read PHY register
364 * @hw: pointer to hardware structure
365 * @reg_addr: 32 bit address of PHY register to read
366 * @phy_data: Pointer to read data from PHY register
368 * Reads a value from a specified PHY register
370 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
374 ixgbe_identify_phy(hw);
376 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr,
377 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
381 * ixgbe_write_phy_reg - Write PHY register
382 * @hw: pointer to hardware structure
383 * @reg_addr: 32 bit PHY register to write
384 * @phy_data: Data to write to the PHY register
386 * Writes a value to specified PHY register
388 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
392 ixgbe_identify_phy(hw);
394 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr,
395 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
399 * ixgbe_setup_phy_link - Restart PHY autoneg
400 * @hw: pointer to hardware structure
402 * Restart autonegotiation and PHY and waits for completion.
404 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw)
406 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw),
407 IXGBE_NOT_IMPLEMENTED);
411 * ixgbe_check_phy_link - Determine link and speed status
412 * @hw: pointer to hardware structure
414 * Reads a PHY register to determine if link is up and the current speed for
417 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
420 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed,
421 link_up), IXGBE_NOT_IMPLEMENTED);
425 * ixgbe_setup_phy_link_speed - Set auto advertise
426 * @hw: pointer to hardware structure
427 * @speed: new link speed
428 * @autoneg: TRUE if autonegotiation enabled
430 * Sets the auto advertised capabilities
432 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
434 bool autoneg_wait_to_complete)
436 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed,
437 autoneg, autoneg_wait_to_complete),
438 IXGBE_NOT_IMPLEMENTED);
442 * ixgbe_setup_link - Configure link settings
443 * @hw: pointer to hardware structure
445 * Configures link settings based on values in the ixgbe_hw struct.
446 * Restarts the link. Performs autonegotiation if needed.
448 s32 ixgbe_setup_link(struct ixgbe_hw *hw)
450 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw),
451 IXGBE_NOT_IMPLEMENTED);
455 * ixgbe_check_link - Get link and speed status
456 * @hw: pointer to hardware structure
458 * Reads the links register to determine if link is up and the current speed
460 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
461 bool *link_up, bool link_up_wait_to_complete)
463 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed,
464 link_up, link_up_wait_to_complete),
465 IXGBE_NOT_IMPLEMENTED);
469 * ixgbe_setup_link_speed - Set link speed
470 * @hw: pointer to hardware structure
471 * @speed: new link speed
472 * @autoneg: TRUE if autonegotiation enabled
474 * Set the link speed and restarts the link.
476 s32 ixgbe_setup_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
478 bool autoneg_wait_to_complete)
480 return ixgbe_call_func(hw, hw->mac.ops.setup_link_speed, (hw, speed,
481 autoneg, autoneg_wait_to_complete),
482 IXGBE_NOT_IMPLEMENTED);
486 * ixgbe_get_link_capabilities - Returns link capabilities
487 * @hw: pointer to hardware structure
489 * Determines the link capabilities of the current configuration.
491 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
494 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw,
495 speed, autoneg), IXGBE_NOT_IMPLEMENTED);
499 * ixgbe_led_on - Turn on LEDs
500 * @hw: pointer to hardware structure
501 * @index: led number to turn on
503 * Turns on the software controllable LEDs.
505 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)
507 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index),
508 IXGBE_NOT_IMPLEMENTED);
512 * ixgbe_led_off - Turn off LEDs
513 * @hw: pointer to hardware structure
514 * @index: led number to turn off
516 * Turns off the software controllable LEDs.
518 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
520 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index),
521 IXGBE_NOT_IMPLEMENTED);
525 * ixgbe_blink_led_start - Blink LEDs
526 * @hw: pointer to hardware structure
527 * @index: led number to blink
529 * Blink LED based on index.
531 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index)
533 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index),
534 IXGBE_NOT_IMPLEMENTED);
538 * ixgbe_blink_led_stop - Stop blinking LEDs
539 * @hw: pointer to hardware structure
541 * Stop blinking LED based on index.
543 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index)
545 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index),
546 IXGBE_NOT_IMPLEMENTED);
550 * ixgbe_init_eeprom_params - Initialize EEPROM parameters
551 * @hw: pointer to hardware structure
553 * Initializes the EEPROM parameters ixgbe_eeprom_info within the
554 * ixgbe_hw struct in order to set up EEPROM access.
556 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw)
558 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw),
559 IXGBE_NOT_IMPLEMENTED);
564 * ixgbe_write_eeprom - Write word to EEPROM
565 * @hw: pointer to hardware structure
566 * @offset: offset within the EEPROM to be written to
567 * @data: 16 bit word to be written to the EEPROM
569 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not
570 * called after this function, the EEPROM will most likely contain an
573 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data)
575 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data),
576 IXGBE_NOT_IMPLEMENTED);
580 * ixgbe_read_eeprom - Read word from EEPROM
581 * @hw: pointer to hardware structure
582 * @offset: offset within the EEPROM to be read
583 * @data: read 16 bit value from EEPROM
585 * Reads 16 bit value from EEPROM
587 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data)
589 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data),
590 IXGBE_NOT_IMPLEMENTED);
594 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum
595 * @hw: pointer to hardware structure
596 * @checksum_val: calculated checksum
598 * Performs checksum calculation and validates the EEPROM checksum
600 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val)
602 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum,
603 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED);
607 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum
608 * @hw: pointer to hardware structure
610 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw)
612 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw),
613 IXGBE_NOT_IMPLEMENTED);
617 * ixgbe_insert_mac_addr - Find a RAR for this mac address
618 * @hw: pointer to hardware structure
619 * @addr: Address to put into receive address register
620 * @vmdq: VMDq pool to assign
622 * Puts an ethernet address into a receive address register, or
623 * finds the rar that it is aleady in; adds to the pool list
625 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
627 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr,
629 IXGBE_NOT_IMPLEMENTED);
633 * ixgbe_set_rar - Set Rx address register
634 * @hw: pointer to hardware structure
635 * @index: Receive address register to write
636 * @addr: Address to put into receive address register
638 * @enable_addr: set flag that address is active
640 * Puts an ethernet address into a receive address register.
642 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
645 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq,
646 enable_addr), IXGBE_NOT_IMPLEMENTED);
650 * ixgbe_clear_rar - Clear Rx address register
651 * @hw: pointer to hardware structure
652 * @index: Receive address register to write
654 * Puts an ethernet address into a receive address register.
656 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
658 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index),
659 IXGBE_NOT_IMPLEMENTED);
663 * ixgbe_set_vmdq - Associate a VMDq index with a receive address
664 * @hw: pointer to hardware structure
665 * @rar: receive address register index to associate with VMDq index
666 * @vmdq: VMDq set or pool index
668 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
670 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq),
671 IXGBE_NOT_IMPLEMENTED);
675 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
676 * @hw: pointer to hardware structure
677 * @rar: receive address register index to disassociate with VMDq index
678 * @vmdq: VMDq set or pool index
680 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
682 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq),
683 IXGBE_NOT_IMPLEMENTED);
687 * ixgbe_init_rx_addrs - Initializes receive address filters.
688 * @hw: pointer to hardware structure
690 * Places the MAC address in receive address register 0 and clears the rest
691 * of the receive address registers. Clears the multicast table. Assumes
692 * the receiver is in reset when the routine is called.
694 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)
696 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw),
697 IXGBE_NOT_IMPLEMENTED);
701 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries.
702 * @hw: pointer to hardware structure
704 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw)
706 return hw->mac.num_rar_entries;
710 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses
711 * @hw: pointer to hardware structure
712 * @addr_list: the list of new multicast addresses
713 * @addr_count: number of addresses
714 * @func: iterator function to walk the multicast address list
716 * The given list replaces any existing list. Clears the secondary addrs from
717 * receive address registers. Uses unused receive address registers for the
718 * first secondary addresses, and falls back to promiscuous mode as needed.
720 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
721 u32 addr_count, ixgbe_mc_addr_itr func)
723 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw,
724 addr_list, addr_count, func),
725 IXGBE_NOT_IMPLEMENTED);
729 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses
730 * @hw: pointer to hardware structure
731 * @mc_addr_list: the list of new multicast addresses
732 * @mc_addr_count: number of addresses
733 * @func: iterator function to walk the multicast address list
735 * The given list replaces any existing list. Clears the MC addrs from receive
736 * address registers and the multicast table. Uses unused receive address
737 * registers for the first multicast addresses, and hashes the rest into the
740 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
741 u32 mc_addr_count, ixgbe_mc_addr_itr func)
743 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw,
744 mc_addr_list, mc_addr_count, func),
745 IXGBE_NOT_IMPLEMENTED);
749 * ixgbe_enable_mc - Enable multicast address in RAR
750 * @hw: pointer to hardware structure
752 * Enables multicast address in RAR and the use of the multicast hash table.
754 s32 ixgbe_enable_mc(struct ixgbe_hw *hw)
756 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw),
757 IXGBE_NOT_IMPLEMENTED);
761 * ixgbe_disable_mc - Disable multicast address in RAR
762 * @hw: pointer to hardware structure
764 * Disables multicast address in RAR and the use of the multicast hash table.
766 s32 ixgbe_disable_mc(struct ixgbe_hw *hw)
768 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw),
769 IXGBE_NOT_IMPLEMENTED);
773 * ixgbe_clear_vfta - Clear VLAN filter table
774 * @hw: pointer to hardware structure
776 * Clears the VLAN filer table, and the VMDq index associated with the filter
778 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw)
780 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw),
781 IXGBE_NOT_IMPLEMENTED);
785 * ixgbe_set_vfta - Set VLAN filter table
786 * @hw: pointer to hardware structure
787 * @vlan: VLAN id to write to VLAN filter
788 * @vind: VMDq output index that maps queue to VLAN id in VFTA
789 * @vlan_on: boolean flag to turn on/off VLAN in VFTA
791 * Turn on/off specified VLAN in the VLAN filter table.
793 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
795 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind,
796 vlan_on), IXGBE_NOT_IMPLEMENTED);
800 * ixgbe_fc_enable - Enable flow control
801 * @hw: pointer to hardware structure
802 * @packetbuf_num: packet buffer number (0-7)
804 * Configures the flow control settings based on SW configuration.
806 s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num)
808 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw, packetbuf_num),
809 IXGBE_NOT_IMPLEMENTED);
813 * ixgbe_read_analog_reg8 - Reads 8 bit analog register
814 * @hw: pointer to hardware structure
815 * @reg: analog register to read
818 * Performs write operation to analog register specified.
820 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
822 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg,
823 val), IXGBE_NOT_IMPLEMENTED);
827 * ixgbe_write_analog_reg8 - Writes 8 bit analog register
828 * @hw: pointer to hardware structure
829 * @reg: analog register to write
830 * @val: value to write
832 * Performs write operation to Atlas analog register specified.
834 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
836 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg,
837 val), IXGBE_NOT_IMPLEMENTED);
841 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays.
842 * @hw: pointer to hardware structure
844 * Initializes the Unicast Table Arrays to zero on device load. This
845 * is part of the Rx init addr execution path.
847 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw)
849 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw),
850 IXGBE_NOT_IMPLEMENTED);
854 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address
855 * @hw: pointer to hardware structure
856 * @byte_offset: byte offset to read
859 * Performs byte read operation to SFP module's EEPROM over I2C interface.
861 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
864 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset,
865 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
869 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C
870 * @hw: pointer to hardware structure
871 * @byte_offset: byte offset to write
872 * @data: value to write
874 * Performs byte write operation to SFP module's EEPROM over I2C interface
875 * at a specified device address.
877 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
880 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset,
881 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
885 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface
886 * @hw: pointer to hardware structure
887 * @byte_offset: EEPROM byte offset to write
888 * @eeprom_data: value to write
890 * Performs byte write operation to SFP module's EEPROM over I2C interface.
892 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw,
893 u8 byte_offset, u8 eeprom_data)
895 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom,
896 (hw, byte_offset, eeprom_data),
897 IXGBE_NOT_IMPLEMENTED);
901 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface
902 * @hw: pointer to hardware structure
903 * @byte_offset: EEPROM byte offset to read
904 * @eeprom_data: value read
906 * Performs byte read operation to SFP module's EEPROM over I2C interface.
908 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data)
910 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom,
911 (hw, byte_offset, eeprom_data),
912 IXGBE_NOT_IMPLEMENTED);
916 * ixgbe_get_supported_physical_layer - Returns physical layer type
917 * @hw: pointer to hardware structure
919 * Determines physical layer capabilities of the current configuration.
921 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
923 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer,
924 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN);
928 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependant on device specifics
929 * @hw: pointer to hardware structure
930 * @regval: bitfield to write to the Rx DMA register
932 * Enables the Rx DMA unit of the device.
934 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)
936 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma,
937 (hw, regval), IXGBE_NOT_IMPLEMENTED);
941 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore
942 * @hw: pointer to hardware structure
943 * @mask: Mask to specify which semaphore to acquire
945 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified
946 * function (CSR, PHY0, PHY1, EEPROM, Flash)
948 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u16 mask)
950 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync,
951 (hw, mask), IXGBE_NOT_IMPLEMENTED);
955 * ixgbe_release_swfw_semaphore - Release SWFW semaphore
956 * @hw: pointer to hardware structure
957 * @mask: Mask to specify which semaphore to release
959 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified
960 * function (CSR, PHY0, PHY1, EEPROM, Flash)
962 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u16 mask)
964 if (hw->mac.ops.release_swfw_sync)
965 hw->mac.ops.release_swfw_sync(hw, mask);