2 * Copyright (c) 2004-2006 Marcel Moolenaar
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include <sys/param.h>
31 #include <sys/systm.h>
34 #include <machine/bus.h>
36 #include <sys/serial.h>
38 #include <dev/scc/scc_bfe.h>
39 #include <dev/scc/scc_bus.h>
41 #include <dev/ic/z8530.h>
45 static int z8530_bfe_attach(struct scc_softc *, int);
46 static int z8530_bfe_iclear(struct scc_softc *, struct scc_chan *);
47 static int z8530_bfe_ipend(struct scc_softc *);
48 static int z8530_bfe_probe(struct scc_softc *);
50 static kobj_method_t z8530_methods[] = {
51 KOBJMETHOD(scc_attach, z8530_bfe_attach),
52 KOBJMETHOD(scc_iclear, z8530_bfe_iclear),
53 KOBJMETHOD(scc_ipend, z8530_bfe_ipend),
54 KOBJMETHOD(scc_probe, z8530_bfe_probe),
58 struct scc_class scc_z8530_class = {
61 sizeof(struct scc_softc),
63 .cl_class = SCC_CLASS_Z8530,
64 .cl_modes = SCC_MODE_ASYNC | SCC_MODE_BISYNC | SCC_MODE_HDLC,
65 .cl_range = CHAN_B - CHAN_A,
68 /* Multiplexed I/O. */
70 scc_setmreg(struct scc_bas *bas, int ch, int reg, int val)
73 scc_setreg(bas, ch + REG_CTRL, reg);
75 scc_setreg(bas, ch + REG_CTRL, val);
78 static __inline uint8_t
79 scc_getmreg(struct scc_bas *bas, int ch, int reg)
82 scc_setreg(bas, ch + REG_CTRL, reg);
84 return (scc_getreg(bas, ch + REG_CTRL));
88 z8530_bfe_attach(struct scc_softc *sc, int reset)
97 z8530_bfe_iclear(struct scc_softc *sc, struct scc_chan *ch)
103 c = (ch->ch_nr == 1) ? CHAN_A : CHAN_B;
104 mtx_lock_spin(&sc->sc_hwmtx);
105 if (ch->ch_ipend & SER_INT_TXIDLE) {
106 scc_setreg(bas, c + REG_CTRL, CR_RSTTXI);
109 if (ch->ch_ipend & SER_INT_RXREADY) {
110 scc_getreg(bas, c + REG_DATA);
113 if (ch->ch_ipend & (SER_INT_OVERRUN|SER_INT_BREAK))
114 scc_setreg(bas, c + REG_CTRL, CR_RSTERR);
115 mtx_unlock_spin(&sc->sc_hwmtx);
119 #define SIGCHG(c, i, s, d) \
121 i |= (i & s) ? s : s | d; \
123 i = (i & s) ? (i & ~s) | d : i; \
127 z8530_bfe_ipend(struct scc_softc *sc)
130 struct scc_chan *ch[2];
132 uint8_t bes, ip, src;
135 ch[0] = &sc->sc_chan[0];
136 ch[1] = &sc->sc_chan[1];
140 mtx_lock_spin(&sc->sc_hwmtx);
141 ip = scc_getmreg(bas, CHAN_A, RR_IP);
143 ch[0]->ch_ipend |= SER_INT_RXREADY;
145 ch[1]->ch_ipend |= SER_INT_RXREADY;
147 ch[0]->ch_ipend |= SER_INT_TXIDLE;
149 ch[1]->ch_ipend |= SER_INT_TXIDLE;
151 scc_setreg(bas, CHAN_A + REG_CTRL, CR_RSTXSI);
153 bes = scc_getreg(bas, CHAN_A + REG_CTRL);
155 ch[0]->ch_ipend |= SER_INT_BREAK;
156 sig = ch[0]->ch_hwsig;
157 SIGCHG(bes & BES_CTS, sig, SER_CTS, SER_DCTS);
158 SIGCHG(bes & BES_DCD, sig, SER_DCD, SER_DDCD);
159 SIGCHG(bes & BES_SYNC, sig, SER_DSR, SER_DDSR);
160 if (sig & SER_MASK_DELTA) {
161 ch[0]->ch_hwsig = sig;
162 ch[0]->ch_ipend |= SER_INT_SIGCHG;
164 src = scc_getmreg(bas, CHAN_A, RR_SRC);
166 ch[0]->ch_ipend |= SER_INT_OVERRUN;
169 scc_setreg(bas, CHAN_B + REG_CTRL, CR_RSTXSI);
171 bes = scc_getreg(bas, CHAN_B + REG_CTRL);
173 ch[1]->ch_ipend |= SER_INT_BREAK;
174 sig = ch[1]->ch_hwsig;
175 SIGCHG(bes & BES_CTS, sig, SER_CTS, SER_DCTS);
176 SIGCHG(bes & BES_DCD, sig, SER_DCD, SER_DDCD);
177 SIGCHG(bes & BES_SYNC, sig, SER_DSR, SER_DDSR);
178 if (sig & SER_MASK_DELTA) {
179 ch[1]->ch_hwsig = sig;
180 ch[1]->ch_ipend |= SER_INT_SIGCHG;
182 src = scc_getmreg(bas, CHAN_B, RR_SRC);
184 ch[1]->ch_ipend |= SER_INT_OVERRUN;
186 mtx_unlock_spin(&sc->sc_hwmtx);
188 return (ch[0]->ch_ipend | ch[1]->ch_ipend);
192 z8530_bfe_probe(struct scc_softc *sc)