2 * Device driver optimized for the Symbios/LSI 53C896/53C895A/53C1010
3 * PCI-SCSI controllers.
5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
7 * This driver also supports the following Symbios/LSI PCI-SCSI chips:
8 * 53C810A, 53C825A, 53C860, 53C875, 53C876, 53C885, 53C895,
9 * 53C810, 53C815, 53C825 and the 53C1510D is 53C8XX mode.
12 * This driver for FreeBSD-CAM is derived from the Linux sym53c8xx driver.
13 * Copyright (C) 1998-1999 Gerard Roudier
15 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
16 * a port of the FreeBSD ncr driver to Linux-1.2.13.
18 * The original ncr driver has been written for 386bsd and FreeBSD by
19 * Wolfgang Stanglmeier <wolf@cologne.de>
20 * Stefan Esser <se@mi.Uni-Koeln.de>
21 * Copyright (C) 1994 Wolfgang Stanglmeier
23 * The initialisation code, and part of the code that addresses
24 * FreeBSD-CAM services is based on the aic7xxx driver for FreeBSD-CAM
25 * written by Justin T. Gibbs.
27 * Other major contributions:
29 * NVRAM detection and reading.
30 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
32 *-----------------------------------------------------------------------------
34 * Redistribution and use in source and binary forms, with or without
35 * modification, are permitted provided that the following conditions
37 * 1. Redistributions of source code must retain the above copyright
38 * notice, this list of conditions and the following disclaimer.
39 * 2. Redistributions in binary form must reproduce the above copyright
40 * notice, this list of conditions and the following disclaimer in the
41 * documentation and/or other materials provided with the distribution.
42 * 3. The name of the author may not be used to endorse or promote products
43 * derived from this software without specific prior written permission.
45 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
46 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
47 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
48 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
49 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
50 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
51 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
52 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
53 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
54 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
58 #include <sys/cdefs.h>
59 __FBSDID("$FreeBSD$");
61 #define SYM_DRIVER_NAME "sym-1.6.5-20000902"
63 /* #define SYM_DEBUG_GENERIC_SUPPORT */
65 #include <sys/param.h>
68 * Driver configuration options.
71 #include <dev/sym/sym_conf.h>
74 #include <sys/systm.h>
75 #include <sys/malloc.h>
76 #include <sys/endian.h>
77 #include <sys/kernel.h>
79 #include <sys/mutex.h>
80 #include <sys/module.h>
85 #include <dev/pci/pcireg.h>
86 #include <dev/pci/pcivar.h>
88 #include <machine/bus.h>
89 #include <machine/resource.h>
93 #include <cam/cam_ccb.h>
94 #include <cam/cam_sim.h>
95 #include <cam/cam_xpt_sim.h>
96 #include <cam/cam_debug.h>
98 #include <cam/scsi/scsi_all.h>
99 #include <cam/scsi/scsi_message.h>
102 #include <vm/vm_param.h>
105 /* Short and quite clear integer types */
110 typedef u_int16_t u16;
111 typedef u_int32_t u32;
114 * Driver definitions.
116 #include <dev/sym/sym_defs.h>
117 #include <dev/sym/sym_fw.h>
120 * IA32 architecture does not reorder STORES and prevents
121 * LOADS from passing STORES. It is called `program order'
122 * by Intel and allows device drivers to deal with memory
123 * ordering by only ensuring that the code is not reordered
124 * by the compiler when ordering is required.
125 * Other architectures implement a weaker ordering that
126 * requires memory barriers (and also IO barriers when they
127 * make sense) to be used.
130 #if defined __i386__ || defined __amd64__
131 #define MEMORY_BARRIER() do { ; } while(0)
132 #elif defined __powerpc__
133 #define MEMORY_BARRIER() __asm__ volatile("eieio; sync" : : : "memory")
134 #elif defined __ia64__
135 #define MEMORY_BARRIER() __asm__ volatile("mf.a; mf" : : : "memory")
136 #elif defined __sparc64__
137 #define MEMORY_BARRIER() __asm__ volatile("membar #Sync" : : : "memory")
139 #error "Not supported platform"
143 * A la VMS/CAM-3 queue management.
146 typedef struct sym_quehead {
147 struct sym_quehead *flink; /* Forward pointer */
148 struct sym_quehead *blink; /* Backward pointer */
151 #define sym_que_init(ptr) do { \
152 (ptr)->flink = (ptr); (ptr)->blink = (ptr); \
155 static __inline struct sym_quehead *sym_que_first(struct sym_quehead *head)
157 return (head->flink == head) ? NULL : head->flink;
160 static __inline struct sym_quehead *sym_que_last(struct sym_quehead *head)
162 return (head->blink == head) ? NULL : head->blink;
165 static __inline void __sym_que_add(struct sym_quehead * new,
166 struct sym_quehead * blink,
167 struct sym_quehead * flink)
175 static __inline void __sym_que_del(struct sym_quehead * blink,
176 struct sym_quehead * flink)
178 flink->blink = blink;
179 blink->flink = flink;
182 static __inline int sym_que_empty(struct sym_quehead *head)
184 return head->flink == head;
187 static __inline void sym_que_splice(struct sym_quehead *list,
188 struct sym_quehead *head)
190 struct sym_quehead *first = list->flink;
193 struct sym_quehead *last = list->blink;
194 struct sym_quehead *at = head->flink;
204 #define sym_que_entry(ptr, type, member) \
205 ((type *)((char *)(ptr)-(size_t)(&((type *)0)->member)))
208 #define sym_insque(new, pos) __sym_que_add(new, pos, (pos)->flink)
210 #define sym_remque(el) __sym_que_del((el)->blink, (el)->flink)
212 #define sym_insque_head(new, head) __sym_que_add(new, head, (head)->flink)
214 static __inline struct sym_quehead *sym_remque_head(struct sym_quehead *head)
216 struct sym_quehead *elem = head->flink;
219 __sym_que_del(head, elem->flink);
225 #define sym_insque_tail(new, head) __sym_que_add(new, (head)->blink, head)
227 static __inline struct sym_quehead *sym_remque_tail(struct sym_quehead *head)
229 struct sym_quehead *elem = head->blink;
232 __sym_que_del(elem->blink, head);
239 * This one may be useful.
241 #define FOR_EACH_QUEUED_ELEMENT(head, qp) \
242 for (qp = (head)->flink; qp != (head); qp = qp->flink)
244 * FreeBSD does not offer our kind of queue in the CAM CCB.
245 * So, we have to cast.
247 #define sym_qptr(p) ((struct sym_quehead *) (p))
250 * Simple bitmap operations.
252 #define sym_set_bit(p, n) (((u32 *)(p))[(n)>>5] |= (1<<((n)&0x1f)))
253 #define sym_clr_bit(p, n) (((u32 *)(p))[(n)>>5] &= ~(1<<((n)&0x1f)))
254 #define sym_is_bit(p, n) (((u32 *)(p))[(n)>>5] & (1<<((n)&0x1f)))
257 * Number of tasks per device we want to handle.
259 #if SYM_CONF_MAX_TAG_ORDER > 8
260 #error "more than 256 tags per logical unit not allowed."
262 #define SYM_CONF_MAX_TASK (1<<SYM_CONF_MAX_TAG_ORDER)
265 * Donnot use more tasks that we can handle.
267 #ifndef SYM_CONF_MAX_TAG
268 #define SYM_CONF_MAX_TAG SYM_CONF_MAX_TASK
270 #if SYM_CONF_MAX_TAG > SYM_CONF_MAX_TASK
271 #undef SYM_CONF_MAX_TAG
272 #define SYM_CONF_MAX_TAG SYM_CONF_MAX_TASK
276 * This one means 'NO TAG for this job'
281 * Number of SCSI targets.
283 #if SYM_CONF_MAX_TARGET > 16
284 #error "more than 16 targets not allowed."
288 * Number of logical units per target.
290 #if SYM_CONF_MAX_LUN > 64
291 #error "more than 64 logical units per target not allowed."
295 * Asynchronous pre-scaler (ns). Shall be 40 for
296 * the SCSI timings to be compliant.
298 #define SYM_CONF_MIN_ASYNC (40)
301 * Number of entries in the START and DONE queues.
303 * We limit to 1 PAGE in order to succeed allocation of
304 * these queues. Each entry is 8 bytes long (2 DWORDS).
306 #ifdef SYM_CONF_MAX_START
307 #define SYM_CONF_MAX_QUEUE (SYM_CONF_MAX_START+2)
309 #define SYM_CONF_MAX_QUEUE (7*SYM_CONF_MAX_TASK+2)
310 #define SYM_CONF_MAX_START (SYM_CONF_MAX_QUEUE-2)
313 #if SYM_CONF_MAX_QUEUE > PAGE_SIZE/8
314 #undef SYM_CONF_MAX_QUEUE
315 #define SYM_CONF_MAX_QUEUE PAGE_SIZE/8
316 #undef SYM_CONF_MAX_START
317 #define SYM_CONF_MAX_START (SYM_CONF_MAX_QUEUE-2)
321 * For this one, we want a short name :-)
323 #define MAX_QUEUE SYM_CONF_MAX_QUEUE
326 * Active debugging tags and verbosity.
328 #define DEBUG_ALLOC (0x0001)
329 #define DEBUG_PHASE (0x0002)
330 #define DEBUG_POLL (0x0004)
331 #define DEBUG_QUEUE (0x0008)
332 #define DEBUG_RESULT (0x0010)
333 #define DEBUG_SCATTER (0x0020)
334 #define DEBUG_SCRIPT (0x0040)
335 #define DEBUG_TINY (0x0080)
336 #define DEBUG_TIMING (0x0100)
337 #define DEBUG_NEGO (0x0200)
338 #define DEBUG_TAGS (0x0400)
339 #define DEBUG_POINTER (0x0800)
342 static int sym_debug = 0;
343 #define DEBUG_FLAGS sym_debug
345 /* #define DEBUG_FLAGS (0x0631) */
346 #define DEBUG_FLAGS (0x0000)
349 #define sym_verbose (np->verbose)
352 * Insert a delay in micro-seconds and milli-seconds.
354 static void UDELAY(int us) { DELAY(us); }
355 static void MDELAY(int ms) { while (ms--) UDELAY(1000); }
358 * Simple power of two buddy-like allocator.
360 * This simple code is not intended to be fast, but to
361 * provide power of 2 aligned memory allocations.
362 * Since the SCRIPTS processor only supplies 8 bit arithmetic,
363 * this allocator allows simple and fast address calculations
364 * from the SCRIPTS code. In addition, cache line alignment
365 * is guaranteed for power of 2 cache line size.
367 * This allocator has been developped for the Linux sym53c8xx
368 * driver, since this O/S does not provide naturally aligned
370 * It has the advantage of allowing the driver to use private
371 * pages of memory that will be useful if we ever need to deal
372 * with IO MMUs for PCI.
375 #define MEMO_SHIFT 4 /* 16 bytes minimum memory chunk */
376 #define MEMO_PAGE_ORDER 0 /* 1 PAGE maximum */
378 #define MEMO_FREE_UNUSED /* Free unused pages immediately */
381 #define MEMO_CLUSTER_SHIFT (PAGE_SHIFT+MEMO_PAGE_ORDER)
382 #define MEMO_CLUSTER_SIZE (1UL << MEMO_CLUSTER_SHIFT)
383 #define MEMO_CLUSTER_MASK (MEMO_CLUSTER_SIZE-1)
385 #define get_pages() malloc(MEMO_CLUSTER_SIZE, M_DEVBUF, M_NOWAIT)
386 #define free_pages(p) free((p), M_DEVBUF)
388 typedef u_long m_addr_t; /* Enough bits to bit-hack addresses */
390 typedef struct m_link { /* Link between free memory chunks */
394 typedef struct m_vtob { /* Virtual to Bus address translation */
396 bus_dmamap_t dmamap; /* Map for this chunk */
397 m_addr_t vaddr; /* Virtual address */
398 m_addr_t baddr; /* Bus physical address */
400 /* Hash this stuff a bit to speed up translations */
401 #define VTOB_HASH_SHIFT 5
402 #define VTOB_HASH_SIZE (1UL << VTOB_HASH_SHIFT)
403 #define VTOB_HASH_MASK (VTOB_HASH_SIZE-1)
404 #define VTOB_HASH_CODE(m) \
405 ((((m_addr_t) (m)) >> MEMO_CLUSTER_SHIFT) & VTOB_HASH_MASK)
407 typedef struct m_pool { /* Memory pool of a given kind */
408 bus_dma_tag_t dev_dmat; /* Identifies the pool */
409 bus_dma_tag_t dmat; /* Tag for our fixed allocations */
410 m_addr_t (*getp)(struct m_pool *);
411 #ifdef MEMO_FREE_UNUSED
412 void (*freep)(struct m_pool *, m_addr_t);
414 #define M_GETP() mp->getp(mp)
415 #define M_FREEP(p) mp->freep(mp, p)
417 m_vtob_s *(vtob[VTOB_HASH_SIZE]);
419 struct m_link h[MEMO_CLUSTER_SHIFT - MEMO_SHIFT + 1];
422 static void *___sym_malloc(m_pool_s *mp, int size)
425 int s = (1 << MEMO_SHIFT);
430 if (size > MEMO_CLUSTER_SIZE)
440 if (s == MEMO_CLUSTER_SIZE) {
441 h[j].next = (m_link_s *) M_GETP();
443 h[j].next->next = NULL;
449 a = (m_addr_t) h[j].next;
451 h[j].next = h[j].next->next;
455 h[j].next = (m_link_s *) (a+s);
456 h[j].next->next = NULL;
460 printf("___sym_malloc(%d) = %p\n", size, (void *) a);
465 static void ___sym_mfree(m_pool_s *mp, void *ptr, int size)
468 int s = (1 << MEMO_SHIFT);
474 printf("___sym_mfree(%p, %d)\n", ptr, size);
477 if (size > MEMO_CLUSTER_SIZE)
488 #ifdef MEMO_FREE_UNUSED
489 if (s == MEMO_CLUSTER_SIZE) {
496 while (q->next && q->next != (m_link_s *) b) {
500 ((m_link_s *) a)->next = h[i].next;
501 h[i].next = (m_link_s *) a;
504 q->next = q->next->next;
511 static void *__sym_calloc2(m_pool_s *mp, int size, char *name, int uflags)
515 p = ___sym_malloc(mp, size);
517 if (DEBUG_FLAGS & DEBUG_ALLOC)
518 printf ("new %-10s[%4d] @%p.\n", name, size, p);
522 else if (uflags & MEMO_WARN)
523 printf ("__sym_calloc2: failed to allocate %s[%d]\n", name, size);
528 #define __sym_calloc(mp, s, n) __sym_calloc2(mp, s, n, MEMO_WARN)
530 static void __sym_mfree(m_pool_s *mp, void *ptr, int size, char *name)
532 if (DEBUG_FLAGS & DEBUG_ALLOC)
533 printf ("freeing %-10s[%4d] @%p.\n", name, size, ptr);
535 ___sym_mfree(mp, ptr, size);
540 * Default memory pool we donnot need to involve in DMA.
543 * With the `bus dma abstraction', we use a separate pool for
544 * memory we donnot need to involve in DMA.
546 static m_addr_t ___mp0_getp(m_pool_s *mp)
548 m_addr_t m = (m_addr_t) get_pages();
554 #ifdef MEMO_FREE_UNUSED
555 static void ___mp0_freep(m_pool_s *mp, m_addr_t m)
562 #ifdef MEMO_FREE_UNUSED
563 static m_pool_s mp0 = {0, 0, ___mp0_getp, ___mp0_freep};
565 static m_pool_s mp0 = {0, 0, ___mp0_getp};
570 * Actual memory allocation routine for non-DMAed memory.
572 static void *sym_calloc(int size, char *name)
576 m = __sym_calloc(&mp0, size, name);
582 * Actual memory allocation routine for non-DMAed memory.
584 static void sym_mfree(void *ptr, int size, char *name)
587 __sym_mfree(&mp0, ptr, size, name);
595 * With `bus dma abstraction', we use a separate pool per parent
596 * BUS handle. A reverse table (hashed) is maintained for virtual
597 * to BUS address translation.
599 static void getbaddrcb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
602 baddr = (bus_addr_t *)arg;
603 *baddr = segs->ds_addr;
606 static m_addr_t ___dma_getp(m_pool_s *mp)
610 bus_addr_t baddr = 0;
612 vbp = __sym_calloc(&mp0, sizeof(*vbp), "VTOB");
616 if (bus_dmamem_alloc(mp->dmat, &vaddr,
617 BUS_DMA_COHERENT | BUS_DMA_WAITOK, &vbp->dmamap))
619 bus_dmamap_load(mp->dmat, vbp->dmamap, vaddr,
620 MEMO_CLUSTER_SIZE, getbaddrcb, &baddr, BUS_DMA_NOWAIT);
622 int hc = VTOB_HASH_CODE(vaddr);
623 vbp->vaddr = (m_addr_t) vaddr;
624 vbp->baddr = (m_addr_t) baddr;
625 vbp->next = mp->vtob[hc];
628 return (m_addr_t) vaddr;
632 bus_dmamap_unload(mp->dmat, vbp->dmamap);
634 bus_dmamem_free(mp->dmat, vaddr, vbp->dmamap);
637 bus_dmamap_destroy(mp->dmat, vbp->dmamap);
638 __sym_mfree(&mp0, vbp, sizeof(*vbp), "VTOB");
643 #ifdef MEMO_FREE_UNUSED
644 static void ___dma_freep(m_pool_s *mp, m_addr_t m)
646 m_vtob_s **vbpp, *vbp;
647 int hc = VTOB_HASH_CODE(m);
649 vbpp = &mp->vtob[hc];
650 while (*vbpp && (*vbpp)->vaddr != m)
651 vbpp = &(*vbpp)->next;
654 *vbpp = (*vbpp)->next;
655 bus_dmamap_unload(mp->dmat, vbp->dmamap);
656 bus_dmamem_free(mp->dmat, (void *) vbp->vaddr, vbp->dmamap);
657 bus_dmamap_destroy(mp->dmat, vbp->dmamap);
658 __sym_mfree(&mp0, vbp, sizeof(*vbp), "VTOB");
664 static __inline m_pool_s *___get_dma_pool(bus_dma_tag_t dev_dmat)
667 for (mp = mp0.next; mp && mp->dev_dmat != dev_dmat; mp = mp->next);
671 static m_pool_s *___cre_dma_pool(bus_dma_tag_t dev_dmat)
675 mp = __sym_calloc(&mp0, sizeof(*mp), "MPOOL");
677 mp->dev_dmat = dev_dmat;
678 if (!bus_dma_tag_create(dev_dmat, 1, MEMO_CLUSTER_SIZE,
679 BUS_SPACE_MAXADDR_32BIT,
681 NULL, NULL, MEMO_CLUSTER_SIZE, 1,
682 MEMO_CLUSTER_SIZE, 0,
683 NULL, NULL, &mp->dmat)) {
684 mp->getp = ___dma_getp;
685 #ifdef MEMO_FREE_UNUSED
686 mp->freep = ___dma_freep;
694 __sym_mfree(&mp0, mp, sizeof(*mp), "MPOOL");
698 #ifdef MEMO_FREE_UNUSED
699 static void ___del_dma_pool(m_pool_s *p)
701 struct m_pool **pp = &mp0.next;
703 while (*pp && *pp != p)
707 bus_dma_tag_destroy(p->dmat);
708 __sym_mfree(&mp0, p, sizeof(*p), "MPOOL");
713 static void *__sym_calloc_dma(bus_dma_tag_t dev_dmat, int size, char *name)
719 mp = ___get_dma_pool(dev_dmat);
721 mp = ___cre_dma_pool(dev_dmat);
723 m = __sym_calloc(mp, size, name);
724 #ifdef MEMO_FREE_UNUSED
734 __sym_mfree_dma(bus_dma_tag_t dev_dmat, void *m, int size, char *name)
739 mp = ___get_dma_pool(dev_dmat);
741 __sym_mfree(mp, m, size, name);
742 #ifdef MEMO_FREE_UNUSED
749 static m_addr_t __vtobus(bus_dma_tag_t dev_dmat, void *m)
752 int hc = VTOB_HASH_CODE(m);
754 m_addr_t a = ((m_addr_t) m) & ~MEMO_CLUSTER_MASK;
757 mp = ___get_dma_pool(dev_dmat);
760 while (vp && (m_addr_t) vp->vaddr != a)
765 panic("sym: VTOBUS FAILED!\n");
766 return vp ? vp->baddr + (((m_addr_t) m) - a) : 0;
771 * Verbs for DMAable memory handling.
772 * The _uvptv_ macro avoids a nasty warning about pointer to volatile
775 #define _uvptv_(p) ((void *)((vm_offset_t)(p)))
776 #define _sym_calloc_dma(np, s, n) __sym_calloc_dma(np->bus_dmat, s, n)
777 #define _sym_mfree_dma(np, p, s, n) \
778 __sym_mfree_dma(np->bus_dmat, _uvptv_(p), s, n)
779 #define sym_calloc_dma(s, n) _sym_calloc_dma(np, s, n)
780 #define sym_mfree_dma(p, s, n) _sym_mfree_dma(np, p, s, n)
781 #define _vtobus(np, p) __vtobus(np->bus_dmat, _uvptv_(p))
782 #define vtobus(p) _vtobus(np, p)
786 * Print a buffer in hexadecimal format.
788 static void sym_printb_hex (u_char *p, int n)
791 printf (" %x", *p++);
795 * Same with a label at beginning and .\n at end.
797 static void sym_printl_hex (char *label, u_char *p, int n)
799 printf ("%s", label);
800 sym_printb_hex (p, n);
805 * Return a string for SCSI BUS mode.
807 static const char *sym_scsi_bus_mode(int mode)
810 case SMODE_HVD: return "HVD";
811 case SMODE_SE: return "SE";
812 case SMODE_LVD: return "LVD";
818 * Some poor and bogus sync table that refers to Tekram NVRAM layout.
820 #ifdef SYM_CONF_NVRAM_SUPPORT
821 static const u_char Tekram_sync[16] =
822 {25,31,37,43, 50,62,75,125, 12,15,18,21, 6,7,9,10};
826 * Union of supported NVRAM formats.
830 #define SYM_SYMBIOS_NVRAM (1)
831 #define SYM_TEKRAM_NVRAM (2)
832 #ifdef SYM_CONF_NVRAM_SUPPORT
834 Symbios_nvram Symbios;
841 * This one is hopefully useless, but actually useful. :-)
844 #define assert(expression) { \
845 if (!(expression)) { \
847 "assertion \"%s\" failed: file \"%s\", line %d\n", \
849 __FILE__, __LINE__); \
855 * Some provision for a possible big endian mode supported by
856 * Symbios chips (never seen, by the way).
857 * For now, this stuff does not deserve any comments. :)
860 #define sym_offb(o) (o)
861 #define sym_offw(o) (o)
864 * Some provision for support for BIG ENDIAN CPU.
867 #define cpu_to_scr(dw) htole32(dw)
868 #define scr_to_cpu(dw) le32toh(dw)
871 * Access to the chip IO registers and on-chip RAM.
872 * We use the `bus space' interface under FreeBSD-4 and
873 * later kernel versions.
877 #if defined(SYM_CONF_IOMAPPED)
879 #define INB_OFF(o) bus_read_1(np->io_res, (o))
880 #define INW_OFF(o) bus_read_2(np->io_res, (o))
881 #define INL_OFF(o) bus_read_4(np->io_res, (o))
883 #define OUTB_OFF(o, v) bus_write_1(np->io_res, (o), (v))
884 #define OUTW_OFF(o, v) bus_write_2(np->io_res, (o), (v))
885 #define OUTL_OFF(o, v) bus_write_4(np->io_res, (o), (v))
887 #else /* Memory mapped IO */
889 #define INB_OFF(o) bus_read_1(np->mmio_res, (o))
890 #define INW_OFF(o) bus_read_2(np->mmio_res, (o))
891 #define INL_OFF(o) bus_read_4(np->mmio_res, (o))
893 #define OUTB_OFF(o, v) bus_write_1(np->mmio_res, (o), (v))
894 #define OUTW_OFF(o, v) bus_write_2(np->mmio_res, (o), (v))
895 #define OUTL_OFF(o, v) bus_write_4(np->mmio_res, (o), (v))
897 #endif /* SYM_CONF_IOMAPPED */
899 #define OUTRAM_OFF(o, a, l) \
900 bus_write_region_1(np->ram_res, (o), (a), (l))
904 * Common definitions for both bus space and legacy IO methods.
906 #define INB(r) INB_OFF(offsetof(struct sym_reg,r))
907 #define INW(r) INW_OFF(offsetof(struct sym_reg,r))
908 #define INL(r) INL_OFF(offsetof(struct sym_reg,r))
910 #define OUTB(r, v) OUTB_OFF(offsetof(struct sym_reg,r), (v))
911 #define OUTW(r, v) OUTW_OFF(offsetof(struct sym_reg,r), (v))
912 #define OUTL(r, v) OUTL_OFF(offsetof(struct sym_reg,r), (v))
914 #define OUTONB(r, m) OUTB(r, INB(r) | (m))
915 #define OUTOFFB(r, m) OUTB(r, INB(r) & ~(m))
916 #define OUTONW(r, m) OUTW(r, INW(r) | (m))
917 #define OUTOFFW(r, m) OUTW(r, INW(r) & ~(m))
918 #define OUTONL(r, m) OUTL(r, INL(r) | (m))
919 #define OUTOFFL(r, m) OUTL(r, INL(r) & ~(m))
922 * We normally want the chip to have a consistent view
923 * of driver internal data structures when we restart it.
926 #define OUTL_DSP(v) \
929 OUTL (nc_dsp, (v)); \
932 #define OUTONB_STD() \
935 OUTONB (nc_dcntl, (STD|NOCOM)); \
939 * Command control block states.
943 #define HS_NEGOTIATE (2) /* sync/wide data transfer*/
944 #define HS_DISCONNECT (3) /* Disconnected by target */
945 #define HS_WAIT (4) /* waiting for resource */
947 #define HS_DONEMASK (0x80)
948 #define HS_COMPLETE (4|HS_DONEMASK)
949 #define HS_SEL_TIMEOUT (5|HS_DONEMASK) /* Selection timeout */
950 #define HS_UNEXPECTED (6|HS_DONEMASK) /* Unexpected disconnect */
951 #define HS_COMP_ERR (7|HS_DONEMASK) /* Completed with error */
954 * Software Interrupt Codes
956 #define SIR_BAD_SCSI_STATUS (1)
957 #define SIR_SEL_ATN_NO_MSG_OUT (2)
958 #define SIR_MSG_RECEIVED (3)
959 #define SIR_MSG_WEIRD (4)
960 #define SIR_NEGO_FAILED (5)
961 #define SIR_NEGO_PROTO (6)
962 #define SIR_SCRIPT_STOPPED (7)
963 #define SIR_REJECT_TO_SEND (8)
964 #define SIR_SWIDE_OVERRUN (9)
965 #define SIR_SODL_UNDERRUN (10)
966 #define SIR_RESEL_NO_MSG_IN (11)
967 #define SIR_RESEL_NO_IDENTIFY (12)
968 #define SIR_RESEL_BAD_LUN (13)
969 #define SIR_TARGET_SELECTED (14)
970 #define SIR_RESEL_BAD_I_T_L (15)
971 #define SIR_RESEL_BAD_I_T_L_Q (16)
972 #define SIR_ABORT_SENT (17)
973 #define SIR_RESEL_ABORTED (18)
974 #define SIR_MSG_OUT_DONE (19)
975 #define SIR_COMPLETE_ERROR (20)
976 #define SIR_DATA_OVERRUN (21)
977 #define SIR_BAD_PHASE (22)
981 * Extended error bit codes.
982 * xerr_status field of struct sym_ccb.
984 #define XE_EXTRA_DATA (1) /* unexpected data phase */
985 #define XE_BAD_PHASE (1<<1) /* illegal phase (4/5) */
986 #define XE_PARITY_ERR (1<<2) /* unrecovered SCSI parity error */
987 #define XE_SODL_UNRUN (1<<3) /* ODD transfer in DATA OUT phase */
988 #define XE_SWIDE_OVRUN (1<<4) /* ODD transfer in DATA IN phase */
991 * Negotiation status.
992 * nego_status field of struct sym_ccb.
999 * A CCB hashed table is used to retrieve CCB address
1002 #define CCB_HASH_SHIFT 8
1003 #define CCB_HASH_SIZE (1UL << CCB_HASH_SHIFT)
1004 #define CCB_HASH_MASK (CCB_HASH_SIZE-1)
1005 #define CCB_HASH_CODE(dsa) (((dsa) >> 9) & CCB_HASH_MASK)
1010 #define SYM_DISC_ENABLED (1)
1011 #define SYM_TAGS_ENABLED (1<<1)
1012 #define SYM_SCAN_BOOT_DISABLED (1<<2)
1013 #define SYM_SCAN_LUNS_DISABLED (1<<3)
1016 * Host adapter miscellaneous flags.
1018 #define SYM_AVOID_BUS_RESET (1)
1019 #define SYM_SCAN_TARGETS_HILO (1<<1)
1023 * Some devices, for example the CHEETAH 2 LVD, disconnects without
1024 * saving the DATA POINTER then reselects and terminates the IO.
1025 * On reselection, the automatic RESTORE DATA POINTER makes the
1026 * CURRENT DATA POINTER not point at the end of the IO.
1027 * This behaviour just breaks our calculation of the residual.
1028 * For now, we just force an AUTO SAVE on disconnection and will
1029 * fix that in a further driver version.
1031 #define SYM_QUIRK_AUTOSAVE 1
1036 #define SYM_LOCK() mtx_lock(&np->mtx)
1037 #define SYM_LOCK_ASSERT(_what) mtx_assert(&np->mtx, (_what))
1038 #define SYM_LOCK_DESTROY() mtx_destroy(&np->mtx)
1039 #define SYM_LOCK_INIT() mtx_init(&np->mtx, "sym_lock", NULL, MTX_DEF)
1040 #define SYM_LOCK_INITIALIZED() mtx_initialized(&np->mtx)
1041 #define SYM_UNLOCK() mtx_unlock(&np->mtx)
1043 #define SYM_SNOOP_TIMEOUT (10000000)
1044 #define SYM_PCI_IO PCIR_BAR(0)
1045 #define SYM_PCI_MMIO PCIR_BAR(1)
1046 #define SYM_PCI_RAM PCIR_BAR(2)
1047 #define SYM_PCI_RAM64 PCIR_BAR(3)
1050 * Back-pointer from the CAM CCB to our data structures.
1052 #define sym_hcb_ptr spriv_ptr0
1053 /* #define sym_ccb_ptr spriv_ptr1 */
1056 * We mostly have to deal with pointers.
1057 * Thus these typedef's.
1059 typedef struct sym_tcb *tcb_p;
1060 typedef struct sym_lcb *lcb_p;
1061 typedef struct sym_ccb *ccb_p;
1062 typedef struct sym_hcb *hcb_p;
1065 * Gather negotiable parameters value
1073 u8 options; /* PPR options */
1077 struct sym_trans current;
1078 struct sym_trans goal;
1079 struct sym_trans user;
1082 #define BUS_8_BIT MSG_EXT_WDTR_BUS_8_BIT
1083 #define BUS_16_BIT MSG_EXT_WDTR_BUS_16_BIT
1086 * Global TCB HEADER.
1088 * Due to lack of indirect addressing on earlier NCR chips,
1089 * this substructure is copied from the TCB to a global
1090 * address after selection.
1091 * For SYMBIOS chips that support LOAD/STORE this copy is
1092 * not needed and thus not performed.
1096 * Scripts bus addresses of LUN table accessed from scripts.
1097 * LUN #0 is a special case, since multi-lun devices are rare,
1098 * and we we want to speed-up the general case and not waste
1101 u32 luntbl_sa; /* bus address of this table */
1102 u32 lun0_sa; /* bus address of LCB #0 */
1104 * Actual SYNC/WIDE IO registers value for this target.
1105 * 'sval', 'wval' and 'uval' are read from SCRIPTS and
1106 * so have alignment constraints.
1108 /*0*/ u_char uval; /* -> SCNTL4 register */
1109 /*1*/ u_char sval; /* -> SXFER io register */
1110 /*2*/ u_char filler1;
1111 /*3*/ u_char wval; /* -> SCNTL3 io register */
1115 * Target Control Block
1120 * Assumed at offset 0.
1122 /*0*/ struct sym_tcbh head;
1125 * LUN table used by the SCRIPTS processor.
1126 * An array of bus addresses is used on reselection.
1128 u32 *luntbl; /* LCBs bus address table */
1131 * LUN table used by the C code.
1133 lcb_p lun0p; /* LCB of LUN #0 (usual case) */
1134 #if SYM_CONF_MAX_LUN > 1
1135 lcb_p *lunmp; /* Other LCBs [1..MAX_LUN] */
1139 * Bitmap that tells about LUNs that succeeded at least
1140 * 1 IO and therefore assumed to be a real device.
1141 * Avoid useless allocation of the LCB structure.
1143 u32 lun_map[(SYM_CONF_MAX_LUN+31)/32];
1146 * Bitmap that tells about LUNs that haven't yet an LCB
1147 * allocated (not discovered or LCB allocation failed).
1149 u32 busy0_map[(SYM_CONF_MAX_LUN+31)/32];
1152 * Transfer capabilities (SIP)
1154 struct sym_tinfo tinfo;
1157 * Keep track of the CCB used for the negotiation in order
1158 * to ensure that only 1 negotiation is queued at a time.
1160 ccb_p nego_cp; /* CCB used for the nego */
1163 * Set when we want to reset the device.
1168 * Other user settable limits and options.
1169 * These limits are read from the NVRAM if present.
1176 * Global LCB HEADER.
1178 * Due to lack of indirect addressing on earlier NCR chips,
1179 * this substructure is copied from the LCB to a global
1180 * address after selection.
1181 * For SYMBIOS chips that support LOAD/STORE this copy is
1182 * not needed and thus not performed.
1186 * SCRIPTS address jumped by SCRIPTS on reselection.
1187 * For not probed logical units, this address points to
1188 * SCRIPTS that deal with bad LU handling (must be at
1189 * offset zero of the LCB for that reason).
1194 * Task (bus address of a CCB) read from SCRIPTS that points
1195 * to the unique ITL nexus allowed to be disconnected.
1200 * Task table bus address (read from SCRIPTS).
1206 * Logical Unit Control Block
1211 * Assumed at offset 0.
1213 /*0*/ struct sym_lcbh head;
1216 * Task table read from SCRIPTS that contains pointers to
1217 * ITLQ nexuses. The bus address read from SCRIPTS is
1218 * inside the header.
1220 u32 *itlq_tbl; /* Kernel virtual address */
1223 * Busy CCBs management.
1225 u_short busy_itlq; /* Number of busy tagged CCBs */
1226 u_short busy_itl; /* Number of busy untagged CCBs */
1229 * Circular tag allocation buffer.
1231 u_short ia_tag; /* Tag allocation index */
1232 u_short if_tag; /* Tag release index */
1233 u_char *cb_tags; /* Circular tags buffer */
1236 * Set when we want to clear all tasks.
1244 u_char current_flags;
1248 * Action from SCRIPTS on a task.
1249 * Is part of the CCB, but is also used separately to plug
1250 * error handling action to perform from SCRIPTS.
1253 u32 start; /* Jumped by SCRIPTS after selection */
1254 u32 restart; /* Jumped by SCRIPTS on relection */
1258 * Phase mismatch context.
1260 * It is part of the CCB and is used as parameters for the
1261 * DATA pointer. We need two contexts to handle correctly the
1262 * SAVED DATA POINTER.
1265 struct sym_tblmove sg; /* Updated interrupted SG block */
1266 u32 ret; /* SCRIPT return address */
1270 * LUN control block lookup.
1271 * We use a direct pointer for LUN #0, and a table of
1272 * pointers which is only allocated for devices that support
1275 #if SYM_CONF_MAX_LUN <= 1
1276 #define sym_lp(np, tp, lun) (!lun) ? (tp)->lun0p : 0
1278 #define sym_lp(np, tp, lun) \
1279 (!lun) ? (tp)->lun0p : (tp)->lunmp ? (tp)->lunmp[(lun)] : 0
1283 * Status are used by the host and the script processor.
1285 * The last four bytes (status[4]) are copied to the
1286 * scratchb register (declared as scr0..scr3) just after the
1287 * select/reselect, and copied back just after disconnecting.
1288 * Inside the script the XX_REG are used.
1292 * Last four bytes (script)
1296 #define HS_PRT nc_scr1
1298 #define SS_PRT nc_scr2
1300 #define HF_PRT nc_scr3
1303 * Last four bytes (host)
1305 #define actualquirks phys.head.status[0]
1306 #define host_status phys.head.status[1]
1307 #define ssss_status phys.head.status[2]
1308 #define host_flags phys.head.status[3]
1313 #define HF_IN_PM0 1u
1314 #define HF_IN_PM1 (1u<<1)
1315 #define HF_ACT_PM (1u<<2)
1316 #define HF_DP_SAVED (1u<<3)
1317 #define HF_SENSE (1u<<4)
1318 #define HF_EXT_ERR (1u<<5)
1319 #define HF_DATA_IN (1u<<6)
1320 #ifdef SYM_CONF_IARB_SUPPORT
1321 #define HF_HINT_IARB (1u<<7)
1325 * Global CCB HEADER.
1327 * Due to lack of indirect addressing on earlier NCR chips,
1328 * this substructure is copied from the ccb to a global
1329 * address after selection (or reselection) and copied back
1330 * before disconnect.
1331 * For SYMBIOS chips that support LOAD/STORE this copy is
1332 * not needed and thus not performed.
1337 * Start and restart SCRIPTS addresses (must be at 0).
1339 /*0*/ struct sym_actscr go;
1342 * SCRIPTS jump address that deal with data pointers.
1343 * 'savep' points to the position in the script responsible
1344 * for the actual transfer of data.
1345 * It's written on reception of a SAVE_DATA_POINTER message.
1347 u32 savep; /* Jump address to saved data pointer */
1348 u32 lastp; /* SCRIPTS address at end of data */
1349 u32 goalp; /* Not accessed for now from SCRIPTS */
1358 * Data Structure Block
1360 * During execution of a ccb by the script processor, the
1361 * DSA (data structure address) register points to this
1362 * substructure of the ccb.
1367 * Also assumed at offset 0 of the sym_ccb structure.
1369 /*0*/ struct sym_ccbh head;
1372 * Phase mismatch contexts.
1373 * We need two to handle correctly the SAVED DATA POINTER.
1374 * MUST BOTH BE AT OFFSET < 256, due to using 8 bit arithmetic
1375 * for address calculation from SCRIPTS.
1381 * Table data for Script
1383 struct sym_tblsel select;
1384 struct sym_tblmove smsg;
1385 struct sym_tblmove smsg_ext;
1386 struct sym_tblmove cmd;
1387 struct sym_tblmove sense;
1388 struct sym_tblmove wresid;
1389 struct sym_tblmove data [SYM_CONF_MAX_SG];
1393 * Our Command Control Block
1397 * This is the data structure which is pointed by the DSA
1398 * register when it is executed by the script processor.
1399 * It must be the first entry.
1401 struct sym_dsb phys;
1404 * Pointer to CAM ccb and related stuff.
1406 struct callout ch; /* callout handle */
1407 union ccb *cam_ccb; /* CAM scsiio ccb */
1408 u8 cdb_buf[16]; /* Copy of CDB */
1409 u8 *sns_bbuf; /* Bounce buffer for sense data */
1410 #define SYM_SNS_BBUF_LEN sizeof(struct scsi_sense_data)
1411 int data_len; /* Total data length */
1412 int segments; /* Number of SG segments */
1415 * Miscellaneous status'.
1417 u_char nego_status; /* Negotiation status */
1418 u_char xerr_status; /* Extended error flags */
1419 u32 extra_bytes; /* Extraneous bytes transferred */
1423 * We prepare a message to be sent after selection.
1424 * We may use a second one if the command is rescheduled
1425 * due to CHECK_CONDITION or COMMAND TERMINATED.
1426 * Contents are IDENTIFY and SIMPLE_TAG.
1427 * While negotiating sync or wide transfer,
1428 * a SDTR or WDTR message is appended.
1430 u_char scsi_smsg [12];
1431 u_char scsi_smsg2[12];
1434 * Auto request sense related fields.
1436 u_char sensecmd[6]; /* Request Sense command */
1437 u_char sv_scsi_status; /* Saved SCSI status */
1438 u_char sv_xerr_status; /* Saved extended status */
1439 int sv_resid; /* Saved residual */
1442 * Map for the DMA of user data.
1444 void *arg; /* Argument for some callback */
1445 bus_dmamap_t dmamap; /* DMA map for user data */
1447 #define SYM_DMA_NONE 0
1448 #define SYM_DMA_READ 1
1449 #define SYM_DMA_WRITE 2
1453 u32 ccb_ba; /* BUS address of this CCB */
1454 u_short tag; /* Tag for this transfer */
1455 /* NO_TAG means no tag */
1458 ccb_p link_ccbh; /* Host adapter CCB hash chain */
1460 link_ccbq; /* Link to free/busy CCB queue */
1461 u32 startp; /* Initial data pointer */
1462 int ext_sg; /* Extreme data pointer, used */
1463 int ext_ofs; /* to calculate the residual. */
1464 u_char to_abort; /* Want this IO to be aborted */
1467 #define CCB_BA(cp,lbl) (cp->ccb_ba + offsetof(struct sym_ccb, lbl))
1470 * Host Control Block
1477 * Due to poorness of addressing capabilities, earlier
1478 * chips (810, 815, 825) copy part of the data structures
1479 * (CCB, TCB and LCB) in fixed areas.
1481 #ifdef SYM_CONF_GENERIC_SUPPORT
1482 struct sym_ccbh ccb_head;
1483 struct sym_tcbh tcb_head;
1484 struct sym_lcbh lcb_head;
1487 * Idle task and invalid task actions and
1488 * their bus addresses.
1490 struct sym_actscr idletask, notask, bad_itl, bad_itlq;
1491 vm_offset_t idletask_ba, notask_ba, bad_itl_ba, bad_itlq_ba;
1494 * Dummy lun table to protect us against target
1495 * returning bad lun number on reselection.
1497 u32 *badluntbl; /* Table physical address */
1498 u32 badlun_sa; /* SCRIPT handler BUS address */
1501 * Bus address of this host control block.
1506 * Bit 32-63 of the on-chip RAM bus address in LE format.
1507 * The START_RAM64 script loads the MMRS and MMWS from this
1513 * Chip and controller indentification.
1518 * Initial value of some IO register bits.
1519 * These values are assumed to have been set by BIOS, and may
1520 * be used to probe adapter implementation differences.
1522 u_char sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest3, sv_ctest4,
1523 sv_ctest5, sv_gpcntl, sv_stest2, sv_stest4, sv_scntl4,
1527 * Actual initial value of IO register bits used by the
1528 * driver. They are loaded at initialisation according to
1529 * features that are to be enabled/disabled.
1531 u_char rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest3, rv_ctest4,
1532 rv_ctest5, rv_stest2, rv_ccntl0, rv_ccntl1, rv_scntl4;
1538 struct sym_tcb *target;
1540 struct sym_tcb target[SYM_CONF_MAX_TARGET];
1544 * Target control block bus address array used by the SCRIPT
1551 * CAM SIM information for this instance.
1553 struct cam_sim *sim;
1554 struct cam_path *path;
1557 * Allocated hardware resources.
1559 struct resource *irq_res;
1560 struct resource *io_res;
1561 struct resource *mmio_res;
1562 struct resource *ram_res;
1569 * My understanding of PCI is that all agents must share the
1570 * same addressing range and model.
1571 * But some hardware architecture guys provide complex and
1572 * brain-deaded stuff that makes shit.
1573 * This driver only support PCI compliant implementations and
1574 * deals with part of the BUS stuff complexity only to fit O/S
1581 bus_dma_tag_t bus_dmat; /* DMA tag from parent BUS */
1582 bus_dma_tag_t data_dmat; /* DMA tag for user data */
1584 * BUS addresses of the chip
1586 vm_offset_t mmio_ba; /* MMIO BUS address */
1587 int mmio_ws; /* MMIO Window size */
1589 vm_offset_t ram_ba; /* RAM BUS address */
1590 int ram_ws; /* RAM window size */
1593 * SCRIPTS virtual and physical bus addresses.
1594 * 'script' is loaded in the on-chip RAM if present.
1595 * 'scripth' stays in main memory for all chips except the
1596 * 53C895A, 53C896 and 53C1010 that provide 8K on-chip RAM.
1598 u_char *scripta0; /* Copies of script and scripth */
1599 u_char *scriptb0; /* Copies of script and scripth */
1600 vm_offset_t scripta_ba; /* Actual script and scripth */
1601 vm_offset_t scriptb_ba; /* bus addresses. */
1602 vm_offset_t scriptb0_ba;
1603 u_short scripta_sz; /* Actual size of script A */
1604 u_short scriptb_sz; /* Actual size of script B */
1607 * Bus addresses, setup and patch methods for
1608 * the selected firmware.
1610 struct sym_fwa_ba fwa_bas; /* Useful SCRIPTA bus addresses */
1611 struct sym_fwb_ba fwb_bas; /* Useful SCRIPTB bus addresses */
1612 void (*fw_setup)(hcb_p np, const struct sym_fw *fw);
1613 void (*fw_patch)(hcb_p np);
1614 const char *fw_name;
1617 * General controller parameters and configuration.
1619 u_short device_id; /* PCI device id */
1620 u_char revision_id; /* PCI device revision id */
1621 u_int features; /* Chip features map */
1622 u_char myaddr; /* SCSI id of the adapter */
1623 u_char maxburst; /* log base 2 of dwords burst */
1624 u_char maxwide; /* Maximum transfer width */
1625 u_char minsync; /* Min sync period factor (ST) */
1626 u_char maxsync; /* Max sync period factor (ST) */
1627 u_char maxoffs; /* Max scsi offset (ST) */
1628 u_char minsync_dt; /* Min sync period factor (DT) */
1629 u_char maxsync_dt; /* Max sync period factor (DT) */
1630 u_char maxoffs_dt; /* Max scsi offset (DT) */
1631 u_char multiplier; /* Clock multiplier (1,2,4) */
1632 u_char clock_divn; /* Number of clock divisors */
1633 u32 clock_khz; /* SCSI clock frequency in KHz */
1634 u32 pciclk_khz; /* Estimated PCI clock in KHz */
1636 * Start queue management.
1637 * It is filled up by the host processor and accessed by the
1638 * SCRIPTS processor in order to start SCSI commands.
1640 volatile /* Prevent code optimizations */
1641 u32 *squeue; /* Start queue virtual address */
1642 u32 squeue_ba; /* Start queue BUS address */
1643 u_short squeueput; /* Next free slot of the queue */
1644 u_short actccbs; /* Number of allocated CCBs */
1647 * Command completion queue.
1648 * It is the same size as the start queue to avoid overflow.
1650 u_short dqueueget; /* Next position to scan */
1651 volatile /* Prevent code optimizations */
1652 u32 *dqueue; /* Completion (done) queue */
1653 u32 dqueue_ba; /* Done queue BUS address */
1656 * Miscellaneous buffers accessed by the scripts-processor.
1657 * They shall be DWORD aligned, because they may be read or
1658 * written with a script command.
1660 u_char msgout[8]; /* Buffer for MESSAGE OUT */
1661 u_char msgin [8]; /* Buffer for MESSAGE IN */
1662 u32 lastmsg; /* Last SCSI message sent */
1663 u_char scratch; /* Scratch for SCSI receive */
1666 * Miscellaneous configuration and status parameters.
1668 u_char usrflags; /* Miscellaneous user flags */
1669 u_char scsi_mode; /* Current SCSI BUS mode */
1670 u_char verbose; /* Verbosity for this controller*/
1671 u32 cache; /* Used for cache test at init. */
1674 * CCB lists and queue.
1676 ccb_p ccbh[CCB_HASH_SIZE]; /* CCB hashed by DSA value */
1677 SYM_QUEHEAD free_ccbq; /* Queue of available CCBs */
1678 SYM_QUEHEAD busy_ccbq; /* Queue of busy CCBs */
1681 * During error handling and/or recovery,
1682 * active CCBs that are to be completed with
1683 * error or requeued are moved from the busy_ccbq
1684 * to the comp_ccbq prior to completion.
1686 SYM_QUEHEAD comp_ccbq;
1689 * CAM CCB pending queue.
1691 SYM_QUEHEAD cam_ccbq;
1694 * IMMEDIATE ARBITRATION (IARB) control.
1696 * We keep track in 'last_cp' of the last CCB that has been
1697 * queued to the SCRIPTS processor and clear 'last_cp' when
1698 * this CCB completes. If last_cp is not zero at the moment
1699 * we queue a new CCB, we set a flag in 'last_cp' that is
1700 * used by the SCRIPTS as a hint for setting IARB.
1701 * We donnot set more than 'iarb_max' consecutive hints for
1702 * IARB in order to leave devices a chance to reselect.
1703 * By the way, any non zero value of 'iarb_max' is unfair. :)
1705 #ifdef SYM_CONF_IARB_SUPPORT
1706 u_short iarb_max; /* Max. # consecutive IARB hints*/
1707 u_short iarb_count; /* Actual # of these hints */
1712 * Command abort handling.
1713 * We need to synchronize tightly with the SCRIPTS
1714 * processor in order to handle things correctly.
1716 u_char abrt_msg[4]; /* Message to send buffer */
1717 struct sym_tblmove abrt_tbl; /* Table for the MOV of it */
1718 struct sym_tblsel abrt_sel; /* Sync params for selection */
1719 u_char istat_sem; /* Tells the chip to stop (SEM) */
1722 #define HCB_BA(np, lbl) (np->hcb_ba + offsetof(struct sym_hcb, lbl))
1725 * Return the name of the controller.
1727 static __inline const char *sym_name(hcb_p np)
1729 return device_get_nameunit(np->device);
1732 /*--------------------------------------------------------------------------*/
1733 /*------------------------------ FIRMWARES ---------------------------------*/
1734 /*--------------------------------------------------------------------------*/
1737 * This stuff will be moved to a separate source file when
1738 * the driver will be broken into several source modules.
1742 * Macros used for all firmwares.
1744 #define SYM_GEN_A(s, label) ((short) offsetof(s, label)),
1745 #define SYM_GEN_B(s, label) ((short) offsetof(s, label)),
1746 #define PADDR_A(label) SYM_GEN_PADDR_A(struct SYM_FWA_SCR, label)
1747 #define PADDR_B(label) SYM_GEN_PADDR_B(struct SYM_FWB_SCR, label)
1750 #ifdef SYM_CONF_GENERIC_SUPPORT
1752 * Allocate firmware #1 script area.
1754 #define SYM_FWA_SCR sym_fw1a_scr
1755 #define SYM_FWB_SCR sym_fw1b_scr
1756 #include <dev/sym/sym_fw1.h>
1757 static const struct sym_fwa_ofs sym_fw1a_ofs = {
1758 SYM_GEN_FW_A(struct SYM_FWA_SCR)
1760 static const struct sym_fwb_ofs sym_fw1b_ofs = {
1761 SYM_GEN_FW_B(struct SYM_FWB_SCR)
1765 #endif /* SYM_CONF_GENERIC_SUPPORT */
1768 * Allocate firmware #2 script area.
1770 #define SYM_FWA_SCR sym_fw2a_scr
1771 #define SYM_FWB_SCR sym_fw2b_scr
1772 #include <dev/sym/sym_fw2.h>
1773 static const struct sym_fwa_ofs sym_fw2a_ofs = {
1774 SYM_GEN_FW_A(struct SYM_FWA_SCR)
1776 static const struct sym_fwb_ofs sym_fw2b_ofs = {
1777 SYM_GEN_FW_B(struct SYM_FWB_SCR)
1778 SYM_GEN_B(struct SYM_FWB_SCR, start64)
1779 SYM_GEN_B(struct SYM_FWB_SCR, pm_handle)
1789 #ifdef SYM_CONF_GENERIC_SUPPORT
1791 * Patch routine for firmware #1.
1794 sym_fw1_patch(hcb_p np)
1796 struct sym_fw1a_scr *scripta0;
1797 struct sym_fw1b_scr *scriptb0;
1799 scripta0 = (struct sym_fw1a_scr *) np->scripta0;
1800 scriptb0 = (struct sym_fw1b_scr *) np->scriptb0;
1803 * Remove LED support if not needed.
1805 if (!(np->features & FE_LED0)) {
1806 scripta0->idle[0] = cpu_to_scr(SCR_NO_OP);
1807 scripta0->reselected[0] = cpu_to_scr(SCR_NO_OP);
1808 scripta0->start[0] = cpu_to_scr(SCR_NO_OP);
1811 #ifdef SYM_CONF_IARB_SUPPORT
1813 * If user does not want to use IMMEDIATE ARBITRATION
1814 * when we are reselected while attempting to arbitrate,
1815 * patch the SCRIPTS accordingly with a SCRIPT NO_OP.
1817 if (!SYM_CONF_SET_IARB_ON_ARB_LOST)
1818 scripta0->ungetjob[0] = cpu_to_scr(SCR_NO_OP);
1821 * Patch some data in SCRIPTS.
1822 * - start and done queue initial bus address.
1823 * - target bus address table bus address.
1825 scriptb0->startpos[0] = cpu_to_scr(np->squeue_ba);
1826 scriptb0->done_pos[0] = cpu_to_scr(np->dqueue_ba);
1827 scriptb0->targtbl[0] = cpu_to_scr(np->targtbl_ba);
1829 #endif /* SYM_CONF_GENERIC_SUPPORT */
1832 * Patch routine for firmware #2.
1835 sym_fw2_patch(hcb_p np)
1837 struct sym_fw2a_scr *scripta0;
1838 struct sym_fw2b_scr *scriptb0;
1840 scripta0 = (struct sym_fw2a_scr *) np->scripta0;
1841 scriptb0 = (struct sym_fw2b_scr *) np->scriptb0;
1844 * Remove LED support if not needed.
1846 if (!(np->features & FE_LED0)) {
1847 scripta0->idle[0] = cpu_to_scr(SCR_NO_OP);
1848 scripta0->reselected[0] = cpu_to_scr(SCR_NO_OP);
1849 scripta0->start[0] = cpu_to_scr(SCR_NO_OP);
1852 #ifdef SYM_CONF_IARB_SUPPORT
1854 * If user does not want to use IMMEDIATE ARBITRATION
1855 * when we are reselected while attempting to arbitrate,
1856 * patch the SCRIPTS accordingly with a SCRIPT NO_OP.
1858 if (!SYM_CONF_SET_IARB_ON_ARB_LOST)
1859 scripta0->ungetjob[0] = cpu_to_scr(SCR_NO_OP);
1862 * Patch some variable in SCRIPTS.
1863 * - start and done queue initial bus address.
1864 * - target bus address table bus address.
1866 scriptb0->startpos[0] = cpu_to_scr(np->squeue_ba);
1867 scriptb0->done_pos[0] = cpu_to_scr(np->dqueue_ba);
1868 scriptb0->targtbl[0] = cpu_to_scr(np->targtbl_ba);
1871 * Remove the load of SCNTL4 on reselection if not a C10.
1873 if (!(np->features & FE_C10)) {
1874 scripta0->resel_scntl4[0] = cpu_to_scr(SCR_NO_OP);
1875 scripta0->resel_scntl4[1] = cpu_to_scr(0);
1879 * Remove a couple of work-arounds specific to C1010 if
1880 * they are not desirable. See `sym_fw2.h' for more details.
1882 if (!(np->device_id == PCI_ID_LSI53C1010_2 &&
1883 np->revision_id < 0x1 &&
1884 np->pciclk_khz < 60000)) {
1885 scripta0->datao_phase[0] = cpu_to_scr(SCR_NO_OP);
1886 scripta0->datao_phase[1] = cpu_to_scr(0);
1888 if (!(np->device_id == PCI_ID_LSI53C1010 &&
1889 /* np->revision_id < 0xff */ 1)) {
1890 scripta0->sel_done[0] = cpu_to_scr(SCR_NO_OP);
1891 scripta0->sel_done[1] = cpu_to_scr(0);
1895 * Patch some other variables in SCRIPTS.
1896 * These ones are loaded by the SCRIPTS processor.
1898 scriptb0->pm0_data_addr[0] =
1899 cpu_to_scr(np->scripta_ba +
1900 offsetof(struct sym_fw2a_scr, pm0_data));
1901 scriptb0->pm1_data_addr[0] =
1902 cpu_to_scr(np->scripta_ba +
1903 offsetof(struct sym_fw2a_scr, pm1_data));
1907 * Fill the data area in scripts.
1908 * To be done for all firmwares.
1911 sym_fw_fill_data (u32 *in, u32 *out)
1915 for (i = 0; i < SYM_CONF_MAX_SG; i++) {
1916 *in++ = SCR_CHMOV_TBL ^ SCR_DATA_IN;
1917 *in++ = offsetof (struct sym_dsb, data[i]);
1918 *out++ = SCR_CHMOV_TBL ^ SCR_DATA_OUT;
1919 *out++ = offsetof (struct sym_dsb, data[i]);
1924 * Setup useful script bus addresses.
1925 * To be done for all firmwares.
1928 sym_fw_setup_bus_addresses(hcb_p np, const struct sym_fw *fw)
1935 * Build the bus address table for script A
1936 * from the script A offset table.
1938 po = (const u_short *) fw->a_ofs;
1939 pa = (u32 *) &np->fwa_bas;
1940 for (i = 0 ; i < sizeof(np->fwa_bas)/sizeof(u32) ; i++)
1941 pa[i] = np->scripta_ba + po[i];
1944 * Same for script B.
1946 po = (const u_short *) fw->b_ofs;
1947 pa = (u32 *) &np->fwb_bas;
1948 for (i = 0 ; i < sizeof(np->fwb_bas)/sizeof(u32) ; i++)
1949 pa[i] = np->scriptb_ba + po[i];
1952 #ifdef SYM_CONF_GENERIC_SUPPORT
1954 * Setup routine for firmware #1.
1957 sym_fw1_setup(hcb_p np, const struct sym_fw *fw)
1959 struct sym_fw1a_scr *scripta0;
1960 struct sym_fw1b_scr *scriptb0;
1962 scripta0 = (struct sym_fw1a_scr *) np->scripta0;
1963 scriptb0 = (struct sym_fw1b_scr *) np->scriptb0;
1966 * Fill variable parts in scripts.
1968 sym_fw_fill_data(scripta0->data_in, scripta0->data_out);
1971 * Setup bus addresses used from the C code..
1973 sym_fw_setup_bus_addresses(np, fw);
1975 #endif /* SYM_CONF_GENERIC_SUPPORT */
1978 * Setup routine for firmware #2.
1981 sym_fw2_setup(hcb_p np, const struct sym_fw *fw)
1983 struct sym_fw2a_scr *scripta0;
1984 struct sym_fw2b_scr *scriptb0;
1986 scripta0 = (struct sym_fw2a_scr *) np->scripta0;
1987 scriptb0 = (struct sym_fw2b_scr *) np->scriptb0;
1990 * Fill variable parts in scripts.
1992 sym_fw_fill_data(scripta0->data_in, scripta0->data_out);
1995 * Setup bus addresses used from the C code..
1997 sym_fw_setup_bus_addresses(np, fw);
2001 * Allocate firmware descriptors.
2003 #ifdef SYM_CONF_GENERIC_SUPPORT
2004 static const struct sym_fw sym_fw1 = SYM_FW_ENTRY(sym_fw1, "NCR-generic");
2005 #endif /* SYM_CONF_GENERIC_SUPPORT */
2006 static const struct sym_fw sym_fw2 = SYM_FW_ENTRY(sym_fw2, "LOAD/STORE-based");
2009 * Find the most appropriate firmware for a chip.
2011 static const struct sym_fw *
2012 sym_find_firmware(const struct sym_pci_chip *chip)
2014 if (chip->features & FE_LDSTR)
2016 #ifdef SYM_CONF_GENERIC_SUPPORT
2017 else if (!(chip->features & (FE_PFEN|FE_NOPM|FE_DAC)))
2025 * Bind a script to physical addresses.
2027 static void sym_fw_bind_script (hcb_p np, u32 *start, int len)
2029 u32 opcode, new, old, tmp1, tmp2;
2034 end = start + len/4;
2041 * If we forget to change the length
2042 * in scripts, a field will be
2043 * padded with 0. This is an illegal
2047 printf ("%s: ERROR0 IN SCRIPT at %d.\n",
2048 sym_name(np), (int) (cur-start));
2055 * We use the bogus value 0xf00ff00f ;-)
2056 * to reserve data area in SCRIPTS.
2058 if (opcode == SCR_DATA_ZERO) {
2063 if (DEBUG_FLAGS & DEBUG_SCRIPT)
2064 printf ("%d: <%x>\n", (int) (cur-start),
2068 * We don't have to decode ALL commands
2070 switch (opcode >> 28) {
2073 * LOAD / STORE DSA relative, don't relocate.
2079 * LOAD / STORE absolute.
2085 * COPY has TWO arguments.
2090 if ((tmp1 ^ tmp2) & 3) {
2091 printf ("%s: ERROR1 IN SCRIPT at %d.\n",
2092 sym_name(np), (int) (cur-start));
2096 * If PREFETCH feature not enabled, remove
2097 * the NO FLUSH bit if present.
2099 if ((opcode & SCR_NO_FLUSH) &&
2100 !(np->features & FE_PFEN)) {
2101 opcode = (opcode & ~SCR_NO_FLUSH);
2106 * MOVE/CHMOV (absolute address)
2108 if (!(np->features & FE_WIDE))
2109 opcode = (opcode | OPC_MOVE);
2114 * MOVE/CHMOV (table indirect)
2116 if (!(np->features & FE_WIDE))
2117 opcode = (opcode | OPC_MOVE);
2123 * dont't relocate if relative :-)
2125 if (opcode & 0x00800000)
2127 else if ((opcode & 0xf8400000) == 0x80400000)/*JUMP64*/
2144 * Scriptify:) the opcode.
2146 *cur++ = cpu_to_scr(opcode);
2149 * If no relocation, assume 1 argument
2150 * and just scriptize:) it.
2153 *cur = cpu_to_scr(*cur);
2159 * Otherwise performs all needed relocations.
2164 switch (old & RELOC_MASK) {
2165 case RELOC_REGISTER:
2166 new = (old & ~RELOC_MASK) + np->mmio_ba;
2169 new = (old & ~RELOC_MASK) + np->scripta_ba;
2172 new = (old & ~RELOC_MASK) + np->scriptb_ba;
2175 new = (old & ~RELOC_MASK) + np->hcb_ba;
2179 * Don't relocate a 0 address.
2180 * They are mostly used for patched or
2181 * script self-modified areas.
2190 panic("sym_fw_bind_script: "
2191 "weird relocation %x\n", old);
2195 *cur++ = cpu_to_scr(new);
2200 /*---------------------------------------------------------------------------*/
2201 /*--------------------------- END OF FIRMWARES -----------------------------*/
2202 /*---------------------------------------------------------------------------*/
2205 * Function prototypes.
2207 static void sym_save_initial_setting (hcb_p np);
2208 static int sym_prepare_setting (hcb_p np, struct sym_nvram *nvram);
2209 static int sym_prepare_nego (hcb_p np, ccb_p cp, int nego, u_char *msgptr);
2210 static void sym_put_start_queue (hcb_p np, ccb_p cp);
2211 static void sym_chip_reset (hcb_p np);
2212 static void sym_soft_reset (hcb_p np);
2213 static void sym_start_reset (hcb_p np);
2214 static int sym_reset_scsi_bus (hcb_p np, int enab_int);
2215 static int sym_wakeup_done (hcb_p np);
2216 static void sym_flush_busy_queue (hcb_p np, int cam_status);
2217 static void sym_flush_comp_queue (hcb_p np, int cam_status);
2218 static void sym_init (hcb_p np, int reason);
2219 static int sym_getsync(hcb_p np, u_char dt, u_char sfac, u_char *divp,
2221 static void sym_setsync (hcb_p np, ccb_p cp, u_char ofs, u_char per,
2222 u_char div, u_char fak);
2223 static void sym_setwide (hcb_p np, ccb_p cp, u_char wide);
2224 static void sym_setpprot(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
2225 u_char per, u_char wide, u_char div, u_char fak);
2226 static void sym_settrans(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
2227 u_char per, u_char wide, u_char div, u_char fak);
2228 static void sym_log_hard_error (hcb_p np, u_short sist, u_char dstat);
2229 static void sym_intr (void *arg);
2230 static void sym_poll (struct cam_sim *sim);
2231 static void sym_recover_scsi_int (hcb_p np, u_char hsts);
2232 static void sym_int_sto (hcb_p np);
2233 static void sym_int_udc (hcb_p np);
2234 static void sym_int_sbmc (hcb_p np);
2235 static void sym_int_par (hcb_p np, u_short sist);
2236 static void sym_int_ma (hcb_p np);
2237 static int sym_dequeue_from_squeue(hcb_p np, int i, int target, int lun,
2239 static void sym_sir_bad_scsi_status (hcb_p np, int num, ccb_p cp);
2240 static int sym_clear_tasks (hcb_p np, int status, int targ, int lun, int task);
2241 static void sym_sir_task_recovery (hcb_p np, int num);
2242 static int sym_evaluate_dp (hcb_p np, ccb_p cp, u32 scr, int *ofs);
2243 static void sym_modify_dp (hcb_p np, tcb_p tp, ccb_p cp, int ofs);
2244 static int sym_compute_residual (hcb_p np, ccb_p cp);
2245 static int sym_show_msg (u_char * msg);
2246 static void sym_print_msg (ccb_p cp, char *label, u_char *msg);
2247 static void sym_sync_nego (hcb_p np, tcb_p tp, ccb_p cp);
2248 static void sym_ppr_nego (hcb_p np, tcb_p tp, ccb_p cp);
2249 static void sym_wide_nego (hcb_p np, tcb_p tp, ccb_p cp);
2250 static void sym_nego_default (hcb_p np, tcb_p tp, ccb_p cp);
2251 static void sym_nego_rejected (hcb_p np, tcb_p tp, ccb_p cp);
2252 static void sym_int_sir (hcb_p np);
2253 static void sym_free_ccb (hcb_p np, ccb_p cp);
2254 static ccb_p sym_get_ccb (hcb_p np, u_char tn, u_char ln, u_char tag_order);
2255 static ccb_p sym_alloc_ccb (hcb_p np);
2256 static ccb_p sym_ccb_from_dsa (hcb_p np, u32 dsa);
2257 static lcb_p sym_alloc_lcb (hcb_p np, u_char tn, u_char ln);
2258 static void sym_alloc_lcb_tags (hcb_p np, u_char tn, u_char ln);
2259 static int sym_snooptest (hcb_p np);
2260 static void sym_selectclock(hcb_p np, u_char scntl3);
2261 static void sym_getclock (hcb_p np, int mult);
2262 static int sym_getpciclock (hcb_p np);
2263 static void sym_complete_ok (hcb_p np, ccb_p cp);
2264 static void sym_complete_error (hcb_p np, ccb_p cp);
2265 static void sym_callout (void *arg);
2266 static int sym_abort_scsiio (hcb_p np, union ccb *ccb, int timed_out);
2267 static void sym_reset_dev (hcb_p np, union ccb *ccb);
2268 static void sym_action (struct cam_sim *sim, union ccb *ccb);
2269 static int sym_setup_cdb (hcb_p np, struct ccb_scsiio *csio, ccb_p cp);
2270 static void sym_setup_data_and_start (hcb_p np, struct ccb_scsiio *csio,
2272 static int sym_fast_scatter_sg_physical(hcb_p np, ccb_p cp,
2273 bus_dma_segment_t *psegs, int nsegs);
2274 static int sym_scatter_sg_physical (hcb_p np, ccb_p cp,
2275 bus_dma_segment_t *psegs, int nsegs);
2276 static void sym_action2 (struct cam_sim *sim, union ccb *ccb);
2277 static void sym_update_trans (hcb_p np, tcb_p tp, struct sym_trans *tip,
2278 struct ccb_trans_settings *cts);
2279 static void sym_update_dflags(hcb_p np, u_char *flags,
2280 struct ccb_trans_settings *cts);
2282 static const struct sym_pci_chip *sym_find_pci_chip (device_t dev);
2283 static int sym_pci_probe (device_t dev);
2284 static int sym_pci_attach (device_t dev);
2286 static void sym_pci_free (hcb_p np);
2287 static int sym_cam_attach (hcb_p np);
2288 static void sym_cam_free (hcb_p np);
2290 static void sym_nvram_setup_host (hcb_p np, struct sym_nvram *nvram);
2291 static void sym_nvram_setup_target (hcb_p np, int targ, struct sym_nvram *nvp);
2292 static int sym_read_nvram (hcb_p np, struct sym_nvram *nvp);
2295 * Print something which allows to retrieve the controler type,
2296 * unit, target, lun concerned by a kernel message.
2298 static void PRINT_TARGET (hcb_p np, int target)
2300 printf ("%s:%d:", sym_name(np), target);
2303 static void PRINT_LUN(hcb_p np, int target, int lun)
2305 printf ("%s:%d:%d:", sym_name(np), target, lun);
2308 static void PRINT_ADDR (ccb_p cp)
2310 if (cp && cp->cam_ccb)
2311 xpt_print_path(cp->cam_ccb->ccb_h.path);
2315 * Take into account this ccb in the freeze count.
2317 static void sym_freeze_cam_ccb(union ccb *ccb)
2319 if (!(ccb->ccb_h.flags & CAM_DEV_QFRZDIS)) {
2320 if (!(ccb->ccb_h.status & CAM_DEV_QFRZN)) {
2321 ccb->ccb_h.status |= CAM_DEV_QFRZN;
2322 xpt_freeze_devq(ccb->ccb_h.path, 1);
2328 * Set the status field of a CAM CCB.
2330 static __inline void sym_set_cam_status(union ccb *ccb, cam_status status)
2332 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
2333 ccb->ccb_h.status |= status;
2337 * Get the status field of a CAM CCB.
2339 static __inline int sym_get_cam_status(union ccb *ccb)
2341 return ccb->ccb_h.status & CAM_STATUS_MASK;
2345 * Enqueue a CAM CCB.
2347 static void sym_enqueue_cam_ccb(ccb_p cp)
2353 np = (hcb_p) cp->arg;
2355 assert(!(ccb->ccb_h.status & CAM_SIM_QUEUED));
2356 ccb->ccb_h.status = CAM_REQ_INPROG;
2358 callout_reset(&cp->ch, ccb->ccb_h.timeout * hz / 1000, sym_callout,
2360 ccb->ccb_h.status |= CAM_SIM_QUEUED;
2361 ccb->ccb_h.sym_hcb_ptr = np;
2363 sym_insque_tail(sym_qptr(&ccb->ccb_h.sim_links), &np->cam_ccbq);
2367 * Complete a pending CAM CCB.
2369 static void _sym_xpt_done(hcb_p np, union ccb *ccb)
2371 SYM_LOCK_ASSERT(MA_OWNED);
2373 KASSERT((ccb->ccb_h.status & CAM_SIM_QUEUED) == 0,
2374 ("%s: status=CAM_SIM_QUEUED", __func__));
2376 if (ccb->ccb_h.flags & CAM_DEV_QFREEZE)
2377 sym_freeze_cam_ccb(ccb);
2381 static void sym_xpt_done(hcb_p np, union ccb *ccb, ccb_p cp)
2383 SYM_LOCK_ASSERT(MA_OWNED);
2385 if (ccb->ccb_h.status & CAM_SIM_QUEUED) {
2386 callout_stop(&cp->ch);
2387 sym_remque(sym_qptr(&ccb->ccb_h.sim_links));
2388 ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
2389 ccb->ccb_h.sym_hcb_ptr = NULL;
2391 _sym_xpt_done(np, ccb);
2394 static void sym_xpt_done2(hcb_p np, union ccb *ccb, int cam_status)
2396 SYM_LOCK_ASSERT(MA_OWNED);
2398 sym_set_cam_status(ccb, cam_status);
2399 _sym_xpt_done(np, ccb);
2403 * SYMBIOS chip clock divisor table.
2405 * Divisors are multiplied by 10,000,000 in order to make
2406 * calculations more simple.
2409 static const u32 div_10M[] =
2410 {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
2413 * SYMBIOS chips allow burst lengths of 2, 4, 8, 16, 32, 64,
2414 * 128 transfers. All chips support at least 16 transfers
2415 * bursts. The 825A, 875 and 895 chips support bursts of up
2416 * to 128 transfers and the 895A and 896 support bursts of up
2417 * to 64 transfers. All other chips support up to 16
2420 * For PCI 32 bit data transfers each transfer is a DWORD.
2421 * It is a QUADWORD (8 bytes) for PCI 64 bit data transfers.
2423 * We use log base 2 (burst length) as internal code, with
2424 * value 0 meaning "burst disabled".
2428 * Burst length from burst code.
2430 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
2433 * Burst code from io register bits.
2435 #define burst_code(dmode, ctest4, ctest5) \
2436 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
2439 * Set initial io register bits from burst code.
2441 static __inline void sym_init_burst(hcb_p np, u_char bc)
2443 np->rv_ctest4 &= ~0x80;
2444 np->rv_dmode &= ~(0x3 << 6);
2445 np->rv_ctest5 &= ~0x4;
2448 np->rv_ctest4 |= 0x80;
2452 np->rv_dmode |= ((bc & 0x3) << 6);
2453 np->rv_ctest5 |= (bc & 0x4);
2459 * Print out the list of targets that have some flag disabled by user.
2461 static void sym_print_targets_flag(hcb_p np, int mask, char *msg)
2466 for (cnt = 0, i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
2467 if (i == np->myaddr)
2469 if (np->target[i].usrflags & mask) {
2471 printf("%s: %s disabled for targets",
2481 * Save initial settings of some IO registers.
2482 * Assumed to have been set by BIOS.
2483 * We cannot reset the chip prior to reading the
2484 * IO registers, since informations will be lost.
2485 * Since the SCRIPTS processor may be running, this
2486 * is not safe on paper, but it seems to work quite
2489 static void sym_save_initial_setting (hcb_p np)
2491 np->sv_scntl0 = INB(nc_scntl0) & 0x0a;
2492 np->sv_scntl3 = INB(nc_scntl3) & 0x07;
2493 np->sv_dmode = INB(nc_dmode) & 0xce;
2494 np->sv_dcntl = INB(nc_dcntl) & 0xa8;
2495 np->sv_ctest3 = INB(nc_ctest3) & 0x01;
2496 np->sv_ctest4 = INB(nc_ctest4) & 0x80;
2497 np->sv_gpcntl = INB(nc_gpcntl);
2498 np->sv_stest1 = INB(nc_stest1);
2499 np->sv_stest2 = INB(nc_stest2) & 0x20;
2500 np->sv_stest4 = INB(nc_stest4);
2501 if (np->features & FE_C10) { /* Always large DMA fifo + ultra3 */
2502 np->sv_scntl4 = INB(nc_scntl4);
2503 np->sv_ctest5 = INB(nc_ctest5) & 0x04;
2506 np->sv_ctest5 = INB(nc_ctest5) & 0x24;
2510 * Prepare io register values used by sym_init() according
2511 * to selected and supported features.
2513 static int sym_prepare_setting(hcb_p np, struct sym_nvram *nvram)
2522 np->maxwide = (np->features & FE_WIDE)? 1 : 0;
2525 * Get the frequency of the chip's clock.
2527 if (np->features & FE_QUAD)
2529 else if (np->features & FE_DBLR)
2534 np->clock_khz = (np->features & FE_CLK80)? 80000 : 40000;
2535 np->clock_khz *= np->multiplier;
2537 if (np->clock_khz != 40000)
2538 sym_getclock(np, np->multiplier);
2541 * Divisor to be used for async (timer pre-scaler).
2543 i = np->clock_divn - 1;
2545 if (10ul * SYM_CONF_MIN_ASYNC * np->clock_khz > div_10M[i]) {
2550 np->rv_scntl3 = i+1;
2553 * The C1010 uses hardwired divisors for async.
2554 * So, we just throw away, the async. divisor.:-)
2556 if (np->features & FE_C10)
2560 * Minimum synchronous period factor supported by the chip.
2561 * Btw, 'period' is in tenths of nanoseconds.
2563 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
2564 if (period <= 250) np->minsync = 10;
2565 else if (period <= 303) np->minsync = 11;
2566 else if (period <= 500) np->minsync = 12;
2567 else np->minsync = (period + 40 - 1) / 40;
2570 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
2572 if (np->minsync < 25 &&
2573 !(np->features & (FE_ULTRA|FE_ULTRA2|FE_ULTRA3)))
2575 else if (np->minsync < 12 &&
2576 !(np->features & (FE_ULTRA2|FE_ULTRA3)))
2580 * Maximum synchronous period factor supported by the chip.
2582 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
2583 np->maxsync = period > 2540 ? 254 : period / 10;
2586 * If chip is a C1010, guess the sync limits in DT mode.
2588 if ((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) {
2589 if (np->clock_khz == 160000) {
2591 np->maxsync_dt = 50;
2592 np->maxoffs_dt = 62;
2597 * 64 bit addressing (895A/896/1010) ?
2599 if (np->features & FE_DAC)
2601 np->rv_ccntl1 |= (XTIMOD | EXTIBMV);
2603 np->rv_ccntl1 |= (DDAC);
2607 * Phase mismatch handled by SCRIPTS (895A/896/1010) ?
2609 if (np->features & FE_NOPM)
2610 np->rv_ccntl0 |= (ENPMJ);
2614 * In dual channel mode, contention occurs if internal cycles
2615 * are used. Disable internal cycles.
2617 if (np->device_id == PCI_ID_LSI53C1010 &&
2618 np->revision_id < 0x2)
2619 np->rv_ccntl0 |= DILS;
2622 * Select burst length (dwords)
2624 burst_max = SYM_SETUP_BURST_ORDER;
2625 if (burst_max == 255)
2626 burst_max = burst_code(np->sv_dmode, np->sv_ctest4,
2630 if (burst_max > np->maxburst)
2631 burst_max = np->maxburst;
2634 * DEL 352 - 53C810 Rev x11 - Part Number 609-0392140 - ITEM 2.
2635 * This chip and the 860 Rev 1 may wrongly use PCI cache line
2636 * based transactions on LOAD/STORE instructions. So we have
2637 * to prevent these chips from using such PCI transactions in
2638 * this driver. The generic ncr driver that does not use
2639 * LOAD/STORE instructions does not need this work-around.
2641 if ((np->device_id == PCI_ID_SYM53C810 &&
2642 np->revision_id >= 0x10 && np->revision_id <= 0x11) ||
2643 (np->device_id == PCI_ID_SYM53C860 &&
2644 np->revision_id <= 0x1))
2645 np->features &= ~(FE_WRIE|FE_ERL|FE_ERMP);
2648 * Select all supported special features.
2649 * If we are using on-board RAM for scripts, prefetch (PFEN)
2650 * does not help, but burst op fetch (BOF) does.
2651 * Disabling PFEN makes sure BOF will be used.
2653 if (np->features & FE_ERL)
2654 np->rv_dmode |= ERL; /* Enable Read Line */
2655 if (np->features & FE_BOF)
2656 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
2657 if (np->features & FE_ERMP)
2658 np->rv_dmode |= ERMP; /* Enable Read Multiple */
2660 if ((np->features & FE_PFEN) && !np->ram_ba)
2662 if (np->features & FE_PFEN)
2664 np->rv_dcntl |= PFEN; /* Prefetch Enable */
2665 if (np->features & FE_CLSE)
2666 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
2667 if (np->features & FE_WRIE)
2668 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
2669 if (np->features & FE_DFS)
2670 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
2675 if (SYM_SETUP_PCI_PARITY)
2676 np->rv_ctest4 |= MPEE; /* Master parity checking */
2677 if (SYM_SETUP_SCSI_PARITY)
2678 np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */
2681 * Get parity checking, host ID and verbose mode from NVRAM
2684 sym_nvram_setup_host (np, nvram);
2687 * Get SCSI addr of host adapter (set by bios?).
2689 if (np->myaddr == 255) {
2690 np->myaddr = INB(nc_scid) & 0x07;
2692 np->myaddr = SYM_SETUP_HOST_ID;
2696 * Prepare initial io register bits for burst length
2698 sym_init_burst(np, burst_max);
2701 * Set SCSI BUS mode.
2702 * - LVD capable chips (895/895A/896/1010) report the
2703 * current BUS mode through the STEST4 IO register.
2704 * - For previous generation chips (825/825A/875),
2705 * user has to tell us how to check against HVD,
2706 * since a 100% safe algorithm is not possible.
2708 np->scsi_mode = SMODE_SE;
2709 if (np->features & (FE_ULTRA2|FE_ULTRA3))
2710 np->scsi_mode = (np->sv_stest4 & SMODE);
2711 else if (np->features & FE_DIFF) {
2712 if (SYM_SETUP_SCSI_DIFF == 1) {
2713 if (np->sv_scntl3) {
2714 if (np->sv_stest2 & 0x20)
2715 np->scsi_mode = SMODE_HVD;
2717 else if (nvram->type == SYM_SYMBIOS_NVRAM) {
2718 if (!(INB(nc_gpreg) & 0x08))
2719 np->scsi_mode = SMODE_HVD;
2722 else if (SYM_SETUP_SCSI_DIFF == 2)
2723 np->scsi_mode = SMODE_HVD;
2725 if (np->scsi_mode == SMODE_HVD)
2726 np->rv_stest2 |= 0x20;
2729 * Set LED support from SCRIPTS.
2730 * Ignore this feature for boards known to use a
2731 * specific GPIO wiring and for the 895A, 896
2732 * and 1010 that drive the LED directly.
2734 if ((SYM_SETUP_SCSI_LED ||
2735 (nvram->type == SYM_SYMBIOS_NVRAM ||
2736 (nvram->type == SYM_TEKRAM_NVRAM &&
2737 np->device_id == PCI_ID_SYM53C895))) &&
2738 !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01))
2739 np->features |= FE_LED0;
2744 switch(SYM_SETUP_IRQ_MODE & 3) {
2746 np->rv_dcntl |= IRQM;
2749 np->rv_dcntl |= (np->sv_dcntl & IRQM);
2756 * Configure targets according to driver setup.
2757 * If NVRAM present get targets setup from NVRAM.
2759 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
2760 tcb_p tp = &np->target[i];
2762 tp->tinfo.user.scsi_version = tp->tinfo.current.scsi_version= 2;
2763 tp->tinfo.user.spi_version = tp->tinfo.current.spi_version = 2;
2764 tp->tinfo.user.period = np->minsync;
2765 if (np->features & FE_ULTRA3)
2766 tp->tinfo.user.period = np->minsync_dt;
2767 tp->tinfo.user.offset = np->maxoffs;
2768 tp->tinfo.user.width = np->maxwide ? BUS_16_BIT : BUS_8_BIT;
2769 tp->usrflags |= (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
2770 tp->usrtags = SYM_SETUP_MAX_TAG;
2772 sym_nvram_setup_target (np, i, nvram);
2775 * For now, guess PPR/DT support from the period
2778 if (np->features & FE_ULTRA3) {
2779 if (tp->tinfo.user.period <= 9 &&
2780 tp->tinfo.user.width == BUS_16_BIT) {
2781 tp->tinfo.user.options |= PPR_OPT_DT;
2782 tp->tinfo.user.offset = np->maxoffs_dt;
2783 tp->tinfo.user.spi_version = 3;
2788 tp->usrflags &= ~SYM_TAGS_ENABLED;
2792 * Let user know about the settings.
2795 printf("%s: %s NVRAM, ID %d, Fast-%d, %s, %s\n", sym_name(np),
2796 i == SYM_SYMBIOS_NVRAM ? "Symbios" :
2797 (i == SYM_TEKRAM_NVRAM ? "Tekram" : "No"),
2799 (np->features & FE_ULTRA3) ? 80 :
2800 (np->features & FE_ULTRA2) ? 40 :
2801 (np->features & FE_ULTRA) ? 20 : 10,
2802 sym_scsi_bus_mode(np->scsi_mode),
2803 (np->rv_scntl0 & 0xa) ? "parity checking" : "NO parity");
2805 * Tell him more on demand.
2808 printf("%s: %s IRQ line driver%s\n",
2810 np->rv_dcntl & IRQM ? "totem pole" : "open drain",
2811 np->ram_ba ? ", using on-chip SRAM" : "");
2812 printf("%s: using %s firmware.\n", sym_name(np), np->fw_name);
2813 if (np->features & FE_NOPM)
2814 printf("%s: handling phase mismatch from SCRIPTS.\n",
2820 if (sym_verbose > 1) {
2821 printf ("%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
2822 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
2823 sym_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl,
2824 np->sv_ctest3, np->sv_ctest4, np->sv_ctest5);
2826 printf ("%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
2827 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
2828 sym_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl,
2829 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
2832 * Let user be aware of targets that have some disable flags set.
2834 sym_print_targets_flag(np, SYM_SCAN_BOOT_DISABLED, "SCAN AT BOOT");
2836 sym_print_targets_flag(np, SYM_SCAN_LUNS_DISABLED,
2843 * Prepare the next negotiation message if needed.
2845 * Fill in the part of message buffer that contains the
2846 * negotiation and the nego_status field of the CCB.
2847 * Returns the size of the message in bytes.
2850 static int sym_prepare_nego(hcb_p np, ccb_p cp, int nego, u_char *msgptr)
2852 tcb_p tp = &np->target[cp->target];
2856 * Early C1010 chips need a work-around for DT
2857 * data transfer to work.
2859 if (!(np->features & FE_U3EN))
2860 tp->tinfo.goal.options = 0;
2862 * negotiate using PPR ?
2864 if (tp->tinfo.goal.options & PPR_OPT_MASK)
2867 * negotiate wide transfers ?
2869 else if (tp->tinfo.current.width != tp->tinfo.goal.width)
2872 * negotiate synchronous transfers?
2874 else if (tp->tinfo.current.period != tp->tinfo.goal.period ||
2875 tp->tinfo.current.offset != tp->tinfo.goal.offset)
2880 msgptr[msglen++] = M_EXTENDED;
2881 msgptr[msglen++] = 3;
2882 msgptr[msglen++] = M_X_SYNC_REQ;
2883 msgptr[msglen++] = tp->tinfo.goal.period;
2884 msgptr[msglen++] = tp->tinfo.goal.offset;
2887 msgptr[msglen++] = M_EXTENDED;
2888 msgptr[msglen++] = 2;
2889 msgptr[msglen++] = M_X_WIDE_REQ;
2890 msgptr[msglen++] = tp->tinfo.goal.width;
2893 msgptr[msglen++] = M_EXTENDED;
2894 msgptr[msglen++] = 6;
2895 msgptr[msglen++] = M_X_PPR_REQ;
2896 msgptr[msglen++] = tp->tinfo.goal.period;
2897 msgptr[msglen++] = 0;
2898 msgptr[msglen++] = tp->tinfo.goal.offset;
2899 msgptr[msglen++] = tp->tinfo.goal.width;
2900 msgptr[msglen++] = tp->tinfo.goal.options & PPR_OPT_DT;
2904 cp->nego_status = nego;
2907 tp->nego_cp = cp; /* Keep track a nego will be performed */
2908 if (DEBUG_FLAGS & DEBUG_NEGO) {
2909 sym_print_msg(cp, nego == NS_SYNC ? "sync msgout" :
2910 nego == NS_WIDE ? "wide msgout" :
2911 "ppr msgout", msgptr);
2919 * Insert a job into the start queue.
2921 static void sym_put_start_queue(hcb_p np, ccb_p cp)
2925 #ifdef SYM_CONF_IARB_SUPPORT
2927 * If the previously queued CCB is not yet done,
2928 * set the IARB hint. The SCRIPTS will go with IARB
2929 * for this job when starting the previous one.
2930 * We leave devices a chance to win arbitration by
2931 * not using more than 'iarb_max' consecutive
2932 * immediate arbitrations.
2934 if (np->last_cp && np->iarb_count < np->iarb_max) {
2935 np->last_cp->host_flags |= HF_HINT_IARB;
2944 * Insert first the idle task and then our job.
2945 * The MB should ensure proper ordering.
2947 qidx = np->squeueput + 2;
2948 if (qidx >= MAX_QUEUE*2) qidx = 0;
2950 np->squeue [qidx] = cpu_to_scr(np->idletask_ba);
2952 np->squeue [np->squeueput] = cpu_to_scr(cp->ccb_ba);
2954 np->squeueput = qidx;
2956 if (DEBUG_FLAGS & DEBUG_QUEUE)
2957 printf ("%s: queuepos=%d.\n", sym_name (np), np->squeueput);
2960 * Script processor may be waiting for reselect.
2964 OUTB (nc_istat, SIGP|np->istat_sem);
2969 * Soft reset the chip.
2971 * Raising SRST when the chip is running may cause
2972 * problems on dual function chips (see below).
2973 * On the other hand, LVD devices need some delay
2974 * to settle and report actual BUS mode in STEST4.
2976 static void sym_chip_reset (hcb_p np)
2978 OUTB (nc_istat, SRST);
2981 UDELAY(2000); /* For BUS MODE to settle */
2985 * Soft reset the chip.
2987 * Some 896 and 876 chip revisions may hang-up if we set
2988 * the SRST (soft reset) bit at the wrong time when SCRIPTS
2990 * So, we need to abort the current operation prior to
2991 * soft resetting the chip.
2993 static void sym_soft_reset (hcb_p np)
2998 OUTB (nc_istat, CABRT);
2999 for (i = 1000000 ; i ; --i) {
3000 istat = INB (nc_istat);
3012 printf("%s: unable to abort current chip operation.\n",
3014 sym_chip_reset (np);
3018 * Start reset process.
3020 * The interrupt handler will reinitialize the chip.
3022 static void sym_start_reset(hcb_p np)
3024 (void) sym_reset_scsi_bus(np, 1);
3027 static int sym_reset_scsi_bus(hcb_p np, int enab_int)
3032 sym_soft_reset(np); /* Soft reset the chip */
3034 OUTW (nc_sien, RST);
3036 * Enable Tolerant, reset IRQD if present and
3037 * properly set IRQ mode, prior to resetting the bus.
3039 OUTB (nc_stest3, TE);
3040 OUTB (nc_dcntl, (np->rv_dcntl & IRQM));
3041 OUTB (nc_scntl1, CRST);
3044 if (!SYM_SETUP_SCSI_BUS_CHECK)
3047 * Check for no terminators or SCSI bus shorts to ground.
3048 * Read SCSI data bus, data parity bits and control signals.
3049 * We are expecting RESET to be TRUE and other signals to be
3052 term = INB(nc_sstat0);
3053 term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */
3054 term |= ((INB(nc_sstat2) & 0x01) << 26) | /* sdp1 */
3055 ((INW(nc_sbdl) & 0xff) << 9) | /* d7-0 */
3056 ((INW(nc_sbdl) & 0xff00) << 10) | /* d15-8 */
3057 INB(nc_sbcl); /* req ack bsy sel atn msg cd io */
3059 if (!(np->features & FE_WIDE))
3062 if (term != (2<<7)) {
3063 printf("%s: suspicious SCSI data while resetting the BUS.\n",
3065 printf("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
3066 "0x%lx, expecting 0x%lx\n",
3068 (np->features & FE_WIDE) ? "dp1,d15-8," : "",
3069 (u_long)term, (u_long)(2<<7));
3070 if (SYM_SETUP_SCSI_BUS_CHECK == 1)
3074 OUTB (nc_scntl1, 0);
3080 * The chip may have completed jobs. Look at the DONE QUEUE.
3082 * On architectures that may reorder LOAD/STORE operations,
3083 * a memory barrier may be needed after the reading of the
3084 * so-called `flag' and prior to dealing with the data.
3086 static int sym_wakeup_done (hcb_p np)
3092 SYM_LOCK_ASSERT(MA_OWNED);
3097 dsa = scr_to_cpu(np->dqueue[i]);
3101 if ((i = i+2) >= MAX_QUEUE*2)
3104 cp = sym_ccb_from_dsa(np, dsa);
3107 sym_complete_ok (np, cp);
3111 printf ("%s: bad DSA (%x) in done queue.\n",
3112 sym_name(np), (u_int) dsa);
3120 * Complete all active CCBs with error.
3121 * Used on CHIP/SCSI RESET.
3123 static void sym_flush_busy_queue (hcb_p np, int cam_status)
3126 * Move all active CCBs to the COMP queue
3127 * and flush this queue.
3129 sym_que_splice(&np->busy_ccbq, &np->comp_ccbq);
3130 sym_que_init(&np->busy_ccbq);
3131 sym_flush_comp_queue(np, cam_status);
3138 * 0: initialisation.
3139 * 1: SCSI BUS RESET delivered or received.
3140 * 2: SCSI BUS MODE changed.
3142 static void sym_init (hcb_p np, int reason)
3147 SYM_LOCK_ASSERT(MA_OWNED);
3150 * Reset chip if asked, otherwise just clear fifos.
3155 OUTB (nc_stest3, TE|CSF);
3156 OUTONB (nc_ctest3, CLF);
3162 phys = np->squeue_ba;
3163 for (i = 0; i < MAX_QUEUE*2; i += 2) {
3164 np->squeue[i] = cpu_to_scr(np->idletask_ba);
3165 np->squeue[i+1] = cpu_to_scr(phys + (i+2)*4);
3167 np->squeue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
3170 * Start at first entry.
3177 phys = np->dqueue_ba;
3178 for (i = 0; i < MAX_QUEUE*2; i += 2) {
3180 np->dqueue[i+1] = cpu_to_scr(phys + (i+2)*4);
3182 np->dqueue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
3185 * Start at first entry.
3190 * Install patches in scripts.
3191 * This also let point to first position the start
3192 * and done queue pointers used from SCRIPTS.
3197 * Wakeup all pending jobs.
3199 sym_flush_busy_queue(np, CAM_SCSI_BUS_RESET);
3204 OUTB (nc_istat, 0x00 ); /* Remove Reset, abort */
3205 UDELAY (2000); /* The 895 needs time for the bus mode to settle */
3207 OUTB (nc_scntl0, np->rv_scntl0 | 0xc0);
3208 /* full arb., ena parity, par->ATN */
3209 OUTB (nc_scntl1, 0x00); /* odd parity, and remove CRST!! */
3211 sym_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
3213 OUTB (nc_scid , RRE|np->myaddr); /* Adapter SCSI address */
3214 OUTW (nc_respid, 1ul<<np->myaddr); /* Id to respond to */
3215 OUTB (nc_istat , SIGP ); /* Signal Process */
3216 OUTB (nc_dmode , np->rv_dmode); /* Burst length, dma mode */
3217 OUTB (nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */
3219 OUTB (nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */
3220 OUTB (nc_ctest3, np->rv_ctest3); /* Write and invalidate */
3221 OUTB (nc_ctest4, np->rv_ctest4); /* Master parity checking */
3223 /* Extended Sreq/Sack filtering not supported on the C10 */
3224 if (np->features & FE_C10)
3225 OUTB (nc_stest2, np->rv_stest2);
3227 OUTB (nc_stest2, EXT|np->rv_stest2);
3229 OUTB (nc_stest3, TE); /* TolerANT enable */
3230 OUTB (nc_stime0, 0x0c); /* HTH disabled STO 0.25 sec */
3233 * For now, disable AIP generation on C1010-66.
3235 if (np->device_id == PCI_ID_LSI53C1010_2)
3236 OUTB (nc_aipcntl1, DISAIP);
3240 * Errant SGE's when in narrow. Write bits 4 & 5 of
3241 * STEST1 register to disable SGE. We probably should do
3242 * that from SCRIPTS for each selection/reselection, but
3243 * I just don't want. :)
3245 if (np->device_id == PCI_ID_LSI53C1010 &&
3246 /* np->revision_id < 0xff */ 1)
3247 OUTB (nc_stest1, INB(nc_stest1) | 0x30);
3250 * DEL 441 - 53C876 Rev 5 - Part Number 609-0392787/2788 - ITEM 2.
3251 * Disable overlapped arbitration for some dual function devices,
3252 * regardless revision id (kind of post-chip-design feature. ;-))
3254 if (np->device_id == PCI_ID_SYM53C875)
3255 OUTB (nc_ctest0, (1<<5));
3256 else if (np->device_id == PCI_ID_SYM53C896)
3257 np->rv_ccntl0 |= DPR;
3260 * Write CCNTL0/CCNTL1 for chips capable of 64 bit addressing
3261 * and/or hardware phase mismatch, since only such chips
3262 * seem to support those IO registers.
3264 if (np->features & (FE_DAC|FE_NOPM)) {
3265 OUTB (nc_ccntl0, np->rv_ccntl0);
3266 OUTB (nc_ccntl1, np->rv_ccntl1);
3270 * If phase mismatch handled by scripts (895A/896/1010),
3271 * set PM jump addresses.
3273 if (np->features & FE_NOPM) {
3274 OUTL (nc_pmjad1, SCRIPTB_BA (np, pm_handle));
3275 OUTL (nc_pmjad2, SCRIPTB_BA (np, pm_handle));
3279 * Enable GPIO0 pin for writing if LED support from SCRIPTS.
3280 * Also set GPIO5 and clear GPIO6 if hardware LED control.
3282 if (np->features & FE_LED0)
3283 OUTB(nc_gpcntl, INB(nc_gpcntl) & ~0x01);
3284 else if (np->features & FE_LEDC)
3285 OUTB(nc_gpcntl, (INB(nc_gpcntl) & ~0x41) | 0x20);
3290 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR);
3291 OUTB (nc_dien , MDPE|BF|SSI|SIR|IID);
3294 * For 895/6 enable SBMC interrupt and save current SCSI bus mode.
3295 * Try to eat the spurious SBMC interrupt that may occur when
3296 * we reset the chip but not the SCSI BUS (at initialization).
3298 if (np->features & (FE_ULTRA2|FE_ULTRA3)) {
3299 OUTONW (nc_sien, SBMC);
3304 np->scsi_mode = INB (nc_stest4) & SMODE;
3308 * Fill in target structure.
3309 * Reinitialize usrsync.
3310 * Reinitialize usrwide.
3311 * Prepare sync negotiation according to actual SCSI bus mode.
3313 for (i=0;i<SYM_CONF_MAX_TARGET;i++) {
3314 tcb_p tp = &np->target[i];
3318 tp->head.wval = np->rv_scntl3;
3321 tp->tinfo.current.period = 0;
3322 tp->tinfo.current.offset = 0;
3323 tp->tinfo.current.width = BUS_8_BIT;
3324 tp->tinfo.current.options = 0;
3328 * Download SCSI SCRIPTS to on-chip RAM if present,
3329 * and start script processor.
3332 if (sym_verbose > 1)
3333 printf ("%s: Downloading SCSI SCRIPTS.\n",
3335 if (np->ram_ws == 8192) {
3336 OUTRAM_OFF(4096, np->scriptb0, np->scriptb_sz);
3337 OUTL (nc_mmws, np->scr_ram_seg);
3338 OUTL (nc_mmrs, np->scr_ram_seg);
3339 OUTL (nc_sfs, np->scr_ram_seg);
3340 phys = SCRIPTB_BA (np, start64);
3343 phys = SCRIPTA_BA (np, init);
3344 OUTRAM_OFF(0, np->scripta0, np->scripta_sz);
3347 phys = SCRIPTA_BA (np, init);
3351 OUTL (nc_dsa, np->hcb_ba);
3355 * Notify the XPT about the RESET condition.
3358 xpt_async(AC_BUS_RESET, np->path, NULL);
3362 * Get clock factor and sync divisor for a given
3363 * synchronous factor period.
3366 sym_getsync(hcb_p np, u_char dt, u_char sfac, u_char *divp, u_char *fakp)
3368 u32 clk = np->clock_khz; /* SCSI clock frequency in kHz */
3369 int div = np->clock_divn; /* Number of divisors supported */
3370 u32 fak; /* Sync factor in sxfer */
3371 u32 per; /* Period in tenths of ns */
3372 u32 kpc; /* (per * clk) */
3376 * Compute the synchronous period in tenths of nano-seconds
3378 if (dt && sfac <= 9) per = 125;
3379 else if (sfac <= 10) per = 250;
3380 else if (sfac == 11) per = 303;
3381 else if (sfac == 12) per = 500;
3382 else per = 40 * sfac;
3390 * For earliest C10 revision 0, we cannot use extra
3391 * clocks for the setting of the SCSI clocking.
3392 * Note that this limits the lowest sync data transfer
3393 * to 5 Mega-transfers per second and may result in
3394 * using higher clock divisors.
3397 if ((np->features & (FE_C10|FE_U3EN)) == FE_C10) {
3399 * Look for the lowest clock divisor that allows an
3400 * output speed not faster than the period.
3404 if (kpc > (div_10M[div] << 2)) {
3409 fak = 0; /* No extra clocks */
3410 if (div == np->clock_divn) { /* Are we too fast ? */
3420 * Look for the greatest clock divisor that allows an
3421 * input speed faster than the period.
3424 if (kpc >= (div_10M[div] << 2)) break;
3427 * Calculate the lowest clock factor that allows an output
3428 * speed not faster than the period, and the max output speed.
3429 * If fak >= 1 we will set both XCLKH_ST and XCLKH_DT.
3430 * If fak >= 2 we will also set XCLKS_ST and XCLKS_DT.
3433 fak = (kpc - 1) / (div_10M[div] << 1) + 1 - 2;
3434 /* ret = ((2+fak)*div_10M[div])/np->clock_khz; */
3437 fak = (kpc - 1) / div_10M[div] + 1 - 4;
3438 /* ret = ((4+fak)*div_10M[div])/np->clock_khz; */
3442 * Check against our hardware limits, or bugs :).
3444 if (fak < 0) {fak = 0; ret = -1;}
3445 if (fak > 2) {fak = 2; ret = -1;}
3448 * Compute and return sync parameters.
3457 * Tell the SCSI layer about the new transfer parameters.
3460 sym_xpt_async_transfer_neg(hcb_p np, int target, u_int spi_valid)
3462 struct ccb_trans_settings cts;
3463 struct cam_path *path;
3465 tcb_p tp = &np->target[target];
3467 sts = xpt_create_path(&path, NULL, cam_sim_path(np->sim), target,
3469 if (sts != CAM_REQ_CMP)
3472 bzero(&cts, sizeof(cts));
3474 #define cts__scsi (cts.proto_specific.scsi)
3475 #define cts__spi (cts.xport_specific.spi)
3477 cts.type = CTS_TYPE_CURRENT_SETTINGS;
3478 cts.protocol = PROTO_SCSI;
3479 cts.transport = XPORT_SPI;
3480 cts.protocol_version = tp->tinfo.current.scsi_version;
3481 cts.transport_version = tp->tinfo.current.spi_version;
3483 cts__spi.valid = spi_valid;
3484 if (spi_valid & CTS_SPI_VALID_SYNC_RATE)
3485 cts__spi.sync_period = tp->tinfo.current.period;
3486 if (spi_valid & CTS_SPI_VALID_SYNC_OFFSET)
3487 cts__spi.sync_offset = tp->tinfo.current.offset;
3488 if (spi_valid & CTS_SPI_VALID_BUS_WIDTH)
3489 cts__spi.bus_width = tp->tinfo.current.width;
3490 if (spi_valid & CTS_SPI_VALID_PPR_OPTIONS)
3491 cts__spi.ppr_options = tp->tinfo.current.options;
3494 xpt_setup_ccb(&cts.ccb_h, path, /*priority*/1);
3495 xpt_async(AC_TRANSFER_NEG, path, &cts);
3496 xpt_free_path(path);
3499 #define SYM_SPI_VALID_WDTR \
3500 CTS_SPI_VALID_BUS_WIDTH | \
3501 CTS_SPI_VALID_SYNC_RATE | \
3502 CTS_SPI_VALID_SYNC_OFFSET
3503 #define SYM_SPI_VALID_SDTR \
3504 CTS_SPI_VALID_SYNC_RATE | \
3505 CTS_SPI_VALID_SYNC_OFFSET
3506 #define SYM_SPI_VALID_PPR \
3507 CTS_SPI_VALID_PPR_OPTIONS | \
3508 CTS_SPI_VALID_BUS_WIDTH | \
3509 CTS_SPI_VALID_SYNC_RATE | \
3510 CTS_SPI_VALID_SYNC_OFFSET
3513 * We received a WDTR.
3514 * Let everything be aware of the changes.
3516 static void sym_setwide(hcb_p np, ccb_p cp, u_char wide)
3518 tcb_p tp = &np->target[cp->target];
3520 sym_settrans(np, cp, 0, 0, 0, wide, 0, 0);
3523 * Tell the SCSI layer about the new transfer parameters.
3525 tp->tinfo.goal.width = tp->tinfo.current.width = wide;
3526 tp->tinfo.current.offset = 0;
3527 tp->tinfo.current.period = 0;
3528 tp->tinfo.current.options = 0;
3530 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_WDTR);
3534 * We received a SDTR.
3535 * Let everything be aware of the changes.
3538 sym_setsync(hcb_p np, ccb_p cp, u_char ofs, u_char per, u_char div, u_char fak)
3540 tcb_p tp = &np->target[cp->target];
3541 u_char wide = (cp->phys.select.sel_scntl3 & EWS) ? 1 : 0;
3543 sym_settrans(np, cp, 0, ofs, per, wide, div, fak);
3546 * Tell the SCSI layer about the new transfer parameters.
3548 tp->tinfo.goal.period = tp->tinfo.current.period = per;
3549 tp->tinfo.goal.offset = tp->tinfo.current.offset = ofs;
3550 tp->tinfo.goal.options = tp->tinfo.current.options = 0;
3552 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_SDTR);
3556 * We received a PPR.
3557 * Let everything be aware of the changes.
3559 static void sym_setpprot(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
3560 u_char per, u_char wide, u_char div, u_char fak)
3562 tcb_p tp = &np->target[cp->target];
3564 sym_settrans(np, cp, dt, ofs, per, wide, div, fak);
3567 * Tell the SCSI layer about the new transfer parameters.
3569 tp->tinfo.goal.width = tp->tinfo.current.width = wide;
3570 tp->tinfo.goal.period = tp->tinfo.current.period = per;
3571 tp->tinfo.goal.offset = tp->tinfo.current.offset = ofs;
3572 tp->tinfo.goal.options = tp->tinfo.current.options = dt;
3574 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_PPR);
3578 * Switch trans mode for current job and it's target.
3580 static void sym_settrans(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
3581 u_char per, u_char wide, u_char div, u_char fak)
3586 u_char target = INB (nc_sdid) & 0x0f;
3587 u_char sval, wval, uval;
3594 assert (target == (cp->target & 0xf));
3595 tp = &np->target[target];
3597 sval = tp->head.sval;
3598 wval = tp->head.wval;
3599 uval = tp->head.uval;
3602 printf("XXXX sval=%x wval=%x uval=%x (%x)\n",
3603 sval, wval, uval, np->rv_scntl3);
3608 if (!(np->features & FE_C10))
3609 sval = (sval & ~0x1f) | ofs;
3611 sval = (sval & ~0x3f) | ofs;
3614 * Set the sync divisor and extra clock factor.
3617 wval = (wval & ~0x70) | ((div+1) << 4);
3618 if (!(np->features & FE_C10))
3619 sval = (sval & ~0xe0) | (fak << 5);
3621 uval = uval & ~(XCLKH_ST|XCLKH_DT|XCLKS_ST|XCLKS_DT);
3622 if (fak >= 1) uval |= (XCLKH_ST|XCLKH_DT);
3623 if (fak >= 2) uval |= (XCLKS_ST|XCLKS_DT);
3628 * Set the bus width.
3635 * Set misc. ultra enable bits.
3637 if (np->features & FE_C10) {
3638 uval = uval & ~(U3EN|AIPCKEN);
3640 assert(np->features & FE_U3EN);
3645 wval = wval & ~ULTRA;
3646 if (per <= 12) wval |= ULTRA;
3650 * Stop there if sync parameters are unchanged.
3652 if (tp->head.sval == sval &&
3653 tp->head.wval == wval &&
3654 tp->head.uval == uval)
3656 tp->head.sval = sval;
3657 tp->head.wval = wval;
3658 tp->head.uval = uval;
3661 * Disable extended Sreq/Sack filtering if per < 50.
3662 * Not supported on the C1010.
3664 if (per < 50 && !(np->features & FE_C10))
3665 OUTOFFB (nc_stest2, EXT);
3668 * set actual value and sync_status
3670 OUTB (nc_sxfer, tp->head.sval);
3671 OUTB (nc_scntl3, tp->head.wval);
3673 if (np->features & FE_C10) {
3674 OUTB (nc_scntl4, tp->head.uval);
3678 * patch ALL busy ccbs of this target.
3680 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
3681 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3682 if (cp->target != target)
3684 cp->phys.select.sel_scntl3 = tp->head.wval;
3685 cp->phys.select.sel_sxfer = tp->head.sval;
3686 if (np->features & FE_C10) {
3687 cp->phys.select.sel_scntl4 = tp->head.uval;
3693 * log message for real hard errors
3695 * sym0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc).
3696 * reg: r0 r1 r2 r3 r4 r5 r6 ..... rf.
3698 * exception register:
3703 * so: control lines as driven by chip.
3704 * si: control lines as seen by chip.
3705 * sd: scsi data lines as seen by chip.
3708 * sxfer: (see the manual)
3709 * scntl3: (see the manual)
3711 * current script command:
3712 * dsp: script address (relative to start of script).
3713 * dbc: first word of script command.
3715 * First 24 register of the chip:
3718 static void sym_log_hard_error(hcb_p np, u_short sist, u_char dstat)
3724 u_char *script_base;
3729 if (dsp > np->scripta_ba &&
3730 dsp <= np->scripta_ba + np->scripta_sz) {
3731 script_ofs = dsp - np->scripta_ba;
3732 script_size = np->scripta_sz;
3733 script_base = (u_char *) np->scripta0;
3734 script_name = "scripta";
3736 else if (np->scriptb_ba < dsp &&
3737 dsp <= np->scriptb_ba + np->scriptb_sz) {
3738 script_ofs = dsp - np->scriptb_ba;
3739 script_size = np->scriptb_sz;
3740 script_base = (u_char *) np->scriptb0;
3741 script_name = "scriptb";
3746 script_name = "mem";
3749 printf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n",
3750 sym_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist,
3751 (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl),
3752 (unsigned)INB (nc_sbdl), (unsigned)INB (nc_sxfer),
3753 (unsigned)INB (nc_scntl3), script_name, script_ofs,
3754 (unsigned)INL (nc_dbc));
3756 if (((script_ofs & 3) == 0) &&
3757 (unsigned)script_ofs < script_size) {
3758 printf ("%s: script cmd = %08x\n", sym_name(np),
3759 scr_to_cpu((int) *(u32 *)(script_base + script_ofs)));
3762 printf ("%s: regdump:", sym_name(np));
3764 printf (" %02x", (unsigned)INB_OFF(i));
3768 * PCI BUS error, read the PCI ststus register.
3770 if (dstat & (MDPE|BF)) {
3772 pci_sts = pci_read_config(np->device, PCIR_STATUS, 2);
3773 if (pci_sts & 0xf900) {
3774 pci_write_config(np->device, PCIR_STATUS, pci_sts, 2);
3775 printf("%s: PCI STATUS = 0x%04x\n",
3776 sym_name(np), pci_sts & 0xf900);
3782 * chip interrupt handler
3784 * In normal situations, interrupt conditions occur one at
3785 * a time. But when something bad happens on the SCSI BUS,
3786 * the chip may raise several interrupt flags before
3787 * stopping and interrupting the CPU. The additionnal
3788 * interrupt flags are stacked in some extra registers
3789 * after the SIP and/or DIP flag has been raised in the
3790 * ISTAT. After the CPU has read the interrupt condition
3791 * flag from SIST or DSTAT, the chip unstacks the other
3792 * interrupt flags and sets the corresponding bits in
3793 * SIST or DSTAT. Since the chip starts stacking once the
3794 * SIP or DIP flag is set, there is a small window of time
3795 * where the stacking does not occur.
3797 * Typically, multiple interrupt conditions may happen in
3798 * the following situations:
3800 * - SCSI parity error + Phase mismatch (PAR|MA)
3801 * When a parity error is detected in input phase
3802 * and the device switches to msg-in phase inside a
3804 * - SCSI parity error + Unexpected disconnect (PAR|UDC)
3805 * When a stupid device does not want to handle the
3806 * recovery of an SCSI parity error.
3807 * - Some combinations of STO, PAR, UDC, ...
3808 * When using non compliant SCSI stuff, when user is
3809 * doing non compliant hot tampering on the BUS, when
3810 * something really bad happens to a device, etc ...
3812 * The heuristic suggested by SYMBIOS to handle
3813 * multiple interrupts is to try unstacking all
3814 * interrupts conditions and to handle them on some
3815 * priority based on error severity.
3816 * This will work when the unstacking has been
3817 * successful, but we cannot be 100 % sure of that,
3818 * since the CPU may have been faster to unstack than
3819 * the chip is able to stack. Hmmm ... But it seems that
3820 * such a situation is very unlikely to happen.
3822 * If this happen, for example STO caught by the CPU
3823 * then UDC happenning before the CPU have restarted
3824 * the SCRIPTS, the driver may wrongly complete the
3825 * same command on UDC, since the SCRIPTS didn't restart
3826 * and the DSA still points to the same command.
3827 * We avoid this situation by setting the DSA to an
3828 * invalid value when the CCB is completed and before
3829 * restarting the SCRIPTS.
3831 * Another issue is that we need some section of our
3832 * recovery procedures to be somehow uninterruptible but
3833 * the SCRIPTS processor does not provides such a
3834 * feature. For this reason, we handle recovery preferently
3835 * from the C code and check against some SCRIPTS critical
3836 * sections from the C code.
3838 * Hopefully, the interrupt handling of the driver is now
3839 * able to resist to weird BUS error conditions, but donnot
3840 * ask me for any guarantee that it will never fail. :-)
3841 * Use at your own decision and risk.
3844 static void sym_intr1 (hcb_p np)
3846 u_char istat, istatc;
3850 SYM_LOCK_ASSERT(MA_OWNED);
3853 * interrupt on the fly ?
3855 * A `dummy read' is needed to ensure that the
3856 * clear of the INTF flag reaches the device
3857 * before the scanning of the DONE queue.
3859 istat = INB (nc_istat);
3861 OUTB (nc_istat, (istat & SIGP) | INTF | np->istat_sem);
3862 istat = INB (nc_istat); /* DUMMY READ */
3863 if (DEBUG_FLAGS & DEBUG_TINY) printf ("F ");
3864 (void)sym_wakeup_done (np);
3867 if (!(istat & (SIP|DIP)))
3870 #if 0 /* We should never get this one */
3872 OUTB (nc_istat, CABRT);
3876 * PAR and MA interrupts may occur at the same time,
3877 * and we need to know of both in order to handle
3878 * this situation properly. We try to unstack SCSI
3879 * interrupts for that reason. BTW, I dislike a LOT
3880 * such a loop inside the interrupt routine.
3881 * Even if DMA interrupt stacking is very unlikely to
3882 * happen, we also try unstacking these ones, since
3883 * this has no performance impact.
3890 sist |= INW (nc_sist);
3892 dstat |= INB (nc_dstat);
3893 istatc = INB (nc_istat);
3895 } while (istatc & (SIP|DIP));
3897 if (DEBUG_FLAGS & DEBUG_TINY)
3898 printf ("<%d|%x:%x|%x:%x>",
3901 (unsigned)INL(nc_dsp),
3902 (unsigned)INL(nc_dbc));
3904 * On paper, a memory barrier may be needed here.
3905 * And since we are paranoid ... :)
3910 * First, interrupts we want to service cleanly.
3912 * Phase mismatch (MA) is the most frequent interrupt
3913 * for chip earlier than the 896 and so we have to service
3914 * it as quickly as possible.
3915 * A SCSI parity error (PAR) may be combined with a phase
3916 * mismatch condition (MA).
3917 * Programmed interrupts (SIR) are used to call the C code
3919 * The single step interrupt (SSI) is not used in this
3922 if (!(sist & (STO|GEN|HTH|SGE|UDC|SBMC|RST)) &&
3923 !(dstat & (MDPE|BF|ABRT|IID))) {
3924 if (sist & PAR) sym_int_par (np, sist);
3925 else if (sist & MA) sym_int_ma (np);
3926 else if (dstat & SIR) sym_int_sir (np);
3927 else if (dstat & SSI) OUTONB_STD ();
3928 else goto unknown_int;
3933 * Now, interrupts that donnot happen in normal
3934 * situations and that we may need to recover from.
3936 * On SCSI RESET (RST), we reset everything.
3937 * On SCSI BUS MODE CHANGE (SBMC), we complete all
3938 * active CCBs with RESET status, prepare all devices
3939 * for negotiating again and restart the SCRIPTS.
3940 * On STO and UDC, we complete the CCB with the corres-
3941 * ponding status and restart the SCRIPTS.
3944 xpt_print_path(np->path);
3945 printf("SCSI BUS reset detected.\n");
3950 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
3951 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
3953 if (!(sist & (GEN|HTH|SGE)) &&
3954 !(dstat & (MDPE|BF|ABRT|IID))) {
3955 if (sist & SBMC) sym_int_sbmc (np);
3956 else if (sist & STO) sym_int_sto (np);
3957 else if (sist & UDC) sym_int_udc (np);
3958 else goto unknown_int;
3963 * Now, interrupts we are not able to recover cleanly.
3965 * Log message for hard errors.
3969 sym_log_hard_error(np, sist, dstat);
3971 if ((sist & (GEN|HTH|SGE)) ||
3972 (dstat & (MDPE|BF|ABRT|IID))) {
3973 sym_start_reset(np);
3979 * We just miss the cause of the interrupt. :(
3980 * Print a message. The timeout will do the real work.
3982 printf( "%s: unknown interrupt(s) ignored, "
3983 "ISTAT=0x%x DSTAT=0x%x SIST=0x%x\n",
3984 sym_name(np), istat, dstat, sist);
3987 static void sym_intr(void *arg)
3993 if (DEBUG_FLAGS & DEBUG_TINY) printf ("[");
3994 sym_intr1((hcb_p) arg);
3995 if (DEBUG_FLAGS & DEBUG_TINY) printf ("]");
4000 static void sym_poll(struct cam_sim *sim)
4002 sym_intr1(cam_sim_softc(sim));
4007 * generic recovery from scsi interrupt
4009 * The doc says that when the chip gets an SCSI interrupt,
4010 * it tries to stop in an orderly fashion, by completing
4011 * an instruction fetch that had started or by flushing
4012 * the DMA fifo for a write to memory that was executing.
4013 * Such a fashion is not enough to know if the instruction
4014 * that was just before the current DSP value has been
4017 * There are some small SCRIPTS sections that deal with
4018 * the start queue and the done queue that may break any
4019 * assomption from the C code if we are interrupted
4020 * inside, so we reset if this happens. Btw, since these
4021 * SCRIPTS sections are executed while the SCRIPTS hasn't
4022 * started SCSI operations, it is very unlikely to happen.
4024 * All the driver data structures are supposed to be
4025 * allocated from the same 4 GB memory window, so there
4026 * is a 1 to 1 relationship between DSA and driver data
4027 * structures. Since we are careful :) to invalidate the
4028 * DSA when we complete a command or when the SCRIPTS
4029 * pushes a DSA into a queue, we can trust it when it
4032 static void sym_recover_scsi_int (hcb_p np, u_char hsts)
4034 u32 dsp = INL (nc_dsp);
4035 u32 dsa = INL (nc_dsa);
4036 ccb_p cp = sym_ccb_from_dsa(np, dsa);
4039 * If we haven't been interrupted inside the SCRIPTS
4040 * critical pathes, we can safely restart the SCRIPTS
4041 * and trust the DSA value if it matches a CCB.
4043 if ((!(dsp > SCRIPTA_BA (np, getjob_begin) &&
4044 dsp < SCRIPTA_BA (np, getjob_end) + 1)) &&
4045 (!(dsp > SCRIPTA_BA (np, ungetjob) &&
4046 dsp < SCRIPTA_BA (np, reselect) + 1)) &&
4047 (!(dsp > SCRIPTB_BA (np, sel_for_abort) &&
4048 dsp < SCRIPTB_BA (np, sel_for_abort_1) + 1)) &&
4049 (!(dsp > SCRIPTA_BA (np, done) &&
4050 dsp < SCRIPTA_BA (np, done_end) + 1))) {
4051 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
4052 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
4054 * If we have a CCB, let the SCRIPTS call us back for
4055 * the handling of the error with SCRATCHA filled with
4056 * STARTPOS. This way, we will be able to freeze the
4057 * device queue and requeue awaiting IOs.
4060 cp->host_status = hsts;
4061 OUTL_DSP (SCRIPTA_BA (np, complete_error));
4064 * Otherwise just restart the SCRIPTS.
4067 OUTL (nc_dsa, 0xffffff);
4068 OUTL_DSP (SCRIPTA_BA (np, start));
4077 sym_start_reset(np);
4081 * chip exception handler for selection timeout
4083 static void sym_int_sto (hcb_p np)
4085 u32 dsp = INL (nc_dsp);
4087 if (DEBUG_FLAGS & DEBUG_TINY) printf ("T");
4089 if (dsp == SCRIPTA_BA (np, wf_sel_done) + 8)
4090 sym_recover_scsi_int(np, HS_SEL_TIMEOUT);
4092 sym_start_reset(np);
4096 * chip exception handler for unexpected disconnect
4098 static void sym_int_udc (hcb_p np)
4100 printf ("%s: unexpected disconnect\n", sym_name(np));
4101 sym_recover_scsi_int(np, HS_UNEXPECTED);
4105 * chip exception handler for SCSI bus mode change
4107 * spi2-r12 11.2.3 says a transceiver mode change must
4108 * generate a reset event and a device that detects a reset
4109 * event shall initiate a hard reset. It says also that a
4110 * device that detects a mode change shall set data transfer
4111 * mode to eight bit asynchronous, etc...
4112 * So, just reinitializing all except chip should be enough.
4114 static void sym_int_sbmc (hcb_p np)
4116 u_char scsi_mode = INB (nc_stest4) & SMODE;
4121 xpt_print_path(np->path);
4122 printf("SCSI BUS mode change from %s to %s.\n",
4123 sym_scsi_bus_mode(np->scsi_mode), sym_scsi_bus_mode(scsi_mode));
4126 * Should suspend command processing for a few seconds and
4127 * reinitialize all except the chip.
4133 * chip exception handler for SCSI parity error.
4135 * When the chip detects a SCSI parity error and is
4136 * currently executing a (CH)MOV instruction, it does
4137 * not interrupt immediately, but tries to finish the
4138 * transfer of the current scatter entry before
4139 * interrupting. The following situations may occur:
4141 * - The complete scatter entry has been transferred
4142 * without the device having changed phase.
4143 * The chip will then interrupt with the DSP pointing
4144 * to the instruction that follows the MOV.
4146 * - A phase mismatch occurs before the MOV finished
4147 * and phase errors are to be handled by the C code.
4148 * The chip will then interrupt with both PAR and MA
4151 * - A phase mismatch occurs before the MOV finished and
4152 * phase errors are to be handled by SCRIPTS.
4153 * The chip will load the DSP with the phase mismatch
4154 * JUMP address and interrupt the host processor.
4156 static void sym_int_par (hcb_p np, u_short sist)
4158 u_char hsts = INB (HS_PRT);
4159 u32 dsp = INL (nc_dsp);
4160 u32 dbc = INL (nc_dbc);
4161 u32 dsa = INL (nc_dsa);
4162 u_char sbcl = INB (nc_sbcl);
4163 u_char cmd = dbc >> 24;
4164 int phase = cmd & 7;
4165 ccb_p cp = sym_ccb_from_dsa(np, dsa);
4167 printf("%s: SCSI parity error detected: SCR1=%d DBC=%x SBCL=%x\n",
4168 sym_name(np), hsts, dbc, sbcl);
4171 * Check that the chip is connected to the SCSI BUS.
4173 if (!(INB (nc_scntl1) & ISCON)) {
4174 sym_recover_scsi_int(np, HS_UNEXPECTED);
4179 * If the nexus is not clearly identified, reset the bus.
4180 * We will try to do better later.
4186 * Check instruction was a MOV, direction was INPUT and
4189 if ((cmd & 0xc0) || !(phase & 1) || !(sbcl & 0x8))
4193 * Keep track of the parity error.
4195 OUTONB (HF_PRT, HF_EXT_ERR);
4196 cp->xerr_status |= XE_PARITY_ERR;
4199 * Prepare the message to send to the device.
4201 np->msgout[0] = (phase == 7) ? M_PARITY : M_ID_ERROR;
4204 * If the old phase was DATA IN phase, we have to deal with
4205 * the 3 situations described above.
4206 * For other input phases (MSG IN and STATUS), the device
4207 * must resend the whole thing that failed parity checking
4208 * or signal error. So, jumping to dispatcher should be OK.
4210 if (phase == 1 || phase == 5) {
4211 /* Phase mismatch handled by SCRIPTS */
4212 if (dsp == SCRIPTB_BA (np, pm_handle))
4214 /* Phase mismatch handled by the C code */
4217 /* No phase mismatch occurred */
4219 OUTL (nc_temp, dsp);
4220 OUTL_DSP (SCRIPTA_BA (np, dispatch));
4224 OUTL_DSP (SCRIPTA_BA (np, clrack));
4228 sym_start_reset(np);
4232 * chip exception handler for phase errors.
4234 * We have to construct a new transfer descriptor,
4235 * to transfer the rest of the current block.
4237 static void sym_int_ma (hcb_p np)
4250 u_char hflags, hflags0;
4259 rest = dbc & 0xffffff;
4263 * locate matching cp if any.
4265 cp = sym_ccb_from_dsa(np, dsa);
4268 * Donnot take into account dma fifo and various buffers in
4269 * INPUT phase since the chip flushes everything before
4270 * raising the MA interrupt for interrupted INPUT phases.
4271 * For DATA IN phase, we will check for the SWIDE later.
4273 if ((cmd & 7) != 1 && (cmd & 7) != 5) {
4276 if (np->features & FE_DFBC)
4277 delta = INW (nc_dfbc);
4282 * Read DFIFO, CTEST[4-6] using 1 PCI bus ownership.
4284 dfifo = INL(nc_dfifo);
4287 * Calculate remaining bytes in DMA fifo.
4288 * (CTEST5 = dfifo >> 16)
4290 if (dfifo & (DFS << 16))
4291 delta = ((((dfifo >> 8) & 0x300) |
4292 (dfifo & 0xff)) - rest) & 0x3ff;
4294 delta = ((dfifo & 0xff) - rest) & 0x7f;
4298 * The data in the dma fifo has not been transfered to
4299 * the target -> add the amount to the rest
4300 * and clear the data.
4301 * Check the sstat2 register in case of wide transfer.
4304 ss0 = INB (nc_sstat0);
4305 if (ss0 & OLF) rest++;
4306 if (!(np->features & FE_C10))
4307 if (ss0 & ORF) rest++;
4308 if (cp && (cp->phys.select.sel_scntl3 & EWS)) {
4309 ss2 = INB (nc_sstat2);
4310 if (ss2 & OLF1) rest++;
4311 if (!(np->features & FE_C10))
4312 if (ss2 & ORF1) rest++;
4318 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* dma fifo */
4319 OUTB (nc_stest3, TE|CSF); /* scsi fifo */
4323 * log the information
4325 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
4326 printf ("P%x%x RL=%d D=%d ", cmd&7, INB(nc_sbcl)&7,
4327 (unsigned) rest, (unsigned) delta);
4330 * try to find the interrupted script command,
4331 * and the address at which to continue.
4335 if (dsp > np->scripta_ba &&
4336 dsp <= np->scripta_ba + np->scripta_sz) {
4337 vdsp = (u32 *)((char*)np->scripta0 + (dsp-np->scripta_ba-8));
4340 else if (dsp > np->scriptb_ba &&
4341 dsp <= np->scriptb_ba + np->scriptb_sz) {
4342 vdsp = (u32 *)((char*)np->scriptb0 + (dsp-np->scriptb_ba-8));
4347 * log the information
4349 if (DEBUG_FLAGS & DEBUG_PHASE) {
4350 printf ("\nCP=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
4351 cp, (unsigned)dsp, (unsigned)nxtdsp, vdsp, cmd);
4355 printf ("%s: interrupted SCRIPT address not found.\n",
4361 printf ("%s: SCSI phase error fixup: CCB already dequeued.\n",
4367 * get old startaddress and old length.
4369 oadr = scr_to_cpu(vdsp[1]);
4371 if (cmd & 0x10) { /* Table indirect */
4372 tblp = (u32 *) ((char*) &cp->phys + oadr);
4373 olen = scr_to_cpu(tblp[0]);
4374 oadr = scr_to_cpu(tblp[1]);
4377 olen = scr_to_cpu(vdsp[0]) & 0xffffff;
4380 if (DEBUG_FLAGS & DEBUG_PHASE) {
4381 printf ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n",
4382 (unsigned) (scr_to_cpu(vdsp[0]) >> 24),
4389 * check cmd against assumed interrupted script command.
4390 * If dt data phase, the MOVE instruction hasn't bit 4 of
4393 if (((cmd & 2) ? cmd : (cmd & ~4)) != (scr_to_cpu(vdsp[0]) >> 24)) {
4395 printf ("internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
4396 (unsigned)cmd, (unsigned)scr_to_cpu(vdsp[0]) >> 24);
4402 * if old phase not dataphase, leave here.
4406 printf ("phase change %x-%x %d@%08x resid=%d.\n",
4407 cmd&7, INB(nc_sbcl)&7, (unsigned)olen,
4408 (unsigned)oadr, (unsigned)rest);
4409 goto unexpected_phase;
4413 * Choose the correct PM save area.
4415 * Look at the PM_SAVE SCRIPT if you want to understand
4416 * this stuff. The equivalent code is implemented in
4417 * SCRIPTS for the 895A, 896 and 1010 that are able to
4418 * handle PM from the SCRIPTS processor.
4420 hflags0 = INB (HF_PRT);
4423 if (hflags & (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED)) {
4424 if (hflags & HF_IN_PM0)
4425 nxtdsp = scr_to_cpu(cp->phys.pm0.ret);
4426 else if (hflags & HF_IN_PM1)
4427 nxtdsp = scr_to_cpu(cp->phys.pm1.ret);
4429 if (hflags & HF_DP_SAVED)
4430 hflags ^= HF_ACT_PM;
4433 if (!(hflags & HF_ACT_PM)) {
4435 newcmd = SCRIPTA_BA (np, pm0_data);
4439 newcmd = SCRIPTA_BA (np, pm1_data);
4442 hflags &= ~(HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED);
4443 if (hflags != hflags0)
4444 OUTB (HF_PRT, hflags);
4447 * fillin the phase mismatch context
4449 pm->sg.addr = cpu_to_scr(oadr + olen - rest);
4450 pm->sg.size = cpu_to_scr(rest);
4451 pm->ret = cpu_to_scr(nxtdsp);
4454 * If we have a SWIDE,
4455 * - prepare the address to write the SWIDE from SCRIPTS,
4456 * - compute the SCRIPTS address to restart from,
4457 * - move current data pointer context by one byte.
4459 nxtdsp = SCRIPTA_BA (np, dispatch);
4460 if ((cmd & 7) == 1 && cp && (cp->phys.select.sel_scntl3 & EWS) &&
4461 (INB (nc_scntl2) & WSR)) {
4465 * Set up the table indirect for the MOVE
4466 * of the residual byte and adjust the data
4469 tmp = scr_to_cpu(pm->sg.addr);
4470 cp->phys.wresid.addr = cpu_to_scr(tmp);
4471 pm->sg.addr = cpu_to_scr(tmp + 1);
4472 tmp = scr_to_cpu(pm->sg.size);
4473 cp->phys.wresid.size = cpu_to_scr((tmp&0xff000000) | 1);
4474 pm->sg.size = cpu_to_scr(tmp - 1);
4477 * If only the residual byte is to be moved,
4478 * no PM context is needed.
4480 if ((tmp&0xffffff) == 1)
4484 * Prepare the address of SCRIPTS that will
4485 * move the residual byte to memory.
4487 nxtdsp = SCRIPTB_BA (np, wsr_ma_helper);
4490 if (DEBUG_FLAGS & DEBUG_PHASE) {
4492 printf ("PM %x %x %x / %x %x %x.\n",
4493 hflags0, hflags, newcmd,
4494 (unsigned)scr_to_cpu(pm->sg.addr),
4495 (unsigned)scr_to_cpu(pm->sg.size),
4496 (unsigned)scr_to_cpu(pm->ret));
4500 * Restart the SCRIPTS processor.
4502 OUTL (nc_temp, newcmd);
4507 * Unexpected phase changes that occurs when the current phase
4508 * is not a DATA IN or DATA OUT phase are due to error conditions.
4509 * Such event may only happen when the SCRIPTS is using a
4510 * multibyte SCSI MOVE.
4512 * Phase change Some possible cause
4514 * COMMAND --> MSG IN SCSI parity error detected by target.
4515 * COMMAND --> STATUS Bad command or refused by target.
4516 * MSG OUT --> MSG IN Message rejected by target.
4517 * MSG OUT --> COMMAND Bogus target that discards extended
4518 * negotiation messages.
4520 * The code below does not care of the new phase and so
4521 * trusts the target. Why to annoy it ?
4522 * If the interrupted phase is COMMAND phase, we restart at
4524 * If a target does not get all the messages after selection,
4525 * the code assumes blindly that the target discards extended
4526 * messages and clears the negotiation status.
4527 * If the target does not want all our response to negotiation,
4528 * we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids
4529 * bloat for such a should_not_happen situation).
4530 * In all other situation, we reset the BUS.
4531 * Are these assumptions reasonnable ? (Wait and see ...)
4538 case 2: /* COMMAND phase */
4539 nxtdsp = SCRIPTA_BA (np, dispatch);
4542 case 3: /* STATUS phase */
4543 nxtdsp = SCRIPTA_BA (np, dispatch);
4546 case 6: /* MSG OUT phase */
4548 * If the device may want to use untagged when we want
4549 * tagged, we prepare an IDENTIFY without disc. granted,
4550 * since we will not be able to handle reselect.
4551 * Otherwise, we just don't care.
4553 if (dsp == SCRIPTA_BA (np, send_ident)) {
4554 if (cp->tag != NO_TAG && olen - rest <= 3) {
4555 cp->host_status = HS_BUSY;
4556 np->msgout[0] = M_IDENTIFY | cp->lun;
4557 nxtdsp = SCRIPTB_BA (np, ident_break_atn);
4560 nxtdsp = SCRIPTB_BA (np, ident_break);
4562 else if (dsp == SCRIPTB_BA (np, send_wdtr) ||
4563 dsp == SCRIPTB_BA (np, send_sdtr) ||
4564 dsp == SCRIPTB_BA (np, send_ppr)) {
4565 nxtdsp = SCRIPTB_BA (np, nego_bad_phase);
4569 case 7: /* MSG IN phase */
4570 nxtdsp = SCRIPTA_BA (np, clrack);
4581 sym_start_reset(np);
4585 * Dequeue from the START queue all CCBs that match
4586 * a given target/lun/task condition (-1 means all),
4587 * and move them from the BUSY queue to the COMP queue
4588 * with CAM_REQUEUE_REQ status condition.
4589 * This function is used during error handling/recovery.
4590 * It is called with SCRIPTS not running.
4593 sym_dequeue_from_squeue(hcb_p np, int i, int target, int lun, int task)
4599 * Make sure the starting index is within range.
4601 assert((i >= 0) && (i < 2*MAX_QUEUE));
4604 * Walk until end of START queue and dequeue every job
4605 * that matches the target/lun/task condition.
4608 while (i != np->squeueput) {
4609 cp = sym_ccb_from_dsa(np, scr_to_cpu(np->squeue[i]));
4611 #ifdef SYM_CONF_IARB_SUPPORT
4612 /* Forget hints for IARB, they may be no longer relevant */
4613 cp->host_flags &= ~HF_HINT_IARB;
4615 if ((target == -1 || cp->target == target) &&
4616 (lun == -1 || cp->lun == lun) &&
4617 (task == -1 || cp->tag == task)) {
4618 sym_set_cam_status(cp->cam_ccb, CAM_REQUEUE_REQ);
4619 sym_remque(&cp->link_ccbq);
4620 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
4624 np->squeue[j] = np->squeue[i];
4625 if ((j += 2) >= MAX_QUEUE*2) j = 0;
4627 if ((i += 2) >= MAX_QUEUE*2) i = 0;
4629 if (i != j) /* Copy back the idle task if needed */
4630 np->squeue[j] = np->squeue[i];
4631 np->squeueput = j; /* Update our current start queue pointer */
4637 * Complete all CCBs queued to the COMP queue.
4639 * These CCBs are assumed:
4640 * - Not to be referenced either by devices or
4641 * SCRIPTS-related queues and datas.
4642 * - To have to be completed with an error condition
4645 * The device queue freeze count is incremented
4646 * for each CCB that does not prevent this.
4647 * This function is called when all CCBs involved
4648 * in error handling/recovery have been reaped.
4651 sym_flush_comp_queue(hcb_p np, int cam_status)
4656 while ((qp = sym_remque_head(&np->comp_ccbq)) != NULL) {
4658 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
4659 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
4660 /* Leave quiet CCBs waiting for resources */
4661 if (cp->host_status == HS_WAIT)
4665 sym_set_cam_status(ccb, cam_status);
4666 sym_freeze_cam_ccb(ccb);
4667 sym_xpt_done(np, ccb, cp);
4668 sym_free_ccb(np, cp);
4673 * chip handler for bad SCSI status condition
4675 * In case of bad SCSI status, we unqueue all the tasks
4676 * currently queued to the controller but not yet started
4677 * and then restart the SCRIPTS processor immediately.
4679 * QUEUE FULL and BUSY conditions are handled the same way.
4680 * Basically all the not yet started tasks are requeued in
4681 * device queue and the queue is frozen until a completion.
4683 * For CHECK CONDITION and COMMAND TERMINATED status, we use
4684 * the CCB of the failed command to prepare a REQUEST SENSE
4685 * SCSI command and queue it to the controller queue.
4687 * SCRATCHA is assumed to have been loaded with STARTPOS
4688 * before the SCRIPTS called the C code.
4690 static void sym_sir_bad_scsi_status(hcb_p np, int num, ccb_p cp)
4692 tcb_p tp = &np->target[cp->target];
4694 u_char s_status = cp->ssss_status;
4695 u_char h_flags = cp->host_flags;
4700 SYM_LOCK_ASSERT(MA_OWNED);
4703 * Compute the index of the next job to start from SCRIPTS.
4705 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
4708 * The last CCB queued used for IARB hint may be
4709 * no longer relevant. Forget it.
4711 #ifdef SYM_CONF_IARB_SUPPORT
4717 * Now deal with the SCSI status.
4722 if (sym_verbose >= 2) {
4724 printf (s_status == S_BUSY ? "BUSY" : "QUEUE FULL\n");
4726 default: /* S_INT, S_INT_COND_MET, S_CONFLICT */
4727 sym_complete_error (np, cp);
4732 * If we get an SCSI error when requesting sense, give up.
4734 if (h_flags & HF_SENSE) {
4735 sym_complete_error (np, cp);
4740 * Dequeue all queued CCBs for that device not yet started,
4741 * and restart the SCRIPTS processor immediately.
4743 (void) sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
4744 OUTL_DSP (SCRIPTA_BA (np, start));
4747 * Save some info of the actual IO.
4748 * Compute the data residual.
4750 cp->sv_scsi_status = cp->ssss_status;
4751 cp->sv_xerr_status = cp->xerr_status;
4752 cp->sv_resid = sym_compute_residual(np, cp);
4755 * Prepare all needed data structures for
4756 * requesting sense data.
4762 cp->scsi_smsg2[0] = M_IDENTIFY | cp->lun;
4766 * If we are currently using anything different from
4767 * async. 8 bit data transfers with that target,
4768 * start a negotiation, since the device may want
4769 * to report us a UNIT ATTENTION condition due to
4770 * a cause we currently ignore, and we donnot want
4771 * to be stuck with WIDE and/or SYNC data transfer.
4773 * cp->nego_status is filled by sym_prepare_nego().
4775 cp->nego_status = 0;
4777 if (tp->tinfo.current.options & PPR_OPT_MASK)
4779 else if (tp->tinfo.current.width != BUS_8_BIT)
4781 else if (tp->tinfo.current.offset != 0)
4785 sym_prepare_nego (np,cp, nego, &cp->scsi_smsg2[msglen]);
4787 * Message table indirect structure.
4789 cp->phys.smsg.addr = cpu_to_scr(CCB_BA (cp, scsi_smsg2));
4790 cp->phys.smsg.size = cpu_to_scr(msglen);
4795 cp->phys.cmd.addr = cpu_to_scr(CCB_BA (cp, sensecmd));
4796 cp->phys.cmd.size = cpu_to_scr(6);
4799 * patch requested size into sense command
4801 cp->sensecmd[0] = 0x03;
4802 cp->sensecmd[1] = cp->lun << 5;
4803 if (tp->tinfo.current.scsi_version > 2 || cp->lun > 7)
4804 cp->sensecmd[1] = 0;
4805 cp->sensecmd[4] = SYM_SNS_BBUF_LEN;
4806 cp->data_len = SYM_SNS_BBUF_LEN;
4811 bzero(cp->sns_bbuf, SYM_SNS_BBUF_LEN);
4812 cp->phys.sense.addr = cpu_to_scr(vtobus(cp->sns_bbuf));
4813 cp->phys.sense.size = cpu_to_scr(SYM_SNS_BBUF_LEN);
4816 * requeue the command.
4818 startp = SCRIPTB_BA (np, sdata_in);
4820 cp->phys.head.savep = cpu_to_scr(startp);
4821 cp->phys.head.goalp = cpu_to_scr(startp + 16);
4822 cp->phys.head.lastp = cpu_to_scr(startp);
4823 cp->startp = cpu_to_scr(startp);
4825 cp->actualquirks = SYM_QUIRK_AUTOSAVE;
4826 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
4827 cp->ssss_status = S_ILLEGAL;
4828 cp->host_flags = (HF_SENSE|HF_DATA_IN);
4829 cp->xerr_status = 0;
4830 cp->extra_bytes = 0;
4832 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, select));
4835 * Requeue the command.
4837 sym_put_start_queue(np, cp);
4840 * Give back to upper layer everything we have dequeued.
4842 sym_flush_comp_queue(np, 0);
4848 * After a device has accepted some management message
4849 * as BUS DEVICE RESET, ABORT TASK, etc ..., or when
4850 * a device signals a UNIT ATTENTION condition, some
4851 * tasks are thrown away by the device. We are required
4852 * to reflect that on our tasks list since the device
4853 * will never complete these tasks.
4855 * This function move from the BUSY queue to the COMP
4856 * queue all disconnected CCBs for a given target that
4857 * match the following criteria:
4858 * - lun=-1 means any logical UNIT otherwise a given one.
4859 * - task=-1 means any task, otherwise a given one.
4862 sym_clear_tasks(hcb_p np, int cam_status, int target, int lun, int task)
4864 SYM_QUEHEAD qtmp, *qp;
4869 * Move the entire BUSY queue to our temporary queue.
4871 sym_que_init(&qtmp);
4872 sym_que_splice(&np->busy_ccbq, &qtmp);
4873 sym_que_init(&np->busy_ccbq);
4876 * Put all CCBs that matches our criteria into
4877 * the COMP queue and put back other ones into
4880 while ((qp = sym_remque_head(&qtmp)) != NULL) {
4882 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
4884 if (cp->host_status != HS_DISCONNECT ||
4885 cp->target != target ||
4886 (lun != -1 && cp->lun != lun) ||
4888 (cp->tag != NO_TAG && cp->scsi_smsg[2] != task))) {
4889 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
4892 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
4894 /* Preserve the software timeout condition */
4895 if (sym_get_cam_status(ccb) != CAM_CMD_TIMEOUT)
4896 sym_set_cam_status(ccb, cam_status);
4899 printf("XXXX TASK @%p CLEARED\n", cp);
4906 * chip handler for TASKS recovery
4908 * We cannot safely abort a command, while the SCRIPTS
4909 * processor is running, since we just would be in race
4912 * As long as we have tasks to abort, we keep the SEM
4913 * bit set in the ISTAT. When this bit is set, the
4914 * SCRIPTS processor interrupts (SIR_SCRIPT_STOPPED)
4915 * each time it enters the scheduler.
4917 * If we have to reset a target, clear tasks of a unit,
4918 * or to perform the abort of a disconnected job, we
4919 * restart the SCRIPTS for selecting the target. Once
4920 * selected, the SCRIPTS interrupts (SIR_TARGET_SELECTED).
4921 * If it loses arbitration, the SCRIPTS will interrupt again
4922 * the next time it will enter its scheduler, and so on ...
4924 * On SIR_TARGET_SELECTED, we scan for the more
4925 * appropriate thing to do:
4927 * - If nothing, we just sent a M_ABORT message to the
4928 * target to get rid of the useless SCSI bus ownership.
4929 * According to the specs, no tasks shall be affected.
4930 * - If the target is to be reset, we send it a M_RESET
4932 * - If a logical UNIT is to be cleared , we send the
4933 * IDENTIFY(lun) + M_ABORT.
4934 * - If an untagged task is to be aborted, we send the
4935 * IDENTIFY(lun) + M_ABORT.
4936 * - If a tagged task is to be aborted, we send the
4937 * IDENTIFY(lun) + task attributes + M_ABORT_TAG.
4939 * Once our 'kiss of death' :) message has been accepted
4940 * by the target, the SCRIPTS interrupts again
4941 * (SIR_ABORT_SENT). On this interrupt, we complete
4942 * all the CCBs that should have been aborted by the
4943 * target according to our message.
4945 static void sym_sir_task_recovery(hcb_p np, int num)
4950 int target=-1, lun=-1, task;
4955 * The SCRIPTS processor stopped before starting
4956 * the next command in order to allow us to perform
4957 * some task recovery.
4959 case SIR_SCRIPT_STOPPED:
4961 * Do we have any target to reset or unit to clear ?
4963 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
4964 tp = &np->target[i];
4966 (tp->lun0p && tp->lun0p->to_clear)) {
4972 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
4973 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
4983 * If not, walk the busy queue for any
4984 * disconnected CCB to be aborted.
4987 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
4988 cp = sym_que_entry(qp,struct sym_ccb,link_ccbq);
4989 if (cp->host_status != HS_DISCONNECT)
4992 target = cp->target;
4999 * If some target is to be selected,
5000 * prepare and start the selection.
5003 tp = &np->target[target];
5004 np->abrt_sel.sel_id = target;
5005 np->abrt_sel.sel_scntl3 = tp->head.wval;
5006 np->abrt_sel.sel_sxfer = tp->head.sval;
5007 OUTL(nc_dsa, np->hcb_ba);
5008 OUTL_DSP (SCRIPTB_BA (np, sel_for_abort));
5013 * Now look for a CCB to abort that haven't started yet.
5014 * Btw, the SCRIPTS processor is still stopped, so
5015 * we are not in race.
5019 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5020 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5021 if (cp->host_status != HS_BUSY &&
5022 cp->host_status != HS_NEGOTIATE)
5026 #ifdef SYM_CONF_IARB_SUPPORT
5028 * If we are using IMMEDIATE ARBITRATION, we donnot
5029 * want to cancel the last queued CCB, since the
5030 * SCRIPTS may have anticipated the selection.
5032 if (cp == np->last_cp) {
5037 i = 1; /* Means we have found some */
5042 * We are done, so we donnot need
5043 * to synchronize with the SCRIPTS anylonger.
5044 * Remove the SEM flag from the ISTAT.
5047 OUTB (nc_istat, SIGP);
5051 * Compute index of next position in the start
5052 * queue the SCRIPTS intends to start and dequeue
5053 * all CCBs for that device that haven't been started.
5055 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
5056 i = sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
5059 * Make sure at least our IO to abort has been dequeued.
5061 assert(i && sym_get_cam_status(cp->cam_ccb) == CAM_REQUEUE_REQ);
5064 * Keep track in cam status of the reason of the abort.
5066 if (cp->to_abort == 2)
5067 sym_set_cam_status(cp->cam_ccb, CAM_CMD_TIMEOUT);
5069 sym_set_cam_status(cp->cam_ccb, CAM_REQ_ABORTED);
5072 * Complete with error everything that we have dequeued.
5074 sym_flush_comp_queue(np, 0);
5077 * The SCRIPTS processor has selected a target
5078 * we may have some manual recovery to perform for.
5080 case SIR_TARGET_SELECTED:
5081 target = (INB (nc_sdid) & 0xf);
5082 tp = &np->target[target];
5084 np->abrt_tbl.addr = cpu_to_scr(vtobus(np->abrt_msg));
5087 * If the target is to be reset, prepare a
5088 * M_RESET message and clear the to_reset flag
5089 * since we donnot expect this operation to fail.
5092 np->abrt_msg[0] = M_RESET;
5093 np->abrt_tbl.size = 1;
5099 * Otherwise, look for some logical unit to be cleared.
5101 if (tp->lun0p && tp->lun0p->to_clear)
5103 else if (tp->lunmp) {
5104 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
5105 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
5113 * If a logical unit is to be cleared, prepare
5114 * an IDENTIFY(lun) + ABORT MESSAGE.
5117 lcb_p lp = sym_lp(np, tp, lun);
5118 lp->to_clear = 0; /* We donnot expect to fail here */
5119 np->abrt_msg[0] = M_IDENTIFY | lun;
5120 np->abrt_msg[1] = M_ABORT;
5121 np->abrt_tbl.size = 2;
5126 * Otherwise, look for some disconnected job to
5127 * abort for this target.
5131 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5132 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5133 if (cp->host_status != HS_DISCONNECT)
5135 if (cp->target != target)
5139 i = 1; /* Means we have some */
5144 * If we have none, probably since the device has
5145 * completed the command before we won abitration,
5146 * send a M_ABORT message without IDENTIFY.
5147 * According to the specs, the device must just
5148 * disconnect the BUS and not abort any task.
5151 np->abrt_msg[0] = M_ABORT;
5152 np->abrt_tbl.size = 1;
5157 * We have some task to abort.
5158 * Set the IDENTIFY(lun)
5160 np->abrt_msg[0] = M_IDENTIFY | cp->lun;
5163 * If we want to abort an untagged command, we
5164 * will send an IDENTIFY + M_ABORT.
5165 * Otherwise (tagged command), we will send
5166 * an IDENTIFY + task attributes + ABORT TAG.
5168 if (cp->tag == NO_TAG) {
5169 np->abrt_msg[1] = M_ABORT;
5170 np->abrt_tbl.size = 2;
5173 np->abrt_msg[1] = cp->scsi_smsg[1];
5174 np->abrt_msg[2] = cp->scsi_smsg[2];
5175 np->abrt_msg[3] = M_ABORT_TAG;
5176 np->abrt_tbl.size = 4;
5179 * Keep track of software timeout condition, since the
5180 * peripheral driver may not count retries on abort
5181 * conditions not due to timeout.
5183 if (cp->to_abort == 2)
5184 sym_set_cam_status(cp->cam_ccb, CAM_CMD_TIMEOUT);
5185 cp->to_abort = 0; /* We donnot expect to fail here */
5189 * The target has accepted our message and switched
5190 * to BUS FREE phase as we expected.
5192 case SIR_ABORT_SENT:
5193 target = (INB (nc_sdid) & 0xf);
5194 tp = &np->target[target];
5197 ** If we didn't abort anything, leave here.
5199 if (np->abrt_msg[0] == M_ABORT)
5203 * If we sent a M_RESET, then a hardware reset has
5204 * been performed by the target.
5205 * - Reset everything to async 8 bit
5206 * - Tell ourself to negotiate next time :-)
5207 * - Prepare to clear all disconnected CCBs for
5208 * this target from our task list (lun=task=-1)
5212 if (np->abrt_msg[0] == M_RESET) {
5214 tp->head.wval = np->rv_scntl3;
5216 tp->tinfo.current.period = 0;
5217 tp->tinfo.current.offset = 0;
5218 tp->tinfo.current.width = BUS_8_BIT;
5219 tp->tinfo.current.options = 0;
5223 * Otherwise, check for the LUN and TASK(s)
5224 * concerned by the cancelation.
5225 * If it is not ABORT_TAG then it is CLEAR_QUEUE
5226 * or an ABORT message :-)
5229 lun = np->abrt_msg[0] & 0x3f;
5230 if (np->abrt_msg[1] == M_ABORT_TAG)
5231 task = np->abrt_msg[2];
5235 * Complete all the CCBs the device should have
5236 * aborted due to our 'kiss of death' message.
5238 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
5239 (void) sym_dequeue_from_squeue(np, i, target, lun, -1);
5240 (void) sym_clear_tasks(np, CAM_REQ_ABORTED, target, lun, task);
5241 sym_flush_comp_queue(np, 0);
5244 * If we sent a BDR, make uper layer aware of that.
5246 if (np->abrt_msg[0] == M_RESET)
5247 xpt_async(AC_SENT_BDR, np->path, NULL);
5252 * Print to the log the message we intend to send.
5254 if (num == SIR_TARGET_SELECTED) {
5255 PRINT_TARGET(np, target);
5256 sym_printl_hex("control msgout:", np->abrt_msg,
5258 np->abrt_tbl.size = cpu_to_scr(np->abrt_tbl.size);
5262 * Let the SCRIPTS processor continue.
5268 * Gerard's alchemy:) that deals with with the data
5269 * pointer for both MDP and the residual calculation.
5271 * I didn't want to bloat the code by more than 200
5272 * lignes for the handling of both MDP and the residual.
5273 * This has been achieved by using a data pointer
5274 * representation consisting in an index in the data
5275 * array (dp_sg) and a negative offset (dp_ofs) that
5276 * have the following meaning:
5278 * - dp_sg = SYM_CONF_MAX_SG
5279 * we are at the end of the data script.
5280 * - dp_sg < SYM_CONF_MAX_SG
5281 * dp_sg points to the next entry of the scatter array
5282 * we want to transfer.
5284 * dp_ofs represents the residual of bytes of the
5285 * previous entry scatter entry we will send first.
5287 * no residual to send first.
5289 * The function sym_evaluate_dp() accepts an arbitray
5290 * offset (basically from the MDP message) and returns
5291 * the corresponding values of dp_sg and dp_ofs.
5294 static int sym_evaluate_dp(hcb_p np, ccb_p cp, u32 scr, int *ofs)
5297 int dp_ofs, dp_sg, dp_sgmin;
5302 * Compute the resulted data pointer in term of a script
5303 * address within some DATA script and a signed byte offset.
5307 if (dp_scr == SCRIPTA_BA (np, pm0_data))
5309 else if (dp_scr == SCRIPTA_BA (np, pm1_data))
5315 dp_scr = scr_to_cpu(pm->ret);
5316 dp_ofs -= scr_to_cpu(pm->sg.size);
5320 * If we are auto-sensing, then we are done.
5322 if (cp->host_flags & HF_SENSE) {
5328 * Deduce the index of the sg entry.
5329 * Keep track of the index of the first valid entry.
5330 * If result is dp_sg = SYM_CONF_MAX_SG, then we are at the
5333 tmp = scr_to_cpu(cp->phys.head.goalp);
5334 dp_sg = SYM_CONF_MAX_SG;
5336 dp_sg -= (tmp - 8 - (int)dp_scr) / (2*4);
5337 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
5340 * Move to the sg entry the data pointer belongs to.
5342 * If we are inside the data area, we expect result to be:
5345 * dp_ofs = 0 and dp_sg is the index of the sg entry
5346 * the data pointer belongs to (or the end of the data)
5348 * dp_ofs < 0 and dp_sg is the index of the sg entry
5349 * the data pointer belongs to + 1.
5353 while (dp_sg > dp_sgmin) {
5355 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5356 n = dp_ofs + (tmp & 0xffffff);
5364 else if (dp_ofs > 0) {
5365 while (dp_sg < SYM_CONF_MAX_SG) {
5366 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5367 dp_ofs -= (tmp & 0xffffff);
5375 * Make sure the data pointer is inside the data area.
5376 * If not, return some error.
5378 if (dp_sg < dp_sgmin || (dp_sg == dp_sgmin && dp_ofs < 0))
5380 else if (dp_sg > SYM_CONF_MAX_SG ||
5381 (dp_sg == SYM_CONF_MAX_SG && dp_ofs > 0))
5385 * Save the extreme pointer if needed.
5387 if (dp_sg > cp->ext_sg ||
5388 (dp_sg == cp->ext_sg && dp_ofs > cp->ext_ofs)) {
5390 cp->ext_ofs = dp_ofs;
5404 * chip handler for MODIFY DATA POINTER MESSAGE
5406 * We also call this function on IGNORE WIDE RESIDUE
5407 * messages that do not match a SWIDE full condition.
5408 * Btw, we assume in that situation that such a message
5409 * is equivalent to a MODIFY DATA POINTER (offset=-1).
5412 static void sym_modify_dp(hcb_p np, tcb_p tp, ccb_p cp, int ofs)
5415 u32 dp_scr = INL (nc_temp);
5423 * Not supported for auto-sense.
5425 if (cp->host_flags & HF_SENSE)
5429 * Apply our alchemy:) (see comments in sym_evaluate_dp()),
5430 * to the resulted data pointer.
5432 dp_sg = sym_evaluate_dp(np, cp, dp_scr, &dp_ofs);
5437 * And our alchemy:) allows to easily calculate the data
5438 * script address we want to return for the next data phase.
5440 dp_ret = cpu_to_scr(cp->phys.head.goalp);
5441 dp_ret = dp_ret - 8 - (SYM_CONF_MAX_SG - dp_sg) * (2*4);
5444 * If offset / scatter entry is zero we donnot need
5445 * a context for the new current data pointer.
5453 * Get a context for the new current data pointer.
5455 hflags = INB (HF_PRT);
5457 if (hflags & HF_DP_SAVED)
5458 hflags ^= HF_ACT_PM;
5460 if (!(hflags & HF_ACT_PM)) {
5462 dp_scr = SCRIPTA_BA (np, pm0_data);
5466 dp_scr = SCRIPTA_BA (np, pm1_data);
5469 hflags &= ~(HF_DP_SAVED);
5471 OUTB (HF_PRT, hflags);
5474 * Set up the new current data pointer.
5475 * ofs < 0 there, and for the next data phase, we
5476 * want to transfer part of the data of the sg entry
5477 * corresponding to index dp_sg-1 prior to returning
5478 * to the main data script.
5480 pm->ret = cpu_to_scr(dp_ret);
5481 tmp = scr_to_cpu(cp->phys.data[dp_sg-1].addr);
5482 tmp += scr_to_cpu(cp->phys.data[dp_sg-1].size) + dp_ofs;
5483 pm->sg.addr = cpu_to_scr(tmp);
5484 pm->sg.size = cpu_to_scr(-dp_ofs);
5487 OUTL (nc_temp, dp_scr);
5488 OUTL_DSP (SCRIPTA_BA (np, clrack));
5492 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5497 * chip calculation of the data residual.
5499 * As I used to say, the requirement of data residual
5500 * in SCSI is broken, useless and cannot be achieved
5501 * without huge complexity.
5502 * But most OSes and even the official CAM require it.
5503 * When stupidity happens to be so widely spread inside
5504 * a community, it gets hard to convince.
5506 * Anyway, I don't care, since I am not going to use
5507 * any software that considers this data residual as
5508 * a relevant information. :)
5511 static int sym_compute_residual(hcb_p np, ccb_p cp)
5513 int dp_sg, dp_sgmin, resid = 0;
5517 * Check for some data lost or just thrown away.
5518 * We are not required to be quite accurate in this
5519 * situation. Btw, if we are odd for output and the
5520 * device claims some more data, it may well happen
5521 * than our residual be zero. :-)
5523 if (cp->xerr_status & (XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN)) {
5524 if (cp->xerr_status & XE_EXTRA_DATA)
5525 resid -= cp->extra_bytes;
5526 if (cp->xerr_status & XE_SODL_UNRUN)
5528 if (cp->xerr_status & XE_SWIDE_OVRUN)
5533 * If all data has been transferred,
5534 * there is no residual.
5536 if (cp->phys.head.lastp == cp->phys.head.goalp)
5540 * If no data transfer occurs, or if the data
5541 * pointer is weird, return full residual.
5543 if (cp->startp == cp->phys.head.lastp ||
5544 sym_evaluate_dp(np, cp, scr_to_cpu(cp->phys.head.lastp),
5546 return cp->data_len;
5550 * If we were auto-sensing, then we are done.
5552 if (cp->host_flags & HF_SENSE) {
5557 * We are now full comfortable in the computation
5558 * of the data residual (2's complement).
5560 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
5561 resid = -cp->ext_ofs;
5562 for (dp_sg = cp->ext_sg; dp_sg < SYM_CONF_MAX_SG; ++dp_sg) {
5563 u_int tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5564 resid += (tmp & 0xffffff);
5568 * Hopefully, the result is not too wrong.
5574 * Print out the content of a SCSI message.
5577 static int sym_show_msg (u_char * msg)
5581 if (*msg==M_EXTENDED) {
5583 if (i-1>msg[1]) break;
5584 printf ("-%x",msg[i]);
5587 } else if ((*msg & 0xf0) == 0x20) {
5588 printf ("-%x",msg[1]);
5594 static void sym_print_msg (ccb_p cp, char *label, u_char *msg)
5598 printf ("%s: ", label);
5600 (void) sym_show_msg (msg);
5605 * Negotiation for WIDE and SYNCHRONOUS DATA TRANSFER.
5607 * When we try to negotiate, we append the negotiation message
5608 * to the identify and (maybe) simple tag message.
5609 * The host status field is set to HS_NEGOTIATE to mark this
5612 * If the target doesn't answer this message immediately
5613 * (as required by the standard), the SIR_NEGO_FAILED interrupt
5614 * will be raised eventually.
5615 * The handler removes the HS_NEGOTIATE status, and sets the
5616 * negotiated value to the default (async / nowide).
5618 * If we receive a matching answer immediately, we check it
5619 * for validity, and set the values.
5621 * If we receive a Reject message immediately, we assume the
5622 * negotiation has failed, and fall back to standard values.
5624 * If we receive a negotiation message while not in HS_NEGOTIATE
5625 * state, it's a target initiated negotiation. We prepare a
5626 * (hopefully) valid answer, set our parameters, and send back
5627 * this answer to the target.
5629 * If the target doesn't fetch the answer (no message out phase),
5630 * we assume the negotiation has failed, and fall back to default
5631 * settings (SIR_NEGO_PROTO interrupt).
5633 * When we set the values, we adjust them in all ccbs belonging
5634 * to this target, in the controller's register, and in the "phys"
5635 * field of the controller's struct sym_hcb.
5639 * chip handler for SYNCHRONOUS DATA TRANSFER REQUEST (SDTR) message.
5641 static void sym_sync_nego(hcb_p np, tcb_p tp, ccb_p cp)
5643 u_char chg, ofs, per, fak, div;
5647 * Synchronous request message received.
5649 if (DEBUG_FLAGS & DEBUG_NEGO) {
5650 sym_print_msg(cp, "sync msgin", np->msgin);
5654 * request or answer ?
5656 if (INB (HS_PRT) == HS_NEGOTIATE) {
5657 OUTB (HS_PRT, HS_BUSY);
5658 if (cp->nego_status && cp->nego_status != NS_SYNC)
5664 * get requested values.
5671 * check values against our limits.
5674 if (ofs > np->maxoffs)
5675 {chg = 1; ofs = np->maxoffs;}
5677 if (ofs > tp->tinfo.user.offset)
5678 {chg = 1; ofs = tp->tinfo.user.offset;}
5683 if (per < np->minsync)
5684 {chg = 1; per = np->minsync;}
5686 if (per < tp->tinfo.user.period)
5687 {chg = 1; per = tp->tinfo.user.period;}
5692 if (ofs && sym_getsync(np, 0, per, &div, &fak) < 0)
5695 if (DEBUG_FLAGS & DEBUG_NEGO) {
5697 printf ("sdtr: ofs=%d per=%d div=%d fak=%d chg=%d.\n",
5698 ofs, per, div, fak, chg);
5702 * This was an answer message
5705 if (chg) /* Answer wasn't acceptable. */
5707 sym_setsync (np, cp, ofs, per, div, fak);
5708 OUTL_DSP (SCRIPTA_BA (np, clrack));
5713 * It was a request. Set value and
5714 * prepare an answer message
5716 sym_setsync (np, cp, ofs, per, div, fak);
5718 np->msgout[0] = M_EXTENDED;
5720 np->msgout[2] = M_X_SYNC_REQ;
5721 np->msgout[3] = per;
5722 np->msgout[4] = ofs;
5724 cp->nego_status = NS_SYNC;
5726 if (DEBUG_FLAGS & DEBUG_NEGO) {
5727 sym_print_msg(cp, "sync msgout", np->msgout);
5730 np->msgin [0] = M_NOOP;
5732 OUTL_DSP (SCRIPTB_BA (np, sdtr_resp));
5735 sym_setsync (np, cp, 0, 0, 0, 0);
5736 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5740 * chip handler for PARALLEL PROTOCOL REQUEST (PPR) message.
5742 static void sym_ppr_nego(hcb_p np, tcb_p tp, ccb_p cp)
5744 u_char chg, ofs, per, fak, dt, div, wide;
5748 * Synchronous request message received.
5750 if (DEBUG_FLAGS & DEBUG_NEGO) {
5751 sym_print_msg(cp, "ppr msgin", np->msgin);
5755 * get requested values.
5760 wide = np->msgin[6];
5761 dt = np->msgin[7] & PPR_OPT_DT;
5764 * request or answer ?
5766 if (INB (HS_PRT) == HS_NEGOTIATE) {
5767 OUTB (HS_PRT, HS_BUSY);
5768 if (cp->nego_status && cp->nego_status != NS_PPR)
5774 * check values against our limits.
5776 if (wide > np->maxwide)
5777 {chg = 1; wide = np->maxwide;}
5778 if (!wide || !(np->features & FE_ULTRA3))
5781 if (wide > tp->tinfo.user.width)
5782 {chg = 1; wide = tp->tinfo.user.width;}
5785 if (!(np->features & FE_U3EN)) /* Broken U3EN bit not supported */
5788 if (dt != (np->msgin[7] & PPR_OPT_MASK)) chg = 1;
5792 if (ofs > np->maxoffs_dt)
5793 {chg = 1; ofs = np->maxoffs_dt;}
5795 else if (ofs > np->maxoffs)
5796 {chg = 1; ofs = np->maxoffs;}
5798 if (ofs > tp->tinfo.user.offset)
5799 {chg = 1; ofs = tp->tinfo.user.offset;}
5805 if (per < np->minsync_dt)
5806 {chg = 1; per = np->minsync_dt;}
5808 else if (per < np->minsync)
5809 {chg = 1; per = np->minsync;}
5811 if (per < tp->tinfo.user.period)
5812 {chg = 1; per = tp->tinfo.user.period;}
5817 if (ofs && sym_getsync(np, dt, per, &div, &fak) < 0)
5820 if (DEBUG_FLAGS & DEBUG_NEGO) {
5823 "dt=%x ofs=%d per=%d wide=%d div=%d fak=%d chg=%d.\n",
5824 dt, ofs, per, wide, div, fak, chg);
5831 if (chg) /* Answer wasn't acceptable */
5833 sym_setpprot (np, cp, dt, ofs, per, wide, div, fak);
5834 OUTL_DSP (SCRIPTA_BA (np, clrack));
5839 * It was a request. Set value and
5840 * prepare an answer message
5842 sym_setpprot (np, cp, dt, ofs, per, wide, div, fak);
5844 np->msgout[0] = M_EXTENDED;
5846 np->msgout[2] = M_X_PPR_REQ;
5847 np->msgout[3] = per;
5849 np->msgout[5] = ofs;
5850 np->msgout[6] = wide;
5853 cp->nego_status = NS_PPR;
5855 if (DEBUG_FLAGS & DEBUG_NEGO) {
5856 sym_print_msg(cp, "ppr msgout", np->msgout);
5859 np->msgin [0] = M_NOOP;
5861 OUTL_DSP (SCRIPTB_BA (np, ppr_resp));
5864 sym_setpprot (np, cp, 0, 0, 0, 0, 0, 0);
5865 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5867 * If it was a device response that should result in
5868 * ST, we may want to try a legacy negotiation later.
5871 tp->tinfo.goal.options = 0;
5872 tp->tinfo.goal.width = wide;
5873 tp->tinfo.goal.period = per;
5874 tp->tinfo.goal.offset = ofs;
5879 * chip handler for WIDE DATA TRANSFER REQUEST (WDTR) message.
5881 static void sym_wide_nego(hcb_p np, tcb_p tp, ccb_p cp)
5887 * Wide request message received.
5889 if (DEBUG_FLAGS & DEBUG_NEGO) {
5890 sym_print_msg(cp, "wide msgin", np->msgin);
5894 * Is it a request from the device?
5896 if (INB (HS_PRT) == HS_NEGOTIATE) {
5897 OUTB (HS_PRT, HS_BUSY);
5898 if (cp->nego_status && cp->nego_status != NS_WIDE)
5904 * get requested values.
5907 wide = np->msgin[3];
5910 * check values against driver limits.
5912 if (wide > np->maxwide)
5913 {chg = 1; wide = np->maxwide;}
5915 if (wide > tp->tinfo.user.width)
5916 {chg = 1; wide = tp->tinfo.user.width;}
5919 if (DEBUG_FLAGS & DEBUG_NEGO) {
5921 printf ("wdtr: wide=%d chg=%d.\n", wide, chg);
5925 * This was an answer message
5928 if (chg) /* Answer wasn't acceptable. */
5930 sym_setwide (np, cp, wide);
5933 * Negotiate for SYNC immediately after WIDE response.
5934 * This allows to negotiate for both WIDE and SYNC on
5935 * a single SCSI command (Suggested by Justin Gibbs).
5937 if (tp->tinfo.goal.offset) {
5938 np->msgout[0] = M_EXTENDED;
5940 np->msgout[2] = M_X_SYNC_REQ;
5941 np->msgout[3] = tp->tinfo.goal.period;
5942 np->msgout[4] = tp->tinfo.goal.offset;
5944 if (DEBUG_FLAGS & DEBUG_NEGO) {
5945 sym_print_msg(cp, "sync msgout", np->msgout);
5948 cp->nego_status = NS_SYNC;
5949 OUTB (HS_PRT, HS_NEGOTIATE);
5950 OUTL_DSP (SCRIPTB_BA (np, sdtr_resp));
5954 OUTL_DSP (SCRIPTA_BA (np, clrack));
5959 * It was a request, set value and
5960 * prepare an answer message
5962 sym_setwide (np, cp, wide);
5964 np->msgout[0] = M_EXTENDED;
5966 np->msgout[2] = M_X_WIDE_REQ;
5967 np->msgout[3] = wide;
5969 np->msgin [0] = M_NOOP;
5971 cp->nego_status = NS_WIDE;
5973 if (DEBUG_FLAGS & DEBUG_NEGO) {
5974 sym_print_msg(cp, "wide msgout", np->msgout);
5977 OUTL_DSP (SCRIPTB_BA (np, wdtr_resp));
5980 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5984 * Reset SYNC or WIDE to default settings.
5986 * Called when a negotiation does not succeed either
5987 * on rejection or on protocol error.
5989 * If it was a PPR that made problems, we may want to
5990 * try a legacy negotiation later.
5992 static void sym_nego_default(hcb_p np, tcb_p tp, ccb_p cp)
5995 * any error in negotiation:
5996 * fall back to default mode.
5998 switch (cp->nego_status) {
6001 sym_setpprot (np, cp, 0, 0, 0, 0, 0, 0);
6003 tp->tinfo.goal.options = 0;
6004 if (tp->tinfo.goal.period < np->minsync)
6005 tp->tinfo.goal.period = np->minsync;
6006 if (tp->tinfo.goal.offset > np->maxoffs)
6007 tp->tinfo.goal.offset = np->maxoffs;
6011 sym_setsync (np, cp, 0, 0, 0, 0);
6014 sym_setwide (np, cp, 0);
6017 np->msgin [0] = M_NOOP;
6018 np->msgout[0] = M_NOOP;
6019 cp->nego_status = 0;
6023 * chip handler for MESSAGE REJECT received in response to
6024 * a WIDE or SYNCHRONOUS negotiation.
6026 static void sym_nego_rejected(hcb_p np, tcb_p tp, ccb_p cp)
6028 sym_nego_default(np, tp, cp);
6029 OUTB (HS_PRT, HS_BUSY);
6033 * chip exception handler for programmed interrupts.
6035 static void sym_int_sir (hcb_p np)
6037 u_char num = INB (nc_dsps);
6038 u32 dsa = INL (nc_dsa);
6039 ccb_p cp = sym_ccb_from_dsa(np, dsa);
6040 u_char target = INB (nc_sdid) & 0x0f;
6041 tcb_p tp = &np->target[target];
6044 SYM_LOCK_ASSERT(MA_OWNED);
6046 if (DEBUG_FLAGS & DEBUG_TINY) printf ("I#%d", num);
6050 * Command has been completed with error condition
6051 * or has been auto-sensed.
6053 case SIR_COMPLETE_ERROR:
6054 sym_complete_error(np, cp);
6057 * The C code is currently trying to recover from something.
6058 * Typically, user want to abort some command.
6060 case SIR_SCRIPT_STOPPED:
6061 case SIR_TARGET_SELECTED:
6062 case SIR_ABORT_SENT:
6063 sym_sir_task_recovery(np, num);
6066 * The device didn't go to MSG OUT phase after having
6067 * been selected with ATN. We donnot want to handle
6070 case SIR_SEL_ATN_NO_MSG_OUT:
6071 printf ("%s:%d: No MSG OUT phase after selection with ATN.\n",
6072 sym_name (np), target);
6075 * The device didn't switch to MSG IN phase after
6076 * having reseleted the initiator.
6078 case SIR_RESEL_NO_MSG_IN:
6079 printf ("%s:%d: No MSG IN phase after reselection.\n",
6080 sym_name (np), target);
6083 * After reselection, the device sent a message that wasn't
6086 case SIR_RESEL_NO_IDENTIFY:
6087 printf ("%s:%d: No IDENTIFY after reselection.\n",
6088 sym_name (np), target);
6091 * The device reselected a LUN we donnot know about.
6093 case SIR_RESEL_BAD_LUN:
6094 np->msgout[0] = M_RESET;
6097 * The device reselected for an untagged nexus and we
6100 case SIR_RESEL_BAD_I_T_L:
6101 np->msgout[0] = M_ABORT;
6104 * The device reselected for a tagged nexus that we donnot
6107 case SIR_RESEL_BAD_I_T_L_Q:
6108 np->msgout[0] = M_ABORT_TAG;
6111 * The SCRIPTS let us know that the device has grabbed
6112 * our message and will abort the job.
6114 case SIR_RESEL_ABORTED:
6115 np->lastmsg = np->msgout[0];
6116 np->msgout[0] = M_NOOP;
6117 printf ("%s:%d: message %x sent on bad reselection.\n",
6118 sym_name (np), target, np->lastmsg);
6121 * The SCRIPTS let us know that a message has been
6122 * successfully sent to the device.
6124 case SIR_MSG_OUT_DONE:
6125 np->lastmsg = np->msgout[0];
6126 np->msgout[0] = M_NOOP;
6127 /* Should we really care of that */
6128 if (np->lastmsg == M_PARITY || np->lastmsg == M_ID_ERROR) {
6130 cp->xerr_status &= ~XE_PARITY_ERR;
6131 if (!cp->xerr_status)
6132 OUTOFFB (HF_PRT, HF_EXT_ERR);
6137 * The device didn't send a GOOD SCSI status.
6138 * We may have some work to do prior to allow
6139 * the SCRIPTS processor to continue.
6141 case SIR_BAD_SCSI_STATUS:
6144 sym_sir_bad_scsi_status(np, num, cp);
6147 * We are asked by the SCRIPTS to prepare a
6150 case SIR_REJECT_TO_SEND:
6151 sym_print_msg(cp, "M_REJECT to send for ", np->msgin);
6152 np->msgout[0] = M_REJECT;
6155 * We have been ODD at the end of a DATA IN
6156 * transfer and the device didn't send a
6157 * IGNORE WIDE RESIDUE message.
6158 * It is a data overrun condition.
6160 case SIR_SWIDE_OVERRUN:
6162 OUTONB (HF_PRT, HF_EXT_ERR);
6163 cp->xerr_status |= XE_SWIDE_OVRUN;
6167 * We have been ODD at the end of a DATA OUT
6169 * It is a data underrun condition.
6171 case SIR_SODL_UNDERRUN:
6173 OUTONB (HF_PRT, HF_EXT_ERR);
6174 cp->xerr_status |= XE_SODL_UNRUN;
6178 * The device wants us to tranfer more data than
6179 * expected or in the wrong direction.
6180 * The number of extra bytes is in scratcha.
6181 * It is a data overrun condition.
6183 case SIR_DATA_OVERRUN:
6185 OUTONB (HF_PRT, HF_EXT_ERR);
6186 cp->xerr_status |= XE_EXTRA_DATA;
6187 cp->extra_bytes += INL (nc_scratcha);
6191 * The device switched to an illegal phase (4/5).
6195 OUTONB (HF_PRT, HF_EXT_ERR);
6196 cp->xerr_status |= XE_BAD_PHASE;
6200 * We received a message.
6202 case SIR_MSG_RECEIVED:
6205 switch (np->msgin [0]) {
6207 * We received an extended message.
6208 * We handle MODIFY DATA POINTER, SDTR, WDTR
6209 * and reject all other extended messages.
6212 switch (np->msgin [2]) {
6214 if (DEBUG_FLAGS & DEBUG_POINTER)
6215 sym_print_msg(cp,"modify DP",np->msgin);
6216 tmp = (np->msgin[3]<<24) + (np->msgin[4]<<16) +
6217 (np->msgin[5]<<8) + (np->msgin[6]);
6218 sym_modify_dp(np, tp, cp, tmp);
6221 sym_sync_nego(np, tp, cp);
6224 sym_ppr_nego(np, tp, cp);
6227 sym_wide_nego(np, tp, cp);
6234 * We received a 1/2 byte message not handled from SCRIPTS.
6235 * We are only expecting MESSAGE REJECT and IGNORE WIDE
6236 * RESIDUE messages that haven't been anticipated by
6237 * SCRIPTS on SWIDE full condition. Unanticipated IGNORE
6238 * WIDE RESIDUE messages are aliased as MODIFY DP (-1).
6241 if (DEBUG_FLAGS & DEBUG_POINTER)
6242 sym_print_msg(cp,"ign wide residue", np->msgin);
6243 sym_modify_dp(np, tp, cp, -1);
6246 if (INB (HS_PRT) == HS_NEGOTIATE)
6247 sym_nego_rejected(np, tp, cp);
6250 printf ("M_REJECT received (%x:%x).\n",
6251 scr_to_cpu(np->lastmsg), np->msgout[0]);
6260 * We received an unknown message.
6261 * Ignore all MSG IN phases and reject it.
6264 sym_print_msg(cp, "WEIRD message received", np->msgin);
6265 OUTL_DSP (SCRIPTB_BA (np, msg_weird));
6268 * Negotiation failed.
6269 * Target does not send us the reply.
6270 * Remove the HS_NEGOTIATE status.
6272 case SIR_NEGO_FAILED:
6273 OUTB (HS_PRT, HS_BUSY);
6275 * Negotiation failed.
6276 * Target does not want answer message.
6278 case SIR_NEGO_PROTO:
6279 sym_nego_default(np, tp, cp);
6287 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
6290 OUTL_DSP (SCRIPTA_BA (np, clrack));
6297 * Acquire a control block
6299 static ccb_p sym_get_ccb (hcb_p np, u_char tn, u_char ln, u_char tag_order)
6301 tcb_p tp = &np->target[tn];
6302 lcb_p lp = sym_lp(np, tp, ln);
6303 u_short tag = NO_TAG;
6305 ccb_p cp = (ccb_p) NULL;
6308 * Look for a free CCB
6310 if (sym_que_empty(&np->free_ccbq))
6312 qp = sym_remque_head(&np->free_ccbq);
6315 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
6318 * If the LCB is not yet available and the LUN
6319 * has been probed ok, try to allocate the LCB.
6321 if (!lp && sym_is_bit(tp->lun_map, ln)) {
6322 lp = sym_alloc_lcb(np, tn, ln);
6328 * If the LCB is not available here, then the
6329 * logical unit is not yet discovered. For those
6330 * ones only accept 1 SCSI IO per logical unit,
6331 * since we cannot allow disconnections.
6334 if (!sym_is_bit(tp->busy0_map, ln))
6335 sym_set_bit(tp->busy0_map, ln);
6340 * If we have been asked for a tagged command.
6344 * Debugging purpose.
6346 assert(lp->busy_itl == 0);
6348 * Allocate resources for tags if not yet.
6351 sym_alloc_lcb_tags(np, tn, ln);
6356 * Get a tag for this SCSI IO and set up
6357 * the CCB bus address for reselection,
6358 * and count it for this LUN.
6359 * Toggle reselect path to tagged.
6361 if (lp->busy_itlq < SYM_CONF_MAX_TASK) {
6362 tag = lp->cb_tags[lp->ia_tag];
6363 if (++lp->ia_tag == SYM_CONF_MAX_TASK)
6365 lp->itlq_tbl[tag] = cpu_to_scr(cp->ccb_ba);
6368 cpu_to_scr(SCRIPTA_BA (np, resel_tag));
6374 * This command will not be tagged.
6375 * If we already have either a tagged or untagged
6376 * one, refuse to overlap this untagged one.
6380 * Debugging purpose.
6382 assert(lp->busy_itl == 0 && lp->busy_itlq == 0);
6384 * Count this nexus for this LUN.
6385 * Set up the CCB bus address for reselection.
6386 * Toggle reselect path to untagged.
6388 if (++lp->busy_itl == 1) {
6389 lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba);
6391 cpu_to_scr(SCRIPTA_BA (np, resel_no_tag));
6398 * Put the CCB into the busy queue.
6400 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
6403 * Remember all informations needed to free this CCB.
6410 if (DEBUG_FLAGS & DEBUG_TAGS) {
6411 PRINT_LUN(np, tn, ln);
6412 printf ("ccb @%p using tag %d.\n", cp, tag);
6418 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6423 * Release one control block
6425 static void sym_free_ccb (hcb_p np, ccb_p cp)
6427 tcb_p tp = &np->target[cp->target];
6428 lcb_p lp = sym_lp(np, tp, cp->lun);
6430 if (DEBUG_FLAGS & DEBUG_TAGS) {
6431 PRINT_LUN(np, cp->target, cp->lun);
6432 printf ("ccb @%p freeing tag %d.\n", cp, cp->tag);
6440 * If tagged, release the tag, set the relect path
6442 if (cp->tag != NO_TAG) {
6444 * Free the tag value.
6446 lp->cb_tags[lp->if_tag] = cp->tag;
6447 if (++lp->if_tag == SYM_CONF_MAX_TASK)
6450 * Make the reselect path invalid,
6451 * and uncount this CCB.
6453 lp->itlq_tbl[cp->tag] = cpu_to_scr(np->bad_itlq_ba);
6455 } else { /* Untagged */
6457 * Make the reselect path invalid,
6458 * and uncount this CCB.
6460 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
6464 * If no JOB active, make the LUN reselect path invalid.
6466 if (lp->busy_itlq == 0 && lp->busy_itl == 0)
6468 cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
6471 * Otherwise, we only accept 1 IO per LUN.
6472 * Clear the bit that keeps track of this IO.
6475 sym_clr_bit(tp->busy0_map, cp->lun);
6478 * We donnot queue more than 1 ccb per target
6479 * with negotiation at any time. If this ccb was
6480 * used for negotiation, clear this info in the tcb.
6482 if (cp == tp->nego_cp)
6485 #ifdef SYM_CONF_IARB_SUPPORT
6487 * If we just complete the last queued CCB,
6488 * clear this info that is no longer relevant.
6490 if (cp == np->last_cp)
6495 * Unmap user data from DMA map if needed.
6497 if (cp->dmamapped) {
6498 bus_dmamap_unload(np->data_dmat, cp->dmamap);
6503 * Make this CCB available.
6506 cp->host_status = HS_IDLE;
6507 sym_remque(&cp->link_ccbq);
6508 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6512 * Allocate a CCB from memory and initialize its fixed part.
6514 static ccb_p sym_alloc_ccb(hcb_p np)
6519 SYM_LOCK_ASSERT(MA_NOTOWNED);
6522 * Prevent from allocating more CCBs than we can
6523 * queue to the controller.
6525 if (np->actccbs >= SYM_CONF_MAX_START)
6529 * Allocate memory for this CCB.
6531 cp = sym_calloc_dma(sizeof(struct sym_ccb), "CCB");
6536 * Allocate a bounce buffer for sense data.
6538 cp->sns_bbuf = sym_calloc_dma(SYM_SNS_BBUF_LEN, "SNS_BBUF");
6543 * Allocate a map for the DMA of user data.
6545 if (bus_dmamap_create(np->data_dmat, 0, &cp->dmamap))
6553 * Initialize the callout.
6555 callout_init(&cp->ch, 1);
6558 * Compute the bus address of this ccb.
6560 cp->ccb_ba = vtobus(cp);
6563 * Insert this ccb into the hashed list.
6565 hcode = CCB_HASH_CODE(cp->ccb_ba);
6566 cp->link_ccbh = np->ccbh[hcode];
6567 np->ccbh[hcode] = cp;
6570 * Initialize the start and restart actions.
6572 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, idle));
6573 cp->phys.head.go.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
6576 * Initilialyze some other fields.
6578 cp->phys.smsg_ext.addr = cpu_to_scr(HCB_BA(np, msgin[2]));
6581 * Chain into free ccb queue.
6583 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6588 sym_mfree_dma(cp->sns_bbuf, SYM_SNS_BBUF_LEN, "SNS_BBUF");
6589 sym_mfree_dma(cp, sizeof(*cp), "CCB");
6594 * Look up a CCB from a DSA value.
6596 static ccb_p sym_ccb_from_dsa(hcb_p np, u32 dsa)
6601 hcode = CCB_HASH_CODE(dsa);
6602 cp = np->ccbh[hcode];
6604 if (cp->ccb_ba == dsa)
6613 * Target control block initialisation.
6614 * Nothing important to do at the moment.
6616 static void sym_init_tcb (hcb_p np, u_char tn)
6619 * Check some alignments required by the chip.
6621 assert (((offsetof(struct sym_reg, nc_sxfer) ^
6622 offsetof(struct sym_tcb, head.sval)) &3) == 0);
6623 assert (((offsetof(struct sym_reg, nc_scntl3) ^
6624 offsetof(struct sym_tcb, head.wval)) &3) == 0);
6628 * Lun control block allocation and initialization.
6630 static lcb_p sym_alloc_lcb (hcb_p np, u_char tn, u_char ln)
6632 tcb_p tp = &np->target[tn];
6633 lcb_p lp = sym_lp(np, tp, ln);
6636 * Already done, just return.
6641 * Check against some race.
6643 assert(!sym_is_bit(tp->busy0_map, ln));
6646 * Initialize the target control block if not yet.
6648 sym_init_tcb (np, tn);
6651 * Allocate the LCB bus address array.
6652 * Compute the bus address of this table.
6654 if (ln && !tp->luntbl) {
6657 tp->luntbl = sym_calloc_dma(256, "LUNTBL");
6660 for (i = 0 ; i < 64 ; i++)
6661 tp->luntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
6662 tp->head.luntbl_sa = cpu_to_scr(vtobus(tp->luntbl));
6666 * Allocate the table of pointers for LUN(s) > 0, if needed.
6668 if (ln && !tp->lunmp) {
6669 tp->lunmp = sym_calloc(SYM_CONF_MAX_LUN * sizeof(lcb_p),
6677 * Make it available to the chip.
6679 lp = sym_calloc_dma(sizeof(struct sym_lcb), "LCB");
6684 tp->luntbl[ln] = cpu_to_scr(vtobus(lp));
6688 tp->head.lun0_sa = cpu_to_scr(vtobus(lp));
6692 * Let the itl task point to error handling.
6694 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
6697 * Set the reselect pattern to our default. :)
6699 lp->head.resel_sa = cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
6702 * Set user capabilities.
6704 lp->user_flags = tp->usrflags & (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
6711 * Allocate LCB resources for tagged command queuing.
6713 static void sym_alloc_lcb_tags (hcb_p np, u_char tn, u_char ln)
6715 tcb_p tp = &np->target[tn];
6716 lcb_p lp = sym_lp(np, tp, ln);
6720 * If LCB not available, try to allocate it.
6722 if (!lp && !(lp = sym_alloc_lcb(np, tn, ln)))
6726 * Allocate the task table and and the tag allocation
6727 * circular buffer. We want both or none.
6729 lp->itlq_tbl = sym_calloc_dma(SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
6732 lp->cb_tags = sym_calloc(SYM_CONF_MAX_TASK, "CB_TAGS");
6734 sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
6740 * Initialize the task table with invalid entries.
6742 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
6743 lp->itlq_tbl[i] = cpu_to_scr(np->notask_ba);
6746 * Fill up the tag buffer with tag numbers.
6748 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
6752 * Make the task table available to SCRIPTS,
6753 * And accept tagged commands now.
6755 lp->head.itlq_tbl_sa = cpu_to_scr(vtobus(lp->itlq_tbl));
6759 * Test the pci bus snoop logic :-(
6761 * Has to be called with interrupts disabled.
6763 #ifndef SYM_CONF_IOMAPPED
6764 static int sym_regtest (hcb_p np)
6766 register volatile u32 data;
6768 * chip registers may NOT be cached.
6769 * write 0xffffffff to a read only register area,
6770 * and try to read it back.
6773 OUTL_OFF(offsetof(struct sym_reg, nc_dstat), data);
6774 data = INL_OFF(offsetof(struct sym_reg, nc_dstat));
6776 if (data == 0xffffffff) {
6778 if ((data & 0xe2f0fffd) != 0x02000080) {
6780 printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
6788 static int sym_snooptest (hcb_p np)
6790 u32 sym_rd, sym_wr, sym_bk, host_rd, host_wr, pc, dstat;
6792 #ifndef SYM_CONF_IOMAPPED
6793 err |= sym_regtest (np);
6794 if (err) return (err);
6798 * Enable Master Parity Checking as we intend
6799 * to enable it for normal operations.
6801 OUTB (nc_ctest4, (np->rv_ctest4 & MPEE));
6805 pc = SCRIPTB0_BA (np, snooptest);
6809 * Set memory and register.
6811 np->cache = cpu_to_scr(host_wr);
6812 OUTL (nc_temp, sym_wr);
6814 * Start script (exchange values)
6816 OUTL (nc_dsa, np->hcb_ba);
6819 * Wait 'til done (with timeout)
6821 for (i=0; i<SYM_SNOOP_TIMEOUT; i++)
6822 if (INB(nc_istat) & (INTF|SIP|DIP))
6824 if (i>=SYM_SNOOP_TIMEOUT) {
6825 printf ("CACHE TEST FAILED: timeout.\n");
6829 * Check for fatal DMA errors.
6831 dstat = INB (nc_dstat);
6832 #if 1 /* Band aiding for broken hardwares that fail PCI parity */
6833 if ((dstat & MDPE) && (np->rv_ctest4 & MPEE)) {
6834 printf ("%s: PCI DATA PARITY ERROR DETECTED - "
6835 "DISABLING MASTER DATA PARITY CHECKING.\n",
6837 np->rv_ctest4 &= ~MPEE;
6841 if (dstat & (MDPE|BF|IID)) {
6842 printf ("CACHE TEST FAILED: DMA error (dstat=0x%02x).", dstat);
6846 * Save termination position.
6850 * Read memory and register.
6852 host_rd = scr_to_cpu(np->cache);
6853 sym_rd = INL (nc_scratcha);
6854 sym_bk = INL (nc_temp);
6857 * Check termination position.
6859 if (pc != SCRIPTB0_BA (np, snoopend)+8) {
6860 printf ("CACHE TEST FAILED: script execution failed.\n");
6861 printf ("start=%08lx, pc=%08lx, end=%08lx\n",
6862 (u_long) SCRIPTB0_BA (np, snooptest), (u_long) pc,
6863 (u_long) SCRIPTB0_BA (np, snoopend) +8);
6869 if (host_wr != sym_rd) {
6870 printf ("CACHE TEST FAILED: host wrote %d, chip read %d.\n",
6871 (int) host_wr, (int) sym_rd);
6874 if (host_rd != sym_wr) {
6875 printf ("CACHE TEST FAILED: chip wrote %d, host read %d.\n",
6876 (int) sym_wr, (int) host_rd);
6879 if (sym_bk != sym_wr) {
6880 printf ("CACHE TEST FAILED: chip wrote %d, read back %d.\n",
6881 (int) sym_wr, (int) sym_bk);
6889 * Determine the chip's clock frequency.
6891 * This is essential for the negotiation of the synchronous
6894 * Note: we have to return the correct value.
6895 * THERE IS NO SAFE DEFAULT VALUE.
6897 * Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
6898 * 53C860 and 53C875 rev. 1 support fast20 transfers but
6899 * do not have a clock doubler and so are provided with a
6900 * 80 MHz clock. All other fast20 boards incorporate a doubler
6901 * and so should be delivered with a 40 MHz clock.
6902 * The recent fast40 chips (895/896/895A/1010) use a 40 Mhz base
6903 * clock and provide a clock quadrupler (160 Mhz).
6907 * Select SCSI clock frequency
6909 static void sym_selectclock(hcb_p np, u_char scntl3)
6912 * If multiplier not present or not selected, leave here.
6914 if (np->multiplier <= 1) {
6915 OUTB(nc_scntl3, scntl3);
6919 if (sym_verbose >= 2)
6920 printf ("%s: enabling clock multiplier\n", sym_name(np));
6922 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */
6924 * Wait for the LCKFRQ bit to be set if supported by the chip.
6925 * Otherwise wait 20 micro-seconds.
6927 if (np->features & FE_LCKFRQ) {
6929 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0)
6932 printf("%s: the chip cannot lock the frequency\n",
6936 OUTB(nc_stest3, HSC); /* Halt the scsi clock */
6937 OUTB(nc_scntl3, scntl3);
6938 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
6939 OUTB(nc_stest3, 0x00); /* Restart scsi clock */
6943 * calculate SCSI clock frequency (in KHz)
6945 static unsigned getfreq (hcb_p np, int gen)
6947 unsigned int ms = 0;
6951 * Measure GEN timer delay in order
6952 * to calculate SCSI clock frequency
6954 * This code will never execute too
6955 * many loop iterations (if DELAY is
6956 * reasonably correct). It could get
6957 * too low a delay (too high a freq.)
6958 * if the CPU is slow executing the
6959 * loop for some reason (an NMI, for
6960 * example). For this reason we will
6961 * if multiple measurements are to be
6962 * performed trust the higher delay
6963 * (lower frequency returned).
6965 OUTW (nc_sien , 0); /* mask all scsi interrupts */
6966 (void) INW (nc_sist); /* clear pending scsi interrupt */
6967 OUTB (nc_dien , 0); /* mask all dma interrupts */
6968 (void) INW (nc_sist); /* another one, just to be sure :) */
6969 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */
6970 OUTB (nc_stime1, 0); /* disable general purpose timer */
6971 OUTB (nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */
6972 while (!(INW(nc_sist) & GEN) && ms++ < 100000)
6973 UDELAY (1000); /* count ms */
6974 OUTB (nc_stime1, 0); /* disable general purpose timer */
6976 * set prescaler to divide by whatever 0 means
6977 * 0 ought to choose divide by 2, but appears
6978 * to set divide by 3.5 mode in my 53c810 ...
6980 OUTB (nc_scntl3, 0);
6983 * adjust for prescaler, and convert into KHz
6985 f = ms ? ((1 << gen) * 4340) / ms : 0;
6987 if (sym_verbose >= 2)
6988 printf ("%s: Delay (GEN=%d): %u msec, %u KHz\n",
6989 sym_name(np), gen, ms, f);
6994 static unsigned sym_getfreq (hcb_p np)
6999 (void) getfreq (np, gen); /* throw away first result */
7000 f1 = getfreq (np, gen);
7001 f2 = getfreq (np, gen);
7002 if (f1 > f2) f1 = f2; /* trust lower result */
7007 * Get/probe chip SCSI clock frequency
7009 static void sym_getclock (hcb_p np, int mult)
7011 unsigned char scntl3 = np->sv_scntl3;
7012 unsigned char stest1 = np->sv_stest1;
7016 * For the C10 core, assume 40 MHz.
7018 if (np->features & FE_C10) {
7019 np->multiplier = mult;
7020 np->clock_khz = 40000 * mult;
7027 * True with 875/895/896/895A with clock multiplier selected
7029 if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) {
7030 if (sym_verbose >= 2)
7031 printf ("%s: clock multiplier found\n", sym_name(np));
7032 np->multiplier = mult;
7036 * If multiplier not found or scntl3 not 7,5,3,
7037 * reset chip and get frequency from general purpose timer.
7038 * Otherwise trust scntl3 BIOS setting.
7040 if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) {
7041 OUTB (nc_stest1, 0); /* make sure doubler is OFF */
7042 f1 = sym_getfreq (np);
7045 printf ("%s: chip clock is %uKHz\n", sym_name(np), f1);
7047 if (f1 < 45000) f1 = 40000;
7048 else if (f1 < 55000) f1 = 50000;
7051 if (f1 < 80000 && mult > 1) {
7052 if (sym_verbose >= 2)
7053 printf ("%s: clock multiplier assumed\n",
7055 np->multiplier = mult;
7058 if ((scntl3 & 7) == 3) f1 = 40000;
7059 else if ((scntl3 & 7) == 5) f1 = 80000;
7062 f1 /= np->multiplier;
7066 * Compute controller synchronous parameters.
7068 f1 *= np->multiplier;
7073 * Get/probe PCI clock frequency
7075 static int sym_getpciclock (hcb_p np)
7080 * For the C1010-33, this doesn't work.
7081 * For the C1010-66, this will be tested when I'll have
7082 * such a beast to play with.
7084 if (!(np->features & FE_C10)) {
7085 OUTB (nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */
7086 f = (int) sym_getfreq (np);
7087 OUTB (nc_stest1, 0);
7094 /*============= DRIVER ACTION/COMPLETION ====================*/
7097 * Print something that tells about extended errors.
7099 static void sym_print_xerr(ccb_p cp, int x_status)
7101 if (x_status & XE_PARITY_ERR) {
7103 printf ("unrecovered SCSI parity error.\n");
7105 if (x_status & XE_EXTRA_DATA) {
7107 printf ("extraneous data discarded.\n");
7109 if (x_status & XE_BAD_PHASE) {
7111 printf ("illegal scsi phase (4/5).\n");
7113 if (x_status & XE_SODL_UNRUN) {
7115 printf ("ODD transfer in DATA OUT phase.\n");
7117 if (x_status & XE_SWIDE_OVRUN) {
7119 printf ("ODD transfer in DATA IN phase.\n");
7124 * Choose the more appropriate CAM status if
7125 * the IO encountered an extended error.
7127 static int sym_xerr_cam_status(int cam_status, int x_status)
7130 if (x_status & XE_PARITY_ERR)
7131 cam_status = CAM_UNCOR_PARITY;
7132 else if (x_status &(XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN))
7133 cam_status = CAM_DATA_RUN_ERR;
7134 else if (x_status & XE_BAD_PHASE)
7135 cam_status = CAM_REQ_CMP_ERR;
7137 cam_status = CAM_REQ_CMP_ERR;
7143 * Complete execution of a SCSI command with extented
7144 * error, SCSI status error, or having been auto-sensed.
7146 * The SCRIPTS processor is not running there, so we
7147 * can safely access IO registers and remove JOBs from
7149 * SCRATCHA is assumed to have been loaded with STARTPOS
7150 * before the SCRIPTS called the C code.
7152 static void sym_complete_error (hcb_p np, ccb_p cp)
7154 struct ccb_scsiio *csio;
7158 SYM_LOCK_ASSERT(MA_OWNED);
7161 * Paranoid check. :)
7163 if (!cp || !cp->cam_ccb)
7166 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_RESULT)) {
7167 printf ("CCB=%lx STAT=%x/%x/%x DEV=%d/%d\n", (unsigned long)cp,
7168 cp->host_status, cp->ssss_status, cp->host_flags,
7169 cp->target, cp->lun);
7174 * Get CAM command pointer.
7176 csio = &cp->cam_ccb->csio;
7179 * Check for extended errors.
7181 if (cp->xerr_status) {
7183 sym_print_xerr(cp, cp->xerr_status);
7184 if (cp->host_status == HS_COMPLETE)
7185 cp->host_status = HS_COMP_ERR;
7189 * Calculate the residual.
7191 csio->sense_resid = 0;
7192 csio->resid = sym_compute_residual(np, cp);
7194 if (!SYM_CONF_RESIDUAL_SUPPORT) {/* If user does not want residuals */
7195 csio->resid = 0; /* throw them away. :) */
7199 if (cp->host_flags & HF_SENSE) { /* Auto sense */
7200 csio->scsi_status = cp->sv_scsi_status; /* Restore status */
7201 csio->sense_resid = csio->resid; /* Swap residuals */
7202 csio->resid = cp->sv_resid;
7204 if (sym_verbose && cp->sv_xerr_status)
7205 sym_print_xerr(cp, cp->sv_xerr_status);
7206 if (cp->host_status == HS_COMPLETE &&
7207 cp->ssss_status == S_GOOD &&
7208 cp->xerr_status == 0) {
7209 cam_status = sym_xerr_cam_status(CAM_SCSI_STATUS_ERROR,
7210 cp->sv_xerr_status);
7211 cam_status |= CAM_AUTOSNS_VALID;
7213 * Bounce back the sense data to user and
7216 bzero(&csio->sense_data, csio->sense_len);
7217 bcopy(cp->sns_bbuf, &csio->sense_data,
7218 MIN(csio->sense_len, SYM_SNS_BBUF_LEN));
7219 csio->sense_resid += csio->sense_len;
7220 csio->sense_resid -= SYM_SNS_BBUF_LEN;
7223 * If the device reports a UNIT ATTENTION condition
7224 * due to a RESET condition, we should consider all
7225 * disconnect CCBs for this unit as aborted.
7229 p = (u_char *) csio->sense_data;
7230 if (p[0]==0x70 && p[2]==0x6 && p[12]==0x29)
7231 sym_clear_tasks(np, CAM_REQ_ABORTED,
7232 cp->target,cp->lun, -1);
7237 cam_status = CAM_AUTOSENSE_FAIL;
7239 else if (cp->host_status == HS_COMPLETE) { /* Bad SCSI status */
7240 csio->scsi_status = cp->ssss_status;
7241 cam_status = CAM_SCSI_STATUS_ERROR;
7243 else if (cp->host_status == HS_SEL_TIMEOUT) /* Selection timeout */
7244 cam_status = CAM_SEL_TIMEOUT;
7245 else if (cp->host_status == HS_UNEXPECTED) /* Unexpected BUS FREE*/
7246 cam_status = CAM_UNEXP_BUSFREE;
7247 else { /* Extended error */
7250 printf ("COMMAND FAILED (%x %x %x).\n",
7251 cp->host_status, cp->ssss_status,
7254 csio->scsi_status = cp->ssss_status;
7256 * Set the most appropriate value for CAM status.
7258 cam_status = sym_xerr_cam_status(CAM_REQ_CMP_ERR,
7263 * Dequeue all queued CCBs for that device
7264 * not yet started by SCRIPTS.
7266 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
7267 (void) sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
7270 * Restart the SCRIPTS processor.
7272 OUTL_DSP (SCRIPTA_BA (np, start));
7275 * Synchronize DMA map if needed.
7277 if (cp->dmamapped) {
7278 bus_dmamap_sync(np->data_dmat, cp->dmamap,
7279 (cp->dmamapped == SYM_DMA_READ ?
7280 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE));
7283 * Add this one to the COMP queue.
7284 * Complete all those commands with either error
7285 * or requeue condition.
7287 sym_set_cam_status((union ccb *) csio, cam_status);
7288 sym_remque(&cp->link_ccbq);
7289 sym_insque_head(&cp->link_ccbq, &np->comp_ccbq);
7290 sym_flush_comp_queue(np, 0);
7294 * Complete execution of a successful SCSI command.
7296 * Only successful commands go to the DONE queue,
7297 * since we need to have the SCRIPTS processor
7298 * stopped on any error condition.
7299 * The SCRIPTS processor is running while we are
7300 * completing successful commands.
7302 static void sym_complete_ok (hcb_p np, ccb_p cp)
7304 struct ccb_scsiio *csio;
7308 SYM_LOCK_ASSERT(MA_OWNED);
7311 * Paranoid check. :)
7313 if (!cp || !cp->cam_ccb)
7315 assert (cp->host_status == HS_COMPLETE);
7318 * Get command, target and lun pointers.
7320 csio = &cp->cam_ccb->csio;
7321 tp = &np->target[cp->target];
7322 lp = sym_lp(np, tp, cp->lun);
7325 * Assume device discovered on first success.
7328 sym_set_bit(tp->lun_map, cp->lun);
7331 * If all data have been transferred, given than no
7332 * extended error did occur, there is no residual.
7335 if (cp->phys.head.lastp != cp->phys.head.goalp)
7336 csio->resid = sym_compute_residual(np, cp);
7339 * Wrong transfer residuals may be worse than just always
7340 * returning zero. User can disable this feature from
7341 * sym_conf.h. Residual support is enabled by default.
7343 if (!SYM_CONF_RESIDUAL_SUPPORT)
7347 * Synchronize DMA map if needed.
7349 if (cp->dmamapped) {
7350 bus_dmamap_sync(np->data_dmat, cp->dmamap,
7351 (cp->dmamapped == SYM_DMA_READ ?
7352 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE));
7355 * Set status and complete the command.
7357 csio->scsi_status = cp->ssss_status;
7358 sym_set_cam_status((union ccb *) csio, CAM_REQ_CMP);
7359 sym_xpt_done(np, (union ccb *) csio, cp);
7360 sym_free_ccb(np, cp);
7364 * Our callout handler
7366 static void sym_callout(void *arg)
7368 union ccb *ccb = (union ccb *) arg;
7369 hcb_p np = ccb->ccb_h.sym_hcb_ptr;
7372 * Check that the CAM CCB is still queued.
7379 switch(ccb->ccb_h.func_code) {
7381 (void) sym_abort_scsiio(np, ccb, 1);
7393 static int sym_abort_scsiio(hcb_p np, union ccb *ccb, int timed_out)
7398 SYM_LOCK_ASSERT(MA_OWNED);
7401 * Look up our CCB control block.
7404 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
7405 ccb_p cp2 = sym_que_entry(qp, struct sym_ccb, link_ccbq);
7406 if (cp2->cam_ccb == ccb) {
7411 if (!cp || cp->host_status == HS_WAIT)
7415 * If a previous abort didn't succeed in time,
7416 * perform a BUS reset.
7419 sym_reset_scsi_bus(np, 1);
7424 * Mark the CCB for abort and allow time for.
7426 cp->to_abort = timed_out ? 2 : 1;
7427 callout_reset(&cp->ch, 10 * hz, sym_callout, (caddr_t) ccb);
7430 * Tell the SCRIPTS processor to stop and synchronize with us.
7432 np->istat_sem = SEM;
7433 OUTB (nc_istat, SIGP|SEM);
7438 * Reset a SCSI device (all LUNs of a target).
7440 static void sym_reset_dev(hcb_p np, union ccb *ccb)
7443 struct ccb_hdr *ccb_h = &ccb->ccb_h;
7445 SYM_LOCK_ASSERT(MA_OWNED);
7447 if (ccb_h->target_id == np->myaddr ||
7448 ccb_h->target_id >= SYM_CONF_MAX_TARGET ||
7449 ccb_h->target_lun >= SYM_CONF_MAX_LUN) {
7450 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7454 tp = &np->target[ccb_h->target_id];
7457 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
7459 np->istat_sem = SEM;
7460 OUTB (nc_istat, SIGP|SEM);
7464 * SIM action entry point.
7466 static void sym_action(struct cam_sim *sim, union ccb *ccb)
7473 u_char idmsg, *msgptr;
7475 struct ccb_scsiio *csio;
7476 struct ccb_hdr *ccb_h;
7478 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("sym_action\n"));
7481 * Retrieve our controller data structure.
7483 np = (hcb_p) cam_sim_softc(sim);
7485 SYM_LOCK_ASSERT(MA_OWNED);
7488 * The common case is SCSI IO.
7489 * We deal with other ones elsewhere.
7491 if (ccb->ccb_h.func_code != XPT_SCSI_IO) {
7492 sym_action2(sim, ccb);
7496 ccb_h = &csio->ccb_h;
7499 * Work around races.
7501 if ((ccb_h->status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
7507 * Minimal checkings, so that we will not
7508 * go outside our tables.
7510 if (ccb_h->target_id == np->myaddr ||
7511 ccb_h->target_id >= SYM_CONF_MAX_TARGET ||
7512 ccb_h->target_lun >= SYM_CONF_MAX_LUN) {
7513 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7518 * Retreive the target and lun descriptors.
7520 tp = &np->target[ccb_h->target_id];
7521 lp = sym_lp(np, tp, ccb_h->target_lun);
7524 * Complete the 1st INQUIRY command with error
7525 * condition if the device is flagged NOSCAN
7526 * at BOOT in the NVRAM. This may speed up
7527 * the boot and maintain coherency with BIOS
7528 * device numbering. Clearing the flag allows
7529 * user to rescan skipped devices later.
7530 * We also return error for devices not flagged
7531 * for SCAN LUNS in the NVRAM since some mono-lun
7532 * devices behave badly when asked for some non
7533 * zero LUN. Btw, this is an absolute hack.:-)
7535 if (!(ccb_h->flags & CAM_CDB_PHYS) &&
7536 (0x12 == ((ccb_h->flags & CAM_CDB_POINTER) ?
7537 csio->cdb_io.cdb_ptr[0] : csio->cdb_io.cdb_bytes[0]))) {
7538 if ((tp->usrflags & SYM_SCAN_BOOT_DISABLED) ||
7539 ((tp->usrflags & SYM_SCAN_LUNS_DISABLED) &&
7540 ccb_h->target_lun != 0)) {
7541 tp->usrflags &= ~SYM_SCAN_BOOT_DISABLED;
7542 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7548 * Get a control block for this IO.
7550 tmp = ((ccb_h->flags & CAM_TAG_ACTION_VALID) != 0);
7551 cp = sym_get_ccb(np, ccb_h->target_id, ccb_h->target_lun, tmp);
7553 sym_xpt_done2(np, ccb, CAM_RESRC_UNAVAIL);
7558 * Keep track of the IO in our CCB.
7563 * Build the IDENTIFY message.
7565 idmsg = M_IDENTIFY | cp->lun;
7566 if (cp->tag != NO_TAG || (lp && (lp->current_flags & SYM_DISC_ENABLED)))
7569 msgptr = cp->scsi_smsg;
7571 msgptr[msglen++] = idmsg;
7574 * Build the tag message if present.
7576 if (cp->tag != NO_TAG) {
7577 u_char order = csio->tag_action;
7585 order = M_SIMPLE_TAG;
7587 msgptr[msglen++] = order;
7590 * For less than 128 tags, actual tags are numbered
7591 * 1,3,5,..2*MAXTAGS+1,since we may have to deal
7592 * with devices that have problems with #TAG 0 or too
7593 * great #TAG numbers. For more tags (up to 256),
7594 * we use directly our tag number.
7596 #if SYM_CONF_MAX_TASK > (512/4)
7597 msgptr[msglen++] = cp->tag;
7599 msgptr[msglen++] = (cp->tag << 1) + 1;
7604 * Build a negotiation message if needed.
7605 * (nego_status is filled by sym_prepare_nego())
7607 cp->nego_status = 0;
7608 if (tp->tinfo.current.width != tp->tinfo.goal.width ||
7609 tp->tinfo.current.period != tp->tinfo.goal.period ||
7610 tp->tinfo.current.offset != tp->tinfo.goal.offset ||
7611 tp->tinfo.current.options != tp->tinfo.goal.options) {
7612 if (!tp->nego_cp && lp)
7613 msglen += sym_prepare_nego(np, cp, 0, msgptr + msglen);
7623 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, select));
7624 cp->phys.head.go.restart = cpu_to_scr(SCRIPTA_BA (np, resel_dsa));
7629 cp->phys.select.sel_id = cp->target;
7630 cp->phys.select.sel_scntl3 = tp->head.wval;
7631 cp->phys.select.sel_sxfer = tp->head.sval;
7632 cp->phys.select.sel_scntl4 = tp->head.uval;
7637 cp->phys.smsg.addr = cpu_to_scr(CCB_BA (cp, scsi_smsg));
7638 cp->phys.smsg.size = cpu_to_scr(msglen);
7643 if (sym_setup_cdb(np, csio, cp) < 0) {
7644 sym_xpt_done(np, ccb, cp);
7645 sym_free_ccb(np, cp);
7652 #if 0 /* Provision */
7653 cp->actualquirks = tp->quirks;
7655 cp->actualquirks = SYM_QUIRK_AUTOSAVE;
7656 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
7657 cp->ssss_status = S_ILLEGAL;
7658 cp->xerr_status = 0;
7660 cp->extra_bytes = 0;
7663 * extreme data pointer.
7664 * shall be positive, so -1 is lower than lowest.:)
7670 * Build the data descriptor block
7673 sym_setup_data_and_start(np, csio, cp);
7677 * Setup buffers and pointers that address the CDB.
7678 * I bet, physical CDBs will never be used on the planet,
7679 * since they can be bounced without significant overhead.
7681 static int sym_setup_cdb(hcb_p np, struct ccb_scsiio *csio, ccb_p cp)
7683 struct ccb_hdr *ccb_h;
7687 SYM_LOCK_ASSERT(MA_OWNED);
7689 ccb_h = &csio->ccb_h;
7692 * CDB is 16 bytes max.
7694 if (csio->cdb_len > sizeof(cp->cdb_buf)) {
7695 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
7698 cmd_len = csio->cdb_len;
7700 if (ccb_h->flags & CAM_CDB_POINTER) {
7701 /* CDB is a pointer */
7702 if (!(ccb_h->flags & CAM_CDB_PHYS)) {
7703 /* CDB pointer is virtual */
7704 bcopy(csio->cdb_io.cdb_ptr, cp->cdb_buf, cmd_len);
7705 cmd_ba = CCB_BA (cp, cdb_buf[0]);
7707 /* CDB pointer is physical */
7709 cmd_ba = ((u32)csio->cdb_io.cdb_ptr) & 0xffffffff;
7711 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
7716 /* CDB is in the CAM ccb (buffer) */
7717 bcopy(csio->cdb_io.cdb_bytes, cp->cdb_buf, cmd_len);
7718 cmd_ba = CCB_BA (cp, cdb_buf[0]);
7721 cp->phys.cmd.addr = cpu_to_scr(cmd_ba);
7722 cp->phys.cmd.size = cpu_to_scr(cmd_len);
7728 * Set up data pointers used by SCRIPTS.
7730 static void __inline
7731 sym_setup_data_pointers(hcb_p np, ccb_p cp, int dir)
7735 SYM_LOCK_ASSERT(MA_OWNED);
7738 * No segments means no data.
7744 * Set the data pointer.
7748 goalp = SCRIPTA_BA (np, data_out2) + 8;
7749 lastp = goalp - 8 - (cp->segments * (2*4));
7752 cp->host_flags |= HF_DATA_IN;
7753 goalp = SCRIPTA_BA (np, data_in2) + 8;
7754 lastp = goalp - 8 - (cp->segments * (2*4));
7758 lastp = goalp = SCRIPTB_BA (np, no_data);
7762 cp->phys.head.lastp = cpu_to_scr(lastp);
7763 cp->phys.head.goalp = cpu_to_scr(goalp);
7764 cp->phys.head.savep = cpu_to_scr(lastp);
7765 cp->startp = cp->phys.head.savep;
7770 * Call back routine for the DMA map service.
7771 * If bounce buffers are used (why ?), we may sleep and then
7772 * be called there in another context.
7775 sym_execute_ccb(void *arg, bus_dma_segment_t *psegs, int nsegs, int error)
7783 np = (hcb_p) cp->arg;
7785 SYM_LOCK_ASSERT(MA_OWNED);
7788 * Deal with weird races.
7790 if (sym_get_cam_status(ccb) != CAM_REQ_INPROG)
7794 * Deal with weird errors.
7798 sym_set_cam_status(cp->cam_ccb, CAM_REQ_ABORTED);
7803 * Build the data descriptor for the chip.
7807 /* 896 rev 1 requires to be careful about boundaries */
7808 if (np->device_id == PCI_ID_SYM53C896 && np->revision_id <= 1)
7809 retv = sym_scatter_sg_physical(np, cp, psegs, nsegs);
7811 retv = sym_fast_scatter_sg_physical(np,cp, psegs,nsegs);
7813 sym_set_cam_status(cp->cam_ccb, CAM_REQ_TOO_BIG);
7819 * Synchronize the DMA map only if we have
7820 * actually mapped the data.
7822 if (cp->dmamapped) {
7823 bus_dmamap_sync(np->data_dmat, cp->dmamap,
7824 (cp->dmamapped == SYM_DMA_READ ?
7825 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE));
7829 * Set host status to busy state.
7830 * May have been set back to HS_WAIT to avoid a race.
7832 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
7835 * Set data pointers.
7837 sym_setup_data_pointers(np, cp, (ccb->ccb_h.flags & CAM_DIR_MASK));
7840 * Enqueue this IO in our pending queue.
7842 sym_enqueue_cam_ccb(cp);
7845 * When `#ifed 1', the code below makes the driver
7846 * panic on the first attempt to write to a SCSI device.
7847 * It is the first test we want to do after a driver
7848 * change that does not seem obviously safe. :)
7851 switch (cp->cdb_buf[0]) {
7852 case 0x0A: case 0x2A: case 0xAA:
7853 panic("XXXXXXXXXXXXX WRITE NOT YET ALLOWED XXXXXXXXXXXXXX\n");
7861 * Activate this job.
7863 sym_put_start_queue(np, cp);
7866 sym_xpt_done(np, ccb, cp);
7867 sym_free_ccb(np, cp);
7871 * How complex it gets to deal with the data in CAM.
7872 * The Bus Dma stuff makes things still more complex.
7875 sym_setup_data_and_start(hcb_p np, struct ccb_scsiio *csio, ccb_p cp)
7877 struct ccb_hdr *ccb_h;
7880 SYM_LOCK_ASSERT(MA_OWNED);
7882 ccb_h = &csio->ccb_h;
7885 * Now deal with the data.
7887 cp->data_len = csio->dxfer_len;
7891 * No direction means no data.
7893 dir = (ccb_h->flags & CAM_DIR_MASK);
7894 if (dir == CAM_DIR_NONE) {
7895 sym_execute_ccb(cp, NULL, 0, 0);
7899 if (!(ccb_h->flags & CAM_SCATTER_VALID)) {
7901 if (!(ccb_h->flags & CAM_DATA_PHYS)) {
7902 /* Buffer is virtual */
7903 cp->dmamapped = (dir == CAM_DIR_IN) ?
7904 SYM_DMA_READ : SYM_DMA_WRITE;
7905 retv = bus_dmamap_load(np->data_dmat, cp->dmamap,
7906 csio->data_ptr, csio->dxfer_len,
7907 sym_execute_ccb, cp, 0);
7908 if (retv == EINPROGRESS) {
7909 cp->host_status = HS_WAIT;
7910 xpt_freeze_simq(np->sim, 1);
7911 csio->ccb_h.status |= CAM_RELEASE_SIMQ;
7914 /* Buffer is physical */
7915 struct bus_dma_segment seg;
7917 seg.ds_addr = (bus_addr_t) csio->data_ptr;
7918 sym_execute_ccb(cp, &seg, 1, 0);
7921 /* Scatter/gather list */
7922 struct bus_dma_segment *segs;
7924 if ((ccb_h->flags & CAM_SG_LIST_PHYS) != 0) {
7925 /* The SG list pointer is physical */
7926 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
7930 if (!(ccb_h->flags & CAM_DATA_PHYS)) {
7931 /* SG buffer pointers are virtual */
7932 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
7936 /* SG buffer pointers are physical */
7937 segs = (struct bus_dma_segment *)csio->data_ptr;
7938 sym_execute_ccb(cp, segs, csio->sglist_cnt, 0);
7942 sym_xpt_done(np, (union ccb *) csio, cp);
7943 sym_free_ccb(np, cp);
7947 * Move the scatter list to our data block.
7950 sym_fast_scatter_sg_physical(hcb_p np, ccb_p cp,
7951 bus_dma_segment_t *psegs, int nsegs)
7953 struct sym_tblmove *data;
7954 bus_dma_segment_t *psegs2;
7956 SYM_LOCK_ASSERT(MA_OWNED);
7958 if (nsegs > SYM_CONF_MAX_SG)
7961 data = &cp->phys.data[SYM_CONF_MAX_SG-1];
7962 psegs2 = &psegs[nsegs-1];
7963 cp->segments = nsegs;
7966 data->addr = cpu_to_scr(psegs2->ds_addr);
7967 data->size = cpu_to_scr(psegs2->ds_len);
7968 if (DEBUG_FLAGS & DEBUG_SCATTER) {
7969 printf ("%s scatter: paddr=%lx len=%ld\n",
7970 sym_name(np), (long) psegs2->ds_addr,
7971 (long) psegs2->ds_len);
7973 if (psegs2 != psegs) {
7985 * Scatter a SG list with physical addresses into bus addressable chunks.
7986 * We need to ensure 16MB boundaries not to be crossed during DMA of
7987 * each segment, due to some chips being flawed.
7989 #define BOUND_MASK ((1UL<<24)-1)
7991 sym_scatter_sg_physical(hcb_p np, ccb_p cp, bus_dma_segment_t *psegs, int nsegs)
7997 SYM_LOCK_ASSERT(MA_OWNED);
7999 s = SYM_CONF_MAX_SG - 1;
8001 ps = psegs[t].ds_addr;
8002 pe = ps + psegs[t].ds_len;
8005 pn = (pe - 1) & ~BOUND_MASK;
8009 if (DEBUG_FLAGS & DEBUG_SCATTER) {
8010 printf ("%s scatter: paddr=%lx len=%ld\n",
8011 sym_name(np), pn, k);
8013 cp->phys.data[s].addr = cpu_to_scr(pn);
8014 cp->phys.data[s].size = cpu_to_scr(k);
8019 ps = psegs[t].ds_addr;
8020 pe = ps + psegs[t].ds_len;
8026 cp->segments = SYM_CONF_MAX_SG - 1 - s;
8028 return t >= 0 ? -1 : 0;
8033 * SIM action for non performance critical stuff.
8035 static void sym_action2(struct cam_sim *sim, union ccb *ccb)
8040 struct ccb_hdr *ccb_h;
8043 * Retrieve our controller data structure.
8045 np = (hcb_p) cam_sim_softc(sim);
8047 SYM_LOCK_ASSERT(MA_OWNED);
8049 ccb_h = &ccb->ccb_h;
8051 switch (ccb_h->func_code) {
8052 case XPT_SET_TRAN_SETTINGS:
8054 struct ccb_trans_settings *cts;
8057 tp = &np->target[ccb_h->target_id];
8060 * Update SPI transport settings in TARGET control block.
8061 * Update SCSI device settings in LUN control block.
8063 lp = sym_lp(np, tp, ccb_h->target_lun);
8064 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
8065 sym_update_trans(np, tp, &tp->tinfo.goal, cts);
8067 sym_update_dflags(np, &lp->current_flags, cts);
8069 if (cts->type == CTS_TYPE_USER_SETTINGS) {
8070 sym_update_trans(np, tp, &tp->tinfo.user, cts);
8072 sym_update_dflags(np, &lp->user_flags, cts);
8075 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8078 case XPT_GET_TRAN_SETTINGS:
8080 struct ccb_trans_settings *cts;
8081 struct sym_trans *tip;
8085 tp = &np->target[ccb_h->target_id];
8086 lp = sym_lp(np, tp, ccb_h->target_lun);
8088 #define cts__scsi (&cts->proto_specific.scsi)
8089 #define cts__spi (&cts->xport_specific.spi)
8090 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
8091 tip = &tp->tinfo.current;
8092 dflags = lp ? lp->current_flags : 0;
8095 tip = &tp->tinfo.user;
8096 dflags = lp ? lp->user_flags : tp->usrflags;
8099 cts->protocol = PROTO_SCSI;
8100 cts->transport = XPORT_SPI;
8101 cts->protocol_version = tip->scsi_version;
8102 cts->transport_version = tip->spi_version;
8104 cts__spi->sync_period = tip->period;
8105 cts__spi->sync_offset = tip->offset;
8106 cts__spi->bus_width = tip->width;
8107 cts__spi->ppr_options = tip->options;
8109 cts__spi->valid = CTS_SPI_VALID_SYNC_RATE
8110 | CTS_SPI_VALID_SYNC_OFFSET
8111 | CTS_SPI_VALID_BUS_WIDTH
8112 | CTS_SPI_VALID_PPR_OPTIONS;
8114 cts__spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB;
8115 if (dflags & SYM_DISC_ENABLED)
8116 cts__spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
8117 cts__spi->valid |= CTS_SPI_VALID_DISC;
8119 cts__scsi->flags &= ~CTS_SCSI_FLAGS_TAG_ENB;
8120 if (dflags & SYM_TAGS_ENABLED)
8121 cts__scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
8122 cts__scsi->valid |= CTS_SCSI_VALID_TQ;
8125 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8128 case XPT_CALC_GEOMETRY:
8130 cam_calc_geometry(&ccb->ccg, /*extended*/1);
8131 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8136 struct ccb_pathinq *cpi = &ccb->cpi;
8137 cpi->version_num = 1;
8138 cpi->hba_inquiry = PI_MDP_ABLE|PI_SDTR_ABLE|PI_TAG_ABLE;
8139 if ((np->features & FE_WIDE) != 0)
8140 cpi->hba_inquiry |= PI_WIDE_16;
8141 cpi->target_sprt = 0;
8143 if (np->usrflags & SYM_SCAN_TARGETS_HILO)
8144 cpi->hba_misc |= PIM_SCANHILO;
8145 if (np->usrflags & SYM_AVOID_BUS_RESET)
8146 cpi->hba_misc |= PIM_NOBUSRESET;
8147 cpi->hba_eng_cnt = 0;
8148 cpi->max_target = (np->features & FE_WIDE) ? 15 : 7;
8149 /* Semantic problem:)LUN number max = max number of LUNs - 1 */
8150 cpi->max_lun = SYM_CONF_MAX_LUN-1;
8151 if (SYM_SETUP_MAX_LUN < SYM_CONF_MAX_LUN)
8152 cpi->max_lun = SYM_SETUP_MAX_LUN-1;
8153 cpi->bus_id = cam_sim_bus(sim);
8154 cpi->initiator_id = np->myaddr;
8155 cpi->base_transfer_speed = 3300;
8156 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
8157 strncpy(cpi->hba_vid, "Symbios", HBA_IDLEN);
8158 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
8159 cpi->unit_number = cam_sim_unit(sim);
8161 cpi->protocol = PROTO_SCSI;
8162 cpi->protocol_version = SCSI_REV_2;
8163 cpi->transport = XPORT_SPI;
8164 cpi->transport_version = 2;
8165 cpi->xport_specific.spi.ppr_options = SID_SPI_CLOCK_ST;
8166 if (np->features & FE_ULTRA3) {
8167 cpi->transport_version = 3;
8168 cpi->xport_specific.spi.ppr_options =
8169 SID_SPI_CLOCK_DT_ST;
8171 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8176 union ccb *abort_ccb = ccb->cab.abort_ccb;
8177 switch(abort_ccb->ccb_h.func_code) {
8179 if (sym_abort_scsiio(np, abort_ccb, 0) == 0) {
8180 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8184 sym_xpt_done2(np, ccb, CAM_UA_ABORT);
8191 sym_reset_dev(np, ccb);
8196 sym_reset_scsi_bus(np, 0);
8198 xpt_print_path(np->path);
8199 printf("SCSI BUS reset delivered.\n");
8202 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8205 case XPT_ACCEPT_TARGET_IO:
8206 case XPT_CONT_TARGET_IO:
8208 case XPT_NOTIFY_ACK:
8209 case XPT_IMMED_NOTIFY:
8212 sym_xpt_done2(np, ccb, CAM_REQ_INVALID);
8218 * Asynchronous notification handler.
8221 sym_async(void *cb_arg, u32 code, struct cam_path *path, void *arg)
8224 struct cam_sim *sim;
8228 sim = (struct cam_sim *) cb_arg;
8229 np = (hcb_p) cam_sim_softc(sim);
8231 SYM_LOCK_ASSERT(MA_OWNED);
8234 case AC_LOST_DEVICE:
8235 tn = xpt_path_target_id(path);
8236 if (tn >= SYM_CONF_MAX_TARGET)
8239 tp = &np->target[tn];
8243 tp->head.wval = np->rv_scntl3;
8246 tp->tinfo.current.period = tp->tinfo.goal.period = 0;
8247 tp->tinfo.current.offset = tp->tinfo.goal.offset = 0;
8248 tp->tinfo.current.width = tp->tinfo.goal.width = BUS_8_BIT;
8249 tp->tinfo.current.options = tp->tinfo.goal.options = 0;
8258 * Update transfer settings of a target.
8260 static void sym_update_trans(hcb_p np, tcb_p tp, struct sym_trans *tip,
8261 struct ccb_trans_settings *cts)
8263 SYM_LOCK_ASSERT(MA_OWNED);
8268 #define cts__spi (&cts->xport_specific.spi)
8269 if ((cts__spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0)
8270 tip->width = cts__spi->bus_width;
8271 if ((cts__spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)
8272 tip->offset = cts__spi->sync_offset;
8273 if ((cts__spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0)
8274 tip->period = cts__spi->sync_period;
8275 if ((cts__spi->valid & CTS_SPI_VALID_PPR_OPTIONS) != 0)
8276 tip->options = (cts__spi->ppr_options & PPR_OPT_DT);
8277 if (cts->protocol_version != PROTO_VERSION_UNSPECIFIED &&
8278 cts->protocol_version != PROTO_VERSION_UNKNOWN)
8279 tip->scsi_version = cts->protocol_version;
8280 if (cts->transport_version != XPORT_VERSION_UNSPECIFIED &&
8281 cts->transport_version != XPORT_VERSION_UNKNOWN)
8282 tip->spi_version = cts->transport_version;
8285 * Scale against driver configuration limits.
8287 if (tip->width > SYM_SETUP_MAX_WIDE) tip->width = SYM_SETUP_MAX_WIDE;
8288 if (tip->offset > SYM_SETUP_MAX_OFFS) tip->offset = SYM_SETUP_MAX_OFFS;
8289 if (tip->period < SYM_SETUP_MIN_SYNC) tip->period = SYM_SETUP_MIN_SYNC;
8292 * Scale against actual controller BUS width.
8294 if (tip->width > np->maxwide)
8295 tip->width = np->maxwide;
8298 * Only accept DT if controller supports and SYNC/WIDE asked.
8300 if (!((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) ||
8301 !(tip->width == BUS_16_BIT && tip->offset)) {
8302 tip->options &= ~PPR_OPT_DT;
8306 * Scale period factor and offset against controller limits.
8308 if (tip->options & PPR_OPT_DT) {
8309 if (tip->period < np->minsync_dt)
8310 tip->period = np->minsync_dt;
8311 if (tip->period > np->maxsync_dt)
8312 tip->period = np->maxsync_dt;
8313 if (tip->offset > np->maxoffs_dt)
8314 tip->offset = np->maxoffs_dt;
8317 if (tip->period < np->minsync)
8318 tip->period = np->minsync;
8319 if (tip->period > np->maxsync)
8320 tip->period = np->maxsync;
8321 if (tip->offset > np->maxoffs)
8322 tip->offset = np->maxoffs;
8327 * Update flags for a device (logical unit).
8330 sym_update_dflags(hcb_p np, u_char *flags, struct ccb_trans_settings *cts)
8332 SYM_LOCK_ASSERT(MA_OWNED);
8334 #define cts__scsi (&cts->proto_specific.scsi)
8335 #define cts__spi (&cts->xport_specific.spi)
8336 if ((cts__spi->valid & CTS_SPI_VALID_DISC) != 0) {
8337 if ((cts__spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0)
8338 *flags |= SYM_DISC_ENABLED;
8340 *flags &= ~SYM_DISC_ENABLED;
8343 if ((cts__scsi->valid & CTS_SCSI_VALID_TQ) != 0) {
8344 if ((cts__scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0)
8345 *flags |= SYM_TAGS_ENABLED;
8347 *flags &= ~SYM_TAGS_ENABLED;
8354 /*============= DRIVER INITIALISATION ==================*/
8357 static device_method_t sym_pci_methods[] = {
8358 DEVMETHOD(device_probe, sym_pci_probe),
8359 DEVMETHOD(device_attach, sym_pci_attach),
8363 static driver_t sym_pci_driver = {
8369 static devclass_t sym_devclass;
8371 DRIVER_MODULE(sym, pci, sym_pci_driver, sym_devclass, 0, 0);
8372 MODULE_DEPEND(sym, cam, 1, 1, 1);
8373 MODULE_DEPEND(sym, pci, 1, 1, 1);
8376 static const struct sym_pci_chip sym_pci_dev_table[] = {
8377 {PCI_ID_SYM53C810, 0x0f, "810", 4, 8, 4, 64,
8380 #ifdef SYM_DEBUG_GENERIC_SUPPORT
8381 {PCI_ID_SYM53C810, 0xff, "810a", 4, 8, 4, 1,
8385 {PCI_ID_SYM53C810, 0xff, "810a", 4, 8, 4, 1,
8386 FE_CACHE_SET|FE_LDSTR|FE_PFEN|FE_BOF}
8389 {PCI_ID_SYM53C815, 0xff, "815", 4, 8, 4, 64,
8392 {PCI_ID_SYM53C825, 0x0f, "825", 6, 8, 4, 64,
8393 FE_WIDE|FE_BOF|FE_ERL|FE_DIFF}
8395 {PCI_ID_SYM53C825, 0xff, "825a", 6, 8, 4, 2,
8396 FE_WIDE|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM|FE_DIFF}
8398 {PCI_ID_SYM53C860, 0xff, "860", 4, 8, 5, 1,
8399 FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_BOF|FE_LDSTR|FE_PFEN}
8401 {PCI_ID_SYM53C875, 0x01, "875", 6, 16, 5, 2,
8402 FE_WIDE|FE_ULTRA|FE_CLK80|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8405 {PCI_ID_SYM53C875, 0xff, "875", 6, 16, 5, 2,
8406 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8409 {PCI_ID_SYM53C875_2, 0xff, "875", 6, 16, 5, 2,
8410 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8413 {PCI_ID_SYM53C885, 0xff, "885", 6, 16, 5, 2,
8414 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8417 #ifdef SYM_DEBUG_GENERIC_SUPPORT
8418 {PCI_ID_SYM53C895, 0xff, "895", 6, 31, 7, 2,
8419 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|
8423 {PCI_ID_SYM53C895, 0xff, "895", 6, 31, 7, 2,
8424 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8428 {PCI_ID_SYM53C896, 0xff, "896", 6, 31, 7, 4,
8429 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8430 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
8432 {PCI_ID_SYM53C895A, 0xff, "895a", 6, 31, 7, 4,
8433 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8434 FE_RAM|FE_RAM8K|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
8436 {PCI_ID_LSI53C1010, 0x00, "1010-33", 6, 31, 7, 8,
8437 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8438 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
8441 {PCI_ID_LSI53C1010, 0xff, "1010-33", 6, 31, 7, 8,
8442 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8443 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
8446 {PCI_ID_LSI53C1010_2, 0xff, "1010-66", 6, 31, 7, 8,
8447 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8448 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_66MHZ|FE_CRC|
8451 {PCI_ID_LSI53C1510D, 0xff, "1510d", 6, 31, 7, 4,
8452 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8453 FE_RAM|FE_IO256|FE_LEDC}
8456 #define sym_pci_num_devs \
8457 (sizeof(sym_pci_dev_table) / sizeof(sym_pci_dev_table[0]))
8460 * Look up the chip table.
8462 * Return a pointer to the chip entry if found,
8465 static const struct sym_pci_chip *
8466 sym_find_pci_chip(device_t dev)
8468 const struct sym_pci_chip *chip;
8473 if (pci_get_vendor(dev) != PCI_VENDOR_NCR)
8476 device_id = pci_get_device(dev);
8477 revision = pci_get_revid(dev);
8479 for (i = 0; i < sym_pci_num_devs; i++) {
8480 chip = &sym_pci_dev_table[i];
8481 if (device_id != chip->device_id)
8483 if (revision > chip->revision_id)
8492 * Tell upper layer if the chip is supported.
8495 sym_pci_probe(device_t dev)
8497 const struct sym_pci_chip *chip;
8499 chip = sym_find_pci_chip(dev);
8500 if (chip && sym_find_firmware(chip)) {
8501 device_set_desc(dev, chip->name);
8502 return (chip->lp_probe_bit & SYM_SETUP_LP_PROBE_MAP)?
8503 BUS_PROBE_LOW_PRIORITY : BUS_PROBE_DEFAULT;
8509 * Attach a sym53c8xx device.
8512 sym_pci_attach(device_t dev)
8514 const struct sym_pci_chip *chip;
8517 struct sym_hcb *np = NULL;
8518 struct sym_nvram nvram;
8519 const struct sym_fw *fw = NULL;
8521 bus_dma_tag_t bus_dmat;
8523 bus_dmat = bus_get_dma_tag(dev);
8526 * Only probed devices should be attached.
8527 * We just enjoy being paranoid. :)
8529 chip = sym_find_pci_chip(dev);
8530 if (chip == NULL || (fw = sym_find_firmware(chip)) == NULL)
8534 * Allocate immediately the host control block,
8535 * since we are only expecting to succeed. :)
8536 * We keep track in the HCB of all the resources that
8537 * are to be released on error.
8539 np = __sym_calloc_dma(bus_dmat, sizeof(*np), "HCB");
8541 np->bus_dmat = bus_dmat;
8544 device_set_softc(dev, np);
8549 * Copy some useful infos to the HCB.
8551 np->hcb_ba = vtobus(np);
8552 np->verbose = bootverbose;
8554 np->device_id = pci_get_device(dev);
8555 np->revision_id = pci_get_revid(dev);
8556 np->features = chip->features;
8557 np->clock_divn = chip->nr_divisor;
8558 np->maxoffs = chip->offset_max;
8559 np->maxburst = chip->burst_max;
8560 np->scripta_sz = fw->a_size;
8561 np->scriptb_sz = fw->b_size;
8562 np->fw_setup = fw->setup;
8563 np->fw_patch = fw->patch;
8564 np->fw_name = fw->name;
8567 np->target = sym_calloc_dma(SYM_CONF_MAX_TARGET * sizeof(*(np->target)),
8574 * Initialize the CCB free and busy queues.
8576 sym_que_init(&np->free_ccbq);
8577 sym_que_init(&np->busy_ccbq);
8578 sym_que_init(&np->comp_ccbq);
8579 sym_que_init(&np->cam_ccbq);
8582 * Allocate a tag for the DMA of user data.
8584 if (bus_dma_tag_create(np->bus_dmat, 1, (1<<24),
8585 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
8587 BUS_SPACE_MAXSIZE, SYM_CONF_MAX_SG,
8588 (1<<24), 0, busdma_lock_mutex, &np->mtx,
8590 device_printf(dev, "failed to create DMA tag.\n");
8594 * Read and apply some fix-ups to the PCI COMMAND
8595 * register. We want the chip to be enabled for:
8597 * - PCI parity checking (reporting would also be fine)
8598 * - Write And Invalidate.
8600 command = pci_read_config(dev, PCIR_COMMAND, 2);
8601 command |= PCIM_CMD_BUSMASTEREN;
8602 command |= PCIM_CMD_PERRESPEN;
8603 command |= /* PCIM_CMD_MWIEN */ 0x0010;
8604 pci_write_config(dev, PCIR_COMMAND, command, 2);
8607 * Let the device know about the cache line size,
8608 * if it doesn't yet.
8610 cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
8613 pci_write_config(dev, PCIR_CACHELNSZ, cachelnsz, 1);
8617 * Alloc/get/map/retrieve everything that deals with MMIO.
8619 if ((command & PCIM_CMD_MEMEN) != 0) {
8620 int regs_id = SYM_PCI_MMIO;
8621 np->mmio_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
8622 ®s_id, RF_ACTIVE);
8624 if (!np->mmio_res) {
8625 device_printf(dev, "failed to allocate MMIO resources\n");
8628 np->mmio_ba = rman_get_start(np->mmio_res);
8634 np->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i,
8635 RF_ACTIVE | RF_SHAREABLE);
8637 device_printf(dev, "failed to allocate IRQ resource\n");
8641 #ifdef SYM_CONF_IOMAPPED
8643 * User want us to use normal IO with PCI.
8644 * Alloc/get/map/retrieve everything that deals with IO.
8646 if ((command & PCI_COMMAND_IO_ENABLE) != 0) {
8647 int regs_id = SYM_PCI_IO;
8648 np->io_res = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
8649 ®s_id, RF_ACTIVE);
8652 device_printf(dev, "failed to allocate IO resources\n");
8656 #endif /* SYM_CONF_IOMAPPED */
8659 * If the chip has RAM.
8660 * Alloc/get/map/retrieve the corresponding resources.
8662 if ((np->features & (FE_RAM|FE_RAM8K)) &&
8663 (command & PCIM_CMD_MEMEN) != 0) {
8664 int regs_id = SYM_PCI_RAM;
8665 if (np->features & FE_64BIT)
8666 regs_id = SYM_PCI_RAM64;
8667 np->ram_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
8668 ®s_id, RF_ACTIVE);
8670 device_printf(dev,"failed to allocate RAM resources\n");
8673 np->ram_id = regs_id;
8674 np->ram_ba = rman_get_start(np->ram_res);
8678 * Save setting of some IO registers, so we will
8679 * be able to probe specific implementations.
8681 sym_save_initial_setting (np);
8684 * Reset the chip now, since it has been reported
8685 * that SCSI clock calibration may not work properly
8686 * if the chip is currently active.
8688 sym_chip_reset (np);
8691 * Try to read the user set-up.
8693 (void) sym_read_nvram(np, &nvram);
8696 * Prepare controller and devices settings, according
8697 * to chip features, user set-up and driver set-up.
8699 (void) sym_prepare_setting(np, &nvram);
8702 * Check the PCI clock frequency.
8703 * Must be performed after prepare_setting since it destroys
8704 * STEST1 that is used to probe for the clock doubler.
8706 i = sym_getpciclock(np);
8708 device_printf(dev, "PCI BUS clock seems too high: %u KHz.\n",i);
8711 * Allocate the start queue.
8713 np->squeue = (u32 *) sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"SQUEUE");
8716 np->squeue_ba = vtobus(np->squeue);
8719 * Allocate the done queue.
8721 np->dqueue = (u32 *) sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"DQUEUE");
8724 np->dqueue_ba = vtobus(np->dqueue);
8727 * Allocate the target bus address array.
8729 np->targtbl = (u32 *) sym_calloc_dma(256, "TARGTBL");
8732 np->targtbl_ba = vtobus(np->targtbl);
8735 * Allocate SCRIPTS areas.
8737 np->scripta0 = sym_calloc_dma(np->scripta_sz, "SCRIPTA0");
8738 np->scriptb0 = sym_calloc_dma(np->scriptb_sz, "SCRIPTB0");
8739 if (!np->scripta0 || !np->scriptb0)
8743 * Allocate the CCBs. We need at least ONE.
8745 for (i = 0; sym_alloc_ccb(np) != NULL; i++)
8751 * Calculate BUS addresses where we are going
8752 * to load the SCRIPTS.
8754 np->scripta_ba = vtobus(np->scripta0);
8755 np->scriptb_ba = vtobus(np->scriptb0);
8756 np->scriptb0_ba = np->scriptb_ba;
8759 np->scripta_ba = np->ram_ba;
8760 if (np->features & FE_RAM8K) {
8762 np->scriptb_ba = np->scripta_ba + 4096;
8764 np->scr_ram_seg = cpu_to_scr(np->scripta_ba >> 32);
8772 * Copy scripts to controller instance.
8774 bcopy(fw->a_base, np->scripta0, np->scripta_sz);
8775 bcopy(fw->b_base, np->scriptb0, np->scriptb_sz);
8778 * Setup variable parts in scripts and compute
8779 * scripts bus addresses used from the C code.
8781 np->fw_setup(np, fw);
8784 * Bind SCRIPTS with physical addresses usable by the
8785 * SCRIPTS processor (as seen from the BUS = BUS addresses).
8787 sym_fw_bind_script(np, (u32 *) np->scripta0, np->scripta_sz);
8788 sym_fw_bind_script(np, (u32 *) np->scriptb0, np->scriptb_sz);
8790 #ifdef SYM_CONF_IARB_SUPPORT
8792 * If user wants IARB to be set when we win arbitration
8793 * and have other jobs, compute the max number of consecutive
8794 * settings of IARB hints before we leave devices a chance to
8795 * arbitrate for reselection.
8797 #ifdef SYM_SETUP_IARB_MAX
8798 np->iarb_max = SYM_SETUP_IARB_MAX;
8805 * Prepare the idle and invalid task actions.
8807 np->idletask.start = cpu_to_scr(SCRIPTA_BA (np, idle));
8808 np->idletask.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
8809 np->idletask_ba = vtobus(&np->idletask);
8811 np->notask.start = cpu_to_scr(SCRIPTA_BA (np, idle));
8812 np->notask.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
8813 np->notask_ba = vtobus(&np->notask);
8815 np->bad_itl.start = cpu_to_scr(SCRIPTA_BA (np, idle));
8816 np->bad_itl.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
8817 np->bad_itl_ba = vtobus(&np->bad_itl);
8819 np->bad_itlq.start = cpu_to_scr(SCRIPTA_BA (np, idle));
8820 np->bad_itlq.restart = cpu_to_scr(SCRIPTB_BA (np,bad_i_t_l_q));
8821 np->bad_itlq_ba = vtobus(&np->bad_itlq);
8824 * Allocate and prepare the lun JUMP table that is used
8825 * for a target prior the probing of devices (bad lun table).
8826 * A private table will be allocated for the target on the
8827 * first INQUIRY response received.
8829 np->badluntbl = sym_calloc_dma(256, "BADLUNTBL");
8833 np->badlun_sa = cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
8834 for (i = 0 ; i < 64 ; i++) /* 64 luns/target, no less */
8835 np->badluntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
8838 * Prepare the bus address array that contains the bus
8839 * address of each target control block.
8840 * For now, assume all logical units are wrong. :)
8842 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
8843 np->targtbl[i] = cpu_to_scr(vtobus(&np->target[i]));
8844 np->target[i].head.luntbl_sa =
8845 cpu_to_scr(vtobus(np->badluntbl));
8846 np->target[i].head.lun0_sa =
8847 cpu_to_scr(vtobus(&np->badlun_sa));
8851 * Now check the cache handling of the pci chipset.
8853 if (sym_snooptest (np)) {
8854 device_printf(dev, "CACHE INCORRECTLY CONFIGURED.\n");
8859 * Now deal with CAM.
8860 * Hopefully, we will succeed with that one.:)
8862 if (!sym_cam_attach(np))
8866 * Sigh! we are done.
8872 * We will try to free all the resources we have
8873 * allocated, but if we are a boot device, this
8874 * will not help that much.;)
8883 * Free everything that have been allocated for this device.
8885 static void sym_pci_free(hcb_p np)
8894 * First free CAM resources.
8899 * Now every should be quiet for us to
8900 * free other resources.
8903 bus_release_resource(np->device, SYS_RES_MEMORY,
8904 np->ram_id, np->ram_res);
8906 bus_release_resource(np->device, SYS_RES_MEMORY,
8907 SYM_PCI_MMIO, np->mmio_res);
8909 bus_release_resource(np->device, SYS_RES_IOPORT,
8910 SYM_PCI_IO, np->io_res);
8912 bus_release_resource(np->device, SYS_RES_IRQ,
8916 sym_mfree_dma(np->scriptb0, np->scriptb_sz, "SCRIPTB0");
8918 sym_mfree_dma(np->scripta0, np->scripta_sz, "SCRIPTA0");
8920 sym_mfree_dma(np->squeue, sizeof(u32)*(MAX_QUEUE*2), "SQUEUE");
8922 sym_mfree_dma(np->dqueue, sizeof(u32)*(MAX_QUEUE*2), "DQUEUE");
8924 while ((qp = sym_remque_head(&np->free_ccbq)) != NULL) {
8925 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
8926 bus_dmamap_destroy(np->data_dmat, cp->dmamap);
8927 sym_mfree_dma(cp->sns_bbuf, SYM_SNS_BBUF_LEN, "SNS_BBUF");
8928 sym_mfree_dma(cp, sizeof(*cp), "CCB");
8932 sym_mfree_dma(np->badluntbl, 256,"BADLUNTBL");
8934 for (target = 0; target < SYM_CONF_MAX_TARGET ; target++) {
8935 tp = &np->target[target];
8936 for (lun = 0 ; lun < SYM_CONF_MAX_LUN ; lun++) {
8937 lp = sym_lp(np, tp, lun);
8941 sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4,
8944 sym_mfree(lp->cb_tags, SYM_CONF_MAX_TASK,
8946 sym_mfree_dma(lp, sizeof(*lp), "LCB");
8948 #if SYM_CONF_MAX_LUN > 1
8950 sym_mfree(tp->lunmp, SYM_CONF_MAX_LUN*sizeof(lcb_p),
8956 sym_mfree_dma(np->target,
8957 SYM_CONF_MAX_TARGET * sizeof(*(np->target)), "TARGET");
8960 sym_mfree_dma(np->targtbl, 256, "TARGTBL");
8962 bus_dma_tag_destroy(np->data_dmat);
8963 if (SYM_LOCK_INITIALIZED() != 0)
8965 device_set_softc(np->device, NULL);
8966 sym_mfree_dma(np, sizeof(*np), "HCB");
8970 * Allocate CAM resources and register a bus to CAM.
8972 static int sym_cam_attach(hcb_p np)
8974 struct cam_devq *devq = NULL;
8975 struct cam_sim *sim = NULL;
8976 struct cam_path *path = NULL;
8980 * Establish our interrupt handler.
8982 err = bus_setup_intr(np->device, np->irq_res,
8983 INTR_ENTROPY | INTR_MPSAFE | INTR_TYPE_CAM,
8984 NULL, sym_intr, np, &np->intr);
8986 device_printf(np->device, "bus_setup_intr() failed: %d\n",
8992 * Create the device queue for our sym SIM.
8994 devq = cam_simq_alloc(SYM_CONF_MAX_START);
8999 * Construct our SIM entry.
9001 sim = cam_sim_alloc(sym_action, sym_poll, "sym", np,
9002 device_get_unit(np->device),
9003 &np->mtx, 1, SYM_SETUP_MAX_TAG, devq);
9009 if (xpt_bus_register(sim, np->device, 0) != CAM_SUCCESS)
9013 if (xpt_create_path(&path, 0,
9014 cam_sim_path(np->sim), CAM_TARGET_WILDCARD,
9015 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
9021 * Establish our async notification handler.
9023 if (xpt_register_async(AC_LOST_DEVICE, sym_async, sim, path) !=
9028 * Start the chip now, without resetting the BUS, since
9029 * it seems that this must stay under control of CAM.
9030 * With LVD/SE capable chips and BUS in SE mode, we may
9031 * get a spurious SMBC interrupt.
9040 cam_sim_free(sim, FALSE);
9042 cam_simq_free(devq);
9052 * Free everything that deals with CAM.
9054 static void sym_cam_free(hcb_p np)
9056 SYM_LOCK_ASSERT(MA_NOTOWNED);
9059 bus_teardown_intr(np->device, np->irq_res, np->intr);
9066 xpt_bus_deregister(cam_sim_path(np->sim));
9067 cam_sim_free(np->sim, /*free_devq*/ TRUE);
9071 xpt_free_path(np->path);
9078 /*============ OPTIONNAL NVRAM SUPPORT =================*/
9081 * Get host setup from NVRAM.
9083 static void sym_nvram_setup_host (hcb_p np, struct sym_nvram *nvram)
9085 #ifdef SYM_CONF_NVRAM_SUPPORT
9087 * Get parity checking, host ID, verbose mode
9088 * and miscellaneous host flags from NVRAM.
9090 switch(nvram->type) {
9091 case SYM_SYMBIOS_NVRAM:
9092 if (!(nvram->data.Symbios.flags & SYMBIOS_PARITY_ENABLE))
9093 np->rv_scntl0 &= ~0x0a;
9094 np->myaddr = nvram->data.Symbios.host_id & 0x0f;
9095 if (nvram->data.Symbios.flags & SYMBIOS_VERBOSE_MSGS)
9097 if (nvram->data.Symbios.flags1 & SYMBIOS_SCAN_HI_LO)
9098 np->usrflags |= SYM_SCAN_TARGETS_HILO;
9099 if (nvram->data.Symbios.flags2 & SYMBIOS_AVOID_BUS_RESET)
9100 np->usrflags |= SYM_AVOID_BUS_RESET;
9102 case SYM_TEKRAM_NVRAM:
9103 np->myaddr = nvram->data.Tekram.host_id & 0x0f;
9112 * Get target setup from NVRAM.
9114 #ifdef SYM_CONF_NVRAM_SUPPORT
9115 static void sym_Symbios_setup_target(hcb_p np,int target, Symbios_nvram *nvram);
9116 static void sym_Tekram_setup_target(hcb_p np,int target, Tekram_nvram *nvram);
9120 sym_nvram_setup_target (hcb_p np, int target, struct sym_nvram *nvp)
9122 #ifdef SYM_CONF_NVRAM_SUPPORT
9124 case SYM_SYMBIOS_NVRAM:
9125 sym_Symbios_setup_target (np, target, &nvp->data.Symbios);
9127 case SYM_TEKRAM_NVRAM:
9128 sym_Tekram_setup_target (np, target, &nvp->data.Tekram);
9136 #ifdef SYM_CONF_NVRAM_SUPPORT
9138 * Get target set-up from Symbios format NVRAM.
9141 sym_Symbios_setup_target(hcb_p np, int target, Symbios_nvram *nvram)
9143 tcb_p tp = &np->target[target];
9144 Symbios_target *tn = &nvram->target[target];
9146 tp->tinfo.user.period = tn->sync_period ? (tn->sync_period + 3) / 4 : 0;
9147 tp->tinfo.user.width = tn->bus_width == 0x10 ? BUS_16_BIT : BUS_8_BIT;
9149 (tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? SYM_SETUP_MAX_TAG : 0;
9151 if (!(tn->flags & SYMBIOS_DISCONNECT_ENABLE))
9152 tp->usrflags &= ~SYM_DISC_ENABLED;
9153 if (!(tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME))
9154 tp->usrflags |= SYM_SCAN_BOOT_DISABLED;
9155 if (!(tn->flags & SYMBIOS_SCAN_LUNS))
9156 tp->usrflags |= SYM_SCAN_LUNS_DISABLED;
9160 * Get target set-up from Tekram format NVRAM.
9163 sym_Tekram_setup_target(hcb_p np, int target, Tekram_nvram *nvram)
9165 tcb_p tp = &np->target[target];
9166 struct Tekram_target *tn = &nvram->target[target];
9169 if (tn->flags & TEKRAM_SYNC_NEGO) {
9170 i = tn->sync_index & 0xf;
9171 tp->tinfo.user.period = Tekram_sync[i];
9174 tp->tinfo.user.width =
9175 (tn->flags & TEKRAM_WIDE_NEGO) ? BUS_16_BIT : BUS_8_BIT;
9177 if (tn->flags & TEKRAM_TAGGED_COMMANDS) {
9178 tp->usrtags = 2 << nvram->max_tags_index;
9181 if (tn->flags & TEKRAM_DISCONNECT_ENABLE)
9182 tp->usrflags |= SYM_DISC_ENABLED;
9184 /* If any device does not support parity, we will not use this option */
9185 if (!(tn->flags & TEKRAM_PARITY_CHECK))
9186 np->rv_scntl0 &= ~0x0a; /* SCSI parity checking disabled */
9189 #ifdef SYM_CONF_DEBUG_NVRAM
9191 * Dump Symbios format NVRAM for debugging purpose.
9193 static void sym_display_Symbios_nvram(hcb_p np, Symbios_nvram *nvram)
9197 /* display Symbios nvram host data */
9198 printf("%s: HOST ID=%d%s%s%s%s%s%s\n",
9199 sym_name(np), nvram->host_id & 0x0f,
9200 (nvram->flags & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
9201 (nvram->flags & SYMBIOS_PARITY_ENABLE) ? " PARITY" :"",
9202 (nvram->flags & SYMBIOS_VERBOSE_MSGS) ? " VERBOSE" :"",
9203 (nvram->flags & SYMBIOS_CHS_MAPPING) ? " CHS_ALT" :"",
9204 (nvram->flags2 & SYMBIOS_AVOID_BUS_RESET)?" NO_RESET" :"",
9205 (nvram->flags1 & SYMBIOS_SCAN_HI_LO) ? " HI_LO" :"");
9207 /* display Symbios nvram drive data */
9208 for (i = 0 ; i < 15 ; i++) {
9209 struct Symbios_target *tn = &nvram->target[i];
9210 printf("%s-%d:%s%s%s%s WIDTH=%d SYNC=%d TMO=%d\n",
9212 (tn->flags & SYMBIOS_DISCONNECT_ENABLE) ? " DISC" : "",
9213 (tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME) ? " SCAN_BOOT" : "",
9214 (tn->flags & SYMBIOS_SCAN_LUNS) ? " SCAN_LUNS" : "",
9215 (tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? " TCQ" : "",
9217 tn->sync_period / 4,
9223 * Dump TEKRAM format NVRAM for debugging purpose.
9225 static const u_char Tekram_boot_delay[7] = {3, 5, 10, 20, 30, 60, 120};
9226 static void sym_display_Tekram_nvram(hcb_p np, Tekram_nvram *nvram)
9228 int i, tags, boot_delay;
9231 /* display Tekram nvram host data */
9232 tags = 2 << nvram->max_tags_index;
9234 if (nvram->boot_delay_index < 6)
9235 boot_delay = Tekram_boot_delay[nvram->boot_delay_index];
9236 switch((nvram->flags & TEKRAM_REMOVABLE_FLAGS) >> 6) {
9238 case 0: rem = ""; break;
9239 case 1: rem = " REMOVABLE=boot device"; break;
9240 case 2: rem = " REMOVABLE=all"; break;
9243 printf("%s: HOST ID=%d%s%s%s%s%s%s%s%s%s BOOT DELAY=%d tags=%d\n",
9244 sym_name(np), nvram->host_id & 0x0f,
9245 (nvram->flags1 & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
9246 (nvram->flags & TEKRAM_MORE_THAN_2_DRIVES) ? " >2DRIVES" :"",
9247 (nvram->flags & TEKRAM_DRIVES_SUP_1GB) ? " >1GB" :"",
9248 (nvram->flags & TEKRAM_RESET_ON_POWER_ON) ? " RESET" :"",
9249 (nvram->flags & TEKRAM_ACTIVE_NEGATION) ? " ACT_NEG" :"",
9250 (nvram->flags & TEKRAM_IMMEDIATE_SEEK) ? " IMM_SEEK" :"",
9251 (nvram->flags & TEKRAM_SCAN_LUNS) ? " SCAN_LUNS" :"",
9252 (nvram->flags1 & TEKRAM_F2_F6_ENABLED) ? " F2_F6" :"",
9253 rem, boot_delay, tags);
9255 /* display Tekram nvram drive data */
9256 for (i = 0; i <= 15; i++) {
9258 struct Tekram_target *tn = &nvram->target[i];
9259 j = tn->sync_index & 0xf;
9260 sync = Tekram_sync[j];
9261 printf("%s-%d:%s%s%s%s%s%s PERIOD=%d\n",
9263 (tn->flags & TEKRAM_PARITY_CHECK) ? " PARITY" : "",
9264 (tn->flags & TEKRAM_SYNC_NEGO) ? " SYNC" : "",
9265 (tn->flags & TEKRAM_DISCONNECT_ENABLE) ? " DISC" : "",
9266 (tn->flags & TEKRAM_START_CMD) ? " START" : "",
9267 (tn->flags & TEKRAM_TAGGED_COMMANDS) ? " TCQ" : "",
9268 (tn->flags & TEKRAM_WIDE_NEGO) ? " WIDE" : "",
9272 #endif /* SYM_CONF_DEBUG_NVRAM */
9273 #endif /* SYM_CONF_NVRAM_SUPPORT */
9277 * Try reading Symbios or Tekram NVRAM
9279 #ifdef SYM_CONF_NVRAM_SUPPORT
9280 static int sym_read_Symbios_nvram (hcb_p np, Symbios_nvram *nvram);
9281 static int sym_read_Tekram_nvram (hcb_p np, Tekram_nvram *nvram);
9284 static int sym_read_nvram(hcb_p np, struct sym_nvram *nvp)
9286 #ifdef SYM_CONF_NVRAM_SUPPORT
9288 * Try to read SYMBIOS nvram.
9289 * Try to read TEKRAM nvram if Symbios nvram not found.
9291 if (SYM_SETUP_SYMBIOS_NVRAM &&
9292 !sym_read_Symbios_nvram (np, &nvp->data.Symbios)) {
9293 nvp->type = SYM_SYMBIOS_NVRAM;
9294 #ifdef SYM_CONF_DEBUG_NVRAM
9295 sym_display_Symbios_nvram(np, &nvp->data.Symbios);
9298 else if (SYM_SETUP_TEKRAM_NVRAM &&
9299 !sym_read_Tekram_nvram (np, &nvp->data.Tekram)) {
9300 nvp->type = SYM_TEKRAM_NVRAM;
9301 #ifdef SYM_CONF_DEBUG_NVRAM
9302 sym_display_Tekram_nvram(np, &nvp->data.Tekram);
9314 #ifdef SYM_CONF_NVRAM_SUPPORT
9316 * 24C16 EEPROM reading.
9318 * GPOI0 - data in/data out
9320 * Symbios NVRAM wiring now also used by Tekram.
9329 * Set/clear data/clock bit in GPIO0
9331 static void S24C16_set_bit(hcb_p np, u_char write_bit, u_char *gpreg,
9337 *gpreg |= write_bit;
9350 OUTB (nc_gpreg, *gpreg);
9355 * Send START condition to NVRAM to wake it up.
9357 static void S24C16_start(hcb_p np, u_char *gpreg)
9359 S24C16_set_bit(np, 1, gpreg, SET_BIT);
9360 S24C16_set_bit(np, 0, gpreg, SET_CLK);
9361 S24C16_set_bit(np, 0, gpreg, CLR_BIT);
9362 S24C16_set_bit(np, 0, gpreg, CLR_CLK);
9366 * Send STOP condition to NVRAM - puts NVRAM to sleep... ZZzzzz!!
9368 static void S24C16_stop(hcb_p np, u_char *gpreg)
9370 S24C16_set_bit(np, 0, gpreg, SET_CLK);
9371 S24C16_set_bit(np, 1, gpreg, SET_BIT);
9375 * Read or write a bit to the NVRAM,
9376 * read if GPIO0 input else write if GPIO0 output
9378 static void S24C16_do_bit(hcb_p np, u_char *read_bit, u_char write_bit,
9381 S24C16_set_bit(np, write_bit, gpreg, SET_BIT);
9382 S24C16_set_bit(np, 0, gpreg, SET_CLK);
9384 *read_bit = INB (nc_gpreg);
9385 S24C16_set_bit(np, 0, gpreg, CLR_CLK);
9386 S24C16_set_bit(np, 0, gpreg, CLR_BIT);
9390 * Output an ACK to the NVRAM after reading,
9391 * change GPIO0 to output and when done back to an input
9393 static void S24C16_write_ack(hcb_p np, u_char write_bit, u_char *gpreg,
9396 OUTB (nc_gpcntl, *gpcntl & 0xfe);
9397 S24C16_do_bit(np, 0, write_bit, gpreg);
9398 OUTB (nc_gpcntl, *gpcntl);
9402 * Input an ACK from NVRAM after writing,
9403 * change GPIO0 to input and when done back to an output
9405 static void S24C16_read_ack(hcb_p np, u_char *read_bit, u_char *gpreg,
9408 OUTB (nc_gpcntl, *gpcntl | 0x01);
9409 S24C16_do_bit(np, read_bit, 1, gpreg);
9410 OUTB (nc_gpcntl, *gpcntl);
9414 * WRITE a byte to the NVRAM and then get an ACK to see it was accepted OK,
9415 * GPIO0 must already be set as an output
9417 static void S24C16_write_byte(hcb_p np, u_char *ack_data, u_char write_data,
9418 u_char *gpreg, u_char *gpcntl)
9422 for (x = 0; x < 8; x++)
9423 S24C16_do_bit(np, 0, (write_data >> (7 - x)) & 0x01, gpreg);
9425 S24C16_read_ack(np, ack_data, gpreg, gpcntl);
9429 * READ a byte from the NVRAM and then send an ACK to say we have got it,
9430 * GPIO0 must already be set as an input
9432 static void S24C16_read_byte(hcb_p np, u_char *read_data, u_char ack_data,
9433 u_char *gpreg, u_char *gpcntl)
9439 for (x = 0; x < 8; x++) {
9440 S24C16_do_bit(np, &read_bit, 1, gpreg);
9441 *read_data |= ((read_bit & 0x01) << (7 - x));
9444 S24C16_write_ack(np, ack_data, gpreg, gpcntl);
9448 * Read 'len' bytes starting at 'offset'.
9450 static int sym_read_S24C16_nvram (hcb_p np, int offset, u_char *data, int len)
9452 u_char gpcntl, gpreg;
9453 u_char old_gpcntl, old_gpreg;
9458 /* save current state of GPCNTL and GPREG */
9459 old_gpreg = INB (nc_gpreg);
9460 old_gpcntl = INB (nc_gpcntl);
9461 gpcntl = old_gpcntl & 0x1c;
9463 /* set up GPREG & GPCNTL to set GPIO0 and GPIO1 in to known state */
9464 OUTB (nc_gpreg, old_gpreg);
9465 OUTB (nc_gpcntl, gpcntl);
9467 /* this is to set NVRAM into a known state with GPIO0/1 both low */
9469 S24C16_set_bit(np, 0, &gpreg, CLR_CLK);
9470 S24C16_set_bit(np, 0, &gpreg, CLR_BIT);
9472 /* now set NVRAM inactive with GPIO0/1 both high */
9473 S24C16_stop(np, &gpreg);
9475 /* activate NVRAM */
9476 S24C16_start(np, &gpreg);
9478 /* write device code and random address MSB */
9479 S24C16_write_byte(np, &ack_data,
9480 0xa0 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
9481 if (ack_data & 0x01)
9484 /* write random address LSB */
9485 S24C16_write_byte(np, &ack_data,
9486 offset & 0xff, &gpreg, &gpcntl);
9487 if (ack_data & 0x01)
9490 /* regenerate START state to set up for reading */
9491 S24C16_start(np, &gpreg);
9493 /* rewrite device code and address MSB with read bit set (lsb = 0x01) */
9494 S24C16_write_byte(np, &ack_data,
9495 0xa1 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
9496 if (ack_data & 0x01)
9499 /* now set up GPIO0 for inputting data */
9501 OUTB (nc_gpcntl, gpcntl);
9503 /* input all requested data - only part of total NVRAM */
9504 for (x = 0; x < len; x++)
9505 S24C16_read_byte(np, &data[x], (x == (len-1)), &gpreg, &gpcntl);
9507 /* finally put NVRAM back in inactive mode */
9509 OUTB (nc_gpcntl, gpcntl);
9510 S24C16_stop(np, &gpreg);
9513 /* return GPIO0/1 to original states after having accessed NVRAM */
9514 OUTB (nc_gpcntl, old_gpcntl);
9515 OUTB (nc_gpreg, old_gpreg);
9520 #undef SET_BIT /* 0 */
9521 #undef CLR_BIT /* 1 */
9522 #undef SET_CLK /* 2 */
9523 #undef CLR_CLK /* 3 */
9526 * Try reading Symbios NVRAM.
9529 static int sym_read_Symbios_nvram (hcb_p np, Symbios_nvram *nvram)
9531 static u_char Symbios_trailer[6] = {0xfe, 0xfe, 0, 0, 0, 0};
9532 u_char *data = (u_char *) nvram;
9533 int len = sizeof(*nvram);
9537 /* probe the 24c16 and read the SYMBIOS 24c16 area */
9538 if (sym_read_S24C16_nvram (np, SYMBIOS_NVRAM_ADDRESS, data, len))
9541 /* check valid NVRAM signature, verify byte count and checksum */
9542 if (nvram->type != 0 ||
9543 bcmp(nvram->trailer, Symbios_trailer, 6) ||
9544 nvram->byte_count != len - 12)
9547 /* verify checksum */
9548 for (x = 6, csum = 0; x < len - 6; x++)
9550 if (csum != nvram->checksum)
9557 * 93C46 EEPROM reading.
9562 * GPIO4 - chip select
9568 * Pulse clock bit in GPIO0
9570 static void T93C46_Clk(hcb_p np, u_char *gpreg)
9572 OUTB (nc_gpreg, *gpreg | 0x04);
9574 OUTB (nc_gpreg, *gpreg);
9578 * Read bit from NVRAM
9580 static void T93C46_Read_Bit(hcb_p np, u_char *read_bit, u_char *gpreg)
9583 T93C46_Clk(np, gpreg);
9584 *read_bit = INB (nc_gpreg);
9588 * Write bit to GPIO0
9590 static void T93C46_Write_Bit(hcb_p np, u_char write_bit, u_char *gpreg)
9592 if (write_bit & 0x01)
9599 OUTB (nc_gpreg, *gpreg);
9602 T93C46_Clk(np, gpreg);
9606 * Send STOP condition to NVRAM - puts NVRAM to sleep... ZZZzzz!!
9608 static void T93C46_Stop(hcb_p np, u_char *gpreg)
9611 OUTB (nc_gpreg, *gpreg);
9614 T93C46_Clk(np, gpreg);
9618 * Send read command and address to NVRAM
9620 static void T93C46_Send_Command(hcb_p np, u_short write_data,
9621 u_char *read_bit, u_char *gpreg)
9625 /* send 9 bits, start bit (1), command (2), address (6) */
9626 for (x = 0; x < 9; x++)
9627 T93C46_Write_Bit(np, (u_char) (write_data >> (8 - x)), gpreg);
9629 *read_bit = INB (nc_gpreg);
9633 * READ 2 bytes from the NVRAM
9635 static void T93C46_Read_Word(hcb_p np, u_short *nvram_data, u_char *gpreg)
9641 for (x = 0; x < 16; x++) {
9642 T93C46_Read_Bit(np, &read_bit, gpreg);
9644 if (read_bit & 0x01)
9645 *nvram_data |= (0x01 << (15 - x));
9647 *nvram_data &= ~(0x01 << (15 - x));
9652 * Read Tekram NvRAM data.
9654 static int T93C46_Read_Data(hcb_p np, u_short *data,int len,u_char *gpreg)
9659 for (x = 0; x < len; x++) {
9661 /* output read command and address */
9662 T93C46_Send_Command(np, 0x180 | x, &read_bit, gpreg);
9663 if (read_bit & 0x01)
9665 T93C46_Read_Word(np, &data[x], gpreg);
9666 T93C46_Stop(np, gpreg);
9673 * Try reading 93C46 Tekram NVRAM.
9675 static int sym_read_T93C46_nvram (hcb_p np, Tekram_nvram *nvram)
9677 u_char gpcntl, gpreg;
9678 u_char old_gpcntl, old_gpreg;
9681 /* save current state of GPCNTL and GPREG */
9682 old_gpreg = INB (nc_gpreg);
9683 old_gpcntl = INB (nc_gpcntl);
9685 /* set up GPREG & GPCNTL to set GPIO0/1/2/4 in to known state, 0 in,
9687 gpreg = old_gpreg & 0xe9;
9688 OUTB (nc_gpreg, gpreg);
9689 gpcntl = (old_gpcntl & 0xe9) | 0x09;
9690 OUTB (nc_gpcntl, gpcntl);
9692 /* input all of NVRAM, 64 words */
9693 retv = T93C46_Read_Data(np, (u_short *) nvram,
9694 sizeof(*nvram) / sizeof(short), &gpreg);
9696 /* return GPIO0/1/2/4 to original states after having accessed NVRAM */
9697 OUTB (nc_gpcntl, old_gpcntl);
9698 OUTB (nc_gpreg, old_gpreg);
9704 * Try reading Tekram NVRAM.
9707 static int sym_read_Tekram_nvram (hcb_p np, Tekram_nvram *nvram)
9709 u_char *data = (u_char *) nvram;
9710 int len = sizeof(*nvram);
9714 switch (np->device_id) {
9715 case PCI_ID_SYM53C885:
9716 case PCI_ID_SYM53C895:
9717 case PCI_ID_SYM53C896:
9718 x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
9721 case PCI_ID_SYM53C875:
9722 x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
9727 x = sym_read_T93C46_nvram(np, nvram);
9733 /* verify checksum */
9734 for (x = 0, csum = 0; x < len - 1; x += 2)
9735 csum += data[x] + (data[x+1] << 8);
9742 #endif /* SYM_CONF_NVRAM_SUPPORT */