2 * Copyright (c) 2001 Tamotsu Hattori.
3 * Copyright (c) 2001 Mitsuru IWASAKI.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by the University of
17 * California, Berkeley and its contributors.
18 * 4. Neither the name of the University nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 #include <sys/cdefs.h>
37 __FBSDID("$FreeBSD$");
41 #include <sys/param.h>
42 #include <sys/systm.h>
43 #include <sys/kernel.h>
45 #include <sys/power.h>
46 #include <sys/sysctl.h>
47 #include <sys/types.h>
49 #include <machine/cputypes.h>
50 #include <machine/md_var.h>
51 #include <machine/specialreg.h>
54 * Transmeta Crusoe LongRun Support by Tamotsu Hattori.
57 #define MSR_TMx86_LONGRUN 0x80868010
58 #define MSR_TMx86_LONGRUN_FLAGS 0x80868011
60 #define LONGRUN_MODE_MASK(x) ((x) & 0x000000007f)
61 #define LONGRUN_MODE_RESERVED(x) ((x) & 0xffffff80)
62 #define LONGRUN_MODE_WRITE(x, y) (LONGRUN_MODE_RESERVED(x) | LONGRUN_MODE_MASK(y))
64 #define LONGRUN_MODE_MINFREQUENCY 0x00
65 #define LONGRUN_MODE_ECONOMY 0x01
66 #define LONGRUN_MODE_PERFORMANCE 0x02
67 #define LONGRUN_MODE_MAXFREQUENCY 0x03
68 #define LONGRUN_MODE_UNKNOWN 0x04
69 #define LONGRUN_MODE_MAX 0x04
76 static u_int32_t longrun_modes[LONGRUN_MODE_MAX][3] = {
77 /* MSR low, MSR high, flags bit0 */
78 { 0, 0, 0}, /* LONGRUN_MODE_MINFREQUENCY */
79 { 0, 100, 0}, /* LONGRUN_MODE_ECONOMY */
80 { 0, 100, 1}, /* LONGRUN_MODE_PERFORMANCE */
81 { 100, 100, 1}, /* LONGRUN_MODE_MAXFREQUENCY */
85 tmx86_get_longrun_mode(void)
88 union msrinfo msrinfo;
89 u_int low, high, flags, mode;
91 eflags = read_eflags();
94 msrinfo.msr = rdmsr(MSR_TMx86_LONGRUN);
95 low = LONGRUN_MODE_MASK(msrinfo.regs[0]);
96 high = LONGRUN_MODE_MASK(msrinfo.regs[1]);
97 flags = rdmsr(MSR_TMx86_LONGRUN_FLAGS) & 0x01;
99 for (mode = 0; mode < LONGRUN_MODE_MAX; mode++) {
100 if (low == longrun_modes[mode][0] &&
101 high == longrun_modes[mode][1] &&
102 flags == longrun_modes[mode][2]) {
106 mode = LONGRUN_MODE_UNKNOWN;
108 write_eflags(eflags);
113 tmx86_get_longrun_status(u_int * frequency, u_int * voltage, u_int * percentage)
118 eflags = read_eflags();
121 do_cpuid(0x80860007, regs);
122 *frequency = regs[0];
124 *percentage = regs[2];
126 write_eflags(eflags);
131 tmx86_set_longrun_mode(u_int mode)
134 union msrinfo msrinfo;
136 if (mode >= LONGRUN_MODE_UNKNOWN) {
140 eflags = read_eflags();
143 /* Write LongRun mode values to Model Specific Register. */
144 msrinfo.msr = rdmsr(MSR_TMx86_LONGRUN);
145 msrinfo.regs[0] = LONGRUN_MODE_WRITE(msrinfo.regs[0],
146 longrun_modes[mode][0]);
147 msrinfo.regs[1] = LONGRUN_MODE_WRITE(msrinfo.regs[1],
148 longrun_modes[mode][1]);
149 wrmsr(MSR_TMx86_LONGRUN, msrinfo.msr);
151 /* Write LongRun mode flags to Model Specific Register. */
152 msrinfo.msr = rdmsr(MSR_TMx86_LONGRUN_FLAGS);
153 msrinfo.regs[0] = (msrinfo.regs[0] & ~0x01) | longrun_modes[mode][2];
154 wrmsr(MSR_TMx86_LONGRUN_FLAGS, msrinfo.msr);
156 write_eflags(eflags);
160 static u_int crusoe_longrun;
161 static u_int crusoe_frequency;
162 static u_int crusoe_voltage;
163 static u_int crusoe_percentage;
164 static u_int crusoe_performance_longrun = LONGRUN_MODE_PERFORMANCE;
165 static u_int crusoe_economy_longrun = LONGRUN_MODE_ECONOMY;
166 static struct sysctl_ctx_list crusoe_sysctl_ctx;
167 static struct sysctl_oid *crusoe_sysctl_tree;
170 tmx86_longrun_power_profile(void *arg)
175 state = power_profile_get_state();
176 if (state != POWER_PROFILE_PERFORMANCE &&
177 state != POWER_PROFILE_ECONOMY) {
182 case POWER_PROFILE_PERFORMANCE:
183 new =crusoe_performance_longrun;
185 case POWER_PROFILE_ECONOMY:
186 new = crusoe_economy_longrun;
189 new = tmx86_get_longrun_mode();
193 if (tmx86_get_longrun_mode() != new) {
194 tmx86_set_longrun_mode(new);
199 tmx86_longrun_sysctl(SYSCTL_HANDLER_ARGS)
204 crusoe_longrun = tmx86_get_longrun_mode();
205 mode = crusoe_longrun;
206 error = sysctl_handle_int(oidp, &mode, 0, req);
207 if (error || !req->newptr) {
210 if (mode >= LONGRUN_MODE_UNKNOWN) {
214 if (crusoe_longrun != mode) {
215 crusoe_longrun = mode;
216 tmx86_set_longrun_mode(crusoe_longrun);
223 tmx86_status_sysctl(SYSCTL_HANDLER_ARGS)
228 tmx86_get_longrun_status(&crusoe_frequency,
229 &crusoe_voltage, &crusoe_percentage);
230 val = *(u_int *)oidp->oid_arg1;
231 error = sysctl_handle_int(oidp, &val, 0, req);
236 tmx86_longrun_profile_sysctl(SYSCTL_HANDLER_ARGS)
242 argp = (u_int32_t *)oidp->oid_arg1;
244 error = sysctl_handle_int(oidp, &arg, 0, req);
246 /* error or no new value */
247 if ((error != 0) || (req->newptr == NULL))
251 if (arg >= LONGRUN_MODE_UNKNOWN)
254 /* set new value and possibly switch */
257 tmx86_longrun_power_profile(NULL);
264 setup_tmx86_longrun(void *dummy __unused)
267 if (cpu_vendor_id != CPU_VENDOR_TRANSMETA)
270 crusoe_longrun = tmx86_get_longrun_mode();
271 tmx86_get_longrun_status(&crusoe_frequency,
272 &crusoe_voltage, &crusoe_percentage);
273 printf("Crusoe LongRun support enabled, current mode: %d "
274 "<%dMHz %dmV %d%%>\n", crusoe_longrun, crusoe_frequency,
275 crusoe_voltage, crusoe_percentage);
277 sysctl_ctx_init(&crusoe_sysctl_ctx);
278 crusoe_sysctl_tree = SYSCTL_ADD_NODE(&crusoe_sysctl_ctx,
279 SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO,
280 "crusoe", CTLFLAG_RD, 0,
281 "Transmeta Crusoe LongRun support");
282 SYSCTL_ADD_PROC(&crusoe_sysctl_ctx, SYSCTL_CHILDREN(crusoe_sysctl_tree),
283 OID_AUTO, "longrun", CTLTYPE_INT | CTLFLAG_RW,
284 &crusoe_longrun, 0, tmx86_longrun_sysctl, "I",
285 "LongRun mode [0-3]");
286 SYSCTL_ADD_PROC(&crusoe_sysctl_ctx, SYSCTL_CHILDREN(crusoe_sysctl_tree),
287 OID_AUTO, "frequency", CTLTYPE_INT | CTLFLAG_RD,
288 &crusoe_frequency, 0, tmx86_status_sysctl, "I",
289 "Current frequency (MHz)");
290 SYSCTL_ADD_PROC(&crusoe_sysctl_ctx, SYSCTL_CHILDREN(crusoe_sysctl_tree),
291 OID_AUTO, "voltage", CTLTYPE_INT | CTLFLAG_RD,
292 &crusoe_voltage, 0, tmx86_status_sysctl, "I",
293 "Current voltage (mV)");
294 SYSCTL_ADD_PROC(&crusoe_sysctl_ctx, SYSCTL_CHILDREN(crusoe_sysctl_tree),
295 OID_AUTO, "percentage", CTLTYPE_INT | CTLFLAG_RD,
296 &crusoe_percentage, 0, tmx86_status_sysctl, "I",
297 "Processing performance (%)");
298 SYSCTL_ADD_PROC(&crusoe_sysctl_ctx, SYSCTL_CHILDREN(crusoe_sysctl_tree),
299 OID_AUTO, "performance_longrun", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_RW,
300 &crusoe_performance_longrun, 0, tmx86_longrun_profile_sysctl, "I", "");
301 SYSCTL_ADD_PROC(&crusoe_sysctl_ctx, SYSCTL_CHILDREN(crusoe_sysctl_tree),
302 OID_AUTO, "economy_longrun", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_RW,
303 &crusoe_economy_longrun, 0, tmx86_longrun_profile_sysctl, "I", "");
305 /* register performance profile change handler */
306 EVENTHANDLER_REGISTER(power_profile_change, tmx86_longrun_power_profile, NULL, 0);
308 SYSINIT(setup_tmx86_longrun, SI_SUB_CPU, SI_ORDER_ANY, setup_tmx86_longrun,