2 * Copyright (c) 1991 Regents of the University of California.
4 * Copyright (c) 1994 John S. Dyson
6 * Copyright (c) 1994 David Greenman
8 * Copyright (c) 2005-2008 Alan L. Cox <alc@cs.rice.edu>
11 * This code is derived from software contributed to Berkeley by
12 * the Systems Programming Group of the University of Utah Computer
13 * Science Department and William Jolitz of UUNET Technologies Inc.
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 * 3. All advertising materials mentioning features or use of this software
24 * must display the following acknowledgement:
25 * This product includes software developed by the University of
26 * California, Berkeley and its contributors.
27 * 4. Neither the name of the University nor the names of its contributors
28 * may be used to endorse or promote products derived from this software
29 * without specific prior written permission.
31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
43 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
46 * Copyright (c) 2003 Networks Associates Technology, Inc.
47 * All rights reserved.
49 * This software was developed for the FreeBSD Project by Jake Burkholder,
50 * Safeport Network Services, and Network Associates Laboratories, the
51 * Security Research Division of Network Associates, Inc. under
52 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
53 * CHATS research program.
55 * Redistribution and use in source and binary forms, with or without
56 * modification, are permitted provided that the following conditions
58 * 1. Redistributions of source code must retain the above copyright
59 * notice, this list of conditions and the following disclaimer.
60 * 2. Redistributions in binary form must reproduce the above copyright
61 * notice, this list of conditions and the following disclaimer in the
62 * documentation and/or other materials provided with the distribution.
64 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
65 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
66 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
67 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
68 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
69 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
70 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
71 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
72 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
73 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
77 #include <sys/cdefs.h>
78 __FBSDID("$FreeBSD$");
81 * Manages physical address maps.
83 * In addition to hardware address maps, this
84 * module is called upon to provide software-use-only
85 * maps which may or may not be stored in the same
86 * form as hardware maps. These pseudo-maps are
87 * used to store intermediate results from copy
88 * operations to and from address spaces.
90 * Since the information managed by this module is
91 * also stored by the logical address mapping module,
92 * this module may throw away valid virtual-to-physical
93 * mappings at almost any time. However, invalidations
94 * of virtual-to-physical mappings must be done as
97 * In order to cope with hardware architectures which
98 * make virtual-to-physical map invalidates expensive,
99 * this module may delay invalidate or reduced protection
100 * operations until such time as they are actually
101 * necessary. This module is given full information as
102 * to which processors are currently using which maps,
103 * and to when physical maps must be made correct.
107 #include "opt_pmap.h"
108 #include "opt_msgbuf.h"
110 #include "opt_xbox.h"
112 #include <sys/param.h>
113 #include <sys/systm.h>
114 #include <sys/kernel.h>
116 #include <sys/lock.h>
117 #include <sys/malloc.h>
118 #include <sys/mman.h>
119 #include <sys/msgbuf.h>
120 #include <sys/mutex.h>
121 #include <sys/proc.h>
122 #include <sys/sf_buf.h>
124 #include <sys/vmmeter.h>
125 #include <sys/sched.h>
126 #include <sys/sysctl.h>
132 #include <vm/vm_param.h>
133 #include <vm/vm_kern.h>
134 #include <vm/vm_page.h>
135 #include <vm/vm_map.h>
136 #include <vm/vm_object.h>
137 #include <vm/vm_extern.h>
138 #include <vm/vm_pageout.h>
139 #include <vm/vm_pager.h>
140 #include <vm/vm_reserv.h>
143 #include <machine/cpu.h>
144 #include <machine/cputypes.h>
145 #include <machine/md_var.h>
146 #include <machine/pcb.h>
147 #include <machine/specialreg.h>
149 #include <machine/smp.h>
153 #include <machine/xbox.h>
156 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
157 #define CPU_ENABLE_SSE
160 #ifndef PMAP_SHPGPERPROC
161 #define PMAP_SHPGPERPROC 200
164 #if !defined(DIAGNOSTIC)
165 #define PMAP_INLINE __gnu89_inline
172 #define PV_STAT(x) do { x ; } while (0)
174 #define PV_STAT(x) do { } while (0)
177 #define pa_index(pa) ((pa) >> PDRSHIFT)
178 #define pa_to_pvh(pa) (&pv_table[pa_index(pa)])
181 * Get PDEs and PTEs for user/kernel address space
183 #define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT]))
184 #define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT])
186 #define pmap_pde_v(pte) ((*(int *)pte & PG_V) != 0)
187 #define pmap_pte_w(pte) ((*(int *)pte & PG_W) != 0)
188 #define pmap_pte_m(pte) ((*(int *)pte & PG_M) != 0)
189 #define pmap_pte_u(pte) ((*(int *)pte & PG_A) != 0)
190 #define pmap_pte_v(pte) ((*(int *)pte & PG_V) != 0)
192 #define pmap_pte_set_w(pte, v) ((v) ? atomic_set_int((u_int *)(pte), PG_W) : \
193 atomic_clear_int((u_int *)(pte), PG_W))
194 #define pmap_pte_set_prot(pte, v) ((*(int *)pte &= ~PG_PROT), (*(int *)pte |= (v)))
196 struct pmap kernel_pmap_store;
197 LIST_HEAD(pmaplist, pmap);
198 static struct pmaplist allpmaps;
199 static struct mtx allpmaps_lock;
201 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
202 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
203 int pgeflag = 0; /* PG_G or-in */
204 int pseflag = 0; /* PG_PS or-in */
207 vm_offset_t kernel_vm_end;
208 extern u_int32_t KERNend;
212 static uma_zone_t pdptzone;
215 static int pat_works; /* Is page attribute table sane? */
217 SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters");
219 static int pg_ps_enabled;
220 SYSCTL_INT(_vm_pmap, OID_AUTO, pg_ps_enabled, CTLFLAG_RD, &pg_ps_enabled, 0,
221 "Are large page mappings enabled?");
224 * Data for the pv entry allocation mechanism
226 static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0;
227 static struct md_page *pv_table;
228 static int shpgperproc = PMAP_SHPGPERPROC;
230 struct pv_chunk *pv_chunkbase; /* KVA block for pv_chunks */
231 int pv_maxchunks; /* How many chunks we have KVA for */
232 vm_offset_t pv_vafree; /* freelist stored in the PTE */
235 * All those kernel PT submaps that BSD is so fond of
244 static struct sysmaps sysmaps_pcpu[MAXCPU];
245 pt_entry_t *CMAP1 = 0;
246 static pt_entry_t *CMAP3;
247 caddr_t CADDR1 = 0, ptvmmap = 0;
248 static caddr_t CADDR3;
249 struct msgbuf *msgbufp = 0;
254 static caddr_t crashdumpmap;
256 static pt_entry_t *PMAP1 = 0, *PMAP2;
257 static pt_entry_t *PADDR1 = 0, *PADDR2;
260 static int PMAP1changedcpu;
261 SYSCTL_INT(_debug, OID_AUTO, PMAP1changedcpu, CTLFLAG_RD,
263 "Number of times pmap_pte_quick changed CPU with same PMAP1");
265 static int PMAP1changed;
266 SYSCTL_INT(_debug, OID_AUTO, PMAP1changed, CTLFLAG_RD,
268 "Number of times pmap_pte_quick changed PMAP1");
269 static int PMAP1unchanged;
270 SYSCTL_INT(_debug, OID_AUTO, PMAP1unchanged, CTLFLAG_RD,
272 "Number of times pmap_pte_quick didn't change PMAP1");
273 static struct mtx PMAP2mutex;
275 static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
276 static pv_entry_t get_pv_entry(pmap_t locked_pmap, int try);
277 static void pmap_pv_demote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa);
278 static boolean_t pmap_pv_insert_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa);
279 static void pmap_pv_promote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa);
280 static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
281 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
283 static int pmap_pvh_wired_mappings(struct md_page *pvh, int count);
285 static boolean_t pmap_demote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va);
286 static boolean_t pmap_enter_pde(pmap_t pmap, vm_offset_t va, vm_page_t m,
288 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
289 vm_page_t m, vm_prot_t prot, vm_page_t mpte);
290 static void pmap_insert_pt_page(pmap_t pmap, vm_page_t mpte);
291 static boolean_t pmap_is_modified_pvh(struct md_page *pvh);
292 static void pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode);
293 static vm_page_t pmap_lookup_pt_page(pmap_t pmap, vm_offset_t va);
294 static void pmap_promote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va);
295 static boolean_t pmap_protect_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t sva,
297 static void pmap_remove_pde(pmap_t pmap, pd_entry_t *pdq, vm_offset_t sva,
299 static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva,
301 static void pmap_remove_pt_page(pmap_t pmap, vm_page_t mpte);
302 static void pmap_remove_page(struct pmap *pmap, vm_offset_t va,
304 static void pmap_remove_entry(struct pmap *pmap, vm_page_t m,
306 static void pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m);
307 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
310 static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags);
312 static vm_page_t _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags);
313 static int _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free);
314 static pt_entry_t *pmap_pte_quick(pmap_t pmap, vm_offset_t va);
315 static void pmap_pte_release(pt_entry_t *pte);
316 static int pmap_unuse_pt(pmap_t, vm_offset_t, vm_page_t *);
317 static vm_offset_t pmap_kmem_choose(vm_offset_t addr);
319 static void *pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait);
322 CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t));
323 CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t));
326 * If you get an error here, then you set KVA_PAGES wrong! See the
327 * description of KVA_PAGES in sys/i386/include/pmap.h. It must be
328 * multiple of 4 for a normal kernel, or a multiple of 8 for a PAE.
330 CTASSERT(KERNBASE % (1 << 24) == 0);
333 * Move the kernel virtual free pointer to the next
334 * 4MB. This is used to help improve performance
335 * by using a large (4MB) page for much of the kernel
336 * (.text, .data, .bss)
339 pmap_kmem_choose(vm_offset_t addr)
341 vm_offset_t newaddr = addr;
344 if (cpu_feature & CPUID_PSE)
345 newaddr = (addr + PDRMASK) & ~PDRMASK;
351 * Bootstrap the system enough to run with virtual memory.
353 * On the i386 this is called after mapping has already been enabled
354 * and just syncs the pmap module with what has already been done.
355 * [We can't call it easily with mapping off since the kernel is not
356 * mapped with PA == VA, hence we would have to relocate every address
357 * from the linked base (virtual) address "KERNBASE" to the actual
358 * (physical) address starting relative to 0]
361 pmap_bootstrap(vm_paddr_t firstaddr)
364 pt_entry_t *pte, *unused;
365 struct sysmaps *sysmaps;
369 * XXX The calculation of virtual_avail is wrong. It's NKPT*PAGE_SIZE too
370 * large. It should instead be correctly calculated in locore.s and
371 * not based on 'first' (which is a physical address, not a virtual
372 * address, for the start of unused physical memory). The kernel
373 * page tables are NOT double mapped and thus should not be included
374 * in this calculation.
376 virtual_avail = (vm_offset_t) KERNBASE + firstaddr;
377 virtual_avail = pmap_kmem_choose(virtual_avail);
379 virtual_end = VM_MAX_KERNEL_ADDRESS;
382 * Initialize the kernel pmap (which is statically allocated).
384 PMAP_LOCK_INIT(kernel_pmap);
385 kernel_pmap->pm_pdir = (pd_entry_t *) (KERNBASE + (u_int)IdlePTD);
387 kernel_pmap->pm_pdpt = (pdpt_entry_t *) (KERNBASE + (u_int)IdlePDPT);
389 kernel_pmap->pm_root = NULL;
390 kernel_pmap->pm_active = -1; /* don't allow deactivation */
391 TAILQ_INIT(&kernel_pmap->pm_pvchunk);
392 LIST_INIT(&allpmaps);
393 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_SPIN);
394 mtx_lock_spin(&allpmaps_lock);
395 LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list);
396 mtx_unlock_spin(&allpmaps_lock);
400 * Reserve some special page table entries/VA space for temporary
403 #define SYSMAP(c, p, v, n) \
404 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n);
410 * CMAP1/CMAP2 are used for zeroing and copying pages.
411 * CMAP3 is used for the idle process page zeroing.
413 for (i = 0; i < MAXCPU; i++) {
414 sysmaps = &sysmaps_pcpu[i];
415 mtx_init(&sysmaps->lock, "SYSMAPS", NULL, MTX_DEF);
416 SYSMAP(caddr_t, sysmaps->CMAP1, sysmaps->CADDR1, 1)
417 SYSMAP(caddr_t, sysmaps->CMAP2, sysmaps->CADDR2, 1)
419 SYSMAP(caddr_t, CMAP1, CADDR1, 1)
420 SYSMAP(caddr_t, CMAP3, CADDR3, 1)
426 SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS)
429 * ptvmmap is used for reading arbitrary physical pages via /dev/mem.
431 SYSMAP(caddr_t, unused, ptvmmap, 1)
434 * msgbufp is used to map the system message buffer.
436 SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(MSGBUF_SIZE)))
439 * ptemap is used for pmap_pte_quick
441 SYSMAP(pt_entry_t *, PMAP1, PADDR1, 1);
442 SYSMAP(pt_entry_t *, PMAP2, PADDR2, 1);
444 mtx_init(&PMAP2mutex, "PMAP2", NULL, MTX_DEF);
451 * Leave in place an identity mapping (virt == phys) for the low 1 MB
452 * physical memory region that is used by the ACPI wakeup code. This
453 * mapping must not have PG_G set.
456 /* FIXME: This is gross, but needed for the XBOX. Since we are in such
457 * an early stadium, we cannot yet neatly map video memory ... :-(
458 * Better fixes are very welcome! */
459 if (!arch_i386_is_xbox)
461 for (i = 1; i < NKPT; i++)
464 /* Initialize the PAT MSR if present. */
467 /* Turn on PG_G on kernel page(s) */
479 /* Bail if this CPU doesn't implement PAT. */
480 if (!(cpu_feature & CPUID_PAT))
483 if (cpu_vendor_id != CPU_VENDOR_INTEL ||
484 (I386_CPU_FAMILY(cpu_id) == 6 && I386_CPU_MODEL(cpu_id) >= 0xe)) {
486 * Leave the indices 0-3 at the default of WB, WT, UC, and UC-.
487 * Program 4 and 5 as WP and WC.
488 * Leave 6 and 7 as UC and UC-.
490 pat_msr = rdmsr(MSR_PAT);
491 pat_msr &= ~(PAT_MASK(4) | PAT_MASK(5));
492 pat_msr |= PAT_VALUE(4, PAT_WRITE_PROTECTED) |
493 PAT_VALUE(5, PAT_WRITE_COMBINING);
497 * Due to some Intel errata, we can only safely use the lower 4
498 * PAT entries. Thus, just replace PAT Index 2 with WC instead
501 * Intel Pentium III Processor Specification Update
502 * Errata E.27 (Upper Four PAT Entries Not Usable With Mode B
505 * Intel Pentium IV Processor Specification Update
506 * Errata N46 (PAT Index MSB May Be Calculated Incorrectly)
508 pat_msr = rdmsr(MSR_PAT);
509 pat_msr &= ~PAT_MASK(2);
510 pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING);
513 wrmsr(MSR_PAT, pat_msr);
517 * Set PG_G on kernel pages. Only the BSP calls this when SMP is turned on.
524 vm_offset_t va, endva;
531 endva = KERNBASE + KERNend;
534 va = KERNBASE + KERNLOAD;
536 pdir = kernel_pmap->pm_pdir[KPTDI+i];
538 kernel_pmap->pm_pdir[KPTDI+i] = PTD[KPTDI+i] = pdir;
539 invltlb(); /* Play it safe, invltlb() every time */
544 va = (vm_offset_t)btext;
549 invltlb(); /* Play it safe, invltlb() every time */
556 * Initialize a vm_page's machine-dependent fields.
559 pmap_page_init(vm_page_t m)
562 TAILQ_INIT(&m->md.pv_list);
563 m->md.pat_mode = PAT_WRITE_BACK;
568 pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait)
571 /* Inform UMA that this allocator uses kernel_map/object. */
572 *flags = UMA_SLAB_KERNEL;
573 return ((void *)kmem_alloc_contig(kernel_map, bytes, wait, 0x0ULL,
574 0xffffffffULL, 1, 0, VM_MEMATTR_DEFAULT));
579 * ABuse the pte nodes for unmapped kva to thread a kva freelist through.
581 * - Must deal with pages in order to ensure that none of the PG_* bits
582 * are ever set, PG_V in particular.
583 * - Assumes we can write to ptes without pte_store() atomic ops, even
584 * on PAE systems. This should be ok.
585 * - Assumes nothing will ever test these addresses for 0 to indicate
586 * no mapping instead of correctly checking PG_V.
587 * - Assumes a vm_offset_t will fit in a pte (true for i386).
588 * Because PG_V is never set, there can be no mappings to invalidate.
591 pmap_ptelist_alloc(vm_offset_t *head)
598 return (va); /* Out of memory */
602 panic("pmap_ptelist_alloc: va with PG_V set!");
608 pmap_ptelist_free(vm_offset_t *head, vm_offset_t va)
613 panic("pmap_ptelist_free: freeing va with PG_V set!");
615 *pte = *head; /* virtual! PG_V is 0 though */
620 pmap_ptelist_init(vm_offset_t *head, void *base, int npages)
626 for (i = npages - 1; i >= 0; i--) {
627 va = (vm_offset_t)base + i * PAGE_SIZE;
628 pmap_ptelist_free(head, va);
634 * Initialize the pmap module.
635 * Called by vm_init, to initialize any structures that the pmap
636 * system needs to map virtual memory.
646 * Initialize the vm page array entries for the kernel pmap's
649 for (i = 0; i < nkpt; i++) {
650 mpte = PHYS_TO_VM_PAGE(PTD[i + KPTDI] & PG_FRAME);
651 KASSERT(mpte >= vm_page_array &&
652 mpte < &vm_page_array[vm_page_array_size],
653 ("pmap_init: page table page is out of range"));
654 mpte->pindex = i + KPTDI;
655 mpte->phys_addr = PTD[i + KPTDI] & PG_FRAME;
659 * Initialize the address space (zone) for the pv entries. Set a
660 * high water mark so that the system can recover from excessive
661 * numbers of pv entries.
663 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc);
664 pv_entry_max = shpgperproc * maxproc + cnt.v_page_count;
665 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max);
666 pv_entry_max = roundup(pv_entry_max, _NPCPV);
667 pv_entry_high_water = 9 * (pv_entry_max / 10);
670 * Are large page mappings enabled?
672 TUNABLE_INT_FETCH("vm.pmap.pg_ps_enabled", &pg_ps_enabled);
675 * Calculate the size of the pv head table for superpages.
677 for (i = 0; phys_avail[i + 1]; i += 2);
678 pv_npg = round_4mpage(phys_avail[(i - 2) + 1]) / NBPDR;
681 * Allocate memory for the pv head table for superpages.
683 s = (vm_size_t)(pv_npg * sizeof(struct md_page));
685 pv_table = (struct md_page *)kmem_alloc(kernel_map, s);
686 for (i = 0; i < pv_npg; i++)
687 TAILQ_INIT(&pv_table[i].pv_list);
689 pv_maxchunks = MAX(pv_entry_max / _NPCPV, maxproc);
690 pv_chunkbase = (struct pv_chunk *)kmem_alloc_nofault(kernel_map,
691 PAGE_SIZE * pv_maxchunks);
692 if (pv_chunkbase == NULL)
693 panic("pmap_init: not enough kvm for pv chunks");
694 pmap_ptelist_init(&pv_vafree, pv_chunkbase, pv_maxchunks);
696 pdptzone = uma_zcreate("PDPT", NPGPTD * sizeof(pdpt_entry_t), NULL,
697 NULL, NULL, NULL, (NPGPTD * sizeof(pdpt_entry_t)) - 1,
698 UMA_ZONE_VM | UMA_ZONE_NOFREE);
699 uma_zone_set_allocf(pdptzone, pmap_pdpt_allocf);
704 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_max, CTLFLAG_RD, &pv_entry_max, 0,
705 "Max number of PV entries");
706 SYSCTL_INT(_vm_pmap, OID_AUTO, shpgperproc, CTLFLAG_RD, &shpgperproc, 0,
707 "Page share factor per proc");
709 SYSCTL_NODE(_vm_pmap, OID_AUTO, pde, CTLFLAG_RD, 0,
710 "2/4MB page mapping counters");
712 static u_long pmap_pde_demotions;
713 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, demotions, CTLFLAG_RD,
714 &pmap_pde_demotions, 0, "2/4MB page demotions");
716 static u_long pmap_pde_mappings;
717 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, mappings, CTLFLAG_RD,
718 &pmap_pde_mappings, 0, "2/4MB page mappings");
720 static u_long pmap_pde_p_failures;
721 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, p_failures, CTLFLAG_RD,
722 &pmap_pde_p_failures, 0, "2/4MB page promotion failures");
724 static u_long pmap_pde_promotions;
725 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, promotions, CTLFLAG_RD,
726 &pmap_pde_promotions, 0, "2/4MB page promotions");
728 /***************************************************
729 * Low level helper routines.....
730 ***************************************************/
733 * Determine the appropriate bits to set in a PTE or PDE for a specified
737 pmap_cache_bits(int mode, boolean_t is_pde)
739 int pat_flag, pat_index, cache_bits;
741 /* The PAT bit is different for PTE's and PDE's. */
742 pat_flag = is_pde ? PG_PDE_PAT : PG_PTE_PAT;
744 /* If we don't support PAT, map extended modes to older ones. */
745 if (!(cpu_feature & CPUID_PAT)) {
747 case PAT_UNCACHEABLE:
748 case PAT_WRITE_THROUGH:
752 case PAT_WRITE_COMBINING:
753 case PAT_WRITE_PROTECTED:
754 mode = PAT_UNCACHEABLE;
759 /* Map the caching mode to a PAT index. */
762 case PAT_UNCACHEABLE:
765 case PAT_WRITE_THROUGH:
774 case PAT_WRITE_COMBINING:
777 case PAT_WRITE_PROTECTED:
781 panic("Unknown caching mode %d\n", mode);
786 case PAT_UNCACHEABLE:
787 case PAT_WRITE_PROTECTED:
790 case PAT_WRITE_THROUGH:
796 case PAT_WRITE_COMBINING:
800 panic("Unknown caching mode %d\n", mode);
804 /* Map the 3-bit index value into the PAT, PCD, and PWT bits. */
807 cache_bits |= pat_flag;
809 cache_bits |= PG_NC_PCD;
811 cache_bits |= PG_NC_PWT;
816 * For SMP, these functions have to use the IPI mechanism for coherence.
818 * N.B.: Before calling any of the following TLB invalidation functions,
819 * the calling processor must ensure that all stores updating a non-
820 * kernel page table are globally performed. Otherwise, another
821 * processor could cache an old, pre-update entry without being
822 * invalidated. This can happen one of two ways: (1) The pmap becomes
823 * active on another processor after its pm_active field is checked by
824 * one of the following functions but before a store updating the page
825 * table is globally performed. (2) The pmap becomes active on another
826 * processor before its pm_active field is checked but due to
827 * speculative loads one of the following functions stills reads the
828 * pmap as inactive on the other processor.
830 * The kernel page table is exempt because its pm_active field is
831 * immutable. The kernel page table is always active on every
835 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
841 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
845 cpumask = PCPU_GET(cpumask);
846 other_cpus = PCPU_GET(other_cpus);
847 if (pmap->pm_active & cpumask)
849 if (pmap->pm_active & other_cpus)
850 smp_masked_invlpg(pmap->pm_active & other_cpus, va);
856 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
863 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
864 for (addr = sva; addr < eva; addr += PAGE_SIZE)
866 smp_invlpg_range(sva, eva);
868 cpumask = PCPU_GET(cpumask);
869 other_cpus = PCPU_GET(other_cpus);
870 if (pmap->pm_active & cpumask)
871 for (addr = sva; addr < eva; addr += PAGE_SIZE)
873 if (pmap->pm_active & other_cpus)
874 smp_masked_invlpg_range(pmap->pm_active & other_cpus,
881 pmap_invalidate_all(pmap_t pmap)
887 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
891 cpumask = PCPU_GET(cpumask);
892 other_cpus = PCPU_GET(other_cpus);
893 if (pmap->pm_active & cpumask)
895 if (pmap->pm_active & other_cpus)
896 smp_masked_invltlb(pmap->pm_active & other_cpus);
902 pmap_invalidate_cache(void)
912 * Normal, non-SMP, 486+ invalidation functions.
913 * We inline these within pmap.c for speed.
916 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
919 if (pmap == kernel_pmap || pmap->pm_active)
924 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
928 if (pmap == kernel_pmap || pmap->pm_active)
929 for (addr = sva; addr < eva; addr += PAGE_SIZE)
934 pmap_invalidate_all(pmap_t pmap)
937 if (pmap == kernel_pmap || pmap->pm_active)
942 pmap_invalidate_cache(void)
950 pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva)
953 KASSERT((sva & PAGE_MASK) == 0,
954 ("pmap_invalidate_cache_range: sva not page-aligned"));
955 KASSERT((eva & PAGE_MASK) == 0,
956 ("pmap_invalidate_cache_range: eva not page-aligned"));
958 if (cpu_feature & CPUID_SS)
959 ; /* If "Self Snoop" is supported, do nothing. */
960 else if (cpu_feature & CPUID_CLFSH) {
963 * Otherwise, do per-cache line flush. Use the mfence
964 * instruction to insure that previous stores are
965 * included in the write-back. The processor
966 * propagates flush to other processors in the cache
970 for (; eva < sva; eva += cpu_clflush_line_size)
976 * No targeted cache flush methods are supported by CPU,
977 * globally invalidate cache as a last resort.
979 pmap_invalidate_cache();
984 * Are we current address space or kernel? N.B. We return FALSE when
985 * a pmap's page table is in use because a kernel thread is borrowing
986 * it. The borrowed page table can change spontaneously, making any
987 * dependence on its continued use subject to a race condition.
990 pmap_is_current(pmap_t pmap)
993 return (pmap == kernel_pmap ||
994 (pmap == vmspace_pmap(curthread->td_proc->p_vmspace) &&
995 (pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] & PG_FRAME)));
999 * If the given pmap is not the current or kernel pmap, the returned pte must
1000 * be released by passing it to pmap_pte_release().
1003 pmap_pte(pmap_t pmap, vm_offset_t va)
1008 pde = pmap_pde(pmap, va);
1012 /* are we current address space or kernel? */
1013 if (pmap_is_current(pmap))
1014 return (vtopte(va));
1015 mtx_lock(&PMAP2mutex);
1016 newpf = *pde & PG_FRAME;
1017 if ((*PMAP2 & PG_FRAME) != newpf) {
1018 *PMAP2 = newpf | PG_RW | PG_V | PG_A | PG_M;
1019 pmap_invalidate_page(kernel_pmap, (vm_offset_t)PADDR2);
1021 return (PADDR2 + (i386_btop(va) & (NPTEPG - 1)));
1027 * Releases a pte that was obtained from pmap_pte(). Be prepared for the pte
1030 static __inline void
1031 pmap_pte_release(pt_entry_t *pte)
1034 if ((pt_entry_t *)((vm_offset_t)pte & ~PAGE_MASK) == PADDR2)
1035 mtx_unlock(&PMAP2mutex);
1038 static __inline void
1039 invlcaddr(void *caddr)
1042 invlpg((u_int)caddr);
1046 * Super fast pmap_pte routine best used when scanning
1047 * the pv lists. This eliminates many coarse-grained
1048 * invltlb calls. Note that many of the pv list
1049 * scans are across different pmaps. It is very wasteful
1050 * to do an entire invltlb for checking a single mapping.
1052 * If the given pmap is not the current pmap, vm_page_queue_mtx
1053 * must be held and curthread pinned to a CPU.
1056 pmap_pte_quick(pmap_t pmap, vm_offset_t va)
1061 pde = pmap_pde(pmap, va);
1065 /* are we current address space or kernel? */
1066 if (pmap_is_current(pmap))
1067 return (vtopte(va));
1068 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
1069 KASSERT(curthread->td_pinned > 0, ("curthread not pinned"));
1070 newpf = *pde & PG_FRAME;
1071 if ((*PMAP1 & PG_FRAME) != newpf) {
1072 *PMAP1 = newpf | PG_RW | PG_V | PG_A | PG_M;
1074 PMAP1cpu = PCPU_GET(cpuid);
1080 if (PMAP1cpu != PCPU_GET(cpuid)) {
1081 PMAP1cpu = PCPU_GET(cpuid);
1087 return (PADDR1 + (i386_btop(va) & (NPTEPG - 1)));
1093 * Routine: pmap_extract
1095 * Extract the physical page address associated
1096 * with the given map/virtual_address pair.
1099 pmap_extract(pmap_t pmap, vm_offset_t va)
1107 pde = pmap->pm_pdir[va >> PDRSHIFT];
1109 if ((pde & PG_PS) != 0)
1110 rtval = (pde & PG_PS_FRAME) | (va & PDRMASK);
1112 pte = pmap_pte(pmap, va);
1113 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK);
1114 pmap_pte_release(pte);
1122 * Routine: pmap_extract_and_hold
1124 * Atomically extract and hold the physical page
1125 * with the given pmap and virtual address pair
1126 * if that mapping permits the given protection.
1129 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
1136 vm_page_lock_queues();
1138 pde = *pmap_pde(pmap, va);
1141 if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) {
1142 m = PHYS_TO_VM_PAGE((pde & PG_PS_FRAME) |
1148 pte = *pmap_pte_quick(pmap, va);
1150 ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) {
1151 m = PHYS_TO_VM_PAGE(pte & PG_FRAME);
1157 vm_page_unlock_queues();
1162 /***************************************************
1163 * Low level mapping routines.....
1164 ***************************************************/
1167 * Add a wired page to the kva.
1168 * Note: not SMP coherent.
1171 pmap_kenter(vm_offset_t va, vm_paddr_t pa)
1176 pte_store(pte, pa | PG_RW | PG_V | pgeflag);
1179 static __inline void
1180 pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode)
1185 pte_store(pte, pa | PG_RW | PG_V | pgeflag | pmap_cache_bits(mode, 0));
1189 * Remove a page from the kernel pagetables.
1190 * Note: not SMP coherent.
1193 pmap_kremove(vm_offset_t va)
1202 * Used to map a range of physical addresses into kernel
1203 * virtual address space.
1205 * The value passed in '*virt' is a suggested virtual address for
1206 * the mapping. Architectures which can support a direct-mapped
1207 * physical to virtual region can return the appropriate address
1208 * within that region, leaving '*virt' unchanged. Other
1209 * architectures should map the pages starting at '*virt' and
1210 * update '*virt' with the first usable address after the mapped
1214 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
1216 vm_offset_t va, sva;
1219 while (start < end) {
1220 pmap_kenter(va, start);
1224 pmap_invalidate_range(kernel_pmap, sva, va);
1231 * Add a list of wired pages to the kva
1232 * this routine is only used for temporary
1233 * kernel mappings that do not need to have
1234 * page modification or references recorded.
1235 * Note that old mappings are simply written
1236 * over. The page *must* be wired.
1237 * Note: SMP coherent. Uses a ranged shootdown IPI.
1240 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1242 pt_entry_t *endpte, oldpte, *pte;
1246 endpte = pte + count;
1247 while (pte < endpte) {
1249 pte_store(pte, VM_PAGE_TO_PHYS(*ma) | pgeflag |
1250 pmap_cache_bits((*ma)->md.pat_mode, 0) | PG_RW | PG_V);
1254 if ((oldpte & PG_V) != 0)
1255 pmap_invalidate_range(kernel_pmap, sva, sva + count *
1260 * This routine tears out page mappings from the
1261 * kernel -- it is meant only for temporary mappings.
1262 * Note: SMP coherent. Uses a ranged shootdown IPI.
1265 pmap_qremove(vm_offset_t sva, int count)
1270 while (count-- > 0) {
1274 pmap_invalidate_range(kernel_pmap, sva, va);
1277 /***************************************************
1278 * Page table page management routines.....
1279 ***************************************************/
1280 static __inline void
1281 pmap_free_zero_pages(vm_page_t free)
1285 while (free != NULL) {
1288 /* Preserve the page's PG_ZERO setting. */
1289 vm_page_free_toq(m);
1294 * Schedule the specified unused page table page to be freed. Specifically,
1295 * add the page to the specified list of pages that will be released to the
1296 * physical memory manager after the TLB has been updated.
1298 static __inline void
1299 pmap_add_delayed_free_list(vm_page_t m, vm_page_t *free, boolean_t set_PG_ZERO)
1303 m->flags |= PG_ZERO;
1305 m->flags &= ~PG_ZERO;
1311 * Inserts the specified page table page into the specified pmap's collection
1312 * of idle page table pages. Each of a pmap's page table pages is responsible
1313 * for mapping a distinct range of virtual addresses. The pmap's collection is
1314 * ordered by this virtual address range.
1317 pmap_insert_pt_page(pmap_t pmap, vm_page_t mpte)
1321 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1322 root = pmap->pm_root;
1327 root = vm_page_splay(mpte->pindex, root);
1328 if (mpte->pindex < root->pindex) {
1329 mpte->left = root->left;
1332 } else if (mpte->pindex == root->pindex)
1333 panic("pmap_insert_pt_page: pindex already inserted");
1335 mpte->right = root->right;
1340 pmap->pm_root = mpte;
1344 * Looks for a page table page mapping the specified virtual address in the
1345 * specified pmap's collection of idle page table pages. Returns NULL if there
1346 * is no page table page corresponding to the specified virtual address.
1349 pmap_lookup_pt_page(pmap_t pmap, vm_offset_t va)
1352 vm_pindex_t pindex = va >> PDRSHIFT;
1354 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1355 if ((mpte = pmap->pm_root) != NULL && mpte->pindex != pindex) {
1356 mpte = vm_page_splay(pindex, mpte);
1357 if ((pmap->pm_root = mpte)->pindex != pindex)
1364 * Removes the specified page table page from the specified pmap's collection
1365 * of idle page table pages. The specified page table page must be a member of
1366 * the pmap's collection.
1369 pmap_remove_pt_page(pmap_t pmap, vm_page_t mpte)
1373 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1374 if (mpte != pmap->pm_root)
1375 vm_page_splay(mpte->pindex, pmap->pm_root);
1376 if (mpte->left == NULL)
1379 root = vm_page_splay(mpte->pindex, mpte->left);
1380 root->right = mpte->right;
1382 pmap->pm_root = root;
1386 * This routine unholds page table pages, and if the hold count
1387 * drops to zero, then it decrements the wire count.
1390 pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free)
1394 if (m->wire_count == 0)
1395 return _pmap_unwire_pte_hold(pmap, m, free);
1401 _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free)
1406 * unmap the page table page
1408 pmap->pm_pdir[m->pindex] = 0;
1409 --pmap->pm_stats.resident_count;
1412 * This is a release store so that the ordinary store unmapping
1413 * the page table page is globally performed before TLB shoot-
1416 atomic_subtract_rel_int(&cnt.v_wire_count, 1);
1419 * Do an invltlb to make the invalidated mapping
1420 * take effect immediately.
1422 pteva = VM_MAXUSER_ADDRESS + i386_ptob(m->pindex);
1423 pmap_invalidate_page(pmap, pteva);
1426 * Put page on a list so that it is released after
1427 * *ALL* TLB shootdown is done
1429 pmap_add_delayed_free_list(m, free, TRUE);
1435 * After removing a page table entry, this routine is used to
1436 * conditionally free the page, and manage the hold/wire counts.
1439 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t *free)
1444 if (va >= VM_MAXUSER_ADDRESS)
1446 ptepde = *pmap_pde(pmap, va);
1447 mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME);
1448 return pmap_unwire_pte_hold(pmap, mpte, free);
1452 pmap_pinit0(pmap_t pmap)
1455 PMAP_LOCK_INIT(pmap);
1456 pmap->pm_pdir = (pd_entry_t *)(KERNBASE + (vm_offset_t)IdlePTD);
1458 pmap->pm_pdpt = (pdpt_entry_t *)(KERNBASE + (vm_offset_t)IdlePDPT);
1460 pmap->pm_root = NULL;
1461 pmap->pm_active = 0;
1462 PCPU_SET(curpmap, pmap);
1463 TAILQ_INIT(&pmap->pm_pvchunk);
1464 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1465 mtx_lock_spin(&allpmaps_lock);
1466 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1467 mtx_unlock_spin(&allpmaps_lock);
1471 * Initialize a preallocated and zeroed pmap structure,
1472 * such as one in a vmspace structure.
1475 pmap_pinit(pmap_t pmap)
1477 vm_page_t m, ptdpg[NPGPTD];
1482 PMAP_LOCK_INIT(pmap);
1485 * No need to allocate page table space yet but we do need a valid
1486 * page directory table.
1488 if (pmap->pm_pdir == NULL) {
1489 pmap->pm_pdir = (pd_entry_t *)kmem_alloc_nofault(kernel_map,
1492 if (pmap->pm_pdir == NULL) {
1493 PMAP_LOCK_DESTROY(pmap);
1497 pmap->pm_pdpt = uma_zalloc(pdptzone, M_WAITOK | M_ZERO);
1498 KASSERT(((vm_offset_t)pmap->pm_pdpt &
1499 ((NPGPTD * sizeof(pdpt_entry_t)) - 1)) == 0,
1500 ("pmap_pinit: pdpt misaligned"));
1501 KASSERT(pmap_kextract((vm_offset_t)pmap->pm_pdpt) < (4ULL<<30),
1502 ("pmap_pinit: pdpt above 4g"));
1504 pmap->pm_root = NULL;
1506 KASSERT(pmap->pm_root == NULL,
1507 ("pmap_pinit: pmap has reserved page table page(s)"));
1510 * allocate the page directory page(s)
1512 for (i = 0; i < NPGPTD;) {
1513 m = vm_page_alloc(NULL, color++,
1514 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1523 pmap_qenter((vm_offset_t)pmap->pm_pdir, ptdpg, NPGPTD);
1525 for (i = 0; i < NPGPTD; i++) {
1526 if ((ptdpg[i]->flags & PG_ZERO) == 0)
1527 bzero(pmap->pm_pdir + (i * NPDEPG), PAGE_SIZE);
1530 mtx_lock_spin(&allpmaps_lock);
1531 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1532 mtx_unlock_spin(&allpmaps_lock);
1533 /* Wire in kernel global address entries. */
1534 bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * sizeof(pd_entry_t));
1536 /* install self-referential address mapping entry(s) */
1537 for (i = 0; i < NPGPTD; i++) {
1538 pa = VM_PAGE_TO_PHYS(ptdpg[i]);
1539 pmap->pm_pdir[PTDPTDI + i] = pa | PG_V | PG_RW | PG_A | PG_M;
1541 pmap->pm_pdpt[i] = pa | PG_V;
1545 pmap->pm_active = 0;
1546 TAILQ_INIT(&pmap->pm_pvchunk);
1547 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1553 * this routine is called if the page table page is not
1557 _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags)
1562 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
1563 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
1564 ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
1567 * Allocate a page table page.
1569 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1570 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1571 if (flags & M_WAITOK) {
1573 vm_page_unlock_queues();
1575 vm_page_lock_queues();
1580 * Indicate the need to retry. While waiting, the page table
1581 * page may have been allocated.
1585 if ((m->flags & PG_ZERO) == 0)
1589 * Map the pagetable page into the process address space, if
1590 * it isn't already there.
1593 pmap->pm_stats.resident_count++;
1595 ptepa = VM_PAGE_TO_PHYS(m);
1596 pmap->pm_pdir[ptepindex] =
1597 (pd_entry_t) (ptepa | PG_U | PG_RW | PG_V | PG_A | PG_M);
1603 pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags)
1609 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
1610 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
1611 ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
1614 * Calculate pagetable page index
1616 ptepindex = va >> PDRSHIFT;
1619 * Get the page directory entry
1621 ptepa = pmap->pm_pdir[ptepindex];
1624 * This supports switching from a 4MB page to a
1627 if (ptepa & PG_PS) {
1628 (void)pmap_demote_pde(pmap, &pmap->pm_pdir[ptepindex], va);
1629 ptepa = pmap->pm_pdir[ptepindex];
1633 * If the page table page is mapped, we just increment the
1634 * hold count, and activate it.
1637 m = PHYS_TO_VM_PAGE(ptepa & PG_FRAME);
1641 * Here if the pte page isn't mapped, or if it has
1644 m = _pmap_allocpte(pmap, ptepindex, flags);
1645 if (m == NULL && (flags & M_WAITOK))
1652 /***************************************************
1653 * Pmap allocation/deallocation routines.
1654 ***************************************************/
1658 * Deal with a SMP shootdown of other users of the pmap that we are
1659 * trying to dispose of. This can be a bit hairy.
1661 static cpumask_t *lazymask;
1662 static u_int lazyptd;
1663 static volatile u_int lazywait;
1665 void pmap_lazyfix_action(void);
1668 pmap_lazyfix_action(void)
1670 cpumask_t mymask = PCPU_GET(cpumask);
1673 (*ipi_lazypmap_counts[PCPU_GET(cpuid)])++;
1675 if (rcr3() == lazyptd)
1676 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1677 atomic_clear_int(lazymask, mymask);
1678 atomic_store_rel_int(&lazywait, 1);
1682 pmap_lazyfix_self(cpumask_t mymask)
1685 if (rcr3() == lazyptd)
1686 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1687 atomic_clear_int(lazymask, mymask);
1692 pmap_lazyfix(pmap_t pmap)
1694 cpumask_t mymask, mask;
1697 while ((mask = pmap->pm_active) != 0) {
1699 mask = mask & -mask; /* Find least significant set bit */
1700 mtx_lock_spin(&smp_ipi_mtx);
1702 lazyptd = vtophys(pmap->pm_pdpt);
1704 lazyptd = vtophys(pmap->pm_pdir);
1706 mymask = PCPU_GET(cpumask);
1707 if (mask == mymask) {
1708 lazymask = &pmap->pm_active;
1709 pmap_lazyfix_self(mymask);
1711 atomic_store_rel_int((u_int *)&lazymask,
1712 (u_int)&pmap->pm_active);
1713 atomic_store_rel_int(&lazywait, 0);
1714 ipi_selected(mask, IPI_LAZYPMAP);
1715 while (lazywait == 0) {
1721 mtx_unlock_spin(&smp_ipi_mtx);
1723 printf("pmap_lazyfix: spun for 50000000\n");
1730 * Cleaning up on uniprocessor is easy. For various reasons, we're
1731 * unlikely to have to even execute this code, including the fact
1732 * that the cleanup is deferred until the parent does a wait(2), which
1733 * means that another userland process has run.
1736 pmap_lazyfix(pmap_t pmap)
1740 cr3 = vtophys(pmap->pm_pdir);
1741 if (cr3 == rcr3()) {
1742 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1743 pmap->pm_active &= ~(PCPU_GET(cpumask));
1749 * Release any resources held by the given physical map.
1750 * Called when a pmap initialized by pmap_pinit is being released.
1751 * Should only be called if the map contains no valid mappings.
1754 pmap_release(pmap_t pmap)
1756 vm_page_t m, ptdpg[NPGPTD];
1759 KASSERT(pmap->pm_stats.resident_count == 0,
1760 ("pmap_release: pmap resident count %ld != 0",
1761 pmap->pm_stats.resident_count));
1762 KASSERT(pmap->pm_root == NULL,
1763 ("pmap_release: pmap has reserved page table page(s)"));
1766 mtx_lock_spin(&allpmaps_lock);
1767 LIST_REMOVE(pmap, pm_list);
1768 mtx_unlock_spin(&allpmaps_lock);
1770 for (i = 0; i < NPGPTD; i++)
1771 ptdpg[i] = PHYS_TO_VM_PAGE(pmap->pm_pdir[PTDPTDI + i] &
1774 bzero(pmap->pm_pdir + PTDPTDI, (nkpt + NPGPTD) *
1775 sizeof(*pmap->pm_pdir));
1777 pmap_qremove((vm_offset_t)pmap->pm_pdir, NPGPTD);
1779 for (i = 0; i < NPGPTD; i++) {
1782 KASSERT(VM_PAGE_TO_PHYS(m) == (pmap->pm_pdpt[i] & PG_FRAME),
1783 ("pmap_release: got wrong ptd page"));
1786 atomic_subtract_int(&cnt.v_wire_count, 1);
1787 vm_page_free_zero(m);
1789 PMAP_LOCK_DESTROY(pmap);
1793 kvm_size(SYSCTL_HANDLER_ARGS)
1795 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE;
1797 return sysctl_handle_long(oidp, &ksize, 0, req);
1799 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD,
1800 0, 0, kvm_size, "IU", "Size of KVM");
1803 kvm_free(SYSCTL_HANDLER_ARGS)
1805 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1807 return sysctl_handle_long(oidp, &kfree, 0, req);
1809 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD,
1810 0, 0, kvm_free, "IU", "Amount of KVM free");
1813 * grow the number of kernel page table entries, if needed
1816 pmap_growkernel(vm_offset_t addr)
1819 vm_paddr_t ptppaddr;
1824 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1825 if (kernel_vm_end == 0) {
1826 kernel_vm_end = KERNBASE;
1828 while (pdir_pde(PTD, kernel_vm_end)) {
1829 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1831 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1832 kernel_vm_end = kernel_map->max_offset;
1837 addr = roundup2(addr, PAGE_SIZE * NPTEPG);
1838 if (addr - 1 >= kernel_map->max_offset)
1839 addr = kernel_map->max_offset;
1840 while (kernel_vm_end < addr) {
1841 if (pdir_pde(PTD, kernel_vm_end)) {
1842 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1843 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1844 kernel_vm_end = kernel_map->max_offset;
1850 nkpg = vm_page_alloc(NULL, kernel_vm_end >> PDRSHIFT,
1851 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1854 panic("pmap_growkernel: no memory to grow kernel");
1858 if ((nkpg->flags & PG_ZERO) == 0)
1859 pmap_zero_page(nkpg);
1860 ptppaddr = VM_PAGE_TO_PHYS(nkpg);
1861 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M);
1862 pdir_pde(PTD, kernel_vm_end) = newpdir;
1864 mtx_lock_spin(&allpmaps_lock);
1865 LIST_FOREACH(pmap, &allpmaps, pm_list) {
1866 pde = pmap_pde(pmap, kernel_vm_end);
1867 pde_store(pde, newpdir);
1869 mtx_unlock_spin(&allpmaps_lock);
1870 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1871 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1872 kernel_vm_end = kernel_map->max_offset;
1879 /***************************************************
1880 * page management routines.
1881 ***************************************************/
1883 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1884 CTASSERT(_NPCM == 11);
1886 static __inline struct pv_chunk *
1887 pv_to_chunk(pv_entry_t pv)
1890 return (struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK);
1893 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1895 #define PC_FREE0_9 0xfffffffful /* Free values for index 0 through 9 */
1896 #define PC_FREE10 0x0000fffful /* Free values for index 10 */
1898 static uint32_t pc_freemask[11] = {
1899 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
1900 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
1901 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
1902 PC_FREE0_9, PC_FREE10
1905 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1906 "Current number of pv entries");
1909 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1911 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1912 "Current number of pv entry chunks");
1913 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1914 "Current number of pv entry chunks allocated");
1915 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1916 "Current number of pv entry chunks frees");
1917 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1918 "Number of times tried to get a chunk page but failed.");
1920 static long pv_entry_frees, pv_entry_allocs;
1921 static int pv_entry_spare;
1923 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1924 "Current number of pv entry frees");
1925 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1926 "Current number of pv entry allocs");
1927 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1928 "Current number of spare pv entries");
1930 static int pmap_collect_inactive, pmap_collect_active;
1932 SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_inactive, CTLFLAG_RD, &pmap_collect_inactive, 0,
1933 "Current number times pmap_collect called on inactive queue");
1934 SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_active, CTLFLAG_RD, &pmap_collect_active, 0,
1935 "Current number times pmap_collect called on active queue");
1939 * We are in a serious low memory condition. Resort to
1940 * drastic measures to free some pages so we can allocate
1941 * another pv entry chunk. This is normally called to
1942 * unmap inactive pages, and if necessary, active pages.
1945 pmap_collect(pmap_t locked_pmap, struct vpgqueues *vpq)
1947 struct md_page *pvh;
1950 pt_entry_t *pte, tpte;
1951 pv_entry_t next_pv, pv;
1956 TAILQ_FOREACH(m, &vpq->pl, pageq) {
1957 if (m->hold_count || m->busy)
1959 TAILQ_FOREACH_SAFE(pv, &m->md.pv_list, pv_list, next_pv) {
1962 /* Avoid deadlock and lock recursion. */
1963 if (pmap > locked_pmap)
1965 else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap))
1967 pmap->pm_stats.resident_count--;
1968 pde = pmap_pde(pmap, va);
1969 KASSERT((*pde & PG_PS) == 0, ("pmap_collect: found"
1970 " a 4mpage in page %p's pv list", m));
1971 pte = pmap_pte_quick(pmap, va);
1972 tpte = pte_load_clear(pte);
1973 KASSERT((tpte & PG_W) == 0,
1974 ("pmap_collect: wired pte %#jx", (uintmax_t)tpte));
1976 vm_page_flag_set(m, PG_REFERENCED);
1977 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
1980 pmap_unuse_pt(pmap, va, &free);
1981 pmap_invalidate_page(pmap, va);
1982 pmap_free_zero_pages(free);
1983 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
1984 if (TAILQ_EMPTY(&m->md.pv_list)) {
1985 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
1986 if (TAILQ_EMPTY(&pvh->pv_list))
1987 vm_page_flag_clear(m, PG_WRITEABLE);
1989 free_pv_entry(pmap, pv);
1990 if (pmap != locked_pmap)
1999 * free the pv_entry back to the free list
2002 free_pv_entry(pmap_t pmap, pv_entry_t pv)
2005 struct pv_chunk *pc;
2006 int idx, field, bit;
2008 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2009 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2010 PV_STAT(pv_entry_frees++);
2011 PV_STAT(pv_entry_spare++);
2013 pc = pv_to_chunk(pv);
2014 idx = pv - &pc->pc_pventry[0];
2017 pc->pc_map[field] |= 1ul << bit;
2018 /* move to head of list */
2019 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2020 for (idx = 0; idx < _NPCM; idx++)
2021 if (pc->pc_map[idx] != pc_freemask[idx]) {
2022 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
2025 PV_STAT(pv_entry_spare -= _NPCPV);
2026 PV_STAT(pc_chunk_count--);
2027 PV_STAT(pc_chunk_frees++);
2028 /* entire chunk is free, return it */
2029 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc));
2030 pmap_qremove((vm_offset_t)pc, 1);
2031 vm_page_unwire(m, 0);
2033 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc);
2037 * get a new pv_entry, allocating a block from the system
2041 get_pv_entry(pmap_t pmap, int try)
2043 static const struct timeval printinterval = { 60, 0 };
2044 static struct timeval lastprint;
2045 static vm_pindex_t colour;
2046 struct vpgqueues *pq;
2049 struct pv_chunk *pc;
2052 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2053 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2054 PV_STAT(pv_entry_allocs++);
2056 if (pv_entry_count > pv_entry_high_water)
2057 if (ratecheck(&lastprint, &printinterval))
2058 printf("Approaching the limit on PV entries, consider "
2059 "increasing either the vm.pmap.shpgperproc or the "
2060 "vm.pmap.pv_entry_max tunable.\n");
2063 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
2065 for (field = 0; field < _NPCM; field++) {
2066 if (pc->pc_map[field]) {
2067 bit = bsfl(pc->pc_map[field]);
2071 if (field < _NPCM) {
2072 pv = &pc->pc_pventry[field * 32 + bit];
2073 pc->pc_map[field] &= ~(1ul << bit);
2074 /* If this was the last item, move it to tail */
2075 for (field = 0; field < _NPCM; field++)
2076 if (pc->pc_map[field] != 0) {
2077 PV_STAT(pv_entry_spare--);
2078 return (pv); /* not full, return */
2080 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2081 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
2082 PV_STAT(pv_entry_spare--);
2087 * Access to the ptelist "pv_vafree" is synchronized by the page
2088 * queues lock. If "pv_vafree" is currently non-empty, it will
2089 * remain non-empty until pmap_ptelist_alloc() completes.
2091 if (pv_vafree == 0 || (m = vm_page_alloc(NULL, colour, (pq ==
2092 &vm_page_queues[PQ_ACTIVE] ? VM_ALLOC_SYSTEM : VM_ALLOC_NORMAL) |
2093 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) == NULL) {
2096 PV_STAT(pc_chunk_tryfail++);
2100 * Reclaim pv entries: At first, destroy mappings to
2101 * inactive pages. After that, if a pv chunk entry
2102 * is still needed, destroy mappings to active pages.
2105 PV_STAT(pmap_collect_inactive++);
2106 pq = &vm_page_queues[PQ_INACTIVE];
2107 } else if (pq == &vm_page_queues[PQ_INACTIVE]) {
2108 PV_STAT(pmap_collect_active++);
2109 pq = &vm_page_queues[PQ_ACTIVE];
2111 panic("get_pv_entry: increase vm.pmap.shpgperproc");
2112 pmap_collect(pmap, pq);
2115 PV_STAT(pc_chunk_count++);
2116 PV_STAT(pc_chunk_allocs++);
2118 pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree);
2119 pmap_qenter((vm_offset_t)pc, &m, 1);
2121 pc->pc_map[0] = pc_freemask[0] & ~1ul; /* preallocated bit 0 */
2122 for (field = 1; field < _NPCM; field++)
2123 pc->pc_map[field] = pc_freemask[field];
2124 pv = &pc->pc_pventry[0];
2125 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
2126 PV_STAT(pv_entry_spare += _NPCPV - 1);
2130 static __inline pv_entry_t
2131 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
2135 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2136 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
2137 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
2138 TAILQ_REMOVE(&pvh->pv_list, pv, pv_list);
2146 pmap_pv_demote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
2148 struct md_page *pvh;
2150 vm_offset_t va_last;
2153 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2154 KASSERT((pa & PDRMASK) == 0,
2155 ("pmap_pv_demote_pde: pa is not 4mpage aligned"));
2158 * Transfer the 4mpage's pv entry for this mapping to the first
2161 pvh = pa_to_pvh(pa);
2162 va = trunc_4mpage(va);
2163 pv = pmap_pvh_remove(pvh, pmap, va);
2164 KASSERT(pv != NULL, ("pmap_pv_demote_pde: pv not found"));
2165 m = PHYS_TO_VM_PAGE(pa);
2166 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
2167 /* Instantiate the remaining NPTEPG - 1 pv entries. */
2168 va_last = va + NBPDR - PAGE_SIZE;
2171 KASSERT((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0,
2172 ("pmap_pv_demote_pde: page %p is not managed", m));
2174 pmap_insert_entry(pmap, va, m);
2175 } while (va < va_last);
2179 pmap_pv_promote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
2181 struct md_page *pvh;
2183 vm_offset_t va_last;
2186 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2187 KASSERT((pa & PDRMASK) == 0,
2188 ("pmap_pv_promote_pde: pa is not 4mpage aligned"));
2191 * Transfer the first page's pv entry for this mapping to the
2192 * 4mpage's pv list. Aside from avoiding the cost of a call
2193 * to get_pv_entry(), a transfer avoids the possibility that
2194 * get_pv_entry() calls pmap_collect() and that pmap_collect()
2195 * removes one of the mappings that is being promoted.
2197 m = PHYS_TO_VM_PAGE(pa);
2198 va = trunc_4mpage(va);
2199 pv = pmap_pvh_remove(&m->md, pmap, va);
2200 KASSERT(pv != NULL, ("pmap_pv_promote_pde: pv not found"));
2201 pvh = pa_to_pvh(pa);
2202 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_list);
2203 /* Free the remaining NPTEPG - 1 pv entries. */
2204 va_last = va + NBPDR - PAGE_SIZE;
2208 pmap_pvh_free(&m->md, pmap, va);
2209 } while (va < va_last);
2213 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
2217 pv = pmap_pvh_remove(pvh, pmap, va);
2218 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found"));
2219 free_pv_entry(pmap, pv);
2223 pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va)
2225 struct md_page *pvh;
2227 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2228 pmap_pvh_free(&m->md, pmap, va);
2229 if (TAILQ_EMPTY(&m->md.pv_list)) {
2230 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
2231 if (TAILQ_EMPTY(&pvh->pv_list))
2232 vm_page_flag_clear(m, PG_WRITEABLE);
2237 * Create a pv entry for page at pa for
2241 pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m)
2245 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2246 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2247 pv = get_pv_entry(pmap, FALSE);
2249 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
2253 * Conditionally create a pv entry.
2256 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m)
2260 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2261 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2262 if (pv_entry_count < pv_entry_high_water &&
2263 (pv = get_pv_entry(pmap, TRUE)) != NULL) {
2265 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
2272 * Create the pv entries for each of the pages within a superpage.
2275 pmap_pv_insert_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
2277 struct md_page *pvh;
2280 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2281 if (pv_entry_count < pv_entry_high_water &&
2282 (pv = get_pv_entry(pmap, TRUE)) != NULL) {
2284 pvh = pa_to_pvh(pa);
2285 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_list);
2292 * Tries to demote a 2- or 4MB page mapping.
2295 pmap_demote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va)
2297 pd_entry_t newpde, oldpde;
2298 pmap_t allpmaps_entry;
2299 pt_entry_t *firstpte, newpte, *pte;
2301 vm_page_t free, mpte;
2303 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2304 mpte = pmap_lookup_pt_page(pmap, va);
2306 pmap_remove_pt_page(pmap, mpte);
2308 KASSERT((*pde & PG_W) == 0,
2309 ("pmap_demote_pde: page table page for a wired mapping"
2312 pmap_remove_pde(pmap, pde, trunc_4mpage(va), &free);
2313 pmap_invalidate_page(pmap, trunc_4mpage(va));
2314 pmap_free_zero_pages(free);
2315 CTR2(KTR_PMAP, "pmap_demote_pde: failure for va %#x"
2316 " in pmap %p", va, pmap);
2319 mptepa = VM_PAGE_TO_PHYS(mpte);
2322 * Temporarily map the page table page (mpte) into the kernel's
2323 * address space at either PADDR1 or PADDR2.
2325 if (curthread->td_pinned > 0 && mtx_owned(&vm_page_queue_mtx)) {
2326 if ((*PMAP1 & PG_FRAME) != mptepa) {
2327 *PMAP1 = mptepa | PG_RW | PG_V | PG_A | PG_M;
2329 PMAP1cpu = PCPU_GET(cpuid);
2335 if (PMAP1cpu != PCPU_GET(cpuid)) {
2336 PMAP1cpu = PCPU_GET(cpuid);
2344 mtx_lock(&PMAP2mutex);
2345 if ((*PMAP2 & PG_FRAME) != mptepa) {
2346 *PMAP2 = mptepa | PG_RW | PG_V | PG_A | PG_M;
2347 pmap_invalidate_page(kernel_pmap, (vm_offset_t)PADDR2);
2352 newpde = mptepa | PG_M | PG_A | (oldpde & PG_U) | PG_RW | PG_V;
2353 KASSERT((oldpde & (PG_A | PG_V)) == (PG_A | PG_V),
2354 ("pmap_demote_pde: oldpde is missing PG_A and/or PG_V"));
2355 KASSERT((oldpde & (PG_M | PG_RW)) != PG_RW,
2356 ("pmap_demote_pde: oldpde is missing PG_M"));
2357 KASSERT((oldpde & PG_PS) != 0,
2358 ("pmap_demote_pde: oldpde is missing PG_PS"));
2359 newpte = oldpde & ~PG_PS;
2360 if ((newpte & PG_PDE_PAT) != 0)
2361 newpte ^= PG_PDE_PAT | PG_PTE_PAT;
2364 * If the mapping has changed attributes, update the page table
2367 KASSERT((*firstpte & PG_FRAME) == (newpte & PG_FRAME),
2368 ("pmap_demote_pde: firstpte and newpte map different physical"
2370 if ((*firstpte & PG_PTE_PROMOTE) != (newpte & PG_PTE_PROMOTE))
2371 for (pte = firstpte; pte < firstpte + NPTEPG; pte++) {
2373 newpte += PAGE_SIZE;
2377 * Demote the mapping. This pmap is locked. The old PDE has
2378 * PG_A set. If the old PDE has PG_RW set, it also has PG_M
2379 * set. Thus, there is no danger of a race with another
2380 * processor changing the setting of PG_A and/or PG_M between
2381 * the read above and the store below.
2383 if (pmap == kernel_pmap) {
2385 * A harmless race exists between this loop and the bcopy()
2386 * in pmap_pinit() that initializes the kernel segment of
2387 * the new page table. Specifically, that bcopy() may copy
2388 * the new PDE from the PTD, which is first in allpmaps, to
2389 * the new page table before this loop updates that new
2392 mtx_lock_spin(&allpmaps_lock);
2393 LIST_FOREACH(allpmaps_entry, &allpmaps, pm_list) {
2394 pde = pmap_pde(allpmaps_entry, va);
2395 KASSERT(*pde == newpde || (*pde & PG_PTE_PROMOTE) ==
2396 (oldpde & PG_PTE_PROMOTE),
2397 ("pmap_demote_pde: pde was %#jx, expected %#jx",
2398 (uintmax_t)*pde, (uintmax_t)oldpde));
2399 pde_store(pde, newpde);
2401 mtx_unlock_spin(&allpmaps_lock);
2403 pde_store(pde, newpde);
2404 if (firstpte == PADDR2)
2405 mtx_unlock(&PMAP2mutex);
2408 * Invalidate the recursive mapping of the page table page.
2410 pmap_invalidate_page(pmap, (vm_offset_t)vtopte(va));
2413 * Demote the pv entry. This depends on the earlier demotion
2414 * of the mapping. Specifically, the (re)creation of a per-
2415 * page pv entry might trigger the execution of pmap_collect(),
2416 * which might reclaim a newly (re)created per-page pv entry
2417 * and destroy the associated mapping. In order to destroy
2418 * the mapping, the PDE must have already changed from mapping
2419 * the 2mpage to referencing the page table page.
2421 if ((oldpde & PG_MANAGED) != 0)
2422 pmap_pv_demote_pde(pmap, va, oldpde & PG_PS_FRAME);
2424 pmap_pde_demotions++;
2425 CTR2(KTR_PMAP, "pmap_demote_pde: success for va %#x"
2426 " in pmap %p", va, pmap);
2431 * pmap_remove_pde: do the things to unmap a superpage in a process
2434 pmap_remove_pde(pmap_t pmap, pd_entry_t *pdq, vm_offset_t sva,
2437 struct md_page *pvh;
2439 vm_offset_t eva, va;
2442 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2443 KASSERT((sva & PDRMASK) == 0,
2444 ("pmap_remove_pde: sva is not 4mpage aligned"));
2445 oldpde = pte_load_clear(pdq);
2447 pmap->pm_stats.wired_count -= NBPDR / PAGE_SIZE;
2450 * Machines that don't support invlpg, also don't support
2454 pmap_invalidate_page(kernel_pmap, sva);
2455 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
2456 if (oldpde & PG_MANAGED) {
2457 pvh = pa_to_pvh(oldpde & PG_PS_FRAME);
2458 pmap_pvh_free(pvh, pmap, sva);
2460 for (va = sva, m = PHYS_TO_VM_PAGE(oldpde & PG_PS_FRAME);
2461 va < eva; va += PAGE_SIZE, m++) {
2462 if ((oldpde & (PG_M | PG_RW)) == (PG_M | PG_RW))
2465 vm_page_flag_set(m, PG_REFERENCED);
2466 if (TAILQ_EMPTY(&m->md.pv_list) &&
2467 TAILQ_EMPTY(&pvh->pv_list))
2468 vm_page_flag_clear(m, PG_WRITEABLE);
2471 if (pmap == kernel_pmap) {
2472 if (!pmap_demote_pde(pmap, pdq, sva))
2473 panic("pmap_remove_pde: failed demotion");
2475 mpte = pmap_lookup_pt_page(pmap, sva);
2477 pmap_remove_pt_page(pmap, mpte);
2478 pmap->pm_stats.resident_count--;
2479 KASSERT(mpte->wire_count == NPTEPG,
2480 ("pmap_remove_pde: pte page wire count error"));
2481 mpte->wire_count = 0;
2482 pmap_add_delayed_free_list(mpte, free, FALSE);
2483 atomic_subtract_int(&cnt.v_wire_count, 1);
2489 * pmap_remove_pte: do the things to unmap a page in a process
2492 pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va, vm_page_t *free)
2497 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2498 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2499 oldpte = pte_load_clear(ptq);
2501 pmap->pm_stats.wired_count -= 1;
2503 * Machines that don't support invlpg, also don't support
2507 pmap_invalidate_page(kernel_pmap, va);
2508 pmap->pm_stats.resident_count -= 1;
2509 if (oldpte & PG_MANAGED) {
2510 m = PHYS_TO_VM_PAGE(oldpte & PG_FRAME);
2511 if ((oldpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
2514 vm_page_flag_set(m, PG_REFERENCED);
2515 pmap_remove_entry(pmap, m, va);
2517 return (pmap_unuse_pt(pmap, va, free));
2521 * Remove a single page from a process address space
2524 pmap_remove_page(pmap_t pmap, vm_offset_t va, vm_page_t *free)
2528 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2529 KASSERT(curthread->td_pinned > 0, ("curthread not pinned"));
2530 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2531 if ((pte = pmap_pte_quick(pmap, va)) == NULL || *pte == 0)
2533 pmap_remove_pte(pmap, pte, va, free);
2534 pmap_invalidate_page(pmap, va);
2538 * Remove the given range of addresses from the specified map.
2540 * It is assumed that the start and end are properly
2541 * rounded to the page size.
2544 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2549 vm_page_t free = NULL;
2553 * Perform an unsynchronized read. This is, however, safe.
2555 if (pmap->pm_stats.resident_count == 0)
2560 vm_page_lock_queues();
2565 * special handling of removing one page. a very
2566 * common operation and easy to short circuit some
2569 if ((sva + PAGE_SIZE == eva) &&
2570 ((pmap->pm_pdir[(sva >> PDRSHIFT)] & PG_PS) == 0)) {
2571 pmap_remove_page(pmap, sva, &free);
2575 for (; sva < eva; sva = pdnxt) {
2579 * Calculate index for next page table.
2581 pdnxt = (sva + NBPDR) & ~PDRMASK;
2584 if (pmap->pm_stats.resident_count == 0)
2587 pdirindex = sva >> PDRSHIFT;
2588 ptpaddr = pmap->pm_pdir[pdirindex];
2591 * Weed out invalid mappings. Note: we assume that the page
2592 * directory table is always allocated, and in kernel virtual.
2598 * Check for large page.
2600 if ((ptpaddr & PG_PS) != 0) {
2602 * Are we removing the entire large page? If not,
2603 * demote the mapping and fall through.
2605 if (sva + NBPDR == pdnxt && eva >= pdnxt) {
2607 * The TLB entry for a PG_G mapping is
2608 * invalidated by pmap_remove_pde().
2610 if ((ptpaddr & PG_G) == 0)
2612 pmap_remove_pde(pmap,
2613 &pmap->pm_pdir[pdirindex], sva, &free);
2615 } else if (!pmap_demote_pde(pmap,
2616 &pmap->pm_pdir[pdirindex], sva)) {
2617 /* The large page mapping was destroyed. */
2623 * Limit our scan to either the end of the va represented
2624 * by the current page table page, or to the end of the
2625 * range being removed.
2630 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++,
2636 * The TLB entry for a PG_G mapping is invalidated
2637 * by pmap_remove_pte().
2639 if ((*pte & PG_G) == 0)
2641 if (pmap_remove_pte(pmap, pte, sva, &free))
2648 pmap_invalidate_all(pmap);
2649 vm_page_unlock_queues();
2651 pmap_free_zero_pages(free);
2655 * Routine: pmap_remove_all
2657 * Removes this physical page from
2658 * all physical maps in which it resides.
2659 * Reflects back modify bits to the pager.
2662 * Original versions of this routine were very
2663 * inefficient because they iteratively called
2664 * pmap_remove (slow...)
2668 pmap_remove_all(vm_page_t m)
2670 struct md_page *pvh;
2673 pt_entry_t *pte, tpte;
2678 KASSERT((m->flags & PG_FICTITIOUS) == 0,
2679 ("pmap_remove_all: page %p is fictitious", m));
2680 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2682 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
2683 while ((pv = TAILQ_FIRST(&pvh->pv_list)) != NULL) {
2687 pde = pmap_pde(pmap, va);
2688 (void)pmap_demote_pde(pmap, pde, va);
2691 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2694 pmap->pm_stats.resident_count--;
2695 pde = pmap_pde(pmap, pv->pv_va);
2696 KASSERT((*pde & PG_PS) == 0, ("pmap_remove_all: found"
2697 " a 4mpage in page %p's pv list", m));
2698 pte = pmap_pte_quick(pmap, pv->pv_va);
2699 tpte = pte_load_clear(pte);
2701 pmap->pm_stats.wired_count--;
2703 vm_page_flag_set(m, PG_REFERENCED);
2706 * Update the vm_page_t clean and reference bits.
2708 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
2711 pmap_unuse_pt(pmap, pv->pv_va, &free);
2712 pmap_invalidate_page(pmap, pv->pv_va);
2713 pmap_free_zero_pages(free);
2714 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2715 free_pv_entry(pmap, pv);
2718 vm_page_flag_clear(m, PG_WRITEABLE);
2723 * pmap_protect_pde: do the things to protect a 4mpage in a process
2726 pmap_protect_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t sva, vm_prot_t prot)
2728 pd_entry_t newpde, oldpde;
2729 vm_offset_t eva, va;
2731 boolean_t anychanged;
2733 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2734 KASSERT((sva & PDRMASK) == 0,
2735 ("pmap_protect_pde: sva is not 4mpage aligned"));
2738 oldpde = newpde = *pde;
2739 if (oldpde & PG_MANAGED) {
2741 for (va = sva, m = PHYS_TO_VM_PAGE(oldpde & PG_PS_FRAME);
2742 va < eva; va += PAGE_SIZE, m++) {
2744 * In contrast to the analogous operation on a 4KB page
2745 * mapping, the mapping's PG_A flag is not cleared and
2746 * the page's PG_REFERENCED flag is not set. The
2747 * reason is that pmap_demote_pde() expects that a 2/4MB
2748 * page mapping with a stored page table page has PG_A
2751 if ((oldpde & (PG_M | PG_RW)) == (PG_M | PG_RW))
2755 if ((prot & VM_PROT_WRITE) == 0)
2756 newpde &= ~(PG_RW | PG_M);
2758 if ((prot & VM_PROT_EXECUTE) == 0)
2761 if (newpde != oldpde) {
2762 if (!pde_cmpset(pde, oldpde, newpde))
2765 pmap_invalidate_page(pmap, sva);
2769 return (anychanged);
2773 * Set the physical protection on the
2774 * specified range of this map as requested.
2777 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2784 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2785 pmap_remove(pmap, sva, eva);
2790 if ((prot & (VM_PROT_WRITE|VM_PROT_EXECUTE)) ==
2791 (VM_PROT_WRITE|VM_PROT_EXECUTE))
2794 if (prot & VM_PROT_WRITE)
2800 vm_page_lock_queues();
2803 for (; sva < eva; sva = pdnxt) {
2804 pt_entry_t obits, pbits;
2807 pdnxt = (sva + NBPDR) & ~PDRMASK;
2811 pdirindex = sva >> PDRSHIFT;
2812 ptpaddr = pmap->pm_pdir[pdirindex];
2815 * Weed out invalid mappings. Note: we assume that the page
2816 * directory table is always allocated, and in kernel virtual.
2822 * Check for large page.
2824 if ((ptpaddr & PG_PS) != 0) {
2826 * Are we protecting the entire large page? If not,
2827 * demote the mapping and fall through.
2829 if (sva + NBPDR == pdnxt && eva >= pdnxt) {
2831 * The TLB entry for a PG_G mapping is
2832 * invalidated by pmap_protect_pde().
2834 if (pmap_protect_pde(pmap,
2835 &pmap->pm_pdir[pdirindex], sva, prot))
2838 } else if (!pmap_demote_pde(pmap,
2839 &pmap->pm_pdir[pdirindex], sva)) {
2840 /* The large page mapping was destroyed. */
2848 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++,
2854 * Regardless of whether a pte is 32 or 64 bits in
2855 * size, PG_RW, PG_A, and PG_M are among the least
2856 * significant 32 bits.
2858 obits = pbits = *pte;
2859 if ((pbits & PG_V) == 0)
2861 if (pbits & PG_MANAGED) {
2864 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME);
2865 vm_page_flag_set(m, PG_REFERENCED);
2868 if ((pbits & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
2870 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME);
2875 if ((prot & VM_PROT_WRITE) == 0)
2876 pbits &= ~(PG_RW | PG_M);
2878 if ((prot & VM_PROT_EXECUTE) == 0)
2882 if (pbits != obits) {
2884 if (!atomic_cmpset_64(pte, obits, pbits))
2887 if (!atomic_cmpset_int((u_int *)pte, obits,
2892 pmap_invalidate_page(pmap, sva);
2900 pmap_invalidate_all(pmap);
2901 vm_page_unlock_queues();
2906 * Tries to promote the 512 or 1024, contiguous 4KB page mappings that are
2907 * within a single page table page (PTP) to a single 2- or 4MB page mapping.
2908 * For promotion to occur, two conditions must be met: (1) the 4KB page
2909 * mappings must map aligned, contiguous physical memory and (2) the 4KB page
2910 * mappings must have identical characteristics.
2912 * Managed (PG_MANAGED) mappings within the kernel address space are not
2913 * promoted. The reason is that kernel PDEs are replicated in each pmap but
2914 * pmap_clear_ptes() and pmap_ts_referenced() only read the PDE from the kernel
2918 pmap_promote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va)
2921 pmap_t allpmaps_entry;
2922 pt_entry_t *firstpte, oldpte, pa, *pte;
2923 vm_offset_t oldpteva;
2926 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2929 * Examine the first PTE in the specified PTP. Abort if this PTE is
2930 * either invalid, unused, or does not map the first 4KB physical page
2931 * within a 2- or 4MB page.
2933 firstpte = vtopte(trunc_4mpage(va));
2936 if ((newpde & ((PG_FRAME & PDRMASK) | PG_A | PG_V)) != (PG_A | PG_V)) {
2937 pmap_pde_p_failures++;
2938 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x"
2939 " in pmap %p", va, pmap);
2942 if ((*firstpte & PG_MANAGED) != 0 && pmap == kernel_pmap) {
2943 pmap_pde_p_failures++;
2944 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x"
2945 " in pmap %p", va, pmap);
2948 if ((newpde & (PG_M | PG_RW)) == PG_RW) {
2950 * When PG_M is already clear, PG_RW can be cleared without
2951 * a TLB invalidation.
2953 if (!atomic_cmpset_int((u_int *)firstpte, newpde, newpde &
2960 * Examine each of the other PTEs in the specified PTP. Abort if this
2961 * PTE maps an unexpected 4KB physical page or does not have identical
2962 * characteristics to the first PTE.
2964 pa = (newpde & (PG_PS_FRAME | PG_A | PG_V)) + NBPDR - PAGE_SIZE;
2965 for (pte = firstpte + NPTEPG - 1; pte > firstpte; pte--) {
2968 if ((oldpte & (PG_FRAME | PG_A | PG_V)) != pa) {
2969 pmap_pde_p_failures++;
2970 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x"
2971 " in pmap %p", va, pmap);
2974 if ((oldpte & (PG_M | PG_RW)) == PG_RW) {
2976 * When PG_M is already clear, PG_RW can be cleared
2977 * without a TLB invalidation.
2979 if (!atomic_cmpset_int((u_int *)pte, oldpte,
2983 oldpteva = (oldpte & PG_FRAME & PDRMASK) |
2985 CTR2(KTR_PMAP, "pmap_promote_pde: protect for va %#x"
2986 " in pmap %p", oldpteva, pmap);
2988 if ((oldpte & PG_PTE_PROMOTE) != (newpde & PG_PTE_PROMOTE)) {
2989 pmap_pde_p_failures++;
2990 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x"
2991 " in pmap %p", va, pmap);
2998 * Save the page table page in its current state until the PDE
2999 * mapping the superpage is demoted by pmap_demote_pde() or
3000 * destroyed by pmap_remove_pde().
3002 mpte = PHYS_TO_VM_PAGE(*pde & PG_FRAME);
3003 KASSERT(mpte >= vm_page_array &&
3004 mpte < &vm_page_array[vm_page_array_size],
3005 ("pmap_promote_pde: page table page is out of range"));
3006 KASSERT(mpte->pindex == va >> PDRSHIFT,
3007 ("pmap_promote_pde: page table page's pindex is wrong"));
3008 pmap_insert_pt_page(pmap, mpte);
3011 * Promote the pv entries.
3013 if ((newpde & PG_MANAGED) != 0)
3014 pmap_pv_promote_pde(pmap, va, newpde & PG_PS_FRAME);
3017 * Propagate the PAT index to its proper position.
3019 if ((newpde & PG_PTE_PAT) != 0)
3020 newpde ^= PG_PDE_PAT | PG_PTE_PAT;
3023 * Map the superpage.
3025 if (pmap == kernel_pmap) {
3026 mtx_lock_spin(&allpmaps_lock);
3027 LIST_FOREACH(allpmaps_entry, &allpmaps, pm_list) {
3028 pde = pmap_pde(allpmaps_entry, va);
3029 pde_store(pde, PG_PS | newpde);
3031 mtx_unlock_spin(&allpmaps_lock);
3033 pde_store(pde, PG_PS | newpde);
3035 pmap_pde_promotions++;
3036 CTR2(KTR_PMAP, "pmap_promote_pde: success for va %#x"
3037 " in pmap %p", va, pmap);
3041 * Insert the given physical page (p) at
3042 * the specified virtual address (v) in the
3043 * target physical map with the protection requested.
3045 * If specified, the page will be wired down, meaning
3046 * that the related pte can not be reclaimed.
3048 * NB: This is the only routine which MAY NOT lazy-evaluate
3049 * or lose information. That is, this routine must actually
3050 * insert this page into the given map NOW.
3053 pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m,
3054 vm_prot_t prot, boolean_t wired)
3060 pt_entry_t origpte, newpte;
3064 va = trunc_page(va);
3065 KASSERT(va <= VM_MAX_KERNEL_ADDRESS, ("pmap_enter: toobig"));
3066 KASSERT(va < UPT_MIN_ADDRESS || va >= UPT_MAX_ADDRESS,
3067 ("pmap_enter: invalid to pmap_enter page table pages (va: 0x%x)", va));
3071 vm_page_lock_queues();
3076 * In the case that a page table page is not
3077 * resident, we are creating it here.
3079 if (va < VM_MAXUSER_ADDRESS) {
3080 mpte = pmap_allocpte(pmap, va, M_WAITOK);
3083 pde = pmap_pde(pmap, va);
3084 if ((*pde & PG_PS) != 0)
3085 panic("pmap_enter: attempted pmap_enter on 4MB page");
3086 pte = pmap_pte_quick(pmap, va);
3089 * Page Directory table entry not valid, we need a new PT page
3092 panic("pmap_enter: invalid page directory pdir=%#jx, va=%#x",
3093 (uintmax_t)pmap->pm_pdir[PTDPTDI], va);
3096 pa = VM_PAGE_TO_PHYS(m);
3099 opa = origpte & PG_FRAME;
3102 * Mapping has not changed, must be protection or wiring change.
3104 if (origpte && (opa == pa)) {
3106 * Wiring change, just update stats. We don't worry about
3107 * wiring PT pages as they remain resident as long as there
3108 * are valid mappings in them. Hence, if a user page is wired,
3109 * the PT page will be also.
3111 if (wired && ((origpte & PG_W) == 0))
3112 pmap->pm_stats.wired_count++;
3113 else if (!wired && (origpte & PG_W))
3114 pmap->pm_stats.wired_count--;
3117 * Remove extra pte reference
3123 * We might be turning off write access to the page,
3124 * so we go ahead and sense modify status.
3126 if (origpte & PG_MANAGED) {
3133 * Mapping has changed, invalidate old range and fall through to
3134 * handle validating new mapping.
3138 pmap->pm_stats.wired_count--;
3139 if (origpte & PG_MANAGED) {
3140 om = PHYS_TO_VM_PAGE(opa);
3141 pmap_remove_entry(pmap, om, va);
3145 KASSERT(mpte->wire_count > 0,
3146 ("pmap_enter: missing reference to page table page,"
3150 pmap->pm_stats.resident_count++;
3153 * Enter on the PV list if part of our managed memory.
3155 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) {
3156 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva,
3157 ("pmap_enter: managed mapping within the clean submap"));
3158 pmap_insert_entry(pmap, va, m);
3163 * Increment counters
3166 pmap->pm_stats.wired_count++;
3170 * Now validate mapping with desired protection/wiring.
3172 newpte = (pt_entry_t)(pa | pmap_cache_bits(m->md.pat_mode, 0) | PG_V);
3173 if ((prot & VM_PROT_WRITE) != 0) {
3175 vm_page_flag_set(m, PG_WRITEABLE);
3178 if ((prot & VM_PROT_EXECUTE) == 0)
3183 if (va < VM_MAXUSER_ADDRESS)
3185 if (pmap == kernel_pmap)
3189 * if the mapping or permission bits are different, we need
3190 * to update the pte.
3192 if ((origpte & ~(PG_M|PG_A)) != newpte) {
3194 if ((access & VM_PROT_WRITE) != 0)
3196 if (origpte & PG_V) {
3198 origpte = pte_load_store(pte, newpte);
3199 if (origpte & PG_A) {
3200 if (origpte & PG_MANAGED)
3201 vm_page_flag_set(om, PG_REFERENCED);
3202 if (opa != VM_PAGE_TO_PHYS(m))
3205 if ((origpte & PG_NX) == 0 &&
3206 (newpte & PG_NX) != 0)
3210 if ((origpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
3211 if ((origpte & PG_MANAGED) != 0)
3213 if ((prot & VM_PROT_WRITE) == 0)
3217 pmap_invalidate_page(pmap, va);
3219 pte_store(pte, newpte);
3223 * If both the page table page and the reservation are fully
3224 * populated, then attempt promotion.
3226 if ((mpte == NULL || mpte->wire_count == NPTEPG) &&
3227 pg_ps_enabled && vm_reserv_level_iffullpop(m) == 0)
3228 pmap_promote_pde(pmap, pde, va);
3231 vm_page_unlock_queues();
3236 * Tries to create a 2- or 4MB page mapping. Returns TRUE if successful and
3237 * FALSE otherwise. Fails if (1) a page table page cannot be allocated without
3238 * blocking, (2) a mapping already exists at the specified virtual address, or
3239 * (3) a pv entry cannot be allocated without reclaiming another pv entry.
3242 pmap_enter_pde(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3244 pd_entry_t *pde, newpde;
3246 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3247 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
3248 pde = pmap_pde(pmap, va);
3250 CTR2(KTR_PMAP, "pmap_enter_pde: failure for va %#lx"
3251 " in pmap %p", va, pmap);
3254 newpde = VM_PAGE_TO_PHYS(m) | pmap_cache_bits(m->md.pat_mode, 1) |
3256 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) {
3257 newpde |= PG_MANAGED;
3260 * Abort this mapping if its PV entry could not be created.
3262 if (!pmap_pv_insert_pde(pmap, va, VM_PAGE_TO_PHYS(m))) {
3263 CTR2(KTR_PMAP, "pmap_enter_pde: failure for va %#lx"
3264 " in pmap %p", va, pmap);
3269 if ((prot & VM_PROT_EXECUTE) == 0)
3272 if (va < VM_MAXUSER_ADDRESS)
3276 * Increment counters.
3278 pmap->pm_stats.resident_count += NBPDR / PAGE_SIZE;
3281 * Map the superpage.
3283 pde_store(pde, newpde);
3285 pmap_pde_mappings++;
3286 CTR2(KTR_PMAP, "pmap_enter_pde: success for va %#lx"
3287 " in pmap %p", va, pmap);
3292 * Maps a sequence of resident pages belonging to the same object.
3293 * The sequence begins with the given page m_start. This page is
3294 * mapped at the given virtual address start. Each subsequent page is
3295 * mapped at a virtual address that is offset from start by the same
3296 * amount as the page is offset from m_start within the object. The
3297 * last page in the sequence is the page with the largest offset from
3298 * m_start that can be mapped at a virtual address less than the given
3299 * virtual address end. Not every virtual page between start and end
3300 * is mapped; only those for which a resident page exists with the
3301 * corresponding offset from m_start are mapped.
3304 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
3305 vm_page_t m_start, vm_prot_t prot)
3309 vm_pindex_t diff, psize;
3311 VM_OBJECT_LOCK_ASSERT(m_start->object, MA_OWNED);
3312 psize = atop(end - start);
3316 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
3317 va = start + ptoa(diff);
3318 if ((va & PDRMASK) == 0 && va + NBPDR <= end &&
3319 (VM_PAGE_TO_PHYS(m) & PDRMASK) == 0 &&
3320 pg_ps_enabled && vm_reserv_level_iffullpop(m) == 0 &&
3321 pmap_enter_pde(pmap, va, m, prot))
3322 m = &m[NBPDR / PAGE_SIZE - 1];
3324 mpte = pmap_enter_quick_locked(pmap, va, m, prot,
3326 m = TAILQ_NEXT(m, listq);
3332 * this code makes some *MAJOR* assumptions:
3333 * 1. Current pmap & pmap exists.
3336 * 4. No page table pages.
3337 * but is *MUCH* faster than pmap_enter...
3341 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3345 (void) pmap_enter_quick_locked(pmap, va, m, prot, NULL);
3350 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
3351 vm_prot_t prot, vm_page_t mpte)
3357 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
3358 (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0,
3359 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
3360 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3361 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
3364 * In the case that a page table page is not
3365 * resident, we are creating it here.
3367 if (va < VM_MAXUSER_ADDRESS) {
3372 * Calculate pagetable page index
3374 ptepindex = va >> PDRSHIFT;
3375 if (mpte && (mpte->pindex == ptepindex)) {
3379 * Get the page directory entry
3381 ptepa = pmap->pm_pdir[ptepindex];
3384 * If the page table page is mapped, we just increment
3385 * the hold count, and activate it.
3390 mpte = PHYS_TO_VM_PAGE(ptepa & PG_FRAME);
3393 mpte = _pmap_allocpte(pmap, ptepindex,
3404 * This call to vtopte makes the assumption that we are
3405 * entering the page into the current pmap. In order to support
3406 * quick entry into any pmap, one would likely use pmap_pte_quick.
3407 * But that isn't as quick as vtopte.
3419 * Enter on the PV list if part of our managed memory.
3421 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0 &&
3422 !pmap_try_insert_pv_entry(pmap, va, m)) {
3425 if (pmap_unwire_pte_hold(pmap, mpte, &free)) {
3426 pmap_invalidate_page(pmap, va);
3427 pmap_free_zero_pages(free);
3436 * Increment counters
3438 pmap->pm_stats.resident_count++;
3440 pa = VM_PAGE_TO_PHYS(m) | pmap_cache_bits(m->md.pat_mode, 0);
3442 if ((prot & VM_PROT_EXECUTE) == 0)
3447 * Now validate mapping with RO protection
3449 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED))
3450 pte_store(pte, pa | PG_V | PG_U);
3452 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED);
3457 * Make a temporary mapping for a physical address. This is only intended
3458 * to be used for panic dumps.
3461 pmap_kenter_temporary(vm_paddr_t pa, int i)
3465 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE);
3466 pmap_kenter(va, pa);
3468 return ((void *)crashdumpmap);
3472 * This code maps large physical mmap regions into the
3473 * processor address space. Note that some shortcuts
3474 * are taken, but the code works.
3477 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
3478 vm_pindex_t pindex, vm_size_t size)
3481 vm_paddr_t pa, ptepa;
3485 VM_OBJECT_LOCK_ASSERT(object, MA_OWNED);
3486 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
3487 ("pmap_object_init_pt: non-device object"));
3489 (addr & (NBPDR - 1)) == 0 && (size & (NBPDR - 1)) == 0) {
3490 if (!vm_object_populate(object, pindex, pindex + atop(size)))
3492 p = vm_page_lookup(object, pindex);
3493 KASSERT(p->valid == VM_PAGE_BITS_ALL,
3494 ("pmap_object_init_pt: invalid page %p", p));
3495 pat_mode = p->md.pat_mode;
3498 * Abort the mapping if the first page is not physically
3499 * aligned to a 2/4MB page boundary.
3501 ptepa = VM_PAGE_TO_PHYS(p);
3502 if (ptepa & (NBPDR - 1))
3506 * Skip the first page. Abort the mapping if the rest of
3507 * the pages are not physically contiguous or have differing
3508 * memory attributes.
3510 p = TAILQ_NEXT(p, listq);
3511 for (pa = ptepa + PAGE_SIZE; pa < ptepa + size;
3513 KASSERT(p->valid == VM_PAGE_BITS_ALL,
3514 ("pmap_object_init_pt: invalid page %p", p));
3515 if (pa != VM_PAGE_TO_PHYS(p) ||
3516 pat_mode != p->md.pat_mode)
3518 p = TAILQ_NEXT(p, listq);
3522 * Map using 2/4MB pages. Since "ptepa" is 2/4M aligned and
3523 * "size" is a multiple of 2/4M, adding the PAT setting to
3524 * "pa" will not affect the termination of this loop.
3527 for (pa = ptepa | pmap_cache_bits(pat_mode, 1); pa < ptepa +
3528 size; pa += NBPDR) {
3529 pde = pmap_pde(pmap, addr);
3531 pde_store(pde, pa | PG_PS | PG_M | PG_A |
3532 PG_U | PG_RW | PG_V);
3533 pmap->pm_stats.resident_count += NBPDR /
3535 pmap_pde_mappings++;
3537 /* Else continue on if the PDE is already valid. */
3545 * Routine: pmap_change_wiring
3546 * Function: Change the wiring attribute for a map/virtual-address
3548 * In/out conditions:
3549 * The mapping must already exist in the pmap.
3552 pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired)
3556 boolean_t are_queues_locked;
3558 are_queues_locked = FALSE;
3561 pde = pmap_pde(pmap, va);
3562 if ((*pde & PG_PS) != 0) {
3563 if (!wired != ((*pde & PG_W) == 0)) {
3564 if (!are_queues_locked) {
3565 are_queues_locked = TRUE;
3566 if (!mtx_trylock(&vm_page_queue_mtx)) {
3568 vm_page_lock_queues();
3572 if (!pmap_demote_pde(pmap, pde, va))
3573 panic("pmap_change_wiring: demotion failed");
3577 pte = pmap_pte(pmap, va);
3579 if (wired && !pmap_pte_w(pte))
3580 pmap->pm_stats.wired_count++;
3581 else if (!wired && pmap_pte_w(pte))
3582 pmap->pm_stats.wired_count--;
3585 * Wiring is not a hardware characteristic so there is no need to
3588 pmap_pte_set_w(pte, wired);
3589 pmap_pte_release(pte);
3591 if (are_queues_locked)
3592 vm_page_unlock_queues();
3599 * Copy the range specified by src_addr/len
3600 * from the source map to the range dst_addr/len
3601 * in the destination map.
3603 * This routine is only advisory and need not do anything.
3607 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
3608 vm_offset_t src_addr)
3612 vm_offset_t end_addr = src_addr + len;
3615 if (dst_addr != src_addr)
3618 if (!pmap_is_current(src_pmap))
3621 vm_page_lock_queues();
3622 if (dst_pmap < src_pmap) {
3623 PMAP_LOCK(dst_pmap);
3624 PMAP_LOCK(src_pmap);
3626 PMAP_LOCK(src_pmap);
3627 PMAP_LOCK(dst_pmap);
3630 for (addr = src_addr; addr < end_addr; addr = pdnxt) {
3631 pt_entry_t *src_pte, *dst_pte;
3632 vm_page_t dstmpte, srcmpte;
3633 pd_entry_t srcptepaddr;
3636 KASSERT(addr < UPT_MIN_ADDRESS,
3637 ("pmap_copy: invalid to pmap_copy page tables"));
3639 pdnxt = (addr + NBPDR) & ~PDRMASK;
3642 ptepindex = addr >> PDRSHIFT;
3644 srcptepaddr = src_pmap->pm_pdir[ptepindex];
3645 if (srcptepaddr == 0)
3648 if (srcptepaddr & PG_PS) {
3649 if (dst_pmap->pm_pdir[ptepindex] == 0 &&
3650 ((srcptepaddr & PG_MANAGED) == 0 ||
3651 pmap_pv_insert_pde(dst_pmap, addr, srcptepaddr &
3653 dst_pmap->pm_pdir[ptepindex] = srcptepaddr &
3655 dst_pmap->pm_stats.resident_count +=
3661 srcmpte = PHYS_TO_VM_PAGE(srcptepaddr & PG_FRAME);
3662 KASSERT(srcmpte->wire_count > 0,
3663 ("pmap_copy: source page table page is unused"));
3665 if (pdnxt > end_addr)
3668 src_pte = vtopte(addr);
3669 while (addr < pdnxt) {
3673 * we only virtual copy managed pages
3675 if ((ptetemp & PG_MANAGED) != 0) {
3676 dstmpte = pmap_allocpte(dst_pmap, addr,
3678 if (dstmpte == NULL)
3680 dst_pte = pmap_pte_quick(dst_pmap, addr);
3681 if (*dst_pte == 0 &&
3682 pmap_try_insert_pv_entry(dst_pmap, addr,
3683 PHYS_TO_VM_PAGE(ptetemp & PG_FRAME))) {
3685 * Clear the wired, modified, and
3686 * accessed (referenced) bits
3689 *dst_pte = ptetemp & ~(PG_W | PG_M |
3691 dst_pmap->pm_stats.resident_count++;
3694 if (pmap_unwire_pte_hold(dst_pmap,
3696 pmap_invalidate_page(dst_pmap,
3698 pmap_free_zero_pages(free);
3702 if (dstmpte->wire_count >= srcmpte->wire_count)
3711 vm_page_unlock_queues();
3712 PMAP_UNLOCK(src_pmap);
3713 PMAP_UNLOCK(dst_pmap);
3716 static __inline void
3717 pagezero(void *page)
3719 #if defined(I686_CPU)
3720 if (cpu_class == CPUCLASS_686) {
3721 #if defined(CPU_ENABLE_SSE)
3722 if (cpu_feature & CPUID_SSE2)
3723 sse2_pagezero(page);
3726 i686_pagezero(page);
3729 bzero(page, PAGE_SIZE);
3733 * pmap_zero_page zeros the specified hardware page by mapping
3734 * the page into KVM and using bzero to clear its contents.
3737 pmap_zero_page(vm_page_t m)
3739 struct sysmaps *sysmaps;
3741 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
3742 mtx_lock(&sysmaps->lock);
3743 if (*sysmaps->CMAP2)
3744 panic("pmap_zero_page: CMAP2 busy");
3746 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M |
3747 pmap_cache_bits(m->md.pat_mode, 0);
3748 invlcaddr(sysmaps->CADDR2);
3749 pagezero(sysmaps->CADDR2);
3750 *sysmaps->CMAP2 = 0;
3752 mtx_unlock(&sysmaps->lock);
3756 * pmap_zero_page_area zeros the specified hardware page by mapping
3757 * the page into KVM and using bzero to clear its contents.
3759 * off and size may not cover an area beyond a single hardware page.
3762 pmap_zero_page_area(vm_page_t m, int off, int size)
3764 struct sysmaps *sysmaps;
3766 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
3767 mtx_lock(&sysmaps->lock);
3768 if (*sysmaps->CMAP2)
3769 panic("pmap_zero_page_area: CMAP2 busy");
3771 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M |
3772 pmap_cache_bits(m->md.pat_mode, 0);
3773 invlcaddr(sysmaps->CADDR2);
3774 if (off == 0 && size == PAGE_SIZE)
3775 pagezero(sysmaps->CADDR2);
3777 bzero((char *)sysmaps->CADDR2 + off, size);
3778 *sysmaps->CMAP2 = 0;
3780 mtx_unlock(&sysmaps->lock);
3784 * pmap_zero_page_idle zeros the specified hardware page by mapping
3785 * the page into KVM and using bzero to clear its contents. This
3786 * is intended to be called from the vm_pagezero process only and
3790 pmap_zero_page_idle(vm_page_t m)
3794 panic("pmap_zero_page_idle: CMAP3 busy");
3796 *CMAP3 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M |
3797 pmap_cache_bits(m->md.pat_mode, 0);
3805 * pmap_copy_page copies the specified (machine independent)
3806 * page by mapping the page into virtual memory and using
3807 * bcopy to copy the page, one machine dependent page at a
3811 pmap_copy_page(vm_page_t src, vm_page_t dst)
3813 struct sysmaps *sysmaps;
3815 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
3816 mtx_lock(&sysmaps->lock);
3817 if (*sysmaps->CMAP1)
3818 panic("pmap_copy_page: CMAP1 busy");
3819 if (*sysmaps->CMAP2)
3820 panic("pmap_copy_page: CMAP2 busy");
3822 invlpg((u_int)sysmaps->CADDR1);
3823 invlpg((u_int)sysmaps->CADDR2);
3824 *sysmaps->CMAP1 = PG_V | VM_PAGE_TO_PHYS(src) | PG_A |
3825 pmap_cache_bits(src->md.pat_mode, 0);
3826 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(dst) | PG_A | PG_M |
3827 pmap_cache_bits(dst->md.pat_mode, 0);
3828 bcopy(sysmaps->CADDR1, sysmaps->CADDR2, PAGE_SIZE);
3829 *sysmaps->CMAP1 = 0;
3830 *sysmaps->CMAP2 = 0;
3832 mtx_unlock(&sysmaps->lock);
3836 * Returns true if the pmap's pv is one of the first
3837 * 16 pvs linked to from this page. This count may
3838 * be changed upwards or downwards in the future; it
3839 * is only necessary that true be returned for a small
3840 * subset of pmaps for proper page aging.
3843 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
3845 struct md_page *pvh;
3849 if (m->flags & PG_FICTITIOUS)
3852 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3853 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3854 if (PV_PMAP(pv) == pmap) {
3862 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3863 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
3864 if (PV_PMAP(pv) == pmap)
3875 * pmap_page_wired_mappings:
3877 * Return the number of managed mappings to the given physical page
3881 pmap_page_wired_mappings(vm_page_t m)
3886 if ((m->flags & PG_FICTITIOUS) != 0)
3888 count = pmap_pvh_wired_mappings(&m->md, count);
3889 return (pmap_pvh_wired_mappings(pa_to_pvh(VM_PAGE_TO_PHYS(m)), count));
3893 * pmap_pvh_wired_mappings:
3895 * Return the updated number "count" of managed mappings that are wired.
3898 pmap_pvh_wired_mappings(struct md_page *pvh, int count)
3904 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3906 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
3909 pte = pmap_pte_quick(pmap, pv->pv_va);
3910 if ((*pte & PG_W) != 0)
3919 * Returns TRUE if the given page is mapped individually or as part of
3920 * a 4mpage. Otherwise, returns FALSE.
3923 pmap_page_is_mapped(vm_page_t m)
3925 struct md_page *pvh;
3927 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0)
3929 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3930 if (TAILQ_EMPTY(&m->md.pv_list)) {
3931 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3932 return (!TAILQ_EMPTY(&pvh->pv_list));
3938 * Remove all pages from specified address space
3939 * this aids process exit speeds. Also, this code
3940 * is special cased for current process only, but
3941 * can have the more generic (and slightly slower)
3942 * mode enabled. This is much faster than pmap_remove
3943 * in the case of running down an entire address space.
3946 pmap_remove_pages(pmap_t pmap)
3948 pt_entry_t *pte, tpte;
3949 vm_page_t free = NULL;
3950 vm_page_t m, mpte, mt;
3952 struct md_page *pvh;
3953 struct pv_chunk *pc, *npc;
3956 uint32_t inuse, bitmask;
3959 if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) {
3960 printf("warning: pmap_remove_pages called with non-current pmap\n");
3963 vm_page_lock_queues();
3966 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
3968 for (field = 0; field < _NPCM; field++) {
3969 inuse = (~(pc->pc_map[field])) & pc_freemask[field];
3970 while (inuse != 0) {
3972 bitmask = 1UL << bit;
3973 idx = field * 32 + bit;
3974 pv = &pc->pc_pventry[idx];
3977 pte = pmap_pde(pmap, pv->pv_va);
3979 if ((tpte & PG_PS) == 0) {
3980 pte = vtopte(pv->pv_va);
3981 tpte = *pte & ~PG_PTE_PAT;
3986 "TPTE at %p IS ZERO @ VA %08x\n",
3992 * We cannot remove wired pages from a process' mapping at this time
3999 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME);
4000 KASSERT(m->phys_addr == (tpte & PG_FRAME),
4001 ("vm_page_t %p phys_addr mismatch %016jx %016jx",
4002 m, (uintmax_t)m->phys_addr,
4005 KASSERT(m < &vm_page_array[vm_page_array_size],
4006 ("pmap_remove_pages: bad tpte %#jx",
4012 * Update the vm_page_t clean/reference bits.
4014 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
4015 if ((tpte & PG_PS) != 0) {
4016 for (mt = m; mt < &m[NBPDR / PAGE_SIZE]; mt++)
4023 PV_STAT(pv_entry_frees++);
4024 PV_STAT(pv_entry_spare++);
4026 pc->pc_map[field] |= bitmask;
4027 if ((tpte & PG_PS) != 0) {
4028 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
4029 pvh = pa_to_pvh(tpte & PG_PS_FRAME);
4030 TAILQ_REMOVE(&pvh->pv_list, pv, pv_list);
4031 if (TAILQ_EMPTY(&pvh->pv_list)) {
4032 for (mt = m; mt < &m[NBPDR / PAGE_SIZE]; mt++)
4033 if (TAILQ_EMPTY(&mt->md.pv_list))
4034 vm_page_flag_clear(mt, PG_WRITEABLE);
4036 mpte = pmap_lookup_pt_page(pmap, pv->pv_va);
4038 pmap_remove_pt_page(pmap, mpte);
4039 pmap->pm_stats.resident_count--;
4040 KASSERT(mpte->wire_count == NPTEPG,
4041 ("pmap_remove_pages: pte page wire count error"));
4042 mpte->wire_count = 0;
4043 pmap_add_delayed_free_list(mpte, &free, FALSE);
4044 atomic_subtract_int(&cnt.v_wire_count, 1);
4047 pmap->pm_stats.resident_count--;
4048 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
4049 if (TAILQ_EMPTY(&m->md.pv_list)) {
4050 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4051 if (TAILQ_EMPTY(&pvh->pv_list))
4052 vm_page_flag_clear(m, PG_WRITEABLE);
4054 pmap_unuse_pt(pmap, pv->pv_va, &free);
4059 PV_STAT(pv_entry_spare -= _NPCPV);
4060 PV_STAT(pc_chunk_count--);
4061 PV_STAT(pc_chunk_frees++);
4062 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
4063 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc));
4064 pmap_qremove((vm_offset_t)pc, 1);
4065 vm_page_unwire(m, 0);
4067 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc);
4071 pmap_invalidate_all(pmap);
4072 vm_page_unlock_queues();
4074 pmap_free_zero_pages(free);
4080 * Return whether or not the specified physical page was modified
4081 * in any physical maps.
4084 pmap_is_modified(vm_page_t m)
4087 if (m->flags & PG_FICTITIOUS)
4089 if (pmap_is_modified_pvh(&m->md))
4091 return (pmap_is_modified_pvh(pa_to_pvh(VM_PAGE_TO_PHYS(m))));
4095 * Returns TRUE if any of the given mappings were used to modify
4096 * physical memory. Otherwise, returns FALSE. Both page and 2mpage
4097 * mappings are supported.
4100 pmap_is_modified_pvh(struct md_page *pvh)
4107 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
4110 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
4113 pte = pmap_pte_quick(pmap, pv->pv_va);
4114 rv = (*pte & (PG_M | PG_RW)) == (PG_M | PG_RW);
4124 * pmap_is_prefaultable:
4126 * Return whether or not the specified virtual address is elgible
4130 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
4138 pde = pmap_pde(pmap, addr);
4139 if (*pde != 0 && (*pde & PG_PS) == 0) {
4148 * Clear the write and modified bits in each of the given page's mappings.
4151 pmap_remove_write(vm_page_t m)
4153 struct md_page *pvh;
4154 pv_entry_t next_pv, pv;
4157 pt_entry_t oldpte, *pte;
4160 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
4161 if ((m->flags & PG_FICTITIOUS) != 0 ||
4162 (m->flags & PG_WRITEABLE) == 0)
4165 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4166 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) {
4170 pde = pmap_pde(pmap, va);
4171 if ((*pde & PG_RW) != 0)
4172 (void)pmap_demote_pde(pmap, pde, va);
4175 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
4178 pde = pmap_pde(pmap, pv->pv_va);
4179 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_write: found"
4180 " a 4mpage in page %p's pv list", m));
4181 pte = pmap_pte_quick(pmap, pv->pv_va);
4184 if ((oldpte & PG_RW) != 0) {
4186 * Regardless of whether a pte is 32 or 64 bits
4187 * in size, PG_RW and PG_M are among the least
4188 * significant 32 bits.
4190 if (!atomic_cmpset_int((u_int *)pte, oldpte,
4191 oldpte & ~(PG_RW | PG_M)))
4193 if ((oldpte & PG_M) != 0)
4195 pmap_invalidate_page(pmap, pv->pv_va);
4199 vm_page_flag_clear(m, PG_WRITEABLE);
4204 * pmap_ts_referenced:
4206 * Return a count of reference bits for a page, clearing those bits.
4207 * It is not necessary for every reference bit to be cleared, but it
4208 * is necessary that 0 only be returned when there are truly no
4209 * reference bits set.
4211 * XXX: The exact number of bits to check and clear is a matter that
4212 * should be tested and standardized at some point in the future for
4213 * optimal aging of shared pages.
4216 pmap_ts_referenced(vm_page_t m)
4218 struct md_page *pvh;
4219 pv_entry_t pv, pvf, pvn;
4221 pd_entry_t oldpde, *pde;
4226 if (m->flags & PG_FICTITIOUS)
4229 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
4230 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4231 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, pvn) {
4235 pde = pmap_pde(pmap, va);
4237 if ((oldpde & PG_A) != 0) {
4238 if (pmap_demote_pde(pmap, pde, va)) {
4239 if ((oldpde & PG_W) == 0) {
4241 * Remove the mapping to a single page
4242 * so that a subsequent access may
4243 * repromote. Since the underlying
4244 * page table page is fully populated,
4245 * this removal never frees a page
4248 va += VM_PAGE_TO_PHYS(m) - (oldpde &
4250 pmap_remove_page(pmap, va, NULL);
4261 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
4264 pvn = TAILQ_NEXT(pv, pv_list);
4265 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
4266 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
4269 pde = pmap_pde(pmap, pv->pv_va);
4270 KASSERT((*pde & PG_PS) == 0, ("pmap_ts_referenced:"
4271 " found a 4mpage in page %p's pv list", m));
4272 pte = pmap_pte_quick(pmap, pv->pv_va);
4273 if ((*pte & PG_A) != 0) {
4274 atomic_clear_int((u_int *)pte, PG_A);
4275 pmap_invalidate_page(pmap, pv->pv_va);
4281 } while ((pv = pvn) != NULL && pv != pvf);
4288 * Clear the modify bits on the specified physical page.
4291 pmap_clear_modify(vm_page_t m)
4293 struct md_page *pvh;
4294 pv_entry_t next_pv, pv;
4296 pd_entry_t oldpde, *pde;
4297 pt_entry_t oldpte, *pte;
4300 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
4301 if ((m->flags & PG_FICTITIOUS) != 0)
4304 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4305 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) {
4309 pde = pmap_pde(pmap, va);
4311 if ((oldpde & PG_RW) != 0) {
4312 if (pmap_demote_pde(pmap, pde, va)) {
4313 if ((oldpde & PG_W) == 0) {
4315 * Write protect the mapping to a
4316 * single page so that a subsequent
4317 * write access may repromote.
4319 va += VM_PAGE_TO_PHYS(m) - (oldpde &
4321 pte = pmap_pte_quick(pmap, va);
4323 if ((oldpte & PG_V) != 0) {
4325 * Regardless of whether a pte is 32 or 64 bits
4326 * in size, PG_RW and PG_M are among the least
4327 * significant 32 bits.
4329 while (!atomic_cmpset_int((u_int *)pte,
4331 oldpte & ~(PG_M | PG_RW)))
4334 pmap_invalidate_page(pmap, va);
4341 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
4344 pde = pmap_pde(pmap, pv->pv_va);
4345 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_modify: found"
4346 " a 4mpage in page %p's pv list", m));
4347 pte = pmap_pte_quick(pmap, pv->pv_va);
4348 if ((*pte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
4350 * Regardless of whether a pte is 32 or 64 bits
4351 * in size, PG_M is among the least significant
4354 atomic_clear_int((u_int *)pte, PG_M);
4355 pmap_invalidate_page(pmap, pv->pv_va);
4363 * pmap_clear_reference:
4365 * Clear the reference bit on the specified physical page.
4368 pmap_clear_reference(vm_page_t m)
4370 struct md_page *pvh;
4371 pv_entry_t next_pv, pv;
4373 pd_entry_t oldpde, *pde;
4377 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
4378 if ((m->flags & PG_FICTITIOUS) != 0)
4381 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4382 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) {
4386 pde = pmap_pde(pmap, va);
4388 if ((oldpde & PG_A) != 0) {
4389 if (pmap_demote_pde(pmap, pde, va)) {
4391 * Remove the mapping to a single page so
4392 * that a subsequent access may repromote.
4393 * Since the underlying page table page is
4394 * fully populated, this removal never frees
4395 * a page table page.
4397 va += VM_PAGE_TO_PHYS(m) - (oldpde &
4399 pmap_remove_page(pmap, va, NULL);
4404 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
4407 pde = pmap_pde(pmap, pv->pv_va);
4408 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_reference: found"
4409 " a 4mpage in page %p's pv list", m));
4410 pte = pmap_pte_quick(pmap, pv->pv_va);
4411 if ((*pte & PG_A) != 0) {
4413 * Regardless of whether a pte is 32 or 64 bits
4414 * in size, PG_A is among the least significant
4417 atomic_clear_int((u_int *)pte, PG_A);
4418 pmap_invalidate_page(pmap, pv->pv_va);
4426 * Miscellaneous support routines follow
4430 * Map a set of physical memory pages into the kernel virtual
4431 * address space. Return a pointer to where it is mapped. This
4432 * routine is intended to be used for mapping device memory,
4436 pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, int mode)
4438 vm_offset_t va, offset;
4441 offset = pa & PAGE_MASK;
4442 size = roundup(offset + size, PAGE_SIZE);
4445 if (pa < KERNLOAD && pa + size <= KERNLOAD)
4448 va = kmem_alloc_nofault(kernel_map, size);
4450 panic("pmap_mapdev: Couldn't alloc kernel virtual memory");
4452 for (tmpsize = 0; tmpsize < size; tmpsize += PAGE_SIZE)
4453 pmap_kenter_attr(va + tmpsize, pa + tmpsize, mode);
4454 pmap_invalidate_range(kernel_pmap, va, va + tmpsize);
4455 pmap_invalidate_cache_range(va, va + size);
4456 return ((void *)(va + offset));
4460 pmap_mapdev(vm_paddr_t pa, vm_size_t size)
4463 return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE));
4467 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
4470 return (pmap_mapdev_attr(pa, size, PAT_WRITE_BACK));
4474 pmap_unmapdev(vm_offset_t va, vm_size_t size)
4476 vm_offset_t base, offset, tmpva;
4478 if (va >= KERNBASE && va + size <= KERNBASE + KERNLOAD)
4480 base = trunc_page(va);
4481 offset = va & PAGE_MASK;
4482 size = roundup(offset + size, PAGE_SIZE);
4483 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE)
4484 pmap_kremove(tmpva);
4485 pmap_invalidate_range(kernel_pmap, va, tmpva);
4486 kmem_free(kernel_map, base, size);
4490 * Sets the memory attribute for the specified page.
4493 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
4495 struct sysmaps *sysmaps;
4496 vm_offset_t sva, eva;
4498 m->md.pat_mode = ma;
4499 if ((m->flags & PG_FICTITIOUS) != 0)
4503 * If "m" is a normal page, flush it from the cache.
4504 * See pmap_invalidate_cache_range().
4506 * First, try to find an existing mapping of the page by sf
4507 * buffer. sf_buf_invalidate_cache() modifies mapping and
4508 * flushes the cache.
4510 if (sf_buf_invalidate_cache(m))
4514 * If page is not mapped by sf buffer, but CPU does not
4515 * support self snoop, map the page transient and do
4516 * invalidation. In the worst case, whole cache is flushed by
4517 * pmap_invalidate_cache_range().
4519 if ((cpu_feature & (CPUID_SS|CPUID_CLFSH)) == CPUID_CLFSH) {
4520 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
4521 mtx_lock(&sysmaps->lock);
4522 if (*sysmaps->CMAP2)
4523 panic("pmap_page_set_memattr: CMAP2 busy");
4525 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) |
4526 PG_A | PG_M | pmap_cache_bits(m->md.pat_mode, 0);
4527 invlcaddr(sysmaps->CADDR2);
4528 sva = (vm_offset_t)sysmaps->CADDR2;
4529 eva = sva + PAGE_SIZE;
4531 sva = eva = 0; /* gcc */
4532 pmap_invalidate_cache_range(sva, eva);
4534 *sysmaps->CMAP2 = 0;
4536 mtx_unlock(&sysmaps->lock);
4541 pmap_change_attr(vm_offset_t va, vm_size_t size, int mode)
4543 vm_offset_t base, offset, tmpva;
4549 base = trunc_page(va);
4550 offset = va & PAGE_MASK;
4551 size = roundup(offset + size, PAGE_SIZE);
4554 * Only supported on kernel virtual addresses above the recursive map.
4556 if (base < VM_MIN_KERNEL_ADDRESS)
4559 /* 4MB pages and pages that aren't mapped aren't supported. */
4560 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) {
4561 pde = pmap_pde(kernel_pmap, tmpva);
4566 pte = vtopte(tmpva);
4574 * Ok, all the pages exist and are 4k, so run through them updating
4577 for (tmpva = base; size > 0; ) {
4578 pte = vtopte(tmpva);
4581 * The cache mode bits are all in the low 32-bits of the
4582 * PTE, so we can just spin on updating the low 32-bits.
4585 opte = *(u_int *)pte;
4586 npte = opte & ~(PG_PTE_PAT | PG_NC_PCD | PG_NC_PWT);
4587 npte |= pmap_cache_bits(mode, 0);
4588 } while (npte != opte &&
4589 !atomic_cmpset_int((u_int *)pte, opte, npte));
4597 * Flush CPU caches to make sure any data isn't cached that shouldn't
4601 pmap_invalidate_range(kernel_pmap, base, tmpva);
4602 pmap_invalidate_cache_range(base, tmpva);
4608 * perform the pmap work for mincore
4611 pmap_mincore(pmap_t pmap, vm_offset_t addr)
4614 pt_entry_t *ptep, pte;
4620 pdep = pmap_pde(pmap, addr);
4622 if (*pdep & PG_PS) {
4624 val = MINCORE_SUPER;
4625 /* Compute the physical address of the 4KB page. */
4626 pa = ((*pdep & PG_PS_FRAME) | (addr & PDRMASK)) &
4629 ptep = pmap_pte(pmap, addr);
4631 pmap_pte_release(ptep);
4632 pa = pte & PG_FRAME;
4641 val |= MINCORE_INCORE;
4642 if ((pte & PG_MANAGED) == 0)
4645 m = PHYS_TO_VM_PAGE(pa);
4650 if ((pte & (PG_M | PG_RW)) == (PG_M | PG_RW))
4651 val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER;
4654 * Modified by someone else
4656 vm_page_lock_queues();
4657 if (m->dirty || pmap_is_modified(m))
4658 val |= MINCORE_MODIFIED_OTHER;
4659 vm_page_unlock_queues();
4665 val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER;
4668 * Referenced by someone else
4670 vm_page_lock_queues();
4671 if ((m->flags & PG_REFERENCED) ||
4672 pmap_ts_referenced(m)) {
4673 val |= MINCORE_REFERENCED_OTHER;
4674 vm_page_flag_set(m, PG_REFERENCED);
4676 vm_page_unlock_queues();
4683 pmap_activate(struct thread *td)
4685 pmap_t pmap, oldpmap;
4689 pmap = vmspace_pmap(td->td_proc->p_vmspace);
4690 oldpmap = PCPU_GET(curpmap);
4692 atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask));
4693 atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask));
4695 oldpmap->pm_active &= ~1;
4696 pmap->pm_active |= 1;
4699 cr3 = vtophys(pmap->pm_pdpt);
4701 cr3 = vtophys(pmap->pm_pdir);
4704 * pmap_activate is for the current thread on the current cpu
4706 td->td_pcb->pcb_cr3 = cr3;
4708 PCPU_SET(curpmap, pmap);
4713 * Increase the starting virtual address of the given mapping if a
4714 * different alignment might result in more superpage mappings.
4717 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
4718 vm_offset_t *addr, vm_size_t size)
4720 vm_offset_t superpage_offset;
4724 if (object != NULL && (object->flags & OBJ_COLORED) != 0)
4725 offset += ptoa(object->pg_color);
4726 superpage_offset = offset & PDRMASK;
4727 if (size - ((NBPDR - superpage_offset) & PDRMASK) < NBPDR ||
4728 (*addr & PDRMASK) == superpage_offset)
4730 if ((*addr & PDRMASK) < superpage_offset)
4731 *addr = (*addr & ~PDRMASK) + superpage_offset;
4733 *addr = ((*addr + PDRMASK) & ~PDRMASK) + superpage_offset;
4737 #if defined(PMAP_DEBUG)
4738 pmap_pid_dump(int pid)
4745 sx_slock(&allproc_lock);
4746 FOREACH_PROC_IN_SYSTEM(p) {
4747 if (p->p_pid != pid)
4753 pmap = vmspace_pmap(p->p_vmspace);
4754 for (i = 0; i < NPDEPTD; i++) {
4757 vm_offset_t base = i << PDRSHIFT;
4759 pde = &pmap->pm_pdir[i];
4760 if (pde && pmap_pde_v(pde)) {
4761 for (j = 0; j < NPTEPG; j++) {
4762 vm_offset_t va = base + (j << PAGE_SHIFT);
4763 if (va >= (vm_offset_t) VM_MIN_KERNEL_ADDRESS) {
4768 sx_sunlock(&allproc_lock);
4771 pte = pmap_pte(pmap, va);
4772 if (pte && pmap_pte_v(pte)) {
4776 m = PHYS_TO_VM_PAGE(pa & PG_FRAME);
4777 printf("va: 0x%x, pt: 0x%x, h: %d, w: %d, f: 0x%x",
4778 va, pa, m->hold_count, m->wire_count, m->flags);
4793 sx_sunlock(&allproc_lock);
4800 static void pads(pmap_t pm);
4801 void pmap_pvdump(vm_offset_t pa);
4803 /* print address space of pmap*/
4811 if (pm == kernel_pmap)
4813 for (i = 0; i < NPDEPTD; i++)
4815 for (j = 0; j < NPTEPG; j++) {
4816 va = (i << PDRSHIFT) + (j << PAGE_SHIFT);
4817 if (pm == kernel_pmap && va < KERNBASE)
4819 if (pm != kernel_pmap && va > UPT_MAX_ADDRESS)
4821 ptep = pmap_pte(pm, va);
4822 if (pmap_pte_v(ptep))
4823 printf("%x:%x ", va, *ptep);
4829 pmap_pvdump(vm_paddr_t pa)
4835 printf("pa %x", pa);
4836 m = PHYS_TO_VM_PAGE(pa);
4837 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
4839 printf(" -> pmap %p, va %x", (void *)pmap, pv->pv_va);