sys/ia64/ia64/machdep.c

   1 /*-
   2  * Copyright (c) 2003,2004 Marcel Moolenaar
   3  * Copyright (c) 2000,2001 Doug Rabson
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  25  * SUCH DAMAGE.
  26  */
  27
  28 #include <sys/cdefs.h>
  29 __FBSDID("$FreeBSD$");
  30
  31 #include "opt_compat.h"
  32 #include "opt_ddb.h"
  33 #include "opt_kstack_pages.h"
  34 #include "opt_msgbuf.h"
  35 #include "opt_sched.h"
  36
  37 #include <sys/param.h>
  38 #include <sys/proc.h>
  39 #include <sys/systm.h>
  40 #include <sys/bio.h>
  41 #include <sys/buf.h>
  42 #include <sys/bus.h>
  43 #include <sys/cons.h>
  44 #include <sys/cpu.h>
  45 #include <sys/eventhandler.h>
  46 #include <sys/exec.h>
  47 #include <sys/imgact.h>
  48 #include <sys/kdb.h>
  49 #include <sys/kernel.h>
  50 #include <sys/linker.h>
  51 #include <sys/lock.h>
  52 #include <sys/malloc.h>
  53 #include <sys/mbuf.h>
  54 #include <sys/msgbuf.h>
  55 #include <sys/pcpu.h>
  56 #include <sys/ptrace.h>
  57 #include <sys/random.h>
  58 #include <sys/reboot.h>
  59 #include <sys/sched.h>
  60 #include <sys/signalvar.h>
  61 #include <sys/syscall.h>
  62 #include <sys/sysctl.h>
  63 #include <sys/sysproto.h>
  64 #include <sys/ucontext.h>
  65 #include <sys/uio.h>
  66 #include <sys/uuid.h>
  67 #include <sys/vmmeter.h>
  68 #include <sys/vnode.h>
  69
  70 #include <ddb/ddb.h>
  71
  72 #include <net/netisr.h>
  73
  74 #include <vm/vm.h>
  75 #include <vm/vm_extern.h>
  76 #include <vm/vm_kern.h>
  77 #include <vm/vm_page.h>
  78 #include <vm/vm_map.h>
  79 #include <vm/vm_object.h>
  80 #include <vm/vm_pager.h>
  81
  82 #include <machine/bootinfo.h>
  83 #include <machine/clock.h>
  84 #include <machine/cpu.h>
  85 #include <machine/efi.h>
  86 #include <machine/elf.h>
  87 #include <machine/fpu.h>
  88 #include <machine/mca.h>
  89 #include <machine/md_var.h>
  90 #include <machine/mutex.h>
  91 #include <machine/pal.h>
  92 #include <machine/pcb.h>
  93 #include <machine/reg.h>
  94 #include <machine/sal.h>
  95 #include <machine/sigframe.h>
  96 #ifdef SMP
  97 #include <machine/smp.h>
  98 #endif
  99 #include <machine/unwind.h>
 100 #include <machine/vmparam.h>
 101
 102 #include <i386/include/specialreg.h>
 103
 104 u_int64_t processor_frequency;
 105 u_int64_t bus_frequency;
 106 u_int64_t itc_frequency;
 107 int cold = 1;
 108
 109 u_int64_t pa_bootinfo;
 110 struct bootinfo bootinfo;
 111
 112 struct pcpu pcpu0;
 113
 114 extern u_int64_t kernel_text[], _end[];
 115
 116 extern u_int64_t ia64_gateway_page[];
 117 extern u_int64_t break_sigtramp[];
 118 extern u_int64_t epc_sigtramp[];
 119
 120 struct fpswa_iface *fpswa_iface;
 121
 122 u_int64_t ia64_pal_base;
 123 u_int64_t ia64_port_base;
 124
 125 static int ia64_sync_icache_needed;
 126
 127 char machine[] = MACHINE;
 128 SYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD, machine, 0, "");
 129
 130 static char cpu_model[64];
 131 SYSCTL_STRING(_hw, HW_MODEL, model, CTLFLAG_RD, cpu_model, 0,
 132     "The CPU model name");
 133
 134 static char cpu_family[64];
 135 SYSCTL_STRING(_hw, OID_AUTO, family, CTLFLAG_RD, cpu_family, 0,
 136     "The CPU family name");
 137
 138 #ifdef DDB
 139 extern vm_offset_t ksym_start, ksym_end;
 140 #endif
 141
 142 static void cpu_startup(void *);
 143 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
 144
 145 struct msgbuf *msgbufp = NULL;
 146
 147 /* Other subsystems (e.g., ACPI) can hook this later. */
 148 void (*cpu_idle_hook)(void) = NULL;
 149
 150 long Maxmem = 0;
 151 long realmem = 0;
 152
 153 #define PHYSMAP_SIZE    (2 * VM_PHYSSEG_MAX)
 154
 155 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
 156
 157 /* must be 2 less so 0 0 can signal end of chunks */
 158 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
 159
 160 struct kva_md_info kmi;
 161
 162 #define Mhz     1000000L
 163 #define Ghz     (1000L*Mhz)
 164
 165 static void
 166 identifycpu(void)
 167 {
 168         char vendor[17];
 169         char *family_name, *model_name;
 170         u_int64_t features, tmp;
 171         int number, revision, model, family, archrev;
 172
 173         /*
 174          * Assumes little-endian.
 175          */
 176         *(u_int64_t *) &vendor[0] = ia64_get_cpuid(0);
 177         *(u_int64_t *) &vendor[8] = ia64_get_cpuid(1);
 178         vendor[16] = '\0';
 179
 180         tmp = ia64_get_cpuid(3);
 181         number = (tmp >> 0) & 0xff;
 182         revision = (tmp >> 8) & 0xff;
 183         model = (tmp >> 16) & 0xff;
 184         family = (tmp >> 24) & 0xff;
 185         archrev = (tmp >> 32) & 0xff;
 186
 187         family_name = model_name = "unknown";
 188         switch (family) {
 189         case 0x07:
 190                 family_name = "Itanium";
 191                 model_name = "Merced";
 192                 break;
 193         case 0x1f:
 194                 family_name = "Itanium 2";
 195                 switch (model) {
 196                 case 0x00:
 197                         model_name = "McKinley";
 198                         break;
 199                 case 0x01:
 200                         /*
 201                          * Deerfield is a low-voltage variant based on the
 202                          * Madison core. We need circumstantial evidence
 203                          * (i.e. the clock frequency) to identify those.
 204                          * Allow for roughly 1% error margin.
 205                          */
 206                         tmp = processor_frequency >> 7;
 207                         if ((processor_frequency - tmp) < 1*Ghz &&
 208                             (processor_frequency + tmp) >= 1*Ghz)
 209                                 model_name = "Deerfield";
 210                         else
 211                                 model_name = "Madison";
 212                         break;
 213                 case 0x02:
 214                         model_name = "Madison II";
 215                         break;
 216                 }
 217                 break;
 218         case 0x20:
 219                 ia64_sync_icache_needed = 1;
 220
 221                 family_name = "Itanium 2";
 222                 switch (model) {
 223                 case 0x00:
 224                         model_name = "Montecito";
 225                         break;
 226                 }
 227                 break;
 228         }
 229         snprintf(cpu_family, sizeof(cpu_family), "%s", family_name);
 230         snprintf(cpu_model, sizeof(cpu_model), "%s", model_name);
 231
 232         features = ia64_get_cpuid(4);
 233
 234         printf("CPU: %s (", model_name);
 235         if (processor_frequency) {
 236                 printf("%ld.%02ld-Mhz ",
 237                     (processor_frequency + 4999) / Mhz,
 238                     ((processor_frequency + 4999) / (Mhz/100)) % 100);
 239         }
 240         printf("%s)\n", family_name);
 241         printf("  Origin = \"%s\"  Revision = %d\n", vendor, revision);
 242         printf("  Features = 0x%b\n", (u_int32_t) features,
 243             "\020"
 244             "\001LB"    /* long branch (brl) instruction. */
 245             "\002SD"    /* Spontaneous deferral. */
 246             "\003AO"    /* 16-byte atomic operations (ld, st, cmpxchg). */ );
 247 }
 248
 249 static void
 250 cpu_startup(dummy)
 251         void *dummy;
 252 {
 253
 254         /*
 255          * Good {morning,afternoon,evening,night}.
 256          */
 257         identifycpu();
 258
 259 #ifdef PERFMON
 260         perfmon_init();
 261 #endif
 262         printf("real memory  = %ld (%ld MB)\n", ia64_ptob(Maxmem),
 263             ia64_ptob(Maxmem) / 1048576);
 264         realmem = Maxmem;
 265
 266         /*
 267          * Display any holes after the first chunk of extended memory.
 268          */
 269         if (bootverbose) {
 270                 int indx;
 271
 272                 printf("Physical memory chunk(s):\n");
 273                 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
 274                         long size1 = phys_avail[indx + 1] - phys_avail[indx];
 275
 276                         printf("0x%08lx - 0x%08lx, %ld bytes (%ld pages)\n",
 277                             phys_avail[indx], phys_avail[indx + 1] - 1, size1,
 278                             size1 >> PAGE_SHIFT);
 279                 }
 280         }
 281
 282         vm_ksubmap_init(&kmi);
 283
 284         printf("avail memory = %ld (%ld MB)\n", ptoa(cnt.v_free_count),
 285             ptoa(cnt.v_free_count) / 1048576);
 286
 287         if (fpswa_iface == NULL)
 288                 printf("Warning: no FPSWA package supplied\n");
 289         else
 290                 printf("FPSWA Revision = 0x%lx, Entry = %p\n",
 291                     (long)fpswa_iface->if_rev, (void *)fpswa_iface->if_fpswa);
 292
 293         /*
 294          * Set up buffers, so they can be used to read disk labels.
 295          */
 296         bufinit();
 297         vm_pager_bufferinit();
 298
 299         /*
 300          * Traverse the MADT to discover IOSAPIC and Local SAPIC
 301          * information.
 302          */
 303         ia64_probe_sapics();
 304         ia64_mca_init();
 305 }
 306
 307 void
 308 cpu_boot(int howto)
 309 {
 310
 311         efi_reset_system();
 312 }
 313
 314 void
 315 cpu_flush_dcache(void *ptr, size_t len)
 316 {
 317         vm_offset_t lim, va;
 318
 319         va = (uintptr_t)ptr & ~31;
 320         lim = (uintptr_t)ptr + len;
 321         while (va < lim) {
 322                 ia64_fc(va);
 323                 va += 32;
 324         }
 325
 326         ia64_srlz_d();
 327 }
 328
 329 /* Get current clock frequency for the given cpu id. */
 330 int
 331 cpu_est_clockrate(int cpu_id, uint64_t *rate)
 332 {
 333
 334         if (pcpu_find(cpu_id) == NULL || rate == NULL)
 335                 return (EINVAL);
 336         *rate = processor_frequency;
 337         return (0);
 338 }
 339
 340 void
 341 cpu_halt()
 342 {
 343
 344         efi_reset_system();
 345 }
 346
 347 void
 348 cpu_idle(int busy)
 349 {
 350         struct ia64_pal_result res;
 351
 352         if (cpu_idle_hook != NULL)
 353                 (*cpu_idle_hook)();
 354         else
 355                 res = ia64_call_pal_static(PAL_HALT_LIGHT, 0, 0, 0);
 356 }
 357
 358 int
 359 cpu_idle_wakeup(int cpu)
 360 {
 361
 362         return (0);
 363 }
 364
 365 void
 366 cpu_reset()
 367 {
 368
 369         cpu_boot(0);
 370 }
 371
 372 void
 373 cpu_switch(struct thread *old, struct thread *new, struct mtx *mtx)
 374 {
 375         struct pcb *oldpcb, *newpcb;
 376
 377         oldpcb = old->td_pcb;
 378 #ifdef COMPAT_IA32
 379         ia32_savectx(oldpcb);
 380 #endif
 381         if (PCPU_GET(fpcurthread) == old)
 382                 old->td_frame->tf_special.psr |= IA64_PSR_DFH;
 383         if (!savectx(oldpcb)) {
 384                 old->td_lock = mtx;
 385 #if defined(SCHED_ULE) && defined(SMP)
 386                 /* td_lock is volatile */
 387                 while (new->td_lock == &blocked_lock)
 388                         ;
 389 #endif
 390                 newpcb = new->td_pcb;
 391                 oldpcb->pcb_current_pmap =
 392                     pmap_switch(newpcb->pcb_current_pmap);
 393                 PCPU_SET(curthread, new);
 394 #ifdef COMPAT_IA32
 395                 ia32_restorectx(newpcb);
 396 #endif
 397                 if (PCPU_GET(fpcurthread) == new)
 398                         new->td_frame->tf_special.psr &= ~IA64_PSR_DFH;
 399                 restorectx(newpcb);
 400                 /* We should not get here. */
 401                 panic("cpu_switch: restorectx() returned");
 402                 /* NOTREACHED */
 403         }
 404 }
 405
 406 void
 407 cpu_throw(struct thread *old __unused, struct thread *new)
 408 {
 409         struct pcb *newpcb;
 410
 411         newpcb = new->td_pcb;
 412         (void)pmap_switch(newpcb->pcb_current_pmap);
 413         PCPU_SET(curthread, new);
 414 #ifdef COMPAT_IA32
 415         ia32_restorectx(newpcb);
 416 #endif
 417         restorectx(newpcb);
 418         /* We should not get here. */
 419         panic("cpu_throw: restorectx() returned");
 420         /* NOTREACHED */
 421 }
 422
 423 void
 424 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
 425 {
 426
 427         pcpu->pc_acpi_id = cpuid;
 428 }
 429
 430 void
 431 spinlock_enter(void)
 432 {
 433         struct thread *td;
 434
 435         td = curthread;
 436         if (td->td_md.md_spinlock_count == 0)
 437                 td->td_md.md_saved_intr = intr_disable();
 438         td->td_md.md_spinlock_count++;
 439         critical_enter();
 440 }
 441
 442 void
 443 spinlock_exit(void)
 444 {
 445         struct thread *td;
 446
 447         td = curthread;
 448         critical_exit();
 449         td->td_md.md_spinlock_count--;
 450         if (td->td_md.md_spinlock_count == 0)
 451                 intr_restore(td->td_md.md_saved_intr);
 452 }
 453
 454 void
 455 map_vhpt(uintptr_t vhpt)
 456 {
 457         pt_entry_t pte;
 458         uint64_t psr;
 459
 460         pte = PTE_PRESENT | PTE_MA_WB | PTE_ACCESSED | PTE_DIRTY |
 461             PTE_PL_KERN | PTE_AR_RW;
 462         pte |= vhpt & PTE_PPN_MASK;
 463
 464         __asm __volatile("ptr.d %0,%1" :: "r"(vhpt),
 465             "r"(IA64_ID_PAGE_SHIFT<<2));
 466
 467         __asm __volatile("mov   %0=psr" : "=r"(psr));
 468         __asm __volatile("rsm   psr.ic|psr.i");
 469         ia64_srlz_i();
 470         ia64_set_ifa(vhpt);
 471         ia64_set_itir(IA64_ID_PAGE_SHIFT << 2);
 472         ia64_srlz_d();
 473         __asm __volatile("itr.d dtr[%0]=%1" :: "r"(2), "r"(pte));
 474         __asm __volatile("mov   psr.l=%0" :: "r" (psr));
 475         ia64_srlz_i();
 476 }
 477
 478 void
 479 map_pal_code(void)
 480 {
 481         pt_entry_t pte;
 482         uint64_t psr;
 483
 484         if (ia64_pal_base == 0)
 485                 return;
 486
 487         pte = PTE_PRESENT | PTE_MA_WB | PTE_ACCESSED | PTE_DIRTY |
 488             PTE_PL_KERN | PTE_AR_RWX;
 489         pte |= ia64_pal_base & PTE_PPN_MASK;
 490
 491         __asm __volatile("ptr.d %0,%1; ptr.i %0,%1" ::
 492             "r"(IA64_PHYS_TO_RR7(ia64_pal_base)), "r"(IA64_ID_PAGE_SHIFT<<2));
 493
 494         __asm __volatile("mov   %0=psr" : "=r"(psr));
 495         __asm __volatile("rsm   psr.ic|psr.i");
 496         ia64_srlz_i();
 497         ia64_set_ifa(IA64_PHYS_TO_RR7(ia64_pal_base));
 498         ia64_set_itir(IA64_ID_PAGE_SHIFT << 2);
 499         ia64_srlz_d();
 500         __asm __volatile("itr.d dtr[%0]=%1" :: "r"(1), "r"(pte));
 501         ia64_srlz_d();
 502         __asm __volatile("itr.i itr[%0]=%1" :: "r"(1), "r"(pte));
 503         __asm __volatile("mov   psr.l=%0" :: "r" (psr));
 504         ia64_srlz_i();
 505 }
 506
 507 void
 508 map_gateway_page(void)
 509 {
 510         pt_entry_t pte;
 511         uint64_t psr;
 512
 513         pte = PTE_PRESENT | PTE_MA_WB | PTE_ACCESSED | PTE_DIRTY |
 514             PTE_PL_KERN | PTE_AR_X_RX;
 515         pte |= (uint64_t)ia64_gateway_page & PTE_PPN_MASK;
 516
 517         __asm __volatile("ptr.d %0,%1; ptr.i %0,%1" ::
 518             "r"(VM_MAX_ADDRESS), "r"(PAGE_SHIFT << 2));
 519
 520         __asm __volatile("mov   %0=psr" : "=r"(psr));
 521         __asm __volatile("rsm   psr.ic|psr.i");
 522         ia64_srlz_i();
 523         ia64_set_ifa(VM_MAX_ADDRESS);
 524         ia64_set_itir(PAGE_SHIFT << 2);
 525         ia64_srlz_d();
 526         __asm __volatile("itr.d dtr[%0]=%1" :: "r"(3), "r"(pte));
 527         ia64_srlz_d();
 528         __asm __volatile("itr.i itr[%0]=%1" :: "r"(3), "r"(pte));
 529         __asm __volatile("mov   psr.l=%0" :: "r" (psr));
 530         ia64_srlz_i();
 531
 532         /* Expose the mapping to userland in ar.k5 */
 533         ia64_set_k5(VM_MAX_ADDRESS);
 534 }
 535
 536 static void
 537 calculate_frequencies(void)
 538 {
 539         struct ia64_sal_result sal;
 540         struct ia64_pal_result pal;
 541
 542         sal = ia64_sal_entry(SAL_FREQ_BASE, 0, 0, 0, 0, 0, 0, 0);
 543         pal = ia64_call_pal_static(PAL_FREQ_RATIOS, 0, 0, 0);
 544
 545         if (sal.sal_status == 0 && pal.pal_status == 0) {
 546                 if (bootverbose) {
 547                         printf("Platform clock frequency %ld Hz\n",
 548                                sal.sal_result[0]);
 549                         printf("Processor ratio %ld/%ld, Bus ratio %ld/%ld, "
 550                                "ITC ratio %ld/%ld\n",
 551                                pal.pal_result[0] >> 32,
 552                                pal.pal_result[0] & ((1L << 32) - 1),
 553                                pal.pal_result[1] >> 32,
 554                                pal.pal_result[1] & ((1L << 32) - 1),
 555                                pal.pal_result[2] >> 32,
 556                                pal.pal_result[2] & ((1L << 32) - 1));
 557                 }
 558                 processor_frequency =
 559                         sal.sal_result[0] * (pal.pal_result[0] >> 32)
 560                         / (pal.pal_result[0] & ((1L << 32) - 1));
 561                 bus_frequency =
 562                         sal.sal_result[0] * (pal.pal_result[1] >> 32)
 563                         / (pal.pal_result[1] & ((1L << 32) - 1));
 564                 itc_frequency =
 565                         sal.sal_result[0] * (pal.pal_result[2] >> 32)
 566                         / (pal.pal_result[2] & ((1L << 32) - 1));
 567         }
 568 }
 569
 570 struct ia64_init_return
 571 ia64_init(void)
 572 {
 573         struct ia64_init_return ret;
 574         int phys_avail_cnt;
 575         vm_offset_t kernstart, kernend;
 576         vm_offset_t kernstartpfn, kernendpfn, pfn0, pfn1;
 577         char *p;
 578         struct efi_md *md;
 579         int metadata_missing;
 580
 581         /* NO OUTPUT ALLOWED UNTIL FURTHER NOTICE */
 582
 583         /*
 584          * TODO: Disable interrupts, floating point etc.
 585          * Maybe flush cache and tlb
 586          */
 587         ia64_set_fpsr(IA64_FPSR_DEFAULT);
 588
 589         /*
 590          * TODO: Get critical system information (if possible, from the
 591          * information provided by the boot program).
 592          */
 593
 594         /*
 595          * pa_bootinfo is the physical address of the bootinfo block as
 596          * passed to us by the loader and set in locore.s.
 597          */
 598         bootinfo = *(struct bootinfo *)(IA64_PHYS_TO_RR7(pa_bootinfo));
 599
 600         if (bootinfo.bi_magic != BOOTINFO_MAGIC || bootinfo.bi_version != 1) {
 601                 bzero(&bootinfo, sizeof(bootinfo));
 602                 bootinfo.bi_kernend = (vm_offset_t) round_page(_end);
 603         }
 604
 605         /*
 606          * Look for the I/O ports first - we need them for console
 607          * probing.
 608          */
 609         for (md = efi_md_first(); md != NULL; md = efi_md_next(md)) {
 610                 switch (md->md_type) {
 611                 case EFI_MD_TYPE_IOPORT:
 612                         ia64_port_base = IA64_PHYS_TO_RR6(md->md_phys);
 613                         break;
 614                 case EFI_MD_TYPE_PALCODE:
 615                         ia64_pal_base = md->md_phys;
 616                         break;
 617                 }
 618         }
 619
 620         metadata_missing = 0;
 621         if (bootinfo.bi_modulep)
 622                 preload_metadata = (caddr_t)bootinfo.bi_modulep;
 623         else
 624                 metadata_missing = 1;
 625
 626         if (envmode == 0 && bootinfo.bi_envp)
 627                 kern_envp = (caddr_t)bootinfo.bi_envp;
 628         else
 629                 kern_envp = static_env;
 630
 631         /*
 632          * Look at arguments passed to us and compute boothowto.
 633          */
 634         boothowto = bootinfo.bi_boothowto;
 635
 636         /*
 637          * Catch case of boot_verbose set in environment.
 638          */
 639         if ((p = getenv("boot_verbose")) != NULL) {
 640                 if (strcmp(p, "yes") == 0 || strcmp(p, "YES") == 0) {
 641                         boothowto |= RB_VERBOSE;
 642                 }
 643                 freeenv(p);
 644         }
 645
 646         if (boothowto & RB_VERBOSE)
 647                 bootverbose = 1;
 648
 649         /*
 650          * Find the beginning and end of the kernel.
 651          */
 652         kernstart = trunc_page(kernel_text);
 653 #ifdef DDB
 654         ksym_start = bootinfo.bi_symtab;
 655         ksym_end = bootinfo.bi_esymtab;
 656         kernend = (vm_offset_t)round_page(ksym_end);
 657 #else
 658         kernend = (vm_offset_t)round_page(_end);
 659 #endif
 660         /* But if the bootstrap tells us otherwise, believe it! */
 661         if (bootinfo.bi_kernend)
 662                 kernend = round_page(bootinfo.bi_kernend);
 663
 664         /*
 665          * Setup the PCPU data for the bootstrap processor. It is needed
 666          * by printf(). Also, since printf() has critical sections, we
 667          * need to initialize at least pc_curthread.
 668          */
 669         pcpup = &pcpu0;
 670         ia64_set_k4((u_int64_t)pcpup);
 671         pcpu_init(pcpup, 0, sizeof(pcpu0));
 672         dpcpu_init((void *)kernend, 0);
 673         kernend += DPCPU_SIZE;
 674         PCPU_SET(curthread, &thread0);
 675
 676         /*
 677          * Initialize the console before we print anything out.
 678          */
 679         cninit();
 680
 681         /* OUTPUT NOW ALLOWED */
 682
 683         if (ia64_pal_base != 0) {
 684                 ia64_pal_base &= ~IA64_ID_PAGE_MASK;
 685                 /*
 686                  * We use a TR to map the first 256M of memory - this might
 687                  * cover the palcode too.
 688                  */
 689                 if (ia64_pal_base == 0)
 690                         printf("PAL code mapped by the kernel's TR\n");
 691         } else
 692                 printf("PAL code not found\n");
 693
 694         /*
 695          * Wire things up so we can call the firmware.
 696          */
 697         map_pal_code();
 698         efi_boot_minimal(bootinfo.bi_systab);
 699         ia64_sal_init();
 700         calculate_frequencies();
 701
 702         if (metadata_missing)
 703                 printf("WARNING: loader(8) metadata is missing!\n");
 704
 705         /* Get FPSWA interface */
 706         fpswa_iface = (bootinfo.bi_fpswa == 0) ? NULL :
 707             (struct fpswa_iface *)IA64_PHYS_TO_RR7(bootinfo.bi_fpswa);
 708
 709         /* Init basic tunables, including hz */
 710         init_param1();
 711
 712         p = getenv("kernelname");
 713         if (p) {
 714                 strncpy(kernelname, p, sizeof(kernelname) - 1);
 715                 freeenv(p);
 716         }
 717
 718         kernstartpfn = atop(IA64_RR_MASK(kernstart));
 719         kernendpfn = atop(IA64_RR_MASK(kernend));
 720
 721         /*
 722          * Size the memory regions and load phys_avail[] with the results.
 723          */
 724
 725         /*
 726          * Find out how much memory is available, by looking at
 727          * the memory descriptors.
 728          */
 729
 730 #ifdef DEBUG_MD
 731         printf("Memory descriptor count: %d\n", mdcount);
 732 #endif
 733
 734         phys_avail_cnt = 0;
 735         for (md = efi_md_first(); md != NULL; md = efi_md_next(md)) {
 736 #ifdef DEBUG_MD
 737                 printf("MD %p: type %d pa 0x%lx cnt 0x%lx\n", md,
 738                     md->md_type, md->md_phys, md->md_pages);
 739 #endif
 740
 741                 pfn0 = ia64_btop(round_page(md->md_phys));
 742                 pfn1 = ia64_btop(trunc_page(md->md_phys + md->md_pages * 4096));
 743                 if (pfn1 <= pfn0)
 744                         continue;
 745
 746                 if (md->md_type != EFI_MD_TYPE_FREE)
 747                         continue;
 748
 749                 /*
 750                  * We have a memory descriptor that describes conventional
 751                  * memory that is for general use. We must determine if the
 752                  * loader has put the kernel in this region.
 753                  */
 754                 physmem += (pfn1 - pfn0);
 755                 if (pfn0 <= kernendpfn && kernstartpfn <= pfn1) {
 756                         /*
 757                          * Must compute the location of the kernel
 758                          * within the segment.
 759                          */
 760 #ifdef DEBUG_MD
 761                         printf("Descriptor %p contains kernel\n", mp);
 762 #endif
 763                         if (pfn0 < kernstartpfn) {
 764                                 /*
 765                                  * There is a chunk before the kernel.
 766                                  */
 767 #ifdef DEBUG_MD
 768                                 printf("Loading chunk before kernel: "
 769                                        "0x%lx / 0x%lx\n", pfn0, kernstartpfn);
 770 #endif
 771                                 phys_avail[phys_avail_cnt] = ia64_ptob(pfn0);
 772                                 phys_avail[phys_avail_cnt+1] = ia64_ptob(kernstartpfn);
 773                                 phys_avail_cnt += 2;
 774                         }
 775                         if (kernendpfn < pfn1) {
 776                                 /*
 777                                  * There is a chunk after the kernel.
 778                                  */
 779 #ifdef DEBUG_MD
 780                                 printf("Loading chunk after kernel: "
 781                                        "0x%lx / 0x%lx\n", kernendpfn, pfn1);
 782 #endif
 783                                 phys_avail[phys_avail_cnt] = ia64_ptob(kernendpfn);
 784                                 phys_avail[phys_avail_cnt+1] = ia64_ptob(pfn1);
 785                                 phys_avail_cnt += 2;
 786                         }
 787                 } else {
 788                         /*
 789                          * Just load this cluster as one chunk.
 790                          */
 791 #ifdef DEBUG_MD
 792                         printf("Loading descriptor %d: 0x%lx / 0x%lx\n", i,
 793                                pfn0, pfn1);
 794 #endif
 795                         phys_avail[phys_avail_cnt] = ia64_ptob(pfn0);
 796                         phys_avail[phys_avail_cnt+1] = ia64_ptob(pfn1);
 797                         phys_avail_cnt += 2;
 798
 799                 }
 800         }
 801         phys_avail[phys_avail_cnt] = 0;
 802
 803         Maxmem = physmem;
 804         init_param2(physmem);
 805
 806         /*
 807          * Initialize error message buffer (at end of core).
 808          */
 809         msgbufp = (struct msgbuf *)pmap_steal_memory(MSGBUF_SIZE);
 810         msgbufinit(msgbufp, MSGBUF_SIZE);
 811
 812         proc_linkup0(&proc0, &thread0);
 813         /*
 814          * Init mapping for kernel stack for proc 0
 815          */
 816         thread0.td_kstack = pmap_steal_memory(KSTACK_PAGES * PAGE_SIZE);
 817         thread0.td_kstack_pages = KSTACK_PAGES;
 818
 819         mutex_init();
 820
 821         /*
 822          * Initialize the rest of proc 0's PCB.
 823          *
 824          * Set the kernel sp, reserving space for an (empty) trapframe,
 825          * and make proc0's trapframe pointer point to it for sanity.
 826          * Initialise proc0's backing store to start after u area.
 827          */
 828         cpu_thread_alloc(&thread0);
 829         thread0.td_frame->tf_flags = FRAME_SYSCALL;
 830         thread0.td_pcb->pcb_special.sp =
 831             (u_int64_t)thread0.td_frame - 16;
 832         thread0.td_pcb->pcb_special.bspstore = thread0.td_kstack;
 833
 834         /*
 835          * Initialize the virtual memory system.
 836          */
 837         pmap_bootstrap();
 838
 839         /*
 840          * Initialize debuggers, and break into them if appropriate.
 841          */
 842         kdb_init();
 843
 844 #ifdef KDB
 845         if (boothowto & RB_KDB)
 846                 kdb_enter(KDB_WHY_BOOTFLAGS,
 847                     "Boot flags requested debugger\n");
 848 #endif
 849
 850         ia64_set_tpr(0);
 851         ia64_srlz_d();
 852
 853         ret.bspstore = thread0.td_pcb->pcb_special.bspstore;
 854         ret.sp = thread0.td_pcb->pcb_special.sp;
 855         return (ret);
 856 }
 857
 858 __volatile void *
 859 ia64_ioport_address(u_int port)
 860 {
 861         uint64_t addr;
 862
 863         addr = (port > 0xffff) ? IA64_PHYS_TO_RR6((uint64_t)port) :
 864             ia64_port_base | ((port & 0xfffc) << 10) | (port & 0xFFF);
 865         return ((__volatile void *)addr);
 866 }
 867
 868 uint64_t
 869 ia64_get_hcdp(void)
 870 {
 871
 872         return (bootinfo.bi_hcdp);
 873 }
 874
 875 void
 876 bzero(void *buf, size_t len)
 877 {
 878         caddr_t p = buf;
 879
 880         while (((vm_offset_t) p & (sizeof(u_long) - 1)) && len) {
 881                 *p++ = 0;
 882                 len--;
 883         }
 884         while (len >= sizeof(u_long) * 8) {
 885                 *(u_long*) p = 0;
 886                 *((u_long*) p + 1) = 0;
 887                 *((u_long*) p + 2) = 0;
 888                 *((u_long*) p + 3) = 0;
 889                 len -= sizeof(u_long) * 8;
 890                 *((u_long*) p + 4) = 0;
 891                 *((u_long*) p + 5) = 0;
 892                 *((u_long*) p + 6) = 0;
 893                 *((u_long*) p + 7) = 0;
 894                 p += sizeof(u_long) * 8;
 895         }
 896         while (len >= sizeof(u_long)) {
 897                 *(u_long*) p = 0;
 898                 len -= sizeof(u_long);
 899                 p += sizeof(u_long);
 900         }
 901         while (len) {
 902                 *p++ = 0;
 903                 len--;
 904         }
 905 }
 906
 907 void
 908 DELAY(int n)
 909 {
 910         u_int64_t start, end, now;
 911
 912         sched_pin();
 913
 914         start = ia64_get_itc();
 915         end = start + (itc_frequency * n) / 1000000;
 916         /* printf("DELAY from 0x%lx to 0x%lx\n", start, end); */
 917         do {
 918                 now = ia64_get_itc();
 919         } while (now < end || (now > start && end < start));
 920
 921         sched_unpin();
 922 }
 923
 924 /*
 925  * Send an interrupt (signal) to a process.
 926  */
 927 void
 928 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
 929 {
 930         struct proc *p;
 931         struct thread *td;
 932         struct trapframe *tf;
 933         struct sigacts *psp;
 934         struct sigframe sf, *sfp;
 935         u_int64_t sbs, sp;
 936         int oonstack;
 937         int sig;
 938         u_long code;
 939
 940         td = curthread;
 941         p = td->td_proc;
 942         PROC_LOCK_ASSERT(p, MA_OWNED);
 943         sig = ksi->ksi_signo;
 944         code = ksi->ksi_code;
 945         psp = p->p_sigacts;
 946         mtx_assert(&psp->ps_mtx, MA_OWNED);
 947         tf = td->td_frame;
 948         sp = tf->tf_special.sp;
 949         oonstack = sigonstack(sp);
 950         sbs = 0;
 951
 952         /* save user context */
 953         bzero(&sf, sizeof(struct sigframe));
 954         sf.sf_uc.uc_sigmask = *mask;
 955         sf.sf_uc.uc_stack = td->td_sigstk;
 956         sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
 957             ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
 958
 959         /*
 960          * Allocate and validate space for the signal handler
 961          * context. Note that if the stack is in P0 space, the
 962          * call to grow() is a nop, and the useracc() check
 963          * will fail if the process has not already allocated
 964          * the space with a `brk'.
 965          */
 966         if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
 967             SIGISMEMBER(psp->ps_sigonstack, sig)) {
 968                 sbs = (u_int64_t)td->td_sigstk.ss_sp;
 969                 sbs = (sbs + 15) & ~15;
 970                 sfp = (struct sigframe *)(sbs + td->td_sigstk.ss_size);
 971 #if defined(COMPAT_43)
 972                 td->td_sigstk.ss_flags |= SS_ONSTACK;
 973 #endif
 974         } else
 975                 sfp = (struct sigframe *)sp;
 976         sfp = (struct sigframe *)((u_int64_t)(sfp - 1) & ~15);
 977
 978         /* Fill in the siginfo structure for POSIX handlers. */
 979         if (SIGISMEMBER(psp->ps_siginfo, sig)) {
 980                 sf.sf_si = ksi->ksi_info;
 981                 sf.sf_si.si_signo = sig;
 982                 /*
 983                  * XXX this shouldn't be here after code in trap.c
 984                  * is fixed
 985                  */
 986                 sf.sf_si.si_addr = (void*)tf->tf_special.ifa;
 987                 code = (u_int64_t)&sfp->sf_si;
 988         }
 989
 990         mtx_unlock(&psp->ps_mtx);
 991         PROC_UNLOCK(p);
 992
 993         get_mcontext(td, &sf.sf_uc.uc_mcontext, 0);
 994
 995         /* Copy the frame out to userland. */
 996         if (copyout(&sf, sfp, sizeof(sf)) != 0) {
 997                 /*
 998                  * Process has trashed its stack; give it an illegal
 999                  * instruction to halt it in its tracks.
1000                  */
1001                 PROC_LOCK(p);
1002                 sigexit(td, SIGILL);
1003                 return;
1004         }
1005
1006         if ((tf->tf_flags & FRAME_SYSCALL) == 0) {
1007                 tf->tf_special.psr &= ~IA64_PSR_RI;
1008                 tf->tf_special.iip = ia64_get_k5() +
1009                     ((uint64_t)break_sigtramp - (uint64_t)ia64_gateway_page);
1010         } else
1011                 tf->tf_special.iip = ia64_get_k5() +
1012                     ((uint64_t)epc_sigtramp - (uint64_t)ia64_gateway_page);
1013
1014         /*
1015          * Setup the trapframe to return to the signal trampoline. We pass
1016          * information to the trampoline in the following registers:
1017          *
1018          *      gp      new backing store or NULL
1019          *      r8      signal number
1020          *      r9      signal code or siginfo pointer
1021          *      r10     signal handler (function descriptor)
1022          */
1023         tf->tf_special.sp = (u_int64_t)sfp - 16;
1024         tf->tf_special.gp = sbs;
1025         tf->tf_special.bspstore = sf.sf_uc.uc_mcontext.mc_special.bspstore;
1026         tf->tf_special.ndirty = 0;
1027         tf->tf_special.rnat = sf.sf_uc.uc_mcontext.mc_special.rnat;
1028         tf->tf_scratch.gr8 = sig;
1029         tf->tf_scratch.gr9 = code;
1030         tf->tf_scratch.gr10 = (u_int64_t)catcher;
1031
1032         PROC_LOCK(p);
1033         mtx_lock(&psp->ps_mtx);
1034 }
1035
1036 /*
1037  * System call to cleanup state after a signal
1038  * has been taken.  Reset signal mask and
1039  * stack state from context left by sendsig (above).
1040  * Return to previous pc and psl as specified by
1041  * context left by sendsig. Check carefully to
1042  * make sure that the user has not modified the
1043  * state to gain improper privileges.
1044  *
1045  * MPSAFE
1046  */
1047 int
1048 sigreturn(struct thread *td,
1049         struct sigreturn_args /* {
1050                 ucontext_t *sigcntxp;
1051         } */ *uap)
1052 {
1053         ucontext_t uc;
1054         struct trapframe *tf;
1055         struct proc *p;
1056         struct pcb *pcb;
1057
1058         tf = td->td_frame;
1059         p = td->td_proc;
1060         pcb = td->td_pcb;
1061
1062         /*
1063          * Fetch the entire context structure at once for speed.
1064          * We don't use a normal argument to simplify RSE handling.
1065          */
1066         if (copyin(uap->sigcntxp, (caddr_t)&uc, sizeof(uc)))
1067                 return (EFAULT);
1068
1069         set_mcontext(td, &uc.uc_mcontext);
1070
1071         PROC_LOCK(p);
1072 #if defined(COMPAT_43)
1073         if (sigonstack(tf->tf_special.sp))
1074                 td->td_sigstk.ss_flags |= SS_ONSTACK;
1075         else
1076                 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
1077 #endif
1078         td->td_sigmask = uc.uc_sigmask;
1079         SIG_CANTMASK(td->td_sigmask);
1080         signotify(td);
1081         PROC_UNLOCK(p);
1082
1083         return (EJUSTRETURN);
1084 }
1085
1086 #ifdef COMPAT_FREEBSD4
1087 int
1088 freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap)
1089 {
1090
1091         return sigreturn(td, (struct sigreturn_args *)uap);
1092 }
1093 #endif
1094
1095 /*
1096  * Construct a PCB from a trapframe. This is called from kdb_trap() where
1097  * we want to start a backtrace from the function that caused us to enter
1098  * the debugger. We have the context in the trapframe, but base the trace
1099  * on the PCB. The PCB doesn't have to be perfect, as long as it contains
1100  * enough for a backtrace.
1101  */
1102 void
1103 makectx(struct trapframe *tf, struct pcb *pcb)
1104 {
1105
1106         pcb->pcb_special = tf->tf_special;
1107         pcb->pcb_special.__spare = ~0UL;        /* XXX see unwind.c */
1108         save_callee_saved(&pcb->pcb_preserved);
1109         save_callee_saved_fp(&pcb->pcb_preserved_fp);
1110 }
1111
1112 int
1113 ia64_flush_dirty(struct thread *td, struct _special *r)
1114 {
1115         struct iovec iov;
1116         struct uio uio;
1117         uint64_t bspst, kstk, rnat;
1118         int error, locked;
1119
1120         if (r->ndirty == 0)
1121                 return (0);
1122
1123         kstk = td->td_kstack + (r->bspstore & 0x1ffUL);
1124         if (td == curthread) {
1125                 __asm __volatile("mov   ar.rsc=0;;");
1126                 __asm __volatile("mov   %0=ar.bspstore" : "=r"(bspst));
1127                 /* Make sure we have all the user registers written out. */
1128                 if (bspst - kstk < r->ndirty) {
1129                         __asm __volatile("flushrs;;");
1130                         __asm __volatile("mov   %0=ar.bspstore" : "=r"(bspst));
1131                 }
1132                 __asm __volatile("mov   %0=ar.rnat;;" : "=r"(rnat));
1133                 __asm __volatile("mov   ar.rsc=3");
1134                 error = copyout((void*)kstk, (void*)r->bspstore, r->ndirty);
1135                 kstk += r->ndirty;
1136                 r->rnat = (bspst > kstk && (bspst & 0x1ffL) < (kstk & 0x1ffL))
1137                     ? *(uint64_t*)(kstk | 0x1f8L) : rnat;
1138         } else {
1139                 locked = PROC_LOCKED(td->td_proc);
1140                 if (!locked)
1141                         PHOLD(td->td_proc);
1142                 iov.iov_base = (void*)(uintptr_t)kstk;
1143                 iov.iov_len = r->ndirty;
1144                 uio.uio_iov = &iov;
1145                 uio.uio_iovcnt = 1;
1146                 uio.uio_offset = r->bspstore;
1147                 uio.uio_resid = r->ndirty;
1148                 uio.uio_segflg = UIO_SYSSPACE;
1149                 uio.uio_rw = UIO_WRITE;
1150                 uio.uio_td = td;
1151                 error = proc_rwmem(td->td_proc, &uio);
1152                 /*
1153                  * XXX proc_rwmem() doesn't currently return ENOSPC,
1154                  * so I think it can bogusly return 0. Neither do
1155                  * we allow short writes.
1156                  */
1157                 if (uio.uio_resid != 0 && error == 0)
1158                         error = ENOSPC;
1159                 if (!locked)
1160                         PRELE(td->td_proc);
1161         }
1162
1163         r->bspstore += r->ndirty;
1164         r->ndirty = 0;
1165         return (error);
1166 }
1167
1168 int
1169 get_mcontext(struct thread *td, mcontext_t *mc, int flags)
1170 {
1171         struct trapframe *tf;
1172         int error;
1173
1174         tf = td->td_frame;
1175         bzero(mc, sizeof(*mc));
1176         mc->mc_special = tf->tf_special;
1177         error = ia64_flush_dirty(td, &mc->mc_special);
1178         if (tf->tf_flags & FRAME_SYSCALL) {
1179                 mc->mc_flags |= _MC_FLAGS_SYSCALL_CONTEXT;
1180                 mc->mc_scratch = tf->tf_scratch;
1181                 if (flags & GET_MC_CLEAR_RET) {
1182                         mc->mc_scratch.gr8 = 0;
1183                         mc->mc_scratch.gr9 = 0;
1184                         mc->mc_scratch.gr10 = 0;
1185                         mc->mc_scratch.gr11 = 0;
1186                 }
1187         } else {
1188                 mc->mc_flags |= _MC_FLAGS_ASYNC_CONTEXT;
1189                 mc->mc_scratch = tf->tf_scratch;
1190                 mc->mc_scratch_fp = tf->tf_scratch_fp;
1191                 /*
1192                  * XXX If the thread never used the high FP registers, we
1193                  * probably shouldn't waste time saving them.
1194                  */
1195                 ia64_highfp_save(td);
1196                 mc->mc_flags |= _MC_FLAGS_HIGHFP_VALID;
1197                 mc->mc_high_fp = td->td_pcb->pcb_high_fp;
1198         }
1199         save_callee_saved(&mc->mc_preserved);
1200         save_callee_saved_fp(&mc->mc_preserved_fp);
1201         return (error);
1202 }
1203
1204 int
1205 set_mcontext(struct thread *td, const mcontext_t *mc)
1206 {
1207         struct _special s;
1208         struct trapframe *tf;
1209         uint64_t psrmask;
1210
1211         tf = td->td_frame;
1212
1213         KASSERT((tf->tf_special.ndirty & ~PAGE_MASK) == 0,
1214             ("Whoa there! We have more than 8KB of dirty registers!"));
1215
1216         s = mc->mc_special;
1217         /*
1218          * Only copy the user mask and the restart instruction bit from
1219          * the new context.
1220          */
1221         psrmask = IA64_PSR_BE | IA64_PSR_UP | IA64_PSR_AC | IA64_PSR_MFL |
1222             IA64_PSR_MFH | IA64_PSR_RI;
1223         s.psr = (tf->tf_special.psr & ~psrmask) | (s.psr & psrmask);
1224         /* We don't have any dirty registers of the new context. */
1225         s.ndirty = 0;
1226         if (mc->mc_flags & _MC_FLAGS_ASYNC_CONTEXT) {
1227                 /*
1228                  * We can get an async context passed to us while we
1229                  * entered the kernel through a syscall: sigreturn(2)
1230                  * takes contexts that could previously be the result of
1231                  * a trap or interrupt.
1232                  * Hence, we cannot assert that the trapframe is not
1233                  * a syscall frame, but we can assert that it's at
1234                  * least an expected syscall.
1235                  */
1236                 if (tf->tf_flags & FRAME_SYSCALL) {
1237                         KASSERT(tf->tf_scratch.gr15 == SYS_sigreturn, ("foo"));
1238                         tf->tf_flags &= ~FRAME_SYSCALL;
1239                 }
1240                 tf->tf_scratch = mc->mc_scratch;
1241                 tf->tf_scratch_fp = mc->mc_scratch_fp;
1242                 if (mc->mc_flags & _MC_FLAGS_HIGHFP_VALID)
1243                         td->td_pcb->pcb_high_fp = mc->mc_high_fp;
1244         } else {
1245                 KASSERT((tf->tf_flags & FRAME_SYSCALL) != 0, ("foo"));
1246                 if ((mc->mc_flags & _MC_FLAGS_SYSCALL_CONTEXT) == 0) {
1247                         s.cfm = tf->tf_special.cfm;
1248                         s.iip = tf->tf_special.iip;
1249                         tf->tf_scratch.gr15 = 0;        /* Clear syscall nr. */
1250                 } else
1251                         tf->tf_scratch = mc->mc_scratch;
1252         }
1253         tf->tf_special = s;
1254         restore_callee_saved(&mc->mc_preserved);
1255         restore_callee_saved_fp(&mc->mc_preserved_fp);
1256
1257         return (0);
1258 }
1259
1260 /*
1261  * Clear registers on exec.
1262  */
1263 void
1264 exec_setregs(struct thread *td, u_long entry, u_long stack, u_long ps_strings)
1265 {
1266         struct trapframe *tf;
1267         uint64_t *ksttop, *kst;
1268
1269         tf = td->td_frame;
1270         ksttop = (uint64_t*)(td->td_kstack + tf->tf_special.ndirty +
1271             (tf->tf_special.bspstore & 0x1ffUL));
1272
1273         /*
1274          * We can ignore up to 8KB of dirty registers by masking off the
1275          * lower 13 bits in exception_restore() or epc_syscall(). This
1276          * should be enough for a couple of years, but if there are more
1277          * than 8KB of dirty registers, we lose track of the bottom of
1278          * the kernel stack. The solution is to copy the active part of
1279          * the kernel stack down 1 page (or 2, but not more than that)
1280          * so that we always have less than 8KB of dirty registers.
1281          */
1282         KASSERT((tf->tf_special.ndirty & ~PAGE_MASK) == 0,
1283             ("Whoa there! We have more than 8KB of dirty registers!"));
1284
1285         bzero(&tf->tf_special, sizeof(tf->tf_special));
1286         if ((tf->tf_flags & FRAME_SYSCALL) == 0) {      /* break syscalls. */
1287                 bzero(&tf->tf_scratch, sizeof(tf->tf_scratch));
1288                 bzero(&tf->tf_scratch_fp, sizeof(tf->tf_scratch_fp));
1289                 tf->tf_special.cfm = (1UL<<63) | (3UL<<7) | 3UL;
1290                 tf->tf_special.bspstore = IA64_BACKINGSTORE;
1291                 /*
1292                  * Copy the arguments onto the kernel register stack so that
1293                  * they get loaded by the loadrs instruction. Skip over the
1294                  * NaT collection points.
1295                  */
1296                 kst = ksttop - 1;
1297                 if (((uintptr_t)kst & 0x1ff) == 0x1f8)
1298                         *kst-- = 0;
1299                 *kst-- = 0;
1300                 if (((uintptr_t)kst & 0x1ff) == 0x1f8)
1301                         *kst-- = 0;
1302                 *kst-- = ps_strings;
1303                 if (((uintptr_t)kst & 0x1ff) == 0x1f8)
1304                         *kst-- = 0;
1305                 *kst = stack;
1306                 tf->tf_special.ndirty = (ksttop - kst) << 3;
1307         } else {                                /* epc syscalls (default). */
1308                 tf->tf_special.cfm = (3UL<<62) | (3UL<<7) | 3UL;
1309                 tf->tf_special.bspstore = IA64_BACKINGSTORE + 24;
1310                 /*
1311                  * Write values for out0, out1 and out2 to the user's backing
1312                  * store and arrange for them to be restored into the user's
1313                  * initial register frame.
1314                  * Assumes that (bspstore & 0x1f8) < 0x1e0.
1315                  */
1316                 suword((caddr_t)tf->tf_special.bspstore - 24, stack);
1317                 suword((caddr_t)tf->tf_special.bspstore - 16, ps_strings);
1318                 suword((caddr_t)tf->tf_special.bspstore -  8, 0);
1319         }
1320
1321         tf->tf_special.iip = entry;
1322         tf->tf_special.sp = (stack & ~15) - 16;
1323         tf->tf_special.rsc = 0xf;
1324         tf->tf_special.fpsr = IA64_FPSR_DEFAULT;
1325         tf->tf_special.psr = IA64_PSR_IC | IA64_PSR_I | IA64_PSR_IT |
1326             IA64_PSR_DT | IA64_PSR_RT | IA64_PSR_DFH | IA64_PSR_BN |
1327             IA64_PSR_CPL_USER;
1328 }
1329
1330 int
1331 ptrace_set_pc(struct thread *td, unsigned long addr)
1332 {
1333         uint64_t slot;
1334
1335         switch (addr & 0xFUL) {
1336         case 0:
1337                 slot = IA64_PSR_RI_0;
1338                 break;
1339         case 1:
1340                 /* XXX we need to deal with MLX bundles here */
1341                 slot = IA64_PSR_RI_1;
1342                 break;
1343         case 2:
1344                 slot = IA64_PSR_RI_2;
1345                 break;
1346         default:
1347                 return (EINVAL);
1348         }
1349
1350         td->td_frame->tf_special.iip = addr & ~0x0FULL;
1351         td->td_frame->tf_special.psr =
1352             (td->td_frame->tf_special.psr & ~IA64_PSR_RI) | slot;
1353         return (0);
1354 }
1355
1356 int
1357 ptrace_single_step(struct thread *td)
1358 {
1359         struct trapframe *tf;
1360
1361         /*
1362          * There's no way to set single stepping when we're leaving the
1363          * kernel through the EPC syscall path. The way we solve this is
1364          * by enabling the lower-privilege trap so that we re-enter the
1365          * kernel as soon as the privilege level changes. See trap.c for
1366          * how we proceed from there.
1367          */
1368         tf = td->td_frame;
1369         if (tf->tf_flags & FRAME_SYSCALL)
1370                 tf->tf_special.psr |= IA64_PSR_LP;
1371         else
1372                 tf->tf_special.psr |= IA64_PSR_SS;
1373         return (0);
1374 }
1375
1376 int
1377 ptrace_clear_single_step(struct thread *td)
1378 {
1379         struct trapframe *tf;
1380
1381         /*
1382          * Clear any and all status bits we may use to implement single
1383          * stepping.
1384          */
1385         tf = td->td_frame;
1386         tf->tf_special.psr &= ~IA64_PSR_SS;
1387         tf->tf_special.psr &= ~IA64_PSR_LP;
1388         tf->tf_special.psr &= ~IA64_PSR_TB;
1389         return (0);
1390 }
1391
1392 int
1393 fill_regs(struct thread *td, struct reg *regs)
1394 {
1395         struct trapframe *tf;
1396
1397         tf = td->td_frame;
1398         regs->r_special = tf->tf_special;
1399         regs->r_scratch = tf->tf_scratch;
1400         save_callee_saved(&regs->r_preserved);
1401         return (0);
1402 }
1403
1404 int
1405 set_regs(struct thread *td, struct reg *regs)
1406 {
1407         struct trapframe *tf;
1408         int error;
1409
1410         tf = td->td_frame;
1411         error = ia64_flush_dirty(td, &tf->tf_special);
1412         if (!error) {
1413                 tf->tf_special = regs->r_special;
1414                 tf->tf_special.bspstore += tf->tf_special.ndirty;
1415                 tf->tf_special.ndirty = 0;
1416                 tf->tf_scratch = regs->r_scratch;
1417                 restore_callee_saved(&regs->r_preserved);
1418         }
1419         return (error);
1420 }
1421
1422 int
1423 fill_dbregs(struct thread *td, struct dbreg *dbregs)
1424 {
1425
1426         return (ENOSYS);
1427 }
1428
1429 int
1430 set_dbregs(struct thread *td, struct dbreg *dbregs)
1431 {
1432
1433         return (ENOSYS);
1434 }
1435
1436 int
1437 fill_fpregs(struct thread *td, struct fpreg *fpregs)
1438 {
1439         struct trapframe *frame = td->td_frame;
1440         struct pcb *pcb = td->td_pcb;
1441
1442         /* Save the high FP registers. */
1443         ia64_highfp_save(td);
1444
1445         fpregs->fpr_scratch = frame->tf_scratch_fp;
1446         save_callee_saved_fp(&fpregs->fpr_preserved);
1447         fpregs->fpr_high = pcb->pcb_high_fp;
1448         return (0);
1449 }
1450
1451 int
1452 set_fpregs(struct thread *td, struct fpreg *fpregs)
1453 {
1454         struct trapframe *frame = td->td_frame;
1455         struct pcb *pcb = td->td_pcb;
1456
1457         /* Throw away the high FP registers (should be redundant). */
1458         ia64_highfp_drop(td);
1459
1460         frame->tf_scratch_fp = fpregs->fpr_scratch;
1461         restore_callee_saved_fp(&fpregs->fpr_preserved);
1462         pcb->pcb_high_fp = fpregs->fpr_high;
1463         return (0);
1464 }
1465
1466 /*
1467  * High FP register functions.
1468  */
1469
1470 int
1471 ia64_highfp_drop(struct thread *td)
1472 {
1473         struct pcb *pcb;
1474         struct pcpu *cpu;
1475         struct thread *thr;
1476
1477         mtx_lock_spin(&td->td_md.md_highfp_mtx);
1478         pcb = td->td_pcb;
1479         cpu = pcb->pcb_fpcpu;
1480         if (cpu == NULL) {
1481                 mtx_unlock_spin(&td->td_md.md_highfp_mtx);
1482                 return (0);
1483         }
1484         pcb->pcb_fpcpu = NULL;
1485         thr = cpu->pc_fpcurthread;
1486         cpu->pc_fpcurthread = NULL;
1487         mtx_unlock_spin(&td->td_md.md_highfp_mtx);
1488
1489         /* Post-mortem sanity checking. */
1490         KASSERT(thr == td, ("Inconsistent high FP state"));
1491         return (1);
1492 }
1493
1494 int
1495 ia64_highfp_save(struct thread *td)
1496 {
1497         struct pcb *pcb;
1498         struct pcpu *cpu;
1499         struct thread *thr;
1500
1501         /* Don't save if the high FP registers weren't modified. */
1502         if ((td->td_frame->tf_special.psr & IA64_PSR_MFH) == 0)
1503                 return (ia64_highfp_drop(td));
1504
1505         mtx_lock_spin(&td->td_md.md_highfp_mtx);
1506         pcb = td->td_pcb;
1507         cpu = pcb->pcb_fpcpu;
1508         if (cpu == NULL) {
1509                 mtx_unlock_spin(&td->td_md.md_highfp_mtx);
1510                 return (0);
1511         }
1512 #ifdef SMP
1513         if (td == curthread)
1514                 sched_pin();
1515         if (cpu != pcpup) {
1516                 mtx_unlock_spin(&td->td_md.md_highfp_mtx);
1517                 ipi_send(cpu, IPI_HIGH_FP);
1518                 if (td == curthread)
1519                         sched_unpin();
1520                 while (pcb->pcb_fpcpu == cpu)
1521                         DELAY(100);
1522                 return (1);
1523         } else {
1524                 save_high_fp(&pcb->pcb_high_fp);
1525                 if (td == curthread)
1526                         sched_unpin();
1527         }
1528 #else
1529         save_high_fp(&pcb->pcb_high_fp);
1530 #endif
1531         pcb->pcb_fpcpu = NULL;
1532         thr = cpu->pc_fpcurthread;
1533         cpu->pc_fpcurthread = NULL;
1534         mtx_unlock_spin(&td->td_md.md_highfp_mtx);
1535
1536         /* Post-mortem sanity cxhecking. */
1537         KASSERT(thr == td, ("Inconsistent high FP state"));
1538         return (1);
1539 }
1540
1541 void
1542 ia64_sync_icache(vm_offset_t va, vm_offset_t sz)
1543 {
1544         vm_offset_t lim;
1545
1546         if (!ia64_sync_icache_needed)
1547                 return;
1548
1549         lim = va + sz;
1550         while (va < lim) {
1551                 ia64_fc_i(va);
1552                 va += 32;       /* XXX */
1553         }
1554
1555         ia64_sync_i();
1556         ia64_srlz_i();
1557 }