2 * Copyright 2006 by Juniper Networks. All rights reserved.
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
33 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/module.h>
39 #include <sys/malloc.h>
41 #include <machine/spr.h>
42 #include <machine/ocpbus.h>
43 #include <machine/intr_machdep.h>
44 #include <machine/md_var.h>
45 #include <machine/vmparam.h>
46 #include <machine/bootinfo.h>
48 #include <powerpc/mpc85xx/ocpbus.h>
49 #include <powerpc/mpc85xx/mpc85xx.h>
53 extern struct bus_space bs_be_tag;
65 static int ocpbus_probe(device_t);
66 static int ocpbus_attach(device_t);
67 static int ocpbus_shutdown(device_t);
68 static int ocpbus_get_resource(device_t, device_t, int, int, u_long *,
70 static struct resource *ocpbus_alloc_resource(device_t, device_t, int, int *,
71 u_long, u_long, u_long, u_int);
72 static int ocpbus_print_child(device_t, device_t);
73 static int ocpbus_release_resource(device_t, device_t, int, int,
75 static int ocpbus_read_ivar(device_t, device_t, int, uintptr_t *);
76 static int ocpbus_setup_intr(device_t, device_t, struct resource *, int,
77 driver_filter_t *, driver_intr_t *, void *, void **);
78 static int ocpbus_teardown_intr(device_t, device_t, struct resource *, void *);
79 static int ocpbus_config_intr(device_t, int, enum intr_trigger,
83 * Bus interface definition
85 static device_method_t ocpbus_methods[] = {
86 /* Device interface */
87 DEVMETHOD(device_probe, ocpbus_probe),
88 DEVMETHOD(device_attach, ocpbus_attach),
89 DEVMETHOD(device_shutdown, ocpbus_shutdown),
92 DEVMETHOD(bus_print_child, ocpbus_print_child),
93 DEVMETHOD(bus_read_ivar, ocpbus_read_ivar),
94 DEVMETHOD(bus_setup_intr, ocpbus_setup_intr),
95 DEVMETHOD(bus_teardown_intr, ocpbus_teardown_intr),
96 DEVMETHOD(bus_config_intr, ocpbus_config_intr),
98 DEVMETHOD(bus_get_resource, ocpbus_get_resource),
99 DEVMETHOD(bus_alloc_resource, ocpbus_alloc_resource),
100 DEVMETHOD(bus_release_resource, ocpbus_release_resource),
101 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
102 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
107 static driver_t ocpbus_driver = {
110 sizeof(struct ocpbus_softc)
113 devclass_t ocpbus_devclass;
115 DRIVER_MODULE(ocpbus, nexus, ocpbus_driver, ocpbus_devclass, 0, 0);
118 ocpbus_mk_child(device_t dev, int type, int unit)
120 struct ocp_devinfo *dinfo;
123 child = device_add_child(dev, NULL, -1);
125 device_printf(dev, "could not add child device\n");
128 dinfo = malloc(sizeof(struct ocp_devinfo), M_DEVBUF, M_WAITOK|M_ZERO);
129 dinfo->ocp_devtype = type;
130 dinfo->ocp_unit = unit;
131 device_set_ivars(child, dinfo);
136 ocpbus_write_law(int trgt, int type, u_long *startp, u_long *countp)
143 case OCP85XX_TGTIF_PCI0:
147 case OCP85XX_TGTIF_PCI1:
151 case OCP85XX_TGTIF_PCI2:
161 case OCP85XX_TGTIF_PCI0:
165 case OCP85XX_TGTIF_PCI1:
169 case OCP85XX_TGTIF_PCI2:
184 return (law_enable(trgt, *startp, *countp));
188 ocpbus_probe(device_t dev)
191 device_set_desc(dev, "On-Chip Peripherals bus");
192 return (BUS_PROBE_DEFAULT);
196 ocpbus_attach(device_t dev)
198 struct ocpbus_softc *sc;
199 int error, i, tgt, law_max;
203 sc = device_get_softc(dev);
205 ocpbus_mk_child(dev, OCPBUS_DEVTYPE_I2C, 0);
206 ocpbus_mk_child(dev, OCPBUS_DEVTYPE_I2C, 1);
207 ocpbus_mk_child(dev, OCPBUS_DEVTYPE_UART, 0);
208 ocpbus_mk_child(dev, OCPBUS_DEVTYPE_UART, 1);
209 ocpbus_mk_child(dev, OCPBUS_DEVTYPE_LBC, 0);
210 ocpbus_mk_child(dev, OCPBUS_DEVTYPE_PCIB, 0);
211 ocpbus_mk_child(dev, OCPBUS_DEVTYPE_PCIB, 1);
212 ocpbus_mk_child(dev, OCPBUS_DEVTYPE_PCIB, 2);
213 ocpbus_mk_child(dev, OCPBUS_DEVTYPE_TSEC, 0);
214 ocpbus_mk_child(dev, OCPBUS_DEVTYPE_TSEC, 1);
215 ocpbus_mk_child(dev, OCPBUS_DEVTYPE_TSEC, 2);
216 ocpbus_mk_child(dev, OCPBUS_DEVTYPE_TSEC, 3);
217 ocpbus_mk_child(dev, OCPBUS_DEVTYPE_PIC, 0);
218 ocpbus_mk_child(dev, OCPBUS_DEVTYPE_QUICC, 0);
219 ocpbus_mk_child(dev, OCPBUS_DEVTYPE_SEC, 0);
221 /* Set up IRQ rman */
223 end = INTR_VECTORS - 1;
224 sc->sc_irq.rm_start = start;
225 sc->sc_irq.rm_end = end;
226 sc->sc_irq.rm_type = RMAN_ARRAY;
227 sc->sc_irq.rm_descr = "Interrupt request lines";
228 if (rman_init(&sc->sc_irq) ||
229 rman_manage_region(&sc->sc_irq, start, end))
230 panic("ocpbus_attach IRQ rman");
232 /* Set up I/O mem rman */
233 sc->sc_mem.rm_type = RMAN_ARRAY;
234 sc->sc_mem.rm_descr = "OCPBus Device Memory";
235 error = rman_init(&sc->sc_mem);
237 device_printf(dev, "rman_init() failed. error = %d\n", error);
241 error = rman_manage_region(&sc->sc_mem, CCSRBAR_VA,
242 CCSRBAR_VA + CCSRBAR_SIZE - 1);
244 device_printf(dev, "rman_manage_region() failed. error = %d\n",
250 * Clear local access windows. Skip DRAM entries, so we don't shoot
251 * ourselves in the foot.
253 law_max = law_getmax();
254 for (i = 0; i < law_max; i++) {
255 sr = ccsr_read4(OCP85XX_LAWSR(i));
256 if ((sr & 0x80000000) == 0)
258 tgt = (sr & 0x01f00000) >> 20;
259 if (tgt == OCP85XX_TGTIF_RAM1 || tgt == OCP85XX_TGTIF_RAM2 ||
260 tgt == OCP85XX_TGTIF_RAM_INTL)
263 ccsr_write4(OCP85XX_LAWSR(i), sr & 0x7fffffff);
267 device_printf(dev, "PORDEVSR=%08x, PORDEVSR2=%08x\n",
268 ccsr_read4(OCP85XX_PORDEVSR),
269 ccsr_read4(OCP85XX_PORDEVSR2));
271 for (i = PIC_IRQ_START; i < PIC_IRQ_START + 4; i++)
272 powerpc_config_intr(i, INTR_TRIGGER_LEVEL, INTR_POLARITY_LOW);
274 return (bus_generic_attach(dev));
278 ocpbus_shutdown(device_t dev)
284 struct ocp_resource {
293 const struct ocp_resource mpc8555_resources[] = {
294 {OCPBUS_DEVTYPE_PIC, 0, SYS_RES_MEMORY, 0, OCP85XX_OPENPIC_OFF,
295 OCP85XX_OPENPIC_SIZE},
297 {OCPBUS_DEVTYPE_QUICC, 0, SYS_RES_MEMORY, 0, OCP85XX_QUICC_OFF,
299 {OCPBUS_DEVTYPE_QUICC, 0, SYS_RES_IRQ, 0, PIC_IRQ_INT(30), 1},
301 {OCPBUS_DEVTYPE_TSEC, 0, SYS_RES_MEMORY, 0, OCP85XX_TSEC0_OFF,
303 {OCPBUS_DEVTYPE_TSEC, 0, SYS_RES_IRQ, 0, PIC_IRQ_INT(13), 1},
304 {OCPBUS_DEVTYPE_TSEC, 0, SYS_RES_IRQ, 1, PIC_IRQ_INT(14), 1},
305 {OCPBUS_DEVTYPE_TSEC, 0, SYS_RES_IRQ, 2, PIC_IRQ_INT(18), 1},
306 {OCPBUS_DEVTYPE_TSEC, 1, SYS_RES_MEMORY, 0, OCP85XX_TSEC1_OFF,
308 {OCPBUS_DEVTYPE_TSEC, 1, SYS_RES_IRQ, 0, PIC_IRQ_INT(19), 1},
309 {OCPBUS_DEVTYPE_TSEC, 1, SYS_RES_IRQ, 1, PIC_IRQ_INT(20), 1},
310 {OCPBUS_DEVTYPE_TSEC, 1, SYS_RES_IRQ, 2, PIC_IRQ_INT(24), 1},
311 {OCPBUS_DEVTYPE_TSEC, 2, SYS_RES_MEMORY, 0, OCP85XX_TSEC2_OFF,
313 {OCPBUS_DEVTYPE_TSEC, 2, SYS_RES_IRQ, 0, PIC_IRQ_INT(15), 1},
314 {OCPBUS_DEVTYPE_TSEC, 2, SYS_RES_IRQ, 1, PIC_IRQ_INT(16), 1},
315 {OCPBUS_DEVTYPE_TSEC, 2, SYS_RES_IRQ, 2, PIC_IRQ_INT(17), 1},
316 {OCPBUS_DEVTYPE_TSEC, 3, SYS_RES_MEMORY, 0, OCP85XX_TSEC3_OFF,
318 {OCPBUS_DEVTYPE_TSEC, 3, SYS_RES_IRQ, 0, PIC_IRQ_INT(21), 1},
319 {OCPBUS_DEVTYPE_TSEC, 3, SYS_RES_IRQ, 1, PIC_IRQ_INT(22), 1},
320 {OCPBUS_DEVTYPE_TSEC, 3, SYS_RES_IRQ, 2, PIC_IRQ_INT(23), 1},
322 {OCPBUS_DEVTYPE_UART, 0, SYS_RES_MEMORY, 0, OCP85XX_UART0_OFF,
324 {OCPBUS_DEVTYPE_UART, 0, SYS_RES_IRQ, 0, PIC_IRQ_INT(26), 1},
325 {OCPBUS_DEVTYPE_UART, 1, SYS_RES_MEMORY, 0, OCP85XX_UART1_OFF,
327 {OCPBUS_DEVTYPE_UART, 1, SYS_RES_IRQ, 0, PIC_IRQ_INT(26), 1},
329 {OCPBUS_DEVTYPE_PCIB, 0, SYS_RES_MEMORY, 0, OCP85XX_PCI0_OFF,
331 {OCPBUS_DEVTYPE_PCIB, 0, SYS_RES_MEMORY, 1, 0, OCP85XX_TGTIF_PCI0},
332 {OCPBUS_DEVTYPE_PCIB, 0, SYS_RES_IOPORT, 1, 0, OCP85XX_TGTIF_PCI0},
333 {OCPBUS_DEVTYPE_PCIB, 1, SYS_RES_MEMORY, 0, OCP85XX_PCI1_OFF,
335 {OCPBUS_DEVTYPE_PCIB, 1, SYS_RES_MEMORY, 1, 0, OCP85XX_TGTIF_PCI1},
336 {OCPBUS_DEVTYPE_PCIB, 1, SYS_RES_IOPORT, 1, 0, OCP85XX_TGTIF_PCI1},
337 {OCPBUS_DEVTYPE_PCIB, 2, SYS_RES_MEMORY, 0, OCP85XX_PCI2_OFF,
339 {OCPBUS_DEVTYPE_PCIB, 2, SYS_RES_MEMORY, 1, 0, OCP85XX_TGTIF_PCI2},
340 {OCPBUS_DEVTYPE_PCIB, 2, SYS_RES_IOPORT, 1, 0, OCP85XX_TGTIF_PCI2},
342 {OCPBUS_DEVTYPE_LBC, 0, SYS_RES_MEMORY, 0, OCP85XX_LBC_OFF,
345 {OCPBUS_DEVTYPE_I2C, 0, SYS_RES_MEMORY, 0, OCP85XX_I2C0_OFF,
347 {OCPBUS_DEVTYPE_I2C, 0, SYS_RES_IRQ, 0, PIC_IRQ_INT(27), 1},
348 {OCPBUS_DEVTYPE_I2C, 1, SYS_RES_MEMORY, 0, OCP85XX_I2C1_OFF,
350 {OCPBUS_DEVTYPE_I2C, 1, SYS_RES_IRQ, 0, PIC_IRQ_INT(27), 1},
352 {OCPBUS_DEVTYPE_SEC, 0, SYS_RES_MEMORY, 0, OCP85XX_SEC_OFF,
354 {OCPBUS_DEVTYPE_SEC, 0, SYS_RES_IRQ, 0, PIC_IRQ_INT(29), 1},
355 {OCPBUS_DEVTYPE_SEC, 0, SYS_RES_IRQ, 1, PIC_IRQ_INT(42), 1},
361 ocpbus_get_resource(device_t dev, device_t child, int type, int rid,
362 u_long *startp, u_long *countp)
364 const struct ocp_resource *res;
365 struct ocp_devinfo *dinfo;
366 u_long start = 0, count = 0;
369 dinfo = device_get_ivars(child);
372 * Lookup the correct values.
374 res = mpc8555_resources;
375 for (; res->sr_devtype; res++) {
376 if (res->sr_devtype != dinfo->ocp_devtype)
378 if (res->sr_unit != dinfo->ocp_unit)
380 if (res->sr_rid != rid)
382 if (res->sr_resource != type)
385 if (res->sr_offset != 0) {
389 start = res->sr_offset + CCSRBAR_VA;
392 start = res->sr_offset;
398 count = res->sr_size;
400 error = ocpbus_write_law(res->sr_size, type, &start,
415 static struct resource *
416 ocpbus_alloc_resource(device_t dev, device_t child, int type, int *rid,
417 u_long start, u_long end, u_long count, u_int flags)
419 struct ocpbus_softc *sc;
423 sc = device_get_softc(dev);
427 if (start == 0ul && end == ~0ul) {
428 error = ocpbus_get_resource(dev, child, type, *rid,
434 rv = rman_reserve_resource(&sc->sc_irq, start,
435 start + count - 1, count, flags, child);
441 if (start != 0ul || end != ~0ul)
444 error = ocpbus_get_resource(dev, child, type, *rid, &start,
449 rv = rman_reserve_resource(&sc->sc_mem, start,
450 start + count - 1, count, flags, child);
454 rman_set_bustag(rv, &bs_be_tag);
455 rman_set_bushandle(rv, rman_get_start(rv));
462 rman_set_rid(rv, *rid);
467 ocpbus_print_child(device_t dev, device_t child)
470 int error, retval, rid;
472 retval = bus_print_child_header(dev, child);
476 error = ocpbus_get_resource(dev, child, SYS_RES_MEMORY, rid,
480 retval += (rid == 0) ? printf(" iomem ") : printf(",");
481 retval += printf("%#lx", start);
483 retval += printf("-%#lx", start + size - 1);
488 * The SYS_RES_IOPORT resource of the PCIB has rid 1 because the
489 * the SYS_RES_MEMORY resource related to the decoding window also
490 * has rid 1. This is friendlier for the PCIB child...
494 error = ocpbus_get_resource(dev, child, SYS_RES_IOPORT, rid,
498 retval += (rid == 1) ? printf(" ioport ") : printf(",");
499 retval += printf("%#lx", start);
501 retval += printf("-%#lx", start + size - 1);
507 error = ocpbus_get_resource(dev, child, SYS_RES_IRQ, rid,
511 retval += (rid == 0) ? printf(" irq ") : printf(",");
512 retval += printf("%ld", start);
516 retval += bus_print_child_footer(dev, child);
521 ocpbus_read_ivar(device_t dev, device_t child, int index, uintptr_t *result)
523 struct ocp_devinfo *dinfo;
524 struct bi_eth_addr *eth;
527 if (device_get_parent(child) != dev)
530 dinfo = device_get_ivars(child);
533 case OCPBUS_IVAR_CLOCK:
534 *result = bootinfo->bi_bus_clk;
536 case OCPBUS_IVAR_DEVTYPE:
537 *result = dinfo->ocp_devtype;
539 case OCPBUS_IVAR_HWUNIT:
540 *result = dinfo->ocp_unit;
542 case OCPBUS_IVAR_MACADDR:
543 unit = device_get_unit(child);
544 if (unit > bootinfo->bi_eth_addr_no - 1)
546 eth = bootinfo_eth() + unit;
547 *result = (uintptr_t)eth;
555 ocpbus_release_resource(device_t dev, device_t child, int type, int rid,
556 struct resource *res)
559 return (rman_release_resource(res));
563 ocpbus_setup_intr(device_t dev, device_t child, struct resource *res, int flags,
564 driver_filter_t *filter, driver_intr_t *ihand, void *arg, void **cookiep)
569 panic("ocpbus_setup_intr: NULL irq resource!");
572 if ((rman_get_flags(res) & RF_SHAREABLE) == 0)
576 * We depend here on rman_activate_resource() being idempotent.
578 error = rman_activate_resource(res);
582 error = powerpc_setup_intr(device_get_nameunit(child),
583 rman_get_start(res), filter, ihand, arg, flags, cookiep);
589 ocpbus_teardown_intr(device_t dev, device_t child, struct resource *res,
593 return (powerpc_teardown_intr(cookie));
597 ocpbus_config_intr(device_t dev, int irq, enum intr_trigger trig,
598 enum intr_polarity pol)
601 return (powerpc_config_intr(irq, trig, pol));