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11 * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
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17 /* $Id: atomic.h,v 1.10 2008/01/24 23:47:00 tbox Exp $ */
20 #define ISC_ATOMIC_H 1
22 #include <isc/platform.h>
23 #include <isc/types.h>
25 #ifdef ISC_PLATFORM_USEGCCASM
27 * This routine atomically increments the value stored in 'p' by 'val', and
28 * returns the previous value.
30 static __inline__ isc_int32_t
31 isc_atomic_xadd(isc_int32_t *p, isc_int32_t val) {
32 isc_int32_t prev = val;
35 #ifdef ISC_PLATFORM_USETHREADS
46 #ifdef ISC_PLATFORM_HAVEXADDQ
47 static __inline__ isc_int64_t
48 isc_atomic_xaddq(isc_int64_t *p, isc_int64_t val) {
49 isc_int64_t prev = val;
52 #ifdef ISC_PLATFORM_USETHREADS
62 #endif /* ISC_PLATFORM_HAVEXADDQ */
65 * This routine atomically stores the value 'val' in 'p' (32-bit version).
67 static __inline__ void
68 isc_atomic_store(isc_int32_t *p, isc_int32_t val) {
70 #ifdef ISC_PLATFORM_USETHREADS
72 * xchg should automatically lock memory, but we add it
73 * explicitly just in case (it at least doesn't harm)
84 #ifdef ISC_PLATFORM_HAVEATOMICSTOREQ
86 * This routine atomically stores the value 'val' in 'p' (64-bit version).
88 static __inline__ void
89 isc_atomic_storeq(isc_int64_t *p, isc_int64_t val) {
91 #ifdef ISC_PLATFORM_USETHREADS
93 * xchg should automatically lock memory, but we add it
94 * explicitly just in case (it at least doesn't harm)
104 #endif /* ISC_PLATFORM_HAVEATOMICSTOREQ */
107 * This routine atomically replaces the value in 'p' with 'val', if the
108 * original value is equal to 'cmpval'. The original value is returned in any
111 static __inline__ isc_int32_t
112 isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_int32_t val) {
114 #ifdef ISC_PLATFORM_USETHREADS
119 : "r"(val), "m"(*p), "a"(cmpval)
125 #elif defined(ISC_PLATFORM_USESTDASM)
127 * The followings are "generic" assembly code which implements the same
128 * functionality in case the gcc extension cannot be used. It should be
129 * better to avoid inlining below, since we directly refer to specific
130 * positions of the stack frame, which would not actually point to the
131 * intended address in the embedded mnemonic.
133 #include <isc/util.h> /* for 'UNUSED' macro */
136 isc_atomic_xadd(isc_int32_t *p, isc_int32_t val) {
141 "movl 8(%ebp), %ecx\n"
142 "movl 12(%ebp), %edx\n"
143 #ifdef ISC_PLATFORM_USETHREADS
146 "xadd %edx, (%ecx)\n"
149 * set the return value directly in the register so that we
150 * can avoid guessing the correct position in the stack for a
158 isc_atomic_store(isc_int32_t *p, isc_int32_t val) {
163 "movl 8(%ebp), %ecx\n"
164 "movl 12(%ebp), %edx\n"
165 #ifdef ISC_PLATFORM_USETHREADS
168 "xchgl (%ecx), %edx\n"
173 isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_int32_t val) {
179 "movl 8(%ebp), %ecx\n"
180 "movl 12(%ebp), %eax\n" /* must be %eax for cmpxchgl */
181 "movl 16(%ebp), %edx\n"
182 #ifdef ISC_PLATFORM_USETHREADS
187 * If (%ecx) == %eax then (%ecx) := %edx.
188 % %eax is set to old (%ecx), which will be the return value.
190 "cmpxchgl %edx, (%ecx)"
193 #else /* !ISC_PLATFORM_USEGCCASM && !ISC_PLATFORM_USESTDASM */
195 #error "unsupported compiler. disable atomic ops by --disable-atomic"
198 #endif /* ISC_ATOMIC_H */