1 //===- MBlazeInstrInfo.h - MBlaze Instruction Information -------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the MBlaze implementation of the TargetInstrInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef MBLAZEINSTRUCTIONINFO_H
15 #define MBLAZEINSTRUCTIONINFO_H
18 #include "llvm/Support/ErrorHandling.h"
19 #include "llvm/Target/TargetInstrInfo.h"
20 #include "MBlazeRegisterInfo.h"
22 #define GET_INSTRINFO_HEADER
23 #include "MBlazeGenInstrInfo.inc"
29 // MBlaze Branch Codes
38 // MBlaze Condition Codes
40 // To be used with float branch True
58 // To be used with float branch False
59 // This conditions have the same mnemonic as the
60 // above ones, but are used with a branch False;
78 // Only integer conditions
88 // Turn condition code into conditional branch opcode.
89 inline static unsigned GetCondBranchFromCond(CondCode CC) {
91 default: llvm_unreachable("Unknown condition code");
92 case COND_EQ: return MBlaze::BEQID;
93 case COND_NE: return MBlaze::BNEID;
94 case COND_GT: return MBlaze::BGTID;
95 case COND_GE: return MBlaze::BGEID;
96 case COND_LT: return MBlaze::BLTID;
97 case COND_LE: return MBlaze::BLEID;
101 /// GetOppositeBranchCondition - Return the inverse of the specified cond,
102 /// e.g. turning COND_E to COND_NE.
103 // CondCode GetOppositeBranchCondition(MBlaze::CondCode CC);
105 /// MBlazeCCToString - Map each FP condition code to its string
106 inline static const char *MBlazeFCCToString(MBlaze::CondCode CC) {
108 default: llvm_unreachable("Unknown condition code");
110 case FCOND_T: return "f";
112 case FCOND_OR: return "un";
114 case FCOND_NEQ: return "eq";
116 case FCOND_OGL: return "ueq";
118 case FCOND_UGE: return "olt";
120 case FCOND_OGE: return "ult";
122 case FCOND_UGT: return "ole";
124 case FCOND_OGT: return "ule";
126 case FCOND_ST: return "sf";
128 case FCOND_GLE: return "ngle";
130 case FCOND_SNE: return "seq";
132 case FCOND_GL: return "ngl";
134 case FCOND_NLT: return "lt";
136 case FCOND_GE: return "ge";
138 case FCOND_NLE: return "nle";
140 case FCOND_GT: return "gt";
144 inline static bool isUncondBranchOpcode(int Opc) {
146 default: return false;
155 inline static bool isCondBranchOpcode(int Opc) {
157 default: return false;
158 case MBlaze::BEQI: case MBlaze::BEQID:
159 case MBlaze::BNEI: case MBlaze::BNEID:
160 case MBlaze::BGTI: case MBlaze::BGTID:
161 case MBlaze::BGEI: case MBlaze::BGEID:
162 case MBlaze::BLTI: case MBlaze::BLTID:
163 case MBlaze::BLEI: case MBlaze::BLEID:
169 /// MBlazeII - This namespace holds all of the target specific flags that
170 /// instruction info tracks.
174 // PseudoFrm - This represents an instruction that is a pseudo instruction
175 // or one that has not been implemented yet. It is illegal to code generate
176 // it, but tolerated for intermediate implementation stages.
200 //===------------------------------------------------------------------===//
201 // MBlaze Specific MachineOperand flags.
204 /// MO_GOT - Represents the offset into the global offset table at which
205 /// the address the relocation entry symbol resides during execution.
208 /// MO_GOT_CALL - Represents the offset into the global offset table at
209 /// which the address of a call site relocation entry symbol resides
210 /// during execution. This is different from the above since this flag
211 /// can only be present in call instructions.
214 /// MO_GPREL - Represents the offset from the current gp value to be used
215 /// for the relocatable object file being produced.
218 /// MO_ABS_HILO - Represents the hi or low part of an absolute symbol
225 class MBlazeInstrInfo : public MBlazeGenInstrInfo {
226 MBlazeTargetMachine &TM;
227 const MBlazeRegisterInfo RI;
229 explicit MBlazeInstrInfo(MBlazeTargetMachine &TM);
231 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
232 /// such, whenever a client has an instance of instruction info, it should
233 /// always be able to get register info as well (through this method).
235 virtual const MBlazeRegisterInfo &getRegisterInfo() const { return RI; }
237 /// isLoadFromStackSlot - If the specified machine instruction is a direct
238 /// load from a stack slot, return the virtual or physical register number of
239 /// the destination along with the FrameIndex of the loaded stack slot. If
240 /// not, return 0. This predicate must return 0 if the instruction has
241 /// any side effects other than loading from the stack slot.
242 virtual unsigned isLoadFromStackSlot(const MachineInstr *MI,
243 int &FrameIndex) const;
245 /// isStoreToStackSlot - If the specified machine instruction is a direct
246 /// store to a stack slot, return the virtual or physical register number of
247 /// the source reg along with the FrameIndex of the loaded stack slot. If
248 /// not, return 0. This predicate must return 0 if the instruction has
249 /// any side effects other than storing to the stack slot.
250 virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
251 int &FrameIndex) const;
254 virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
255 MachineBasicBlock *&FBB,
256 SmallVectorImpl<MachineOperand> &Cond,
257 bool AllowModify) const;
258 virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
259 MachineBasicBlock *FBB,
260 const SmallVectorImpl<MachineOperand> &Cond,
262 virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
264 virtual bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond)
267 virtual void copyPhysReg(MachineBasicBlock &MBB,
268 MachineBasicBlock::iterator I, DebugLoc DL,
269 unsigned DestReg, unsigned SrcReg,
271 virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
272 MachineBasicBlock::iterator MBBI,
273 unsigned SrcReg, bool isKill, int FrameIndex,
274 const TargetRegisterClass *RC,
275 const TargetRegisterInfo *TRI) const;
277 virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
278 MachineBasicBlock::iterator MBBI,
279 unsigned DestReg, int FrameIndex,
280 const TargetRegisterClass *RC,
281 const TargetRegisterInfo *TRI) const;
283 /// Insert nop instruction when hazard condition is found
284 virtual void insertNoop(MachineBasicBlock &MBB,
285 MachineBasicBlock::iterator MI) const;
287 /// getGlobalBaseReg - Return a virtual register initialized with the
288 /// the global base register value. Output instructions required to
289 /// initialize the register in the function entry block, if necessary.
291 unsigned getGlobalBaseReg(MachineFunction *MF) const;