1 //===--- Targets.cpp - Implement -arch option and targets -----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements construction of a TargetInfo object from a
13 //===----------------------------------------------------------------------===//
15 #include "clang/Basic/TargetInfo.h"
16 #include "clang/Basic/Builtins.h"
17 #include "clang/Basic/Diagnostic.h"
18 #include "clang/Basic/LangOptions.h"
19 #include "clang/Basic/MacroBuilder.h"
20 #include "clang/Basic/TargetBuiltins.h"
21 #include "clang/Basic/TargetOptions.h"
22 #include "llvm/ADT/APFloat.h"
23 #include "llvm/ADT/OwningPtr.h"
24 #include "llvm/ADT/STLExtras.h"
25 #include "llvm/ADT/StringRef.h"
26 #include "llvm/ADT/StringSwitch.h"
27 #include "llvm/ADT/Triple.h"
28 #include "llvm/MC/MCSectionMachO.h"
29 #include "llvm/Type.h"
31 using namespace clang;
33 //===----------------------------------------------------------------------===//
34 // Common code shared among targets.
35 //===----------------------------------------------------------------------===//
37 /// DefineStd - Define a macro name and standard variants. For example if
38 /// MacroName is "unix", then this will define "__unix", "__unix__", and "unix"
40 static void DefineStd(MacroBuilder &Builder, llvm::StringRef MacroName,
41 const LangOptions &Opts) {
42 assert(MacroName[0] != '_' && "Identifier should be in the user's namespace");
44 // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier
45 // in the user's namespace.
47 Builder.defineMacro(MacroName);
50 Builder.defineMacro("__" + MacroName);
53 Builder.defineMacro("__" + MacroName + "__");
56 //===----------------------------------------------------------------------===//
57 // Defines specific to certain operating systems.
58 //===----------------------------------------------------------------------===//
61 template<typename TgtInfo>
62 class OSTargetInfo : public TgtInfo {
64 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
65 MacroBuilder &Builder) const=0;
67 OSTargetInfo(const std::string& triple) : TgtInfo(triple) {}
68 virtual void getTargetDefines(const LangOptions &Opts,
69 MacroBuilder &Builder) const {
70 TgtInfo::getTargetDefines(Opts, Builder);
71 getOSDefines(Opts, TgtInfo::getTriple(), Builder);
75 } // end anonymous namespace
78 static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts,
79 const llvm::Triple &Triple,
80 llvm::StringRef &PlatformName,
81 VersionTuple &PlatformMinVersion) {
82 Builder.defineMacro("__APPLE_CC__", "5621");
83 Builder.defineMacro("__APPLE__");
84 Builder.defineMacro("__MACH__");
85 Builder.defineMacro("OBJC_NEW_PROPERTIES");
87 if (!Opts.ObjCAutoRefCount) {
88 // __weak is always defined, for use in blocks and with objc pointers.
89 Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))");
91 // Darwin defines __strong even in C mode (just to nothing).
92 if (Opts.getGCMode() != LangOptions::NonGC)
93 Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))");
95 Builder.defineMacro("__strong", "");
97 // __unsafe_unretained is defined to nothing in non-ARC mode. We even
98 // allow this in C, since one might have block pointers in structs that
99 // are used in pure C code and in Objective-C ARC.
100 Builder.defineMacro("__unsafe_unretained", "");
102 // The Objective-C bridged cast keywords are defined to nothing in non-ARC
103 // mode; then they become normal, C-style casts.
104 Builder.defineMacro("__bridge", "");
105 Builder.defineMacro("__bridge_transfer", "");
106 Builder.defineMacro("__bridge_retained", "");
107 Builder.defineMacro("__bridge_retain", "");
111 Builder.defineMacro("__STATIC__");
113 Builder.defineMacro("__DYNAMIC__");
115 if (Opts.POSIXThreads)
116 Builder.defineMacro("_REENTRANT");
118 // Get the platform type and version number from the triple.
119 unsigned Maj, Min, Rev;
121 // If no version was given, default to to 10.4.0, for simplifying tests.
122 if (Triple.getOSName() == "darwin" || Triple.getOSName() == "osx") {
123 PlatformName = "macosx";
127 // Otherwise, honor all three triple forms ("-darwinNNN[-iphoneos]",
128 // "-osxNNN", and "-iosNNN").
130 if (Triple.getOS() == llvm::Triple::Darwin) {
131 // For historical reasons that make little sense, the version passed here
132 // is the "darwin" version, which drops the 10 and offsets by 4.
133 Triple.getOSVersion(Maj, Min, Rev);
135 if (Triple.getEnvironmentName() == "iphoneos") {
136 PlatformName = "ios";
138 PlatformName = "macosx";
144 Triple.getOSVersion(Maj, Min, Rev);
145 PlatformName = llvm::Triple::getOSTypeName(Triple.getOS());
149 // Set the appropriate OS version define.
150 if (PlatformName == "ios") {
151 assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!");
154 Str[1] = '0' + (Min / 10);
155 Str[2] = '0' + (Min % 10);
156 Str[3] = '0' + (Rev / 10);
157 Str[4] = '0' + (Rev % 10);
159 Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str);
161 // Note that the Driver allows versions which aren't representable in the
162 // define (because we only get a single digit for the minor and micro
163 // revision numbers). So, we limit them to the maximum representable
165 assert(Triple.getEnvironmentName().empty() && "Invalid environment!");
166 assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!");
168 Str[0] = '0' + (Maj / 10);
169 Str[1] = '0' + (Maj % 10);
170 Str[2] = '0' + std::min(Min, 9U);
171 Str[3] = '0' + std::min(Rev, 9U);
173 Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str);
176 PlatformMinVersion = VersionTuple(Maj, Min, Rev);
180 template<typename Target>
181 class DarwinTargetInfo : public OSTargetInfo<Target> {
183 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
184 MacroBuilder &Builder) const {
185 getDarwinDefines(Builder, Opts, Triple, this->PlatformName,
186 this->PlatformMinVersion);
190 DarwinTargetInfo(const std::string& triple) :
191 OSTargetInfo<Target>(triple) {
192 llvm::Triple T = llvm::Triple(triple);
193 this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7);
194 this->MCountName = "\01mcount";
197 virtual std::string isValidSectionSpecifier(llvm::StringRef SR) const {
198 // Let MCSectionMachO validate this.
199 llvm::StringRef Segment, Section;
200 unsigned TAA, StubSize;
202 return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section,
203 TAA, HasTAA, StubSize);
206 virtual const char *getStaticInitSectionSpecifier() const {
207 // FIXME: We should return 0 when building kexts.
208 return "__TEXT,__StaticInit,regular,pure_instructions";
214 // DragonFlyBSD Target
215 template<typename Target>
216 class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> {
218 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
219 MacroBuilder &Builder) const {
220 // DragonFly defines; list based off of gcc output
221 Builder.defineMacro("__DragonFly__");
222 Builder.defineMacro("__DragonFly_cc_version", "100001");
223 Builder.defineMacro("__ELF__");
224 Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
225 Builder.defineMacro("__tune_i386__");
226 DefineStd(Builder, "unix", Opts);
229 DragonFlyBSDTargetInfo(const std::string &triple)
230 : OSTargetInfo<Target>(triple) {}
234 template<typename Target>
235 class FreeBSDTargetInfo : public OSTargetInfo<Target> {
237 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
238 MacroBuilder &Builder) const {
239 // FreeBSD defines; list based off of gcc output
241 // FIXME: Move version number handling to llvm::Triple.
242 llvm::StringRef Release = Triple.getOSName().substr(strlen("freebsd"), 1);
244 Builder.defineMacro("__FreeBSD__", Release);
245 Builder.defineMacro("__FreeBSD_cc_version", Release + "00001");
246 Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
247 DefineStd(Builder, "unix", Opts);
248 Builder.defineMacro("__ELF__");
251 FreeBSDTargetInfo(const std::string &triple)
252 : OSTargetInfo<Target>(triple) {
253 this->UserLabelPrefix = "";
255 llvm::Triple Triple(triple);
256 switch (Triple.getArch()) {
258 case llvm::Triple::x86:
259 case llvm::Triple::x86_64:
260 this->MCountName = ".mcount";
262 case llvm::Triple::mips:
263 case llvm::Triple::mipsel:
264 case llvm::Triple::ppc:
265 case llvm::Triple::ppc64:
266 this->MCountName = "_mcount";
268 case llvm::Triple::arm:
269 this->MCountName = "__mcount";
277 template<typename Target>
278 class MinixTargetInfo : public OSTargetInfo<Target> {
280 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
281 MacroBuilder &Builder) const {
284 Builder.defineMacro("__minix", "3");
285 Builder.defineMacro("_EM_WSIZE", "4");
286 Builder.defineMacro("_EM_PSIZE", "4");
287 Builder.defineMacro("_EM_SSIZE", "2");
288 Builder.defineMacro("_EM_LSIZE", "4");
289 Builder.defineMacro("_EM_FSIZE", "4");
290 Builder.defineMacro("_EM_DSIZE", "8");
291 DefineStd(Builder, "unix", Opts);
294 MinixTargetInfo(const std::string &triple)
295 : OSTargetInfo<Target>(triple) {
296 this->UserLabelPrefix = "";
301 template<typename Target>
302 class LinuxTargetInfo : public OSTargetInfo<Target> {
304 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
305 MacroBuilder &Builder) const {
306 // Linux defines; list based off of gcc output
307 DefineStd(Builder, "unix", Opts);
308 DefineStd(Builder, "linux", Opts);
309 Builder.defineMacro("__gnu_linux__");
310 Builder.defineMacro("__ELF__");
311 if (Opts.POSIXThreads)
312 Builder.defineMacro("_REENTRANT");
314 Builder.defineMacro("_GNU_SOURCE");
317 LinuxTargetInfo(const std::string& triple)
318 : OSTargetInfo<Target>(triple) {
319 this->UserLabelPrefix = "";
320 this->WIntType = TargetInfo::UnsignedInt;
325 template<typename Target>
326 class NetBSDTargetInfo : public OSTargetInfo<Target> {
328 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
329 MacroBuilder &Builder) const {
330 // NetBSD defines; list based off of gcc output
331 Builder.defineMacro("__NetBSD__");
332 Builder.defineMacro("__unix__");
333 Builder.defineMacro("__ELF__");
334 if (Opts.POSIXThreads)
335 Builder.defineMacro("_POSIX_THREADS");
338 NetBSDTargetInfo(const std::string &triple)
339 : OSTargetInfo<Target>(triple) {
340 this->UserLabelPrefix = "";
345 template<typename Target>
346 class OpenBSDTargetInfo : public OSTargetInfo<Target> {
348 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
349 MacroBuilder &Builder) const {
350 // OpenBSD defines; list based off of gcc output
352 Builder.defineMacro("__OpenBSD__");
353 DefineStd(Builder, "unix", Opts);
354 Builder.defineMacro("__ELF__");
355 if (Opts.POSIXThreads)
356 Builder.defineMacro("_POSIX_THREADS");
359 OpenBSDTargetInfo(const std::string &triple)
360 : OSTargetInfo<Target>(triple) {}
364 template<typename Target>
365 class PSPTargetInfo : public OSTargetInfo<Target> {
367 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
368 MacroBuilder &Builder) const {
369 // PSP defines; list based on the output of the pspdev gcc toolchain.
370 Builder.defineMacro("PSP");
371 Builder.defineMacro("_PSP");
372 Builder.defineMacro("__psp__");
373 Builder.defineMacro("__ELF__");
376 PSPTargetInfo(const std::string& triple)
377 : OSTargetInfo<Target>(triple) {
378 this->UserLabelPrefix = "";
383 template<typename Target>
384 class PS3PPUTargetInfo : public OSTargetInfo<Target> {
386 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
387 MacroBuilder &Builder) const {
389 Builder.defineMacro("__PPC__");
390 Builder.defineMacro("__PPU__");
391 Builder.defineMacro("__CELLOS_LV2__");
392 Builder.defineMacro("__ELF__");
393 Builder.defineMacro("__LP32__");
394 Builder.defineMacro("_ARCH_PPC64");
395 Builder.defineMacro("__powerpc64__");
398 PS3PPUTargetInfo(const std::string& triple)
399 : OSTargetInfo<Target>(triple) {
400 this->UserLabelPrefix = "";
401 this->LongWidth = this->LongAlign = this->PointerWidth = this->PointerAlign = 32;
402 this->IntMaxType = TargetInfo::SignedLongLong;
403 this->UIntMaxType = TargetInfo::UnsignedLongLong;
404 this->Int64Type = TargetInfo::SignedLongLong;
405 this->SizeType = TargetInfo::UnsignedInt;
406 this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
407 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
411 // FIXME: Need a real SPU target.
413 template<typename Target>
414 class PS3SPUTargetInfo : public OSTargetInfo<Target> {
416 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
417 MacroBuilder &Builder) const {
419 Builder.defineMacro("__SPU__");
420 Builder.defineMacro("__ELF__");
423 PS3SPUTargetInfo(const std::string& triple)
424 : OSTargetInfo<Target>(triple) {
425 this->UserLabelPrefix = "";
430 template<typename Target>
431 class AuroraUXTargetInfo : public OSTargetInfo<Target> {
433 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
434 MacroBuilder &Builder) const {
435 DefineStd(Builder, "sun", Opts);
436 DefineStd(Builder, "unix", Opts);
437 Builder.defineMacro("__ELF__");
438 Builder.defineMacro("__svr4__");
439 Builder.defineMacro("__SVR4");
442 AuroraUXTargetInfo(const std::string& triple)
443 : OSTargetInfo<Target>(triple) {
444 this->UserLabelPrefix = "";
445 this->WCharType = this->SignedLong;
446 // FIXME: WIntType should be SignedLong
451 template<typename Target>
452 class SolarisTargetInfo : public OSTargetInfo<Target> {
454 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
455 MacroBuilder &Builder) const {
456 DefineStd(Builder, "sun", Opts);
457 DefineStd(Builder, "unix", Opts);
458 Builder.defineMacro("__ELF__");
459 Builder.defineMacro("__svr4__");
460 Builder.defineMacro("__SVR4");
463 SolarisTargetInfo(const std::string& triple)
464 : OSTargetInfo<Target>(triple) {
465 this->UserLabelPrefix = "";
466 this->WCharType = this->SignedLong;
467 // FIXME: WIntType should be SignedLong
472 template<typename Target>
473 class WindowsTargetInfo : public OSTargetInfo<Target> {
475 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
476 MacroBuilder &Builder) const {
477 Builder.defineMacro("_WIN32");
479 void getVisualStudioDefines(const LangOptions &Opts,
480 MacroBuilder &Builder) const {
481 if (Opts.CPlusPlus) {
483 Builder.defineMacro("_CPPRTTI");
486 Builder.defineMacro("_CPPUNWIND");
489 if (!Opts.CharIsSigned)
490 Builder.defineMacro("_CHAR_UNSIGNED");
492 // FIXME: POSIXThreads isn't exactly the option this should be defined for,
493 // but it works for now.
494 if (Opts.POSIXThreads)
495 Builder.defineMacro("_MT");
497 if (Opts.MSCVersion != 0)
498 Builder.defineMacro("_MSC_VER", llvm::Twine(Opts.MSCVersion));
500 if (Opts.Microsoft) {
501 Builder.defineMacro("_MSC_EXTENSIONS");
503 if (Opts.CPlusPlus0x) {
504 Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED");
505 Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED");
506 Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED");
510 Builder.defineMacro("_INTEGRAL_MAX_BITS", "64");
514 WindowsTargetInfo(const std::string &triple)
515 : OSTargetInfo<Target>(triple) {}
518 } // end anonymous namespace.
520 //===----------------------------------------------------------------------===//
521 // Specific target implementations.
522 //===----------------------------------------------------------------------===//
525 // PPC abstract base class
526 class PPCTargetInfo : public TargetInfo {
527 static const Builtin::Info BuiltinInfo[];
528 static const char * const GCCRegNames[];
529 static const TargetInfo::GCCRegAlias GCCRegAliases[];
531 PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {}
533 virtual void getTargetBuiltins(const Builtin::Info *&Records,
534 unsigned &NumRecords) const {
535 Records = BuiltinInfo;
536 NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin;
539 virtual void getTargetDefines(const LangOptions &Opts,
540 MacroBuilder &Builder) const;
542 virtual void getGCCRegNames(const char * const *&Names,
543 unsigned &NumNames) const;
544 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
545 unsigned &NumAliases) const;
546 virtual bool validateAsmConstraint(const char *&Name,
547 TargetInfo::ConstraintInfo &Info) const {
549 default: return false;
552 case 'b': // Base register
553 case 'f': // Floating point register
554 Info.setAllowsRegister();
556 // FIXME: The following are added to allow parsing.
557 // I just took a guess at what the actions should be.
558 // Also, is more specific checking needed? I.e. specific registers?
559 case 'd': // Floating point register (containing 64-bit value)
560 case 'v': // Altivec vector register
561 Info.setAllowsRegister();
565 case 'd':// VSX vector register to hold vector double data
566 case 'f':// VSX vector register to hold vector float data
567 case 's':// VSX vector register to hold scalar float data
568 case 'a':// Any VSX register
573 Info.setAllowsRegister();
574 Name++; // Skip over 'w'.
576 case 'h': // `MQ', `CTR', or `LINK' register
577 case 'q': // `MQ' register
578 case 'c': // `CTR' register
579 case 'l': // `LINK' register
580 case 'x': // `CR' register (condition register) number 0
581 case 'y': // `CR' register (condition register)
582 case 'z': // `XER[CA]' carry bit (part of the XER register)
583 Info.setAllowsRegister();
585 case 'I': // Signed 16-bit constant
586 case 'J': // Unsigned 16-bit constant shifted left 16 bits
587 // (use `L' instead for SImode constants)
588 case 'K': // Unsigned 16-bit constant
589 case 'L': // Signed 16-bit constant shifted left 16 bits
590 case 'M': // Constant larger than 31
591 case 'N': // Exact power of 2
592 case 'P': // Constant whose negation is a signed 16-bit constant
593 case 'G': // Floating point constant that can be loaded into a
594 // register with one instruction per word
595 case 'H': // Integer/Floating point constant that can be loaded
596 // into a register using three instructions
598 case 'm': // Memory operand. Note that on PowerPC targets, m can
599 // include addresses that update the base register. It
600 // is therefore only safe to use `m' in an asm statement
601 // if that asm statement accesses the operand exactly once.
602 // The asm statement must also use `%U<opno>' as a
603 // placeholder for the "update" flag in the corresponding
604 // load or store instruction. For example:
605 // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val));
607 // asm ("st %1,%0" : "=m" (mem) : "r" (val));
608 // is not. Use es rather than m if you don't want the base
609 // register to be updated.
613 // es: A "stable" memory operand; that is, one which does not
614 // include any automodification of the base register. Unlike
615 // `m', this constraint can be used in asm statements that
616 // might access the operand several times, or that might not
618 Info.setAllowsMemory();
619 Name++; // Skip over 'e'.
621 case 'Q': // Memory operand that is an offset from a register (it is
622 // usually better to use `m' or `es' in asm statements)
623 case 'Z': // Memory operand that is an indexed or indirect from a
624 // register (it is usually better to use `m' or `es' in
626 Info.setAllowsMemory();
627 Info.setAllowsRegister();
629 case 'R': // AIX TOC entry
630 case 'a': // Address operand that is an indexed or indirect from a
631 // register (`p' is preferable for asm statements)
632 case 'S': // Constant suitable as a 64-bit mask operand
633 case 'T': // Constant suitable as a 32-bit mask operand
634 case 'U': // System V Release 4 small data area reference
635 case 't': // AND masks that can be performed by two rldic{l, r}
637 case 'W': // Vector constant that does not require memory
638 case 'j': // Vector constant that is all zeros.
644 virtual const char *getClobbers() const {
649 const Builtin::Info PPCTargetInfo::BuiltinInfo[] = {
650 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
651 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
653 #include "clang/Basic/BuiltinsPPC.def"
657 /// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
658 /// #defines that are not tied to a specific subtarget.
659 void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
660 MacroBuilder &Builder) const {
661 // Target identification.
662 Builder.defineMacro("__ppc__");
663 Builder.defineMacro("_ARCH_PPC");
664 Builder.defineMacro("__powerpc__");
665 Builder.defineMacro("__POWERPC__");
666 if (PointerWidth == 64) {
667 Builder.defineMacro("_ARCH_PPC64");
668 Builder.defineMacro("_LP64");
669 Builder.defineMacro("__LP64__");
670 Builder.defineMacro("__powerpc64__");
671 Builder.defineMacro("__ppc64__");
673 Builder.defineMacro("__ppc__");
676 // Target properties.
677 if (getTriple().getOS() != llvm::Triple::NetBSD)
678 Builder.defineMacro("_BIG_ENDIAN");
679 Builder.defineMacro("__BIG_ENDIAN__");
681 // Subtarget options.
682 Builder.defineMacro("__NATURAL_ALIGNMENT__");
683 Builder.defineMacro("__REGISTER_PREFIX__", "");
685 // FIXME: Should be controlled by command line option.
686 Builder.defineMacro("__LONG_DOUBLE_128__");
689 Builder.defineMacro("__VEC__", "10206");
690 Builder.defineMacro("__ALTIVEC__");
695 const char * const PPCTargetInfo::GCCRegNames[] = {
696 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
697 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
698 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
699 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
700 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
701 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
702 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
703 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
704 "mq", "lr", "ctr", "ap",
705 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
707 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
708 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15",
709 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
710 "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
712 "spe_acc", "spefscr",
716 void PPCTargetInfo::getGCCRegNames(const char * const *&Names,
717 unsigned &NumNames) const {
719 NumNames = llvm::array_lengthof(GCCRegNames);
722 const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
723 // While some of these aliases do map to different registers
724 // they still share the same register name.
767 { { "fr10" }, "f10" },
768 { { "fr11" }, "f11" },
769 { { "fr12" }, "f12" },
770 { { "fr13" }, "f13" },
771 { { "fr14" }, "f14" },
772 { { "fr15" }, "f15" },
773 { { "fr16" }, "f16" },
774 { { "fr17" }, "f17" },
775 { { "fr18" }, "f18" },
776 { { "fr19" }, "f19" },
777 { { "fr20" }, "f20" },
778 { { "fr21" }, "f21" },
779 { { "fr22" }, "f22" },
780 { { "fr23" }, "f23" },
781 { { "fr24" }, "f24" },
782 { { "fr25" }, "f25" },
783 { { "fr26" }, "f26" },
784 { { "fr27" }, "f27" },
785 { { "fr28" }, "f28" },
786 { { "fr29" }, "f29" },
787 { { "fr30" }, "f30" },
788 { { "fr31" }, "f31" },
792 void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
793 unsigned &NumAliases) const {
794 Aliases = GCCRegAliases;
795 NumAliases = llvm::array_lengthof(GCCRegAliases);
797 } // end anonymous namespace.
800 class PPC32TargetInfo : public PPCTargetInfo {
802 PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) {
803 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
804 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
806 switch (getTriple().getOS()) {
807 case llvm::Triple::FreeBSD:
808 case llvm::Triple::NetBSD:
809 SizeType = UnsignedInt;
816 virtual const char *getVAListDeclaration() const {
817 // This is the ELF definition, and is overridden by the Darwin sub-target
818 return "typedef struct __va_list_tag {"
819 " unsigned char gpr;"
820 " unsigned char fpr;"
821 " unsigned short reserved;"
822 " void* overflow_arg_area;"
823 " void* reg_save_area;"
824 "} __builtin_va_list[1];";
827 } // end anonymous namespace.
830 class PPC64TargetInfo : public PPCTargetInfo {
832 PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) {
833 LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
834 IntMaxType = SignedLong;
835 UIntMaxType = UnsignedLong;
836 Int64Type = SignedLong;
837 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
838 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64";
840 virtual const char *getVAListDeclaration() const {
841 return "typedef char* __builtin_va_list;";
844 } // end anonymous namespace.
848 class DarwinPPC32TargetInfo :
849 public DarwinTargetInfo<PPC32TargetInfo> {
851 DarwinPPC32TargetInfo(const std::string& triple)
852 : DarwinTargetInfo<PPC32TargetInfo>(triple) {
853 HasAlignMac68kSupport = true;
854 BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool?
856 virtual const char *getVAListDeclaration() const {
857 return "typedef char* __builtin_va_list;";
861 class DarwinPPC64TargetInfo :
862 public DarwinTargetInfo<PPC64TargetInfo> {
864 DarwinPPC64TargetInfo(const std::string& triple)
865 : DarwinTargetInfo<PPC64TargetInfo>(triple) {
866 HasAlignMac68kSupport = true;
869 } // end anonymous namespace.
872 class PTXTargetInfo : public TargetInfo {
873 static const char * const GCCRegNames[];
874 static const Builtin::Info BuiltinInfo[];
876 PTXTargetInfo(const std::string& triple) : TargetInfo(triple) {
877 TLSSupported = false;
878 LongWidth = LongAlign = 64;
880 virtual void getTargetDefines(const LangOptions &Opts,
881 MacroBuilder &Builder) const {
882 Builder.defineMacro("__PTX__");
884 virtual void getTargetBuiltins(const Builtin::Info *&Records,
885 unsigned &NumRecords) const {
886 Records = BuiltinInfo;
887 NumRecords = clang::PTX::LastTSBuiltin-Builtin::FirstTSBuiltin;
890 virtual void getGCCRegNames(const char * const *&Names,
891 unsigned &NumNames) const;
892 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
893 unsigned &NumAliases) const {
898 virtual bool validateAsmConstraint(const char *&Name,
899 TargetInfo::ConstraintInfo &info) const {
903 virtual const char *getClobbers() const {
904 // FIXME: Is this really right?
907 virtual const char *getVAListDeclaration() const {
909 return "typedef char* __builtin_va_list;";
913 const Builtin::Info PTXTargetInfo::BuiltinInfo[] = {
914 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
915 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
917 #include "clang/Basic/BuiltinsPTX.def"
920 const char * const PTXTargetInfo::GCCRegNames[] = {
924 void PTXTargetInfo::getGCCRegNames(const char * const *&Names,
925 unsigned &NumNames) const {
927 NumNames = llvm::array_lengthof(GCCRegNames);
931 class PTX32TargetInfo : public PTXTargetInfo {
933 PTX32TargetInfo(const std::string& triple) : PTXTargetInfo(triple) {
934 PointerWidth = PointerAlign = 32;
935 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt;
937 = "e-p:32:32-i64:64:64-f64:64:64-n1:8:16:32:64";
941 class PTX64TargetInfo : public PTXTargetInfo {
943 PTX64TargetInfo(const std::string& triple) : PTXTargetInfo(triple) {
944 PointerWidth = PointerAlign = 64;
945 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong;
947 = "e-p:64:64-i64:64:64-f64:64:64-n1:8:16:32:64";
953 // MBlaze abstract base class
954 class MBlazeTargetInfo : public TargetInfo {
955 static const char * const GCCRegNames[];
956 static const TargetInfo::GCCRegAlias GCCRegAliases[];
959 MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) {
960 DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16";
963 virtual void getTargetBuiltins(const Builtin::Info *&Records,
964 unsigned &NumRecords) const {
970 virtual void getTargetDefines(const LangOptions &Opts,
971 MacroBuilder &Builder) const;
973 virtual const char *getVAListDeclaration() const {
974 return "typedef char* __builtin_va_list;";
976 virtual const char *getTargetPrefix() const {
979 virtual void getGCCRegNames(const char * const *&Names,
980 unsigned &NumNames) const;
981 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
982 unsigned &NumAliases) const;
983 virtual bool validateAsmConstraint(const char *&Name,
984 TargetInfo::ConstraintInfo &Info) const {
986 default: return false;
989 case 'b': // Base register
990 case 'f': // Floating point register
991 Info.setAllowsRegister();
995 virtual const char *getClobbers() const {
1000 /// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific
1001 /// #defines that are not tied to a specific subtarget.
1002 void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts,
1003 MacroBuilder &Builder) const {
1004 // Target identification.
1005 Builder.defineMacro("__microblaze__");
1006 Builder.defineMacro("_ARCH_MICROBLAZE");
1007 Builder.defineMacro("__MICROBLAZE__");
1009 // Target properties.
1010 Builder.defineMacro("_BIG_ENDIAN");
1011 Builder.defineMacro("__BIG_ENDIAN__");
1013 // Subtarget options.
1014 Builder.defineMacro("__REGISTER_PREFIX__", "");
1018 const char * const MBlazeTargetInfo::GCCRegNames[] = {
1019 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1020 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
1021 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
1022 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
1023 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7",
1024 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
1025 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
1026 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
1027 "hi", "lo", "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4",
1028 "$fcc5","$fcc6","$fcc7","$ap", "$rap", "$frp"
1031 void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names,
1032 unsigned &NumNames) const {
1033 Names = GCCRegNames;
1034 NumNames = llvm::array_lengthof(GCCRegNames);
1037 const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = {
1072 void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1073 unsigned &NumAliases) const {
1074 Aliases = GCCRegAliases;
1075 NumAliases = llvm::array_lengthof(GCCRegAliases);
1077 } // end anonymous namespace.
1080 // Namespace for x86 abstract base class
1081 const Builtin::Info BuiltinInfo[] = {
1082 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1083 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1085 #include "clang/Basic/BuiltinsX86.def"
1088 static const char* const GCCRegNames[] = {
1089 "ax", "dx", "cx", "bx", "si", "di", "bp", "sp",
1090 "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
1091 "argp", "flags", "fpcr", "fpsr", "dirflag", "frame",
1092 "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
1093 "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
1094 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
1095 "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
1098 const TargetInfo::AddlRegName AddlRegNames[] = {
1099 { { "al", "ah", "eax", "rax" }, 0 },
1100 { { "bl", "bh", "ebx", "rbx" }, 3 },
1101 { { "cl", "ch", "ecx", "rcx" }, 2 },
1102 { { "dl", "dh", "edx", "rdx" }, 1 },
1103 { { "esi", "rsi" }, 4 },
1104 { { "edi", "rdi" }, 5 },
1105 { { "esp", "rsp" }, 7 },
1106 { { "ebp", "rbp" }, 6 },
1109 // X86 target abstract base class; x86-32 and x86-64 are very close, so
1110 // most of the implementation can be shared.
1111 class X86TargetInfo : public TargetInfo {
1113 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42
1116 NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon
1123 X86TargetInfo(const std::string& triple)
1124 : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow),
1125 HasAES(false), HasAVX(false) {
1126 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
1128 virtual void getTargetBuiltins(const Builtin::Info *&Records,
1129 unsigned &NumRecords) const {
1130 Records = BuiltinInfo;
1131 NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin;
1133 virtual void getGCCRegNames(const char * const *&Names,
1134 unsigned &NumNames) const {
1135 Names = GCCRegNames;
1136 NumNames = llvm::array_lengthof(GCCRegNames);
1138 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1139 unsigned &NumAliases) const {
1143 virtual void getGCCAddlRegNames(const AddlRegName *&Names,
1144 unsigned &NumNames) const {
1145 Names = AddlRegNames;
1146 NumNames = llvm::array_lengthof(AddlRegNames);
1148 virtual bool validateAsmConstraint(const char *&Name,
1149 TargetInfo::ConstraintInfo &info) const;
1150 virtual std::string convertConstraint(const char *&Constraint) const;
1151 virtual const char *getClobbers() const {
1152 return "~{dirflag},~{fpsr},~{flags}";
1154 virtual void getTargetDefines(const LangOptions &Opts,
1155 MacroBuilder &Builder) const;
1156 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1157 const std::string &Name,
1158 bool Enabled) const;
1159 virtual void getDefaultFeatures(const std::string &CPU,
1160 llvm::StringMap<bool> &Features) const;
1161 virtual void HandleTargetFeatures(std::vector<std::string> &Features);
1162 virtual const char* getABI() const {
1163 return MMX3DNowLevel == NoMMX3DNow ? "no-mmx" : "";
1167 void X86TargetInfo::getDefaultFeatures(const std::string &CPU,
1168 llvm::StringMap<bool> &Features) const {
1169 // FIXME: This should not be here.
1170 Features["3dnow"] = false;
1171 Features["3dnowa"] = false;
1172 Features["mmx"] = false;
1173 Features["sse"] = false;
1174 Features["sse2"] = false;
1175 Features["sse3"] = false;
1176 Features["ssse3"] = false;
1177 Features["sse41"] = false;
1178 Features["sse42"] = false;
1179 Features["aes"] = false;
1180 Features["avx"] = false;
1182 // LLVM does not currently recognize this.
1183 // Features["sse4a"] = false;
1185 // FIXME: This *really* should not be here.
1187 // X86_64 always has SSE2.
1188 if (PointerWidth == 64)
1189 Features["sse2"] = Features["sse"] = Features["mmx"] = true;
1191 if (CPU == "generic" || CPU == "i386" || CPU == "i486" || CPU == "i586" ||
1192 CPU == "pentium" || CPU == "i686" || CPU == "pentiumpro")
1194 else if (CPU == "pentium-mmx" || CPU == "pentium2")
1195 setFeatureEnabled(Features, "mmx", true);
1196 else if (CPU == "pentium3") {
1197 setFeatureEnabled(Features, "mmx", true);
1198 setFeatureEnabled(Features, "sse", true);
1199 } else if (CPU == "pentium-m" || CPU == "pentium4" || CPU == "x86-64") {
1200 setFeatureEnabled(Features, "mmx", true);
1201 setFeatureEnabled(Features, "sse2", true);
1202 } else if (CPU == "yonah" || CPU == "prescott" || CPU == "nocona") {
1203 setFeatureEnabled(Features, "mmx", true);
1204 setFeatureEnabled(Features, "sse3", true);
1205 } else if (CPU == "core2") {
1206 setFeatureEnabled(Features, "mmx", true);
1207 setFeatureEnabled(Features, "ssse3", true);
1208 } else if (CPU == "penryn") {
1209 setFeatureEnabled(Features, "mmx", true);
1210 setFeatureEnabled(Features, "sse4", true);
1211 Features["sse42"] = false;
1212 } else if (CPU == "atom") {
1213 setFeatureEnabled(Features, "mmx", true);
1214 setFeatureEnabled(Features, "sse3", true);
1215 } else if (CPU == "corei7") {
1216 setFeatureEnabled(Features, "mmx", true);
1217 setFeatureEnabled(Features, "sse4", true);
1218 setFeatureEnabled(Features, "aes", true);
1219 } else if (CPU == "corei7-avx") {
1220 setFeatureEnabled(Features, "mmx", true);
1221 setFeatureEnabled(Features, "sse4", true);
1222 setFeatureEnabled(Features, "aes", true);
1223 //setFeatureEnabled(Features, "avx", true);
1224 } else if (CPU == "k6" || CPU == "winchip-c6")
1225 setFeatureEnabled(Features, "mmx", true);
1226 else if (CPU == "k6-2" || CPU == "k6-3" || CPU == "athlon" ||
1227 CPU == "athlon-tbird" || CPU == "winchip2" || CPU == "c3") {
1228 setFeatureEnabled(Features, "3dnow", true);
1229 } else if (CPU == "athlon-4" || CPU == "athlon-xp" || CPU == "athlon-mp") {
1230 setFeatureEnabled(Features, "sse", true);
1231 setFeatureEnabled(Features, "3dnowa", true);
1232 } else if (CPU == "k8" || CPU == "opteron" || CPU == "athlon64" ||
1233 CPU == "athlon-fx") {
1234 setFeatureEnabled(Features, "sse2", true);
1235 setFeatureEnabled(Features, "3dnowa", true);
1236 } else if (CPU == "k8-sse3") {
1237 setFeatureEnabled(Features, "sse3", true);
1238 setFeatureEnabled(Features, "3dnowa", true);
1239 } else if (CPU == "c3-2") {
1240 setFeatureEnabled(Features, "mmx", true);
1241 setFeatureEnabled(Features, "sse", true);
1245 bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1246 const std::string &Name,
1247 bool Enabled) const {
1248 // FIXME: This *really* should not be here. We need some way of translating
1249 // options into llvm subtarget features.
1250 if (!Features.count(Name) &&
1251 (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1"))
1256 Features["mmx"] = true;
1257 else if (Name == "sse")
1258 Features["sse"] = true;
1259 else if (Name == "sse2")
1260 Features["sse"] = Features["sse2"] = true;
1261 else if (Name == "sse3")
1262 Features["sse"] = Features["sse2"] = Features["sse3"] = true;
1263 else if (Name == "ssse3")
1264 Features["sse"] = Features["sse2"] = Features["sse3"] =
1265 Features["ssse3"] = true;
1266 else if (Name == "sse4" || Name == "sse4.2")
1267 Features["sse"] = Features["sse2"] = Features["sse3"] =
1268 Features["ssse3"] = Features["sse41"] = Features["sse42"] = true;
1269 else if (Name == "sse4.1")
1270 Features["sse"] = Features["sse2"] = Features["sse3"] =
1271 Features["ssse3"] = Features["sse41"] = true;
1272 else if (Name == "3dnow")
1273 Features["mmx"] = Features["3dnow"] = true;
1274 else if (Name == "3dnowa")
1275 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true;
1276 else if (Name == "aes")
1277 Features["aes"] = true;
1278 else if (Name == "avx")
1279 Features["avx"] = true;
1282 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false;
1283 else if (Name == "sse")
1284 Features["sse"] = Features["sse2"] = Features["sse3"] =
1285 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1286 else if (Name == "sse2")
1287 Features["sse2"] = Features["sse3"] = Features["ssse3"] =
1288 Features["sse41"] = Features["sse42"] = false;
1289 else if (Name == "sse3")
1290 Features["sse3"] = Features["ssse3"] = Features["sse41"] =
1291 Features["sse42"] = false;
1292 else if (Name == "ssse3")
1293 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1294 else if (Name == "sse4" || Name == "sse4.1")
1295 Features["sse41"] = Features["sse42"] = false;
1296 else if (Name == "sse4.2")
1297 Features["sse42"] = false;
1298 else if (Name == "3dnow")
1299 Features["3dnow"] = Features["3dnowa"] = false;
1300 else if (Name == "3dnowa")
1301 Features["3dnowa"] = false;
1302 else if (Name == "aes")
1303 Features["aes"] = false;
1304 else if (Name == "avx")
1305 Features["avx"] = false;
1311 /// HandleTargetOptions - Perform initialization based on the user
1312 /// configured set of features.
1313 void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) {
1314 // Remember the maximum enabled sselevel.
1315 for (unsigned i = 0, e = Features.size(); i !=e; ++i) {
1316 // Ignore disabled features.
1317 if (Features[i][0] == '-')
1320 if (Features[i].substr(1) == "aes") {
1325 // FIXME: Not sure yet how to treat AVX in regard to SSE levels.
1326 // For now let it be enabled together with other SSE levels.
1327 if (Features[i].substr(1) == "avx") {
1332 assert(Features[i][0] == '+' && "Invalid target feature!");
1333 X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1))
1334 .Case("sse42", SSE42)
1335 .Case("sse41", SSE41)
1336 .Case("ssse3", SSSE3)
1341 SSELevel = std::max(SSELevel, Level);
1343 MMX3DNowEnum ThreeDNowLevel =
1344 llvm::StringSwitch<MMX3DNowEnum>(Features[i].substr(1))
1345 .Case("3dnowa", AMD3DNowAthlon)
1346 .Case("3dnow", AMD3DNow)
1348 .Default(NoMMX3DNow);
1350 MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel);
1353 // Don't tell the backend if we're turning off mmx; it will end up disabling
1354 // SSE, which we don't want.
1355 std::vector<std::string>::iterator it;
1356 it = std::find(Features.begin(), Features.end(), "-mmx");
1357 if (it != Features.end())
1361 /// X86TargetInfo::getTargetDefines - Return a set of the X86-specific #defines
1362 /// that are not tied to a specific subtarget.
1363 void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
1364 MacroBuilder &Builder) const {
1365 // Target identification.
1366 if (PointerWidth == 64) {
1367 Builder.defineMacro("_LP64");
1368 Builder.defineMacro("__LP64__");
1369 Builder.defineMacro("__amd64__");
1370 Builder.defineMacro("__amd64");
1371 Builder.defineMacro("__x86_64");
1372 Builder.defineMacro("__x86_64__");
1374 DefineStd(Builder, "i386", Opts);
1378 Builder.defineMacro("__AES__");
1381 Builder.defineMacro("__AVX__");
1383 // Target properties.
1384 Builder.defineMacro("__LITTLE_ENDIAN__");
1386 // Subtarget options.
1387 Builder.defineMacro("__nocona");
1388 Builder.defineMacro("__nocona__");
1389 Builder.defineMacro("__tune_nocona__");
1390 Builder.defineMacro("__REGISTER_PREFIX__", "");
1392 // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline
1393 // functions in glibc header files that use FP Stack inline asm which the
1394 // backend can't deal with (PR879).
1395 Builder.defineMacro("__NO_MATH_INLINES");
1397 // Each case falls through to the previous one here.
1400 Builder.defineMacro("__SSE4_2__");
1402 Builder.defineMacro("__SSE4_1__");
1404 Builder.defineMacro("__SSSE3__");
1406 Builder.defineMacro("__SSE3__");
1408 Builder.defineMacro("__SSE2__");
1409 Builder.defineMacro("__SSE2_MATH__"); // -mfp-math=sse always implied.
1411 Builder.defineMacro("__SSE__");
1412 Builder.defineMacro("__SSE_MATH__"); // -mfp-math=sse always implied.
1417 if (Opts.Microsoft && PointerWidth == 32) {
1424 Builder.defineMacro("_M_IX86_FP", llvm::Twine(2));
1427 Builder.defineMacro("_M_IX86_FP", llvm::Twine(1));
1430 Builder.defineMacro("_M_IX86_FP", llvm::Twine(0));
1434 // Each case falls through to the previous one here.
1435 switch (MMX3DNowLevel) {
1436 case AMD3DNowAthlon:
1437 Builder.defineMacro("__3dNOW_A__");
1439 Builder.defineMacro("__3dNOW__");
1441 Builder.defineMacro("__MMX__");
1449 X86TargetInfo::validateAsmConstraint(const char *&Name,
1450 TargetInfo::ConstraintInfo &Info) const {
1452 default: return false;
1453 case 'Y': // first letter of a pair:
1454 switch (*(Name+1)) {
1455 default: return false;
1456 case '0': // First SSE register.
1457 case 't': // Any SSE register, when SSE2 is enabled.
1458 case 'i': // Any SSE register, when SSE2 and inter-unit moves enabled.
1459 case 'm': // any MMX register, when inter-unit moves enabled.
1460 break; // falls through to setAllowsRegister.
1468 case 'A': // edx:eax.
1469 case 'f': // any x87 floating point stack register.
1470 case 't': // top of floating point stack.
1471 case 'u': // second from top of floating point stack.
1472 case 'q': // Any register accessible as [r]l: a, b, c, and d.
1473 case 'y': // Any MMX register.
1474 case 'x': // Any SSE register.
1475 case 'Q': // Any register accessible as [r]h: a, b, c, and d.
1476 case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp.
1477 case 'l': // "Index" registers: any general register that can be used as an
1478 // index in a base+index memory access.
1479 Info.setAllowsRegister();
1481 case 'C': // SSE floating point constant.
1482 case 'G': // x87 floating point constant.
1483 case 'e': // 32-bit signed integer constant for use with zero-extending
1484 // x86_64 instructions.
1485 case 'Z': // 32-bit unsigned integer constant for use with zero-extending
1486 // x86_64 instructions.
1494 X86TargetInfo::convertConstraint(const char *&Constraint) const {
1495 switch (*Constraint) {
1496 case 'a': return std::string("{ax}");
1497 case 'b': return std::string("{bx}");
1498 case 'c': return std::string("{cx}");
1499 case 'd': return std::string("{dx}");
1500 case 'S': return std::string("{si}");
1501 case 'D': return std::string("{di}");
1502 case 'p': // address
1503 return std::string("im");
1504 case 't': // top of floating point stack.
1505 return std::string("{st}");
1506 case 'u': // second from top of floating point stack.
1507 return std::string("{st(1)}"); // second from top of floating point stack.
1509 return std::string(1, *Constraint);
1512 } // end anonymous namespace
1515 // X86-32 generic target
1516 class X86_32TargetInfo : public X86TargetInfo {
1518 X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) {
1519 DoubleAlign = LongLongAlign = 32;
1520 LongDoubleWidth = 96;
1521 LongDoubleAlign = 32;
1522 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1523 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
1524 "a0:0:64-f80:32:32-n8:16:32";
1525 SizeType = UnsignedInt;
1526 PtrDiffType = SignedInt;
1527 IntPtrType = SignedInt;
1530 // Use fpret for all types.
1531 RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) |
1532 (1 << TargetInfo::Double) |
1533 (1 << TargetInfo::LongDouble));
1535 virtual const char *getVAListDeclaration() const {
1536 return "typedef char* __builtin_va_list;";
1539 int getEHDataRegisterNumber(unsigned RegNo) const {
1540 if (RegNo == 0) return 0;
1541 if (RegNo == 1) return 2;
1545 } // end anonymous namespace
1548 class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> {
1550 OpenBSDI386TargetInfo(const std::string& triple) :
1551 OpenBSDTargetInfo<X86_32TargetInfo>(triple) {
1552 SizeType = UnsignedLong;
1553 IntPtrType = SignedLong;
1554 PtrDiffType = SignedLong;
1557 } // end anonymous namespace
1560 class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> {
1562 DarwinI386TargetInfo(const std::string& triple) :
1563 DarwinTargetInfo<X86_32TargetInfo>(triple) {
1564 LongDoubleWidth = 128;
1565 LongDoubleAlign = 128;
1566 SizeType = UnsignedLong;
1567 IntPtrType = SignedLong;
1568 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1569 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
1570 "a0:0:64-f80:128:128-n8:16:32";
1571 HasAlignMac68kSupport = true;
1575 } // end anonymous namespace
1578 // x86-32 Windows target
1579 class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> {
1581 WindowsX86_32TargetInfo(const std::string& triple)
1582 : WindowsTargetInfo<X86_32TargetInfo>(triple) {
1583 TLSSupported = false;
1584 WCharType = UnsignedShort;
1585 DoubleAlign = LongLongAlign = 64;
1586 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1587 "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-"
1588 "v128:128:128-a0:0:64-f80:32:32-n8:16:32";
1590 virtual void getTargetDefines(const LangOptions &Opts,
1591 MacroBuilder &Builder) const {
1592 WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder);
1595 } // end anonymous namespace
1599 // x86-32 Windows Visual Studio target
1600 class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo {
1602 VisualStudioWindowsX86_32TargetInfo(const std::string& triple)
1603 : WindowsX86_32TargetInfo(triple) {
1604 LongDoubleWidth = LongDoubleAlign = 64;
1605 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
1607 virtual void getTargetDefines(const LangOptions &Opts,
1608 MacroBuilder &Builder) const {
1609 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
1610 WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder);
1611 // The value of the following reflects processor type.
1612 // 300=386, 400=486, 500=Pentium, 600=Blend (default)
1613 // We lost the original triple, so we use the default.
1614 Builder.defineMacro("_M_IX86", "600");
1617 } // end anonymous namespace
1620 // x86-32 MinGW target
1621 class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo {
1623 MinGWX86_32TargetInfo(const std::string& triple)
1624 : WindowsX86_32TargetInfo(triple) {
1626 virtual void getTargetDefines(const LangOptions &Opts,
1627 MacroBuilder &Builder) const {
1628 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
1629 DefineStd(Builder, "WIN32", Opts);
1630 DefineStd(Builder, "WINNT", Opts);
1631 Builder.defineMacro("_X86_");
1632 Builder.defineMacro("__MSVCRT__");
1633 Builder.defineMacro("__MINGW32__");
1635 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
1636 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
1638 // Provide "as-is" __declspec.
1639 Builder.defineMacro("__declspec", "__declspec");
1641 // Provide alias of __attribute__ like mingw32-gcc.
1642 Builder.defineMacro("__declspec(a)", "__attribute__((a))");
1645 } // end anonymous namespace
1648 // x86-32 Cygwin target
1649 class CygwinX86_32TargetInfo : public X86_32TargetInfo {
1651 CygwinX86_32TargetInfo(const std::string& triple)
1652 : X86_32TargetInfo(triple) {
1653 TLSSupported = false;
1654 WCharType = UnsignedShort;
1655 DoubleAlign = LongLongAlign = 64;
1656 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1657 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
1658 "a0:0:64-f80:32:32-n8:16:32";
1660 virtual void getTargetDefines(const LangOptions &Opts,
1661 MacroBuilder &Builder) const {
1662 X86_32TargetInfo::getTargetDefines(Opts, Builder);
1663 Builder.defineMacro("__CYGWIN__");
1664 Builder.defineMacro("__CYGWIN32__");
1665 DefineStd(Builder, "unix", Opts);
1667 Builder.defineMacro("_GNU_SOURCE");
1670 } // end anonymous namespace
1673 // x86-32 Haiku target
1674 class HaikuX86_32TargetInfo : public X86_32TargetInfo {
1676 HaikuX86_32TargetInfo(const std::string& triple)
1677 : X86_32TargetInfo(triple) {
1678 SizeType = UnsignedLong;
1679 IntPtrType = SignedLong;
1680 PtrDiffType = SignedLong;
1681 this->UserLabelPrefix = "";
1683 virtual void getTargetDefines(const LangOptions &Opts,
1684 MacroBuilder &Builder) const {
1685 X86_32TargetInfo::getTargetDefines(Opts, Builder);
1686 Builder.defineMacro("__INTEL__");
1687 Builder.defineMacro("__HAIKU__");
1690 } // end anonymous namespace
1693 template<typename Target>
1694 class RTEMSTargetInfo : public OSTargetInfo<Target> {
1696 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
1697 MacroBuilder &Builder) const {
1698 // RTEMS defines; list based off of gcc output
1700 // FIXME: Move version number handling to llvm::Triple.
1701 llvm::StringRef Release = Triple.getOSName().substr(strlen("rtems"), 1);
1703 Builder.defineMacro("__rtems__");
1704 Builder.defineMacro("__ELF__");
1707 RTEMSTargetInfo(const std::string &triple)
1708 : OSTargetInfo<Target>(triple) {
1709 this->UserLabelPrefix = "";
1711 llvm::Triple Triple(triple);
1712 switch (Triple.getArch()) {
1714 case llvm::Triple::x86:
1715 // this->MCountName = ".mcount";
1717 case llvm::Triple::mips:
1718 case llvm::Triple::mipsel:
1719 case llvm::Triple::ppc:
1720 case llvm::Triple::ppc64:
1721 // this->MCountName = "_mcount";
1723 case llvm::Triple::arm:
1724 // this->MCountName = "__mcount";
1732 // x86-32 RTEMS target
1733 class RTEMSX86_32TargetInfo : public X86_32TargetInfo {
1735 RTEMSX86_32TargetInfo(const std::string& triple)
1736 : X86_32TargetInfo(triple) {
1737 SizeType = UnsignedLong;
1738 IntPtrType = SignedLong;
1739 PtrDiffType = SignedLong;
1740 this->UserLabelPrefix = "";
1742 virtual void getTargetDefines(const LangOptions &Opts,
1743 MacroBuilder &Builder) const {
1744 X86_32TargetInfo::getTargetDefines(Opts, Builder);
1745 Builder.defineMacro("__INTEL__");
1746 Builder.defineMacro("__rtems__");
1749 } // end anonymous namespace
1752 // x86-64 generic target
1753 class X86_64TargetInfo : public X86TargetInfo {
1755 X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) {
1756 LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
1757 LongDoubleWidth = 128;
1758 LongDoubleAlign = 128;
1759 LargeArrayMinWidth = 128;
1760 LargeArrayAlign = 128;
1761 IntMaxType = SignedLong;
1762 UIntMaxType = UnsignedLong;
1763 Int64Type = SignedLong;
1766 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1767 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
1768 "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64";
1770 // Use fpret only for long double.
1771 RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble);
1773 virtual const char *getVAListDeclaration() const {
1774 return "typedef struct __va_list_tag {"
1775 " unsigned gp_offset;"
1776 " unsigned fp_offset;"
1777 " void* overflow_arg_area;"
1778 " void* reg_save_area;"
1780 "typedef __va_list_tag __builtin_va_list[1];";
1783 int getEHDataRegisterNumber(unsigned RegNo) const {
1784 if (RegNo == 0) return 0;
1785 if (RegNo == 1) return 1;
1789 } // end anonymous namespace
1792 // x86-64 Windows target
1793 class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> {
1795 WindowsX86_64TargetInfo(const std::string& triple)
1796 : WindowsTargetInfo<X86_64TargetInfo>(triple) {
1797 TLSSupported = false;
1798 WCharType = UnsignedShort;
1799 LongWidth = LongAlign = 32;
1800 DoubleAlign = LongLongAlign = 64;
1801 IntMaxType = SignedLongLong;
1802 UIntMaxType = UnsignedLongLong;
1803 Int64Type = SignedLongLong;
1804 SizeType = UnsignedLongLong;
1805 PtrDiffType = SignedLongLong;
1806 IntPtrType = SignedLongLong;
1807 this->UserLabelPrefix = "";
1809 virtual void getTargetDefines(const LangOptions &Opts,
1810 MacroBuilder &Builder) const {
1811 WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder);
1812 Builder.defineMacro("_WIN64");
1814 virtual const char *getVAListDeclaration() const {
1815 return "typedef char* __builtin_va_list;";
1818 } // end anonymous namespace
1821 // x86-64 Windows Visual Studio target
1822 class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo {
1824 VisualStudioWindowsX86_64TargetInfo(const std::string& triple)
1825 : WindowsX86_64TargetInfo(triple) {
1826 LongDoubleWidth = LongDoubleAlign = 64;
1827 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
1829 virtual void getTargetDefines(const LangOptions &Opts,
1830 MacroBuilder &Builder) const {
1831 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
1832 WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder);
1833 Builder.defineMacro("_M_X64");
1834 Builder.defineMacro("_M_AMD64");
1837 } // end anonymous namespace
1840 // x86-64 MinGW target
1841 class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo {
1843 MinGWX86_64TargetInfo(const std::string& triple)
1844 : WindowsX86_64TargetInfo(triple) {
1846 virtual void getTargetDefines(const LangOptions &Opts,
1847 MacroBuilder &Builder) const {
1848 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
1849 DefineStd(Builder, "WIN64", Opts);
1850 Builder.defineMacro("__MSVCRT__");
1851 Builder.defineMacro("__MINGW32__");
1852 Builder.defineMacro("__MINGW64__");
1854 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
1855 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
1857 // Provide "as-is" __declspec.
1858 Builder.defineMacro("__declspec", "__declspec");
1860 // Provide alias of __attribute__ like mingw32-gcc.
1861 Builder.defineMacro("__declspec(a)", "__attribute__((a))");
1864 } // end anonymous namespace
1867 class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> {
1869 DarwinX86_64TargetInfo(const std::string& triple)
1870 : DarwinTargetInfo<X86_64TargetInfo>(triple) {
1871 Int64Type = SignedLongLong;
1874 } // end anonymous namespace
1877 class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> {
1879 OpenBSDX86_64TargetInfo(const std::string& triple)
1880 : OpenBSDTargetInfo<X86_64TargetInfo>(triple) {
1881 IntMaxType = SignedLongLong;
1882 UIntMaxType = UnsignedLongLong;
1883 Int64Type = SignedLongLong;
1886 } // end anonymous namespace
1889 class ARMTargetInfo : public TargetInfo {
1890 // Possible FPU choices.
1898 static bool FPUModeIsVFP(FPUMode Mode) {
1899 return Mode >= VFP2FPU && Mode <= NeonFPU;
1902 static const TargetInfo::GCCRegAlias GCCRegAliases[];
1903 static const char * const GCCRegNames[];
1905 std::string ABI, CPU;
1909 unsigned IsThumb : 1;
1911 // Initialized via features.
1912 unsigned SoftFloat : 1;
1913 unsigned SoftFloatABI : 1;
1915 static const Builtin::Info BuiltinInfo[];
1918 ARMTargetInfo(const std::string &TripleStr)
1919 : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s")
1921 SizeType = UnsignedInt;
1922 PtrDiffType = SignedInt;
1924 // {} in inline assembly are neon specifiers, not assembly variant
1926 NoAsmVariants = true;
1928 // FIXME: Should we just treat this as a feature?
1929 IsThumb = getTriple().getArchName().startswith("thumb");
1931 // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
1932 // so set preferred for small types to 32.
1933 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
1934 "i64:64:64-f32:32:32-f64:64:64-"
1935 "v64:64:64-v128:64:128-a0:0:32-n32");
1937 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1938 "i64:64:64-f32:32:32-f64:64:64-"
1939 "v64:64:64-v128:64:128-a0:0:64-n32");
1942 // ARM targets default to using the ARM C++ ABI.
1943 CXXABI = CXXABI_ARM;
1945 virtual const char *getABI() const { return ABI.c_str(); }
1946 virtual bool setABI(const std::string &Name) {
1949 // The defaults (above) are for AAPCS, check if we need to change them.
1951 // FIXME: We need support for -meabi... we could just mangle it into the
1953 if (Name == "apcs-gnu") {
1954 DoubleAlign = LongLongAlign = LongDoubleAlign = 32;
1955 SizeType = UnsignedLong;
1957 // Do not respect the alignment of bit-field types when laying out
1958 // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc.
1959 UseBitFieldTypeAlignment = false;
1962 // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
1963 // so set preferred for small types to 32.
1964 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
1965 "i64:32:64-f32:32:32-f64:32:64-"
1966 "v64:32:64-v128:32:128-a0:0:32-n32");
1968 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1969 "i64:32:64-f32:32:32-f64:32:64-"
1970 "v64:32:64-v128:32:128-a0:0:32-n32");
1973 // FIXME: Override "preferred align" for double and long long.
1974 } else if (Name == "aapcs") {
1975 // FIXME: Enumerated types are variable width in straight AAPCS.
1976 } else if (Name == "aapcs-linux") {
1984 void getDefaultFeatures(const std::string &CPU,
1985 llvm::StringMap<bool> &Features) const {
1986 if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore")
1987 Features["vfp2"] = true;
1988 else if (CPU == "cortex-a8" || CPU == "cortex-a9")
1989 Features["neon"] = true;
1992 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1993 const std::string &Name,
1994 bool Enabled) const {
1995 if (Name == "soft-float" || Name == "soft-float-abi" ||
1996 Name == "vfp2" || Name == "vfp3" || Name == "neon") {
1997 Features[Name] = Enabled;
2004 virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
2006 SoftFloat = SoftFloatABI = false;
2007 for (unsigned i = 0, e = Features.size(); i != e; ++i) {
2008 if (Features[i] == "+soft-float")
2010 else if (Features[i] == "+soft-float-abi")
2011 SoftFloatABI = true;
2012 else if (Features[i] == "+vfp2")
2014 else if (Features[i] == "+vfp3")
2016 else if (Features[i] == "+neon")
2020 // Remove front-end specific options which the backend handles differently.
2021 std::vector<std::string>::iterator it;
2022 it = std::find(Features.begin(), Features.end(), "+soft-float");
2023 if (it != Features.end())
2025 it = std::find(Features.begin(), Features.end(), "+soft-float-abi");
2026 if (it != Features.end())
2030 static const char *getCPUDefineSuffix(llvm::StringRef Name) {
2031 return llvm::StringSwitch<const char*>(Name)
2032 .Cases("arm8", "arm810", "4")
2033 .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4")
2034 .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T")
2035 .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T")
2036 .Case("ep9312", "4T")
2037 .Cases("arm10tdmi", "arm1020t", "5T")
2038 .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE")
2039 .Case("arm926ej-s", "5TEJ")
2040 .Cases("arm10e", "arm1020e", "arm1022e", "5TE")
2041 .Cases("xscale", "iwmmxt", "5TE")
2042 .Case("arm1136j-s", "6J")
2043 .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK")
2044 .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K")
2045 .Cases("arm1156t2-s", "arm1156t2f-s", "6T2")
2046 .Cases("cortex-a8", "cortex-a9", "7A")
2047 .Case("cortex-m3", "7M")
2048 .Case("cortex-m0", "6M")
2051 virtual bool setCPU(const std::string &Name) {
2052 if (!getCPUDefineSuffix(Name))
2058 virtual void getTargetDefines(const LangOptions &Opts,
2059 MacroBuilder &Builder) const {
2060 // Target identification.
2061 Builder.defineMacro("__arm");
2062 Builder.defineMacro("__arm__");
2064 // Target properties.
2065 Builder.defineMacro("__ARMEL__");
2066 Builder.defineMacro("__LITTLE_ENDIAN__");
2067 Builder.defineMacro("__REGISTER_PREFIX__", "");
2069 llvm::StringRef CPUArch = getCPUDefineSuffix(CPU);
2070 Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__");
2072 // Subtarget options.
2074 // FIXME: It's more complicated than this and we don't really support
2076 if ('5' <= CPUArch[0] && CPUArch[0] <= '7')
2077 Builder.defineMacro("__THUMB_INTERWORK__");
2079 if (ABI == "aapcs" || ABI == "aapcs-linux")
2080 Builder.defineMacro("__ARM_EABI__");
2083 Builder.defineMacro("__SOFTFP__");
2085 if (CPU == "xscale")
2086 Builder.defineMacro("__XSCALE__");
2088 bool IsARMv7 = CPUArch.startswith("7");
2090 Builder.defineMacro("__THUMBEL__");
2091 Builder.defineMacro("__thumb__");
2092 if (CPUArch == "6T2" || IsARMv7)
2093 Builder.defineMacro("__thumb2__");
2096 // Note, this is always on in gcc, even though it doesn't make sense.
2097 Builder.defineMacro("__APCS_32__");
2099 if (FPUModeIsVFP((FPUMode) FPU))
2100 Builder.defineMacro("__VFP_FP__");
2102 // This only gets set when Neon instructions are actually available, unlike
2103 // the VFP define, hence the soft float and arch check. This is subtly
2104 // different from gcc, we follow the intent which was that it should be set
2105 // when Neon instructions are actually available.
2106 if (FPU == NeonFPU && !SoftFloat && IsARMv7)
2107 Builder.defineMacro("__ARM_NEON__");
2109 virtual void getTargetBuiltins(const Builtin::Info *&Records,
2110 unsigned &NumRecords) const {
2111 Records = BuiltinInfo;
2112 NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin;
2114 virtual const char *getVAListDeclaration() const {
2115 return "typedef void* __builtin_va_list;";
2117 virtual void getGCCRegNames(const char * const *&Names,
2118 unsigned &NumNames) const;
2119 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2120 unsigned &NumAliases) const;
2121 virtual bool validateAsmConstraint(const char *&Name,
2122 TargetInfo::ConstraintInfo &Info) const {
2123 // FIXME: Check if this is complete
2128 case 'w': // VFP Floating point register single precision
2129 case 'P': // VFP Floating point register double precision
2130 Info.setAllowsRegister();
2132 case 'U': // a memory reference...
2134 case 'q': // ...ARMV4 ldrsb
2135 case 'v': // ...VFP load/store (reg+constant offset)
2136 case 'y': // ...iWMMXt load/store
2137 case 't': // address valid for load/store opaque types wider
2139 case 'n': // valid address for Neon doubleword vector load/store
2140 case 'm': // valid address for Neon element and structure load/store
2141 case 's': // valid address for non-offset loads/stores of quad-word
2142 // values in four ARM registers
2143 Info.setAllowsMemory();
2150 virtual std::string convertConstraint(const char *&Constraint) const {
2152 switch (*Constraint) {
2153 case 'U': // Two-character constraint; add "^" hint for later parsing.
2154 R = std::string("^") + std::string(Constraint, 2);
2157 case 'p': // 'p' should be translated to 'r' by default.
2158 R = std::string("r");
2161 return std::string(1, *Constraint);
2165 virtual const char *getClobbers() const {
2166 // FIXME: Is this really right?
2171 const char * const ARMTargetInfo::GCCRegNames[] = {
2172 // Integer registers
2173 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2174 "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc",
2177 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
2178 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15",
2179 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23",
2180 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31",
2183 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
2184 "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15",
2185 "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23",
2186 "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31",
2189 "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
2190 "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15"
2193 void ARMTargetInfo::getGCCRegNames(const char * const *&Names,
2194 unsigned &NumNames) const {
2195 Names = GCCRegNames;
2196 NumNames = llvm::array_lengthof(GCCRegNames);
2199 const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = {
2209 { { "v6", "rfp" }, "r9" },
2210 { { "sl" }, "r10" },
2211 { { "fp" }, "r11" },
2212 { { "ip" }, "r12" },
2213 { { "r13" }, "sp" },
2214 { { "r14" }, "lr" },
2215 { { "r15" }, "pc" },
2216 // The S, D and Q registers overlap, but aren't really aliases; we
2217 // don't want to substitute one of these for a different-sized one.
2220 void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
2221 unsigned &NumAliases) const {
2222 Aliases = GCCRegAliases;
2223 NumAliases = llvm::array_lengthof(GCCRegAliases);
2226 const Builtin::Info ARMTargetInfo::BuiltinInfo[] = {
2227 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
2228 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
2230 #include "clang/Basic/BuiltinsARM.def"
2232 } // end anonymous namespace.
2236 class DarwinARMTargetInfo :
2237 public DarwinTargetInfo<ARMTargetInfo> {
2239 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
2240 MacroBuilder &Builder) const {
2241 getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion);
2245 DarwinARMTargetInfo(const std::string& triple)
2246 : DarwinTargetInfo<ARMTargetInfo>(triple) {
2247 HasAlignMac68kSupport = true;
2250 } // end anonymous namespace.
2253 class SparcV8TargetInfo : public TargetInfo {
2254 static const TargetInfo::GCCRegAlias GCCRegAliases[];
2255 static const char * const GCCRegNames[];
2258 SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) {
2259 // FIXME: Support Sparc quad-precision long double?
2260 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2261 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
2263 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
2264 const std::string &Name,
2265 bool Enabled) const {
2266 if (Name == "soft-float")
2267 Features[Name] = Enabled;
2273 virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
2275 for (unsigned i = 0, e = Features.size(); i != e; ++i)
2276 if (Features[i] == "+soft-float")
2279 virtual void getTargetDefines(const LangOptions &Opts,
2280 MacroBuilder &Builder) const {
2281 DefineStd(Builder, "sparc", Opts);
2282 Builder.defineMacro("__sparcv8");
2283 Builder.defineMacro("__REGISTER_PREFIX__", "");
2286 Builder.defineMacro("SOFT_FLOAT", "1");
2288 virtual void getTargetBuiltins(const Builtin::Info *&Records,
2289 unsigned &NumRecords) const {
2290 // FIXME: Implement!
2292 virtual const char *getVAListDeclaration() const {
2293 return "typedef void* __builtin_va_list;";
2295 virtual void getGCCRegNames(const char * const *&Names,
2296 unsigned &NumNames) const;
2297 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2298 unsigned &NumAliases) const;
2299 virtual bool validateAsmConstraint(const char *&Name,
2300 TargetInfo::ConstraintInfo &info) const {
2301 // FIXME: Implement!
2304 virtual const char *getClobbers() const {
2305 // FIXME: Implement!
2310 const char * const SparcV8TargetInfo::GCCRegNames[] = {
2311 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2312 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
2313 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
2314 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
2317 void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names,
2318 unsigned &NumNames) const {
2319 Names = GCCRegNames;
2320 NumNames = llvm::array_lengthof(GCCRegNames);
2323 const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = {
2334 { { "o2" }, "r10" },
2335 { { "o3" }, "r11" },
2336 { { "o4" }, "r12" },
2337 { { "o5" }, "r13" },
2338 { { "o6", "sp" }, "r14" },
2339 { { "o7" }, "r15" },
2340 { { "l0" }, "r16" },
2341 { { "l1" }, "r17" },
2342 { { "l2" }, "r18" },
2343 { { "l3" }, "r19" },
2344 { { "l4" }, "r20" },
2345 { { "l5" }, "r21" },
2346 { { "l6" }, "r22" },
2347 { { "l7" }, "r23" },
2348 { { "i0" }, "r24" },
2349 { { "i1" }, "r25" },
2350 { { "i2" }, "r26" },
2351 { { "i3" }, "r27" },
2352 { { "i4" }, "r28" },
2353 { { "i5" }, "r29" },
2354 { { "i6", "fp" }, "r30" },
2355 { { "i7" }, "r31" },
2358 void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
2359 unsigned &NumAliases) const {
2360 Aliases = GCCRegAliases;
2361 NumAliases = llvm::array_lengthof(GCCRegAliases);
2363 } // end anonymous namespace.
2366 class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> {
2368 AuroraUXSparcV8TargetInfo(const std::string& triple) :
2369 AuroraUXTargetInfo<SparcV8TargetInfo>(triple) {
2370 SizeType = UnsignedInt;
2371 PtrDiffType = SignedInt;
2374 class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> {
2376 SolarisSparcV8TargetInfo(const std::string& triple) :
2377 SolarisTargetInfo<SparcV8TargetInfo>(triple) {
2378 SizeType = UnsignedInt;
2379 PtrDiffType = SignedInt;
2382 } // end anonymous namespace.
2385 class MSP430TargetInfo : public TargetInfo {
2386 static const char * const GCCRegNames[];
2388 MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) {
2389 TLSSupported = false;
2390 IntWidth = 16; IntAlign = 16;
2391 LongWidth = 32; LongLongWidth = 64;
2392 LongAlign = LongLongAlign = 16;
2393 PointerWidth = 16; PointerAlign = 16;
2394 SizeType = UnsignedInt;
2395 IntMaxType = SignedLong;
2396 UIntMaxType = UnsignedLong;
2397 IntPtrType = SignedShort;
2398 PtrDiffType = SignedInt;
2399 SigAtomicType = SignedLong;
2400 DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16";
2402 virtual void getTargetDefines(const LangOptions &Opts,
2403 MacroBuilder &Builder) const {
2404 Builder.defineMacro("MSP430");
2405 Builder.defineMacro("__MSP430__");
2406 // FIXME: defines for different 'flavours' of MCU
2408 virtual void getTargetBuiltins(const Builtin::Info *&Records,
2409 unsigned &NumRecords) const {
2410 // FIXME: Implement.
2414 virtual void getGCCRegNames(const char * const *&Names,
2415 unsigned &NumNames) const;
2416 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2417 unsigned &NumAliases) const {
2422 virtual bool validateAsmConstraint(const char *&Name,
2423 TargetInfo::ConstraintInfo &info) const {
2424 // No target constraints for now.
2427 virtual const char *getClobbers() const {
2428 // FIXME: Is this really right?
2431 virtual const char *getVAListDeclaration() const {
2433 return "typedef char* __builtin_va_list;";
2437 const char * const MSP430TargetInfo::GCCRegNames[] = {
2438 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2439 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
2442 void MSP430TargetInfo::getGCCRegNames(const char * const *&Names,
2443 unsigned &NumNames) const {
2444 Names = GCCRegNames;
2445 NumNames = llvm::array_lengthof(GCCRegNames);
2451 class SystemZTargetInfo : public TargetInfo {
2452 static const char * const GCCRegNames[];
2454 SystemZTargetInfo(const std::string& triple) : TargetInfo(triple) {
2455 TLSSupported = false;
2456 IntWidth = IntAlign = 32;
2457 LongWidth = LongLongWidth = LongAlign = LongLongAlign = 64;
2458 PointerWidth = PointerAlign = 64;
2459 DescriptionString = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-"
2460 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16-n32:64";
2462 virtual void getTargetDefines(const LangOptions &Opts,
2463 MacroBuilder &Builder) const {
2464 Builder.defineMacro("__s390__");
2465 Builder.defineMacro("__s390x__");
2467 virtual void getTargetBuiltins(const Builtin::Info *&Records,
2468 unsigned &NumRecords) const {
2469 // FIXME: Implement.
2474 virtual void getGCCRegNames(const char * const *&Names,
2475 unsigned &NumNames) const;
2476 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2477 unsigned &NumAliases) const {
2482 virtual bool validateAsmConstraint(const char *&Name,
2483 TargetInfo::ConstraintInfo &info) const {
2487 virtual const char *getClobbers() const {
2488 // FIXME: Is this really right?
2491 virtual const char *getVAListDeclaration() const {
2493 return "typedef char* __builtin_va_list;";
2497 const char * const SystemZTargetInfo::GCCRegNames[] = {
2498 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2499 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
2502 void SystemZTargetInfo::getGCCRegNames(const char * const *&Names,
2503 unsigned &NumNames) const {
2504 Names = GCCRegNames;
2505 NumNames = llvm::array_lengthof(GCCRegNames);
2510 class BlackfinTargetInfo : public TargetInfo {
2511 static const char * const GCCRegNames[];
2513 BlackfinTargetInfo(const std::string& triple) : TargetInfo(triple) {
2514 TLSSupported = false;
2517 LongDoubleAlign = 32;
2518 DescriptionString = "e-p:32:32-i64:32-f64:32-n32";
2521 virtual void getTargetDefines(const LangOptions &Opts,
2522 MacroBuilder &Builder) const {
2523 DefineStd(Builder, "bfin", Opts);
2524 DefineStd(Builder, "BFIN", Opts);
2525 Builder.defineMacro("__ADSPBLACKFIN__");
2526 // FIXME: This one is really dependent on -mcpu
2527 Builder.defineMacro("__ADSPLPBLACKFIN__");
2528 // FIXME: Add cpu-dependent defines and __SILICON_REVISION__
2531 virtual void getTargetBuiltins(const Builtin::Info *&Records,
2532 unsigned &NumRecords) const {
2533 // FIXME: Implement.
2538 virtual void getGCCRegNames(const char * const *&Names,
2539 unsigned &NumNames) const;
2541 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2542 unsigned &NumAliases) const {
2548 virtual bool validateAsmConstraint(const char *&Name,
2549 TargetInfo::ConstraintInfo &Info) const {
2550 if (strchr("adzDWeABbvfcCtukxywZY", Name[0])) {
2551 Info.setAllowsRegister();
2557 virtual const char *getClobbers() const {
2561 virtual const char *getVAListDeclaration() const {
2562 return "typedef char* __builtin_va_list;";
2566 const char * const BlackfinTargetInfo::GCCRegNames[] = {
2567 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2568 "p0", "p1", "p2", "p3", "p4", "p5", "sp", "fp",
2569 "i0", "i1", "i2", "i3", "b0", "b1", "b2", "b3",
2570 "l0", "l1", "l2", "l3", "m0", "m1", "m2", "m3",
2572 "rets", "reti", "retx", "retn", "rete", "astat", "seqstat", "usp",
2573 "argp", "lt0", "lt1", "lc0", "lc1", "lb0", "lb1"
2576 void BlackfinTargetInfo::getGCCRegNames(const char * const *&Names,
2577 unsigned &NumNames) const {
2578 Names = GCCRegNames;
2579 NumNames = llvm::array_lengthof(GCCRegNames);
2585 // LLVM and Clang cannot be used directly to output native binaries for
2586 // target, but is used to compile C code to llvm bitcode with correct
2587 // type and alignment information.
2589 // TCE uses the llvm bitcode as input and uses it for generating customized
2590 // target processor and program binary. TCE co-design environment is
2591 // publicly available in http://tce.cs.tut.fi
2593 class TCETargetInfo : public TargetInfo{
2595 TCETargetInfo(const std::string& triple) : TargetInfo(triple) {
2596 TLSSupported = false;
2598 LongWidth = LongLongWidth = 32;
2601 LongAlign = LongLongAlign = 32;
2603 SizeType = UnsignedInt;
2604 IntMaxType = SignedLong;
2605 UIntMaxType = UnsignedLong;
2606 IntPtrType = SignedInt;
2607 PtrDiffType = SignedInt;
2612 LongDoubleWidth = 32;
2613 LongDoubleAlign = 32;
2614 FloatFormat = &llvm::APFloat::IEEEsingle;
2615 DoubleFormat = &llvm::APFloat::IEEEsingle;
2616 LongDoubleFormat = &llvm::APFloat::IEEEsingle;
2617 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-"
2618 "i16:16:32-i32:32:32-i64:32:32-"
2619 "f32:32:32-f64:32:32-v64:32:32-"
2620 "v128:32:32-a0:0:32-n32";
2623 virtual void getTargetDefines(const LangOptions &Opts,
2624 MacroBuilder &Builder) const {
2625 DefineStd(Builder, "tce", Opts);
2626 Builder.defineMacro("__TCE__");
2627 Builder.defineMacro("__TCE_V1__");
2629 virtual void getTargetBuiltins(const Builtin::Info *&Records,
2630 unsigned &NumRecords) const {}
2631 virtual const char *getClobbers() const {
2634 virtual const char *getVAListDeclaration() const {
2635 return "typedef void* __builtin_va_list;";
2637 virtual void getGCCRegNames(const char * const *&Names,
2638 unsigned &NumNames) const {}
2639 virtual bool validateAsmConstraint(const char *&Name,
2640 TargetInfo::ConstraintInfo &info) const {
2643 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2644 unsigned &NumAliases) const {}
2649 class MipsTargetInfo : public TargetInfo {
2650 std::string ABI, CPU;
2651 static const TargetInfo::GCCRegAlias GCCRegAliases[];
2652 static const char * const GCCRegNames[];
2654 MipsTargetInfo(const std::string& triple) : TargetInfo(triple), ABI("o32") {
2655 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
2656 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
2657 SizeType = UnsignedInt;
2658 PtrDiffType = SignedInt;
2660 virtual const char *getABI() const { return ABI.c_str(); }
2661 virtual bool setABI(const std::string &Name) {
2663 if ((Name == "o32") || (Name == "eabi")) {
2669 virtual bool setCPU(const std::string &Name) {
2673 void getDefaultFeatures(const std::string &CPU,
2674 llvm::StringMap<bool> &Features) const {
2675 Features[ABI] = true;
2676 Features[CPU] = true;
2678 virtual void getArchDefines(const LangOptions &Opts,
2679 MacroBuilder &Builder) const {
2681 Builder.defineMacro("__mips_o32");
2682 else if (ABI == "eabi")
2683 Builder.defineMacro("__mips_eabi");
2685 virtual void getTargetDefines(const LangOptions &Opts,
2686 MacroBuilder &Builder) const {
2687 DefineStd(Builder, "mips", Opts);
2688 Builder.defineMacro("_mips");
2689 DefineStd(Builder, "MIPSEB", Opts);
2690 Builder.defineMacro("_MIPSEB");
2691 Builder.defineMacro("__REGISTER_PREFIX__", "");
2692 getArchDefines(Opts, Builder);
2694 virtual void getTargetBuiltins(const Builtin::Info *&Records,
2695 unsigned &NumRecords) const {
2696 // FIXME: Implement!
2698 virtual const char *getVAListDeclaration() const {
2699 return "typedef void* __builtin_va_list;";
2701 virtual void getGCCRegNames(const char * const *&Names,
2702 unsigned &NumNames) const;
2703 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2704 unsigned &NumAliases) const;
2705 virtual bool validateAsmConstraint(const char *&Name,
2706 TargetInfo::ConstraintInfo &Info) const {
2709 case 'r': // CPU registers.
2710 case 'd': // Equivalent to "r" unless generating MIPS16 code.
2711 case 'y': // Equivalent to "r", backwards compatibility only.
2712 case 'f': // floating-point registers.
2713 Info.setAllowsRegister();
2719 virtual const char *getClobbers() const {
2720 // FIXME: Implement!
2725 const char * const MipsTargetInfo::GCCRegNames[] = {
2726 "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7",
2727 "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15",
2728 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23",
2729 "$24", "$25", "$26", "$27", "$28", "$sp", "$fp", "$31",
2730 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7",
2731 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
2732 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
2733 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
2734 "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
2735 "$fcc5","$fcc6","$fcc7"
2738 void MipsTargetInfo::getGCCRegNames(const char * const *&Names,
2739 unsigned &NumNames) const {
2740 Names = GCCRegNames;
2741 NumNames = llvm::array_lengthof(GCCRegNames);
2744 const TargetInfo::GCCRegAlias MipsTargetInfo::GCCRegAliases[] = {
2754 { { "t2" }, "$10" },
2755 { { "t3" }, "$11" },
2756 { { "t4" }, "$12" },
2757 { { "t5" }, "$13" },
2758 { { "t6" }, "$14" },
2759 { { "t7" }, "$15" },
2760 { { "s0" }, "$16" },
2761 { { "s1" }, "$17" },
2762 { { "s2" }, "$18" },
2763 { { "s3" }, "$19" },
2764 { { "s4" }, "$20" },
2765 { { "s5" }, "$21" },
2766 { { "s6" }, "$22" },
2767 { { "s7" }, "$23" },
2768 { { "t8" }, "$24" },
2769 { { "t9" }, "$25" },
2770 { { "k0" }, "$26" },
2771 { { "k1" }, "$27" },
2772 { { "gp" }, "$28" },
2773 { { "sp" }, "$29" },
2774 { { "fp" }, "$30" },
2778 void MipsTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
2779 unsigned &NumAliases) const {
2780 Aliases = GCCRegAliases;
2781 NumAliases = llvm::array_lengthof(GCCRegAliases);
2783 } // end anonymous namespace.
2786 class MipselTargetInfo : public MipsTargetInfo {
2788 MipselTargetInfo(const std::string& triple) : MipsTargetInfo(triple) {
2789 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
2790 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
2793 virtual void getTargetDefines(const LangOptions &Opts,
2794 MacroBuilder &Builder) const;
2797 void MipselTargetInfo::getTargetDefines(const LangOptions &Opts,
2798 MacroBuilder &Builder) const {
2799 DefineStd(Builder, "mips", Opts);
2800 Builder.defineMacro("_mips");
2801 DefineStd(Builder, "MIPSEL", Opts);
2802 Builder.defineMacro("_MIPSEL");
2803 Builder.defineMacro("__REGISTER_PREFIX__", "");
2804 getArchDefines(Opts, Builder);
2806 } // end anonymous namespace.
2808 //===----------------------------------------------------------------------===//
2810 //===----------------------------------------------------------------------===//
2812 static TargetInfo *AllocateTarget(const std::string &T) {
2813 llvm::Triple Triple(T);
2814 llvm::Triple::OSType os = Triple.getOS();
2816 switch (Triple.getArch()) {
2820 case llvm::Triple::arm:
2821 case llvm::Triple::thumb:
2822 if (Triple.isOSDarwin())
2823 return new DarwinARMTargetInfo(T);
2826 case llvm::Triple::Linux:
2827 return new LinuxTargetInfo<ARMTargetInfo>(T);
2828 case llvm::Triple::FreeBSD:
2829 return new FreeBSDTargetInfo<ARMTargetInfo>(T);
2830 case llvm::Triple::NetBSD:
2831 return new NetBSDTargetInfo<ARMTargetInfo>(T);
2832 case llvm::Triple::RTEMS:
2833 return new RTEMSTargetInfo<ARMTargetInfo>(T);
2835 return new ARMTargetInfo(T);
2838 case llvm::Triple::bfin:
2839 if ( os == llvm::Triple::RTEMS )
2840 return new RTEMSTargetInfo<BlackfinTargetInfo>(T);
2841 return new BlackfinTargetInfo(T);
2843 case llvm::Triple::msp430:
2844 return new MSP430TargetInfo(T);
2846 case llvm::Triple::mips:
2848 case llvm::Triple::Psp:
2849 return new PSPTargetInfo<MipsTargetInfo>(T);
2850 case llvm::Triple::Linux:
2851 return new LinuxTargetInfo<MipsTargetInfo>(T);
2852 case llvm::Triple::RTEMS:
2853 return new RTEMSTargetInfo<MipsTargetInfo>(T);
2854 case llvm::Triple::FreeBSD:
2855 return new FreeBSDTargetInfo<MipsTargetInfo>(T);
2856 case llvm::Triple::NetBSD:
2857 return new NetBSDTargetInfo<MipsTargetInfo>(T);
2859 return new MipsTargetInfo(T);
2862 case llvm::Triple::mipsel:
2864 case llvm::Triple::Psp:
2865 return new PSPTargetInfo<MipselTargetInfo>(T);
2866 case llvm::Triple::Linux:
2867 return new LinuxTargetInfo<MipselTargetInfo>(T);
2868 case llvm::Triple::RTEMS:
2869 return new RTEMSTargetInfo<MipselTargetInfo>(T);
2870 case llvm::Triple::FreeBSD:
2871 return new FreeBSDTargetInfo<MipselTargetInfo>(T);
2872 case llvm::Triple::NetBSD:
2873 return new NetBSDTargetInfo<MipselTargetInfo>(T);
2875 return new MipsTargetInfo(T);
2878 case llvm::Triple::ppc:
2879 if (Triple.isOSDarwin())
2880 return new DarwinPPC32TargetInfo(T);
2882 case llvm::Triple::FreeBSD:
2883 return new FreeBSDTargetInfo<PPC32TargetInfo>(T);
2884 case llvm::Triple::NetBSD:
2885 return new NetBSDTargetInfo<PPC32TargetInfo>(T);
2886 case llvm::Triple::RTEMS:
2887 return new RTEMSTargetInfo<PPC32TargetInfo>(T);
2889 return new PPC32TargetInfo(T);
2892 case llvm::Triple::ppc64:
2893 if (Triple.isOSDarwin())
2894 return new DarwinPPC64TargetInfo(T);
2896 case llvm::Triple::Lv2:
2897 return new PS3PPUTargetInfo<PPC64TargetInfo>(T);
2898 case llvm::Triple::FreeBSD:
2899 return new FreeBSDTargetInfo<PPC64TargetInfo>(T);
2900 case llvm::Triple::NetBSD:
2901 return new NetBSDTargetInfo<PPC64TargetInfo>(T);
2903 return new PPC64TargetInfo(T);
2906 case llvm::Triple::ptx32:
2907 return new PTX32TargetInfo(T);
2908 case llvm::Triple::ptx64:
2909 return new PTX64TargetInfo(T);
2911 case llvm::Triple::mblaze:
2912 return new MBlazeTargetInfo(T);
2914 case llvm::Triple::sparc:
2916 case llvm::Triple::AuroraUX:
2917 return new AuroraUXSparcV8TargetInfo(T);
2918 case llvm::Triple::Solaris:
2919 return new SolarisSparcV8TargetInfo(T);
2920 case llvm::Triple::NetBSD:
2921 return new NetBSDTargetInfo<SparcV8TargetInfo>(T);
2922 case llvm::Triple::RTEMS:
2923 return new RTEMSTargetInfo<SparcV8TargetInfo>(T);
2925 return new SparcV8TargetInfo(T);
2928 // FIXME: Need a real SPU target.
2929 case llvm::Triple::cellspu:
2930 return new PS3SPUTargetInfo<PPC64TargetInfo>(T);
2932 case llvm::Triple::systemz:
2933 return new SystemZTargetInfo(T);
2935 case llvm::Triple::tce:
2936 return new TCETargetInfo(T);
2938 case llvm::Triple::x86:
2939 if (Triple.isOSDarwin())
2940 return new DarwinI386TargetInfo(T);
2943 case llvm::Triple::AuroraUX:
2944 return new AuroraUXTargetInfo<X86_32TargetInfo>(T);
2945 case llvm::Triple::Linux:
2946 return new LinuxTargetInfo<X86_32TargetInfo>(T);
2947 case llvm::Triple::DragonFly:
2948 return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T);
2949 case llvm::Triple::NetBSD:
2950 return new NetBSDTargetInfo<X86_32TargetInfo>(T);
2951 case llvm::Triple::OpenBSD:
2952 return new OpenBSDI386TargetInfo(T);
2953 case llvm::Triple::FreeBSD:
2954 return new FreeBSDTargetInfo<X86_32TargetInfo>(T);
2955 case llvm::Triple::Minix:
2956 return new MinixTargetInfo<X86_32TargetInfo>(T);
2957 case llvm::Triple::Solaris:
2958 return new SolarisTargetInfo<X86_32TargetInfo>(T);
2959 case llvm::Triple::Cygwin:
2960 return new CygwinX86_32TargetInfo(T);
2961 case llvm::Triple::MinGW32:
2962 return new MinGWX86_32TargetInfo(T);
2963 case llvm::Triple::Win32:
2964 return new VisualStudioWindowsX86_32TargetInfo(T);
2965 case llvm::Triple::Haiku:
2966 return new HaikuX86_32TargetInfo(T);
2967 case llvm::Triple::RTEMS:
2968 return new RTEMSX86_32TargetInfo(T);
2970 return new X86_32TargetInfo(T);
2973 case llvm::Triple::x86_64:
2974 if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO)
2975 return new DarwinX86_64TargetInfo(T);
2978 case llvm::Triple::AuroraUX:
2979 return new AuroraUXTargetInfo<X86_64TargetInfo>(T);
2980 case llvm::Triple::Linux:
2981 return new LinuxTargetInfo<X86_64TargetInfo>(T);
2982 case llvm::Triple::DragonFly:
2983 return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T);
2984 case llvm::Triple::NetBSD:
2985 return new NetBSDTargetInfo<X86_64TargetInfo>(T);
2986 case llvm::Triple::OpenBSD:
2987 return new OpenBSDX86_64TargetInfo(T);
2988 case llvm::Triple::FreeBSD:
2989 return new FreeBSDTargetInfo<X86_64TargetInfo>(T);
2990 case llvm::Triple::Solaris:
2991 return new SolarisTargetInfo<X86_64TargetInfo>(T);
2992 case llvm::Triple::MinGW32:
2993 return new MinGWX86_64TargetInfo(T);
2994 case llvm::Triple::Win32: // This is what Triple.h supports now.
2995 return new VisualStudioWindowsX86_64TargetInfo(T);
2997 return new X86_64TargetInfo(T);
3002 /// CreateTargetInfo - Return the target info object for the specified target
3004 TargetInfo *TargetInfo::CreateTargetInfo(Diagnostic &Diags,
3005 TargetOptions &Opts) {
3006 llvm::Triple Triple(Opts.Triple);
3008 // Construct the target
3009 llvm::OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str()));
3011 Diags.Report(diag::err_target_unknown_triple) << Triple.str();
3015 // Set the target CPU if specified.
3016 if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) {
3017 Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU;
3021 // Set the target ABI if specified.
3022 if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) {
3023 Diags.Report(diag::err_target_unknown_abi) << Opts.ABI;
3027 // Set the target C++ ABI.
3028 if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) {
3029 Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI;
3033 // Compute the default target features, we need the target to handle this
3034 // because features may have dependencies on one another.
3035 llvm::StringMap<bool> Features;
3036 Target->getDefaultFeatures(Opts.CPU, Features);
3038 // Apply the user specified deltas.
3039 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(),
3040 ie = Opts.Features.end(); it != ie; ++it) {
3041 const char *Name = it->c_str();
3043 // Apply the feature via the target.
3044 if ((Name[0] != '-' && Name[0] != '+') ||
3045 !Target->setFeatureEnabled(Features, Name + 1, (Name[0] == '+'))) {
3046 Diags.Report(diag::err_target_invalid_feature) << Name;
3051 // Add the features to the compile options.
3053 // FIXME: If we are completely confident that we have the right set, we only
3054 // need to pass the minuses.
3055 Opts.Features.clear();
3056 for (llvm::StringMap<bool>::const_iterator it = Features.begin(),
3057 ie = Features.end(); it != ie; ++it)
3058 Opts.Features.push_back(std::string(it->second ? "+" : "-") +
3060 Target->HandleTargetFeatures(Opts.Features);
3062 return Target.take();