1 //===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // These classes wrap the information about a call or function
11 // definition used to handle ABI compliancy.
13 //===----------------------------------------------------------------------===//
15 #include "TargetInfo.h"
17 #include "CodeGenFunction.h"
18 #include "clang/AST/RecordLayout.h"
19 #include "clang/Frontend/CodeGenOptions.h"
20 #include "llvm/Type.h"
21 #include "llvm/Target/TargetData.h"
22 #include "llvm/ADT/Triple.h"
23 #include "llvm/Support/raw_ostream.h"
24 using namespace clang;
25 using namespace CodeGen;
27 static void AssignToArrayRange(CodeGen::CGBuilderTy &Builder,
32 // Alternatively, we could emit this as a loop in the source.
33 for (unsigned I = FirstIndex; I <= LastIndex; ++I) {
34 llvm::Value *Cell = Builder.CreateConstInBoundsGEP1_32(Array, I);
35 Builder.CreateStore(Value, Cell);
39 static bool isAggregateTypeForABI(QualType T) {
40 return CodeGenFunction::hasAggregateLLVMType(T) ||
41 T->isMemberFunctionPointerType();
44 ABIInfo::~ABIInfo() {}
46 ASTContext &ABIInfo::getContext() const {
47 return CGT.getContext();
50 llvm::LLVMContext &ABIInfo::getVMContext() const {
51 return CGT.getLLVMContext();
54 const llvm::TargetData &ABIInfo::getTargetData() const {
55 return CGT.getTargetData();
59 void ABIArgInfo::dump() const {
60 llvm::raw_ostream &OS = llvm::errs();
61 OS << "(ABIArgInfo Kind=";
65 if (const llvm::Type *Ty = getCoerceToType())
77 OS << "Indirect Align=" << getIndirectAlign()
78 << " ByVal=" << getIndirectByVal()
79 << " Realign=" << getIndirectRealign();
88 TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; }
90 static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays);
92 /// isEmptyField - Return true iff a the field is "empty", that is it
93 /// is an unnamed bit-field or an (array of) empty record(s).
94 static bool isEmptyField(ASTContext &Context, const FieldDecl *FD,
96 if (FD->isUnnamedBitfield())
99 QualType FT = FD->getType();
101 // Constant arrays of empty records count as empty, strip them off.
103 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT))
104 FT = AT->getElementType();
106 const RecordType *RT = FT->getAs<RecordType>();
110 // C++ record fields are never empty, at least in the Itanium ABI.
112 // FIXME: We should use a predicate for whether this behavior is true in the
114 if (isa<CXXRecordDecl>(RT->getDecl()))
117 return isEmptyRecord(Context, FT, AllowArrays);
120 /// isEmptyRecord - Return true iff a structure contains only empty
121 /// fields. Note that a structure with a flexible array member is not
122 /// considered empty.
123 static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) {
124 const RecordType *RT = T->getAs<RecordType>();
127 const RecordDecl *RD = RT->getDecl();
128 if (RD->hasFlexibleArrayMember())
131 // If this is a C++ record, check the bases first.
132 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD))
133 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(),
134 e = CXXRD->bases_end(); i != e; ++i)
135 if (!isEmptyRecord(Context, i->getType(), true))
138 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
140 if (!isEmptyField(Context, *i, AllowArrays))
145 /// hasNonTrivialDestructorOrCopyConstructor - Determine if a type has either
146 /// a non-trivial destructor or a non-trivial copy constructor.
147 static bool hasNonTrivialDestructorOrCopyConstructor(const RecordType *RT) {
148 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl());
152 return !RD->hasTrivialDestructor() || !RD->hasTrivialCopyConstructor();
155 /// isRecordWithNonTrivialDestructorOrCopyConstructor - Determine if a type is
156 /// a record type with either a non-trivial destructor or a non-trivial copy
158 static bool isRecordWithNonTrivialDestructorOrCopyConstructor(QualType T) {
159 const RecordType *RT = T->getAs<RecordType>();
163 return hasNonTrivialDestructorOrCopyConstructor(RT);
166 /// isSingleElementStruct - Determine if a structure is a "single
167 /// element struct", i.e. it has exactly one non-empty field or
168 /// exactly one field which is itself a single element
169 /// struct. Structures with flexible array members are never
170 /// considered single element structs.
172 /// \return The field declaration for the single non-empty field, if
174 static const Type *isSingleElementStruct(QualType T, ASTContext &Context) {
175 const RecordType *RT = T->getAsStructureType();
179 const RecordDecl *RD = RT->getDecl();
180 if (RD->hasFlexibleArrayMember())
183 const Type *Found = 0;
185 // If this is a C++ record, check the bases first.
186 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) {
187 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(),
188 e = CXXRD->bases_end(); i != e; ++i) {
189 // Ignore empty records.
190 if (isEmptyRecord(Context, i->getType(), true))
193 // If we already found an element then this isn't a single-element struct.
197 // If this is non-empty and not a single element struct, the composite
198 // cannot be a single element struct.
199 Found = isSingleElementStruct(i->getType(), Context);
205 // Check for single element.
206 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
208 const FieldDecl *FD = *i;
209 QualType FT = FD->getType();
211 // Ignore empty fields.
212 if (isEmptyField(Context, FD, true))
215 // If we already found an element then this isn't a single-element
220 // Treat single element arrays as the element.
221 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) {
222 if (AT->getSize().getZExtValue() != 1)
224 FT = AT->getElementType();
227 if (!isAggregateTypeForABI(FT)) {
228 Found = FT.getTypePtr();
230 Found = isSingleElementStruct(FT, Context);
239 static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) {
240 if (!Ty->getAs<BuiltinType>() && !Ty->hasPointerRepresentation() &&
241 !Ty->isAnyComplexType() && !Ty->isEnumeralType() &&
242 !Ty->isBlockPointerType())
245 uint64_t Size = Context.getTypeSize(Ty);
246 return Size == 32 || Size == 64;
249 /// canExpandIndirectArgument - Test whether an argument type which is to be
250 /// passed indirectly (on the stack) would have the equivalent layout if it was
251 /// expanded into separate arguments. If so, we prefer to do the latter to avoid
252 /// inhibiting optimizations.
254 // FIXME: This predicate is missing many cases, currently it just follows
255 // llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We
256 // should probably make this smarter, or better yet make the LLVM backend
257 // capable of handling it.
258 static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) {
259 // We can only expand structure types.
260 const RecordType *RT = Ty->getAs<RecordType>();
264 // We can only expand (C) structures.
266 // FIXME: This needs to be generalized to handle classes as well.
267 const RecordDecl *RD = RT->getDecl();
268 if (!RD->isStruct() || isa<CXXRecordDecl>(RD))
271 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
273 const FieldDecl *FD = *i;
275 if (!is32Or64BitBasicType(FD->getType(), Context))
278 // FIXME: Reject bit-fields wholesale; there are two problems, we don't know
279 // how to expand them yet, and the predicate for telling if a bitfield still
280 // counts as "basic" is more complicated than what we were doing previously.
281 if (FD->isBitField())
289 /// DefaultABIInfo - The default implementation for ABI specific
290 /// details. This implementation provides information which results in
291 /// self-consistent and sensible LLVM IR generation, but does not
292 /// conform to any particular ABI.
293 class DefaultABIInfo : public ABIInfo {
295 DefaultABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {}
297 ABIArgInfo classifyReturnType(QualType RetTy) const;
298 ABIArgInfo classifyArgumentType(QualType RetTy) const;
300 virtual void computeInfo(CGFunctionInfo &FI) const {
301 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
302 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
304 it->info = classifyArgumentType(it->type);
307 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
308 CodeGenFunction &CGF) const;
311 class DefaultTargetCodeGenInfo : public TargetCodeGenInfo {
313 DefaultTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT)
314 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {}
317 llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
318 CodeGenFunction &CGF) const {
322 ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const {
323 if (isAggregateTypeForABI(Ty))
324 return ABIArgInfo::getIndirect(0);
326 // Treat an enum type as its underlying type.
327 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
328 Ty = EnumTy->getDecl()->getIntegerType();
330 return (Ty->isPromotableIntegerType() ?
331 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
334 ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy) const {
335 if (RetTy->isVoidType())
336 return ABIArgInfo::getIgnore();
338 if (isAggregateTypeForABI(RetTy))
339 return ABIArgInfo::getIndirect(0);
341 // Treat an enum type as its underlying type.
342 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
343 RetTy = EnumTy->getDecl()->getIntegerType();
345 return (RetTy->isPromotableIntegerType() ?
346 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
349 /// UseX86_MMXType - Return true if this is an MMX type that should use the special
351 bool UseX86_MMXType(const llvm::Type *IRType) {
352 // If the type is an MMX type <2 x i32>, <4 x i16>, or <8 x i8>, use the
353 // special x86_mmx type.
354 return IRType->isVectorTy() && IRType->getPrimitiveSizeInBits() == 64 &&
355 cast<llvm::VectorType>(IRType)->getElementType()->isIntegerTy() &&
356 IRType->getScalarSizeInBits() != 64;
359 static llvm::Type* X86AdjustInlineAsmType(CodeGen::CodeGenFunction &CGF,
360 llvm::StringRef Constraint,
362 if ((Constraint == "y" || Constraint == "&y") && Ty->isVectorTy())
363 return llvm::Type::getX86_MMXTy(CGF.getLLVMContext());
367 //===----------------------------------------------------------------------===//
368 // X86-32 ABI Implementation
369 //===----------------------------------------------------------------------===//
371 /// X86_32ABIInfo - The X86-32 ABI information.
372 class X86_32ABIInfo : public ABIInfo {
373 static const unsigned MinABIStackAlignInBytes = 4;
375 bool IsDarwinVectorABI;
376 bool IsSmallStructInRegABI;
379 static bool isRegisterSize(unsigned Size) {
380 return (Size == 8 || Size == 16 || Size == 32 || Size == 64);
383 static bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context);
385 /// getIndirectResult - Give a source type \arg Ty, return a suitable result
386 /// such that the argument will be passed in memory.
387 ABIArgInfo getIndirectResult(QualType Ty, bool ByVal = true) const;
389 /// \brief Return the alignment to use for the given type on the stack.
390 unsigned getTypeStackAlignInBytes(QualType Ty, unsigned Align) const;
394 ABIArgInfo classifyReturnType(QualType RetTy) const;
395 ABIArgInfo classifyArgumentType(QualType RetTy) const;
397 virtual void computeInfo(CGFunctionInfo &FI) const {
398 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
399 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
401 it->info = classifyArgumentType(it->type);
404 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
405 CodeGenFunction &CGF) const;
407 X86_32ABIInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p, bool m)
408 : ABIInfo(CGT), IsDarwinVectorABI(d), IsSmallStructInRegABI(p),
412 class X86_32TargetCodeGenInfo : public TargetCodeGenInfo {
414 X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p, bool m)
415 :TargetCodeGenInfo(new X86_32ABIInfo(CGT, d, p, m)) {}
417 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
418 CodeGen::CodeGenModule &CGM) const;
420 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const {
421 // Darwin uses different dwarf register numbers for EH.
422 if (CGM.isTargetDarwin()) return 5;
427 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
428 llvm::Value *Address) const;
430 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF,
431 llvm::StringRef Constraint,
432 llvm::Type* Ty) const {
433 return X86AdjustInlineAsmType(CGF, Constraint, Ty);
440 /// shouldReturnTypeInRegister - Determine if the given type should be
441 /// passed in a register (for the Darwin ABI).
442 bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty,
443 ASTContext &Context) {
444 uint64_t Size = Context.getTypeSize(Ty);
446 // Type must be register sized.
447 if (!isRegisterSize(Size))
450 if (Ty->isVectorType()) {
451 // 64- and 128- bit vectors inside structures are not returned in
453 if (Size == 64 || Size == 128)
459 // If this is a builtin, pointer, enum, complex type, member pointer, or
460 // member function pointer it is ok.
461 if (Ty->getAs<BuiltinType>() || Ty->hasPointerRepresentation() ||
462 Ty->isAnyComplexType() || Ty->isEnumeralType() ||
463 Ty->isBlockPointerType() || Ty->isMemberPointerType())
466 // Arrays are treated like records.
467 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty))
468 return shouldReturnTypeInRegister(AT->getElementType(), Context);
470 // Otherwise, it must be a record type.
471 const RecordType *RT = Ty->getAs<RecordType>();
472 if (!RT) return false;
474 // FIXME: Traverse bases here too.
476 // Structure types are passed in register if all fields would be
477 // passed in a register.
478 for (RecordDecl::field_iterator i = RT->getDecl()->field_begin(),
479 e = RT->getDecl()->field_end(); i != e; ++i) {
480 const FieldDecl *FD = *i;
482 // Empty fields are ignored.
483 if (isEmptyField(Context, FD, true))
486 // Check fields recursively.
487 if (!shouldReturnTypeInRegister(FD->getType(), Context))
494 ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy) const {
495 if (RetTy->isVoidType())
496 return ABIArgInfo::getIgnore();
498 if (const VectorType *VT = RetTy->getAs<VectorType>()) {
499 // On Darwin, some vectors are returned in registers.
500 if (IsDarwinVectorABI) {
501 uint64_t Size = getContext().getTypeSize(RetTy);
503 // 128-bit vectors are a special case; they are returned in
504 // registers and we need to make sure to pick a type the LLVM
505 // backend will like.
507 return ABIArgInfo::getDirect(llvm::VectorType::get(
508 llvm::Type::getInt64Ty(getVMContext()), 2));
510 // Always return in register if it fits in a general purpose
511 // register, or if it is 64 bits and has a single element.
512 if ((Size == 8 || Size == 16 || Size == 32) ||
513 (Size == 64 && VT->getNumElements() == 1))
514 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
517 return ABIArgInfo::getIndirect(0);
520 return ABIArgInfo::getDirect();
523 if (isAggregateTypeForABI(RetTy)) {
524 if (const RecordType *RT = RetTy->getAs<RecordType>()) {
525 // Structures with either a non-trivial destructor or a non-trivial
526 // copy constructor are always indirect.
527 if (hasNonTrivialDestructorOrCopyConstructor(RT))
528 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
530 // Structures with flexible arrays are always indirect.
531 if (RT->getDecl()->hasFlexibleArrayMember())
532 return ABIArgInfo::getIndirect(0);
535 // If specified, structs and unions are always indirect.
536 if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType())
537 return ABIArgInfo::getIndirect(0);
539 // Classify "single element" structs as their element type.
540 if (const Type *SeltTy = isSingleElementStruct(RetTy, getContext())) {
541 if (const BuiltinType *BT = SeltTy->getAs<BuiltinType>()) {
542 if (BT->isIntegerType()) {
543 // We need to use the size of the structure, padding
544 // bit-fields can adjust that to be larger than the single
546 uint64_t Size = getContext().getTypeSize(RetTy);
547 return ABIArgInfo::getDirect(
548 llvm::IntegerType::get(getVMContext(), (unsigned)Size));
551 if (BT->getKind() == BuiltinType::Float) {
552 assert(getContext().getTypeSize(RetTy) ==
553 getContext().getTypeSize(SeltTy) &&
554 "Unexpect single element structure size!");
555 return ABIArgInfo::getDirect(llvm::Type::getFloatTy(getVMContext()));
558 if (BT->getKind() == BuiltinType::Double) {
559 assert(getContext().getTypeSize(RetTy) ==
560 getContext().getTypeSize(SeltTy) &&
561 "Unexpect single element structure size!");
562 return ABIArgInfo::getDirect(llvm::Type::getDoubleTy(getVMContext()));
564 } else if (SeltTy->isPointerType()) {
565 // FIXME: It would be really nice if this could come out as the proper
567 llvm::Type *PtrTy = llvm::Type::getInt8PtrTy(getVMContext());
568 return ABIArgInfo::getDirect(PtrTy);
569 } else if (SeltTy->isVectorType()) {
570 // 64- and 128-bit vectors are never returned in a
571 // register when inside a structure.
572 uint64_t Size = getContext().getTypeSize(RetTy);
573 if (Size == 64 || Size == 128)
574 return ABIArgInfo::getIndirect(0);
576 return classifyReturnType(QualType(SeltTy, 0));
580 // Small structures which are register sized are generally returned
582 if (X86_32ABIInfo::shouldReturnTypeInRegister(RetTy, getContext())) {
583 uint64_t Size = getContext().getTypeSize(RetTy);
584 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),Size));
587 return ABIArgInfo::getIndirect(0);
590 // Treat an enum type as its underlying type.
591 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
592 RetTy = EnumTy->getDecl()->getIntegerType();
594 return (RetTy->isPromotableIntegerType() ?
595 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
598 static bool isRecordWithSSEVectorType(ASTContext &Context, QualType Ty) {
599 const RecordType *RT = Ty->getAs<RecordType>();
602 const RecordDecl *RD = RT->getDecl();
604 // If this is a C++ record, check the bases first.
605 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD))
606 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(),
607 e = CXXRD->bases_end(); i != e; ++i)
608 if (!isRecordWithSSEVectorType(Context, i->getType()))
611 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
613 QualType FT = i->getType();
615 if (FT->getAs<VectorType>() && Context.getTypeSize(Ty) == 128)
618 if (isRecordWithSSEVectorType(Context, FT))
625 unsigned X86_32ABIInfo::getTypeStackAlignInBytes(QualType Ty,
626 unsigned Align) const {
627 // Otherwise, if the alignment is less than or equal to the minimum ABI
628 // alignment, just use the default; the backend will handle this.
629 if (Align <= MinABIStackAlignInBytes)
630 return 0; // Use default alignment.
632 // On non-Darwin, the stack type alignment is always 4.
633 if (!IsDarwinVectorABI) {
634 // Set explicit alignment, since we may need to realign the top.
635 return MinABIStackAlignInBytes;
638 // Otherwise, if the type contains an SSE vector type, the alignment is 16.
639 if (isRecordWithSSEVectorType(getContext(), Ty))
642 return MinABIStackAlignInBytes;
645 ABIArgInfo X86_32ABIInfo::getIndirectResult(QualType Ty, bool ByVal) const {
647 return ABIArgInfo::getIndirect(0, false);
649 // Compute the byval alignment.
650 unsigned TypeAlign = getContext().getTypeAlign(Ty) / 8;
651 unsigned StackAlign = getTypeStackAlignInBytes(Ty, TypeAlign);
653 return ABIArgInfo::getIndirect(4);
655 // If the stack alignment is less than the type alignment, realign the
657 if (StackAlign < TypeAlign)
658 return ABIArgInfo::getIndirect(StackAlign, /*ByVal=*/true,
661 return ABIArgInfo::getIndirect(StackAlign);
664 ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty) const {
665 // FIXME: Set alignment on indirect arguments.
666 if (isAggregateTypeForABI(Ty)) {
667 // Structures with flexible arrays are always indirect.
668 if (const RecordType *RT = Ty->getAs<RecordType>()) {
669 // Structures with either a non-trivial destructor or a non-trivial
670 // copy constructor are always indirect.
671 if (hasNonTrivialDestructorOrCopyConstructor(RT))
672 return getIndirectResult(Ty, /*ByVal=*/false);
674 if (RT->getDecl()->hasFlexibleArrayMember())
675 return getIndirectResult(Ty);
678 // Ignore empty structs.
679 if (Ty->isStructureType() && getContext().getTypeSize(Ty) == 0)
680 return ABIArgInfo::getIgnore();
682 // Expand small (<= 128-bit) record types when we know that the stack layout
683 // of those arguments will match the struct. This is important because the
684 // LLVM backend isn't smart enough to remove byval, which inhibits many
686 if (getContext().getTypeSize(Ty) <= 4*32 &&
687 canExpandIndirectArgument(Ty, getContext()))
688 return ABIArgInfo::getExpand();
690 return getIndirectResult(Ty);
693 if (const VectorType *VT = Ty->getAs<VectorType>()) {
694 // On Darwin, some vectors are passed in memory, we handle this by passing
695 // it as an i8/i16/i32/i64.
696 if (IsDarwinVectorABI) {
697 uint64_t Size = getContext().getTypeSize(Ty);
698 if ((Size == 8 || Size == 16 || Size == 32) ||
699 (Size == 64 && VT->getNumElements() == 1))
700 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
704 llvm::Type *IRType = CGT.ConvertType(Ty);
705 if (UseX86_MMXType(IRType)) {
707 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
709 ABIArgInfo AAI = ABIArgInfo::getDirect(IRType);
710 AAI.setCoerceToType(llvm::Type::getX86_MMXTy(getVMContext()));
714 return ABIArgInfo::getDirect();
718 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
719 Ty = EnumTy->getDecl()->getIntegerType();
721 return (Ty->isPromotableIntegerType() ?
722 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
725 llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
726 CodeGenFunction &CGF) const {
727 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext());
728 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP);
730 CGBuilderTy &Builder = CGF.Builder;
731 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP,
733 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
735 llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
736 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy);
739 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4);
740 llvm::Value *NextAddr =
741 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset),
743 Builder.CreateStore(NextAddr, VAListAddrAsBPP);
748 void X86_32TargetCodeGenInfo::SetTargetAttributes(const Decl *D,
749 llvm::GlobalValue *GV,
750 CodeGen::CodeGenModule &CGM) const {
751 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) {
752 if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) {
753 // Get the LLVM function.
754 llvm::Function *Fn = cast<llvm::Function>(GV);
756 // Now add the 'alignstack' attribute with a value of 16.
757 Fn->addFnAttr(llvm::Attribute::constructStackAlignmentFromInt(16));
762 bool X86_32TargetCodeGenInfo::initDwarfEHRegSizeTable(
763 CodeGen::CodeGenFunction &CGF,
764 llvm::Value *Address) const {
765 CodeGen::CGBuilderTy &Builder = CGF.Builder;
766 llvm::LLVMContext &Context = CGF.getLLVMContext();
768 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context);
769 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4);
771 // 0-7 are the eight integer registers; the order is different
772 // on Darwin (for EH), but the range is the same.
774 AssignToArrayRange(Builder, Address, Four8, 0, 8);
776 if (CGF.CGM.isTargetDarwin()) {
777 // 12-16 are st(0..4). Not sure why we stop at 4.
778 // These have size 16, which is sizeof(long double) on
779 // platforms with 8-byte alignment for that type.
780 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16);
781 AssignToArrayRange(Builder, Address, Sixteen8, 12, 16);
784 // 9 is %eflags, which doesn't get a size on Darwin for some
786 Builder.CreateStore(Four8, Builder.CreateConstInBoundsGEP1_32(Address, 9));
788 // 11-16 are st(0..5). Not sure why we stop at 5.
789 // These have size 12, which is sizeof(long double) on
790 // platforms with 4-byte alignment for that type.
791 llvm::Value *Twelve8 = llvm::ConstantInt::get(i8, 12);
792 AssignToArrayRange(Builder, Address, Twelve8, 11, 16);
798 //===----------------------------------------------------------------------===//
799 // X86-64 ABI Implementation
800 //===----------------------------------------------------------------------===//
804 /// X86_64ABIInfo - The X86_64 ABI information.
805 class X86_64ABIInfo : public ABIInfo {
817 /// merge - Implement the X86_64 ABI merging algorithm.
819 /// Merge an accumulating classification \arg Accum with a field
820 /// classification \arg Field.
822 /// \param Accum - The accumulating classification. This should
823 /// always be either NoClass or the result of a previous merge
824 /// call. In addition, this should never be Memory (the caller
825 /// should just return Memory for the aggregate).
826 static Class merge(Class Accum, Class Field);
828 /// postMerge - Implement the X86_64 ABI post merging algorithm.
830 /// Post merger cleanup, reduces a malformed Hi and Lo pair to
831 /// final MEMORY or SSE classes when necessary.
833 /// \param AggregateSize - The size of the current aggregate in
834 /// the classification process.
836 /// \param Lo - The classification for the parts of the type
837 /// residing in the low word of the containing object.
839 /// \param Hi - The classification for the parts of the type
840 /// residing in the higher words of the containing object.
842 void postMerge(unsigned AggregateSize, Class &Lo, Class &Hi) const;
844 /// classify - Determine the x86_64 register classes in which the
845 /// given type T should be passed.
847 /// \param Lo - The classification for the parts of the type
848 /// residing in the low word of the containing object.
850 /// \param Hi - The classification for the parts of the type
851 /// residing in the high word of the containing object.
853 /// \param OffsetBase - The bit offset of this type in the
854 /// containing object. Some parameters are classified different
855 /// depending on whether they straddle an eightbyte boundary.
857 /// If a word is unused its result will be NoClass; if a type should
858 /// be passed in Memory then at least the classification of \arg Lo
861 /// The \arg Lo class will be NoClass iff the argument is ignored.
863 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will
864 /// also be ComplexX87.
865 void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi) const;
867 llvm::Type *GetByteVectorType(QualType Ty) const;
868 llvm::Type *GetSSETypeAtOffset(llvm::Type *IRType,
869 unsigned IROffset, QualType SourceTy,
870 unsigned SourceOffset) const;
871 llvm::Type *GetINTEGERTypeAtOffset(llvm::Type *IRType,
872 unsigned IROffset, QualType SourceTy,
873 unsigned SourceOffset) const;
875 /// getIndirectResult - Give a source type \arg Ty, return a suitable result
876 /// such that the argument will be returned in memory.
877 ABIArgInfo getIndirectReturnResult(QualType Ty) const;
879 /// getIndirectResult - Give a source type \arg Ty, return a suitable result
880 /// such that the argument will be passed in memory.
881 ABIArgInfo getIndirectResult(QualType Ty) const;
883 ABIArgInfo classifyReturnType(QualType RetTy) const;
885 ABIArgInfo classifyArgumentType(QualType Ty,
887 unsigned &neededSSE) const;
889 /// The 0.98 ABI revision clarified a lot of ambiguities,
890 /// unfortunately in ways that were not always consistent with
891 /// certain previous compilers. In particular, platforms which
892 /// required strict binary compatibility with older versions of GCC
893 /// may need to exempt themselves.
894 bool honorsRevision0_98() const {
895 return !getContext().Target.getTriple().isOSDarwin();
899 X86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {}
901 virtual void computeInfo(CGFunctionInfo &FI) const;
903 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
904 CodeGenFunction &CGF) const;
907 /// WinX86_64ABIInfo - The Windows X86_64 ABI information.
908 class WinX86_64ABIInfo : public ABIInfo {
910 ABIArgInfo classify(QualType Ty) const;
913 WinX86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {}
915 virtual void computeInfo(CGFunctionInfo &FI) const;
917 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
918 CodeGenFunction &CGF) const;
921 class X86_64TargetCodeGenInfo : public TargetCodeGenInfo {
923 X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT)
924 : TargetCodeGenInfo(new X86_64ABIInfo(CGT)) {}
926 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const {
930 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
931 llvm::Value *Address) const {
932 CodeGen::CGBuilderTy &Builder = CGF.Builder;
933 llvm::LLVMContext &Context = CGF.getLLVMContext();
935 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context);
936 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8);
938 // 0-15 are the 16 integer registers.
940 AssignToArrayRange(Builder, Address, Eight8, 0, 16);
945 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF,
946 llvm::StringRef Constraint,
947 llvm::Type* Ty) const {
948 return X86AdjustInlineAsmType(CGF, Constraint, Ty);
953 class WinX86_64TargetCodeGenInfo : public TargetCodeGenInfo {
955 WinX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT)
956 : TargetCodeGenInfo(new WinX86_64ABIInfo(CGT)) {}
958 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const {
962 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
963 llvm::Value *Address) const {
964 CodeGen::CGBuilderTy &Builder = CGF.Builder;
965 llvm::LLVMContext &Context = CGF.getLLVMContext();
967 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context);
968 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8);
970 // 0-15 are the 16 integer registers.
972 AssignToArrayRange(Builder, Address, Eight8, 0, 16);
980 void X86_64ABIInfo::postMerge(unsigned AggregateSize, Class &Lo,
982 // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done:
984 // (a) If one of the classes is Memory, the whole argument is passed in
987 // (b) If X87UP is not preceded by X87, the whole argument is passed in
990 // (c) If the size of the aggregate exceeds two eightbytes and the first
991 // eightbyte isn't SSE or any other eightbyte isn't SSEUP, the whole
992 // argument is passed in memory. NOTE: This is necessary to keep the
993 // ABI working for processors that don't support the __m256 type.
995 // (d) If SSEUP is not preceded by SSE or SSEUP, it is converted to SSE.
997 // Some of these are enforced by the merging logic. Others can arise
998 // only with unions; for example:
999 // union { _Complex double; unsigned; }
1001 // Note that clauses (b) and (c) were added in 0.98.
1005 if (Hi == X87Up && Lo != X87 && honorsRevision0_98())
1007 if (AggregateSize > 128 && (Lo != SSE || Hi != SSEUp))
1009 if (Hi == SSEUp && Lo != SSE)
1013 X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, Class Field) {
1014 // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is
1015 // classified recursively so that always two fields are
1016 // considered. The resulting class is calculated according to
1017 // the classes of the fields in the eightbyte:
1019 // (a) If both classes are equal, this is the resulting class.
1021 // (b) If one of the classes is NO_CLASS, the resulting class is
1024 // (c) If one of the classes is MEMORY, the result is the MEMORY
1027 // (d) If one of the classes is INTEGER, the result is the
1030 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class,
1031 // MEMORY is used as class.
1033 // (f) Otherwise class SSE is used.
1035 // Accum should never be memory (we should have returned) or
1036 // ComplexX87 (because this cannot be passed in a structure).
1037 assert((Accum != Memory && Accum != ComplexX87) &&
1038 "Invalid accumulated classification during merge.");
1039 if (Accum == Field || Field == NoClass)
1041 if (Field == Memory)
1043 if (Accum == NoClass)
1045 if (Accum == Integer || Field == Integer)
1047 if (Field == X87 || Field == X87Up || Field == ComplexX87 ||
1048 Accum == X87 || Accum == X87Up)
1053 void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase,
1054 Class &Lo, Class &Hi) const {
1055 // FIXME: This code can be simplified by introducing a simple value class for
1056 // Class pairs with appropriate constructor methods for the various
1059 // FIXME: Some of the split computations are wrong; unaligned vectors
1060 // shouldn't be passed in registers for example, so there is no chance they
1061 // can straddle an eightbyte. Verify & simplify.
1065 Class &Current = OffsetBase < 64 ? Lo : Hi;
1068 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) {
1069 BuiltinType::Kind k = BT->getKind();
1071 if (k == BuiltinType::Void) {
1073 } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) {
1076 } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) {
1078 } else if (k == BuiltinType::Float || k == BuiltinType::Double) {
1080 } else if (k == BuiltinType::LongDouble) {
1084 // FIXME: _Decimal32 and _Decimal64 are SSE.
1085 // FIXME: _float128 and _Decimal128 are (SSE, SSEUp).
1089 if (const EnumType *ET = Ty->getAs<EnumType>()) {
1090 // Classify the underlying integer type.
1091 classify(ET->getDecl()->getIntegerType(), OffsetBase, Lo, Hi);
1095 if (Ty->hasPointerRepresentation()) {
1100 if (Ty->isMemberPointerType()) {
1101 if (Ty->isMemberFunctionPointerType())
1108 if (const VectorType *VT = Ty->getAs<VectorType>()) {
1109 uint64_t Size = getContext().getTypeSize(VT);
1111 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x
1112 // float> as integer.
1115 // If this type crosses an eightbyte boundary, it should be
1117 uint64_t EB_Real = (OffsetBase) / 64;
1118 uint64_t EB_Imag = (OffsetBase + Size - 1) / 64;
1119 if (EB_Real != EB_Imag)
1121 } else if (Size == 64) {
1122 // gcc passes <1 x double> in memory. :(
1123 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double))
1126 // gcc passes <1 x long long> as INTEGER.
1127 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong) ||
1128 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULongLong) ||
1129 VT->getElementType()->isSpecificBuiltinType(BuiltinType::Long) ||
1130 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULong))
1135 // If this type crosses an eightbyte boundary, it should be
1137 if (OffsetBase && OffsetBase != 64)
1139 } else if (Size == 128 || Size == 256) {
1140 // Arguments of 256-bits are split into four eightbyte chunks. The
1141 // least significant one belongs to class SSE and all the others to class
1142 // SSEUP. The original Lo and Hi design considers that types can't be
1143 // greater than 128-bits, so a 64-bit split in Hi and Lo makes sense.
1144 // This design isn't correct for 256-bits, but since there're no cases
1145 // where the upper parts would need to be inspected, avoid adding
1146 // complexity and just consider Hi to match the 64-256 part.
1153 if (const ComplexType *CT = Ty->getAs<ComplexType>()) {
1154 QualType ET = getContext().getCanonicalType(CT->getElementType());
1156 uint64_t Size = getContext().getTypeSize(Ty);
1157 if (ET->isIntegralOrEnumerationType()) {
1160 else if (Size <= 128)
1162 } else if (ET == getContext().FloatTy)
1164 else if (ET == getContext().DoubleTy)
1166 else if (ET == getContext().LongDoubleTy)
1167 Current = ComplexX87;
1169 // If this complex type crosses an eightbyte boundary then it
1171 uint64_t EB_Real = (OffsetBase) / 64;
1172 uint64_t EB_Imag = (OffsetBase + getContext().getTypeSize(ET)) / 64;
1173 if (Hi == NoClass && EB_Real != EB_Imag)
1179 if (const ConstantArrayType *AT = getContext().getAsConstantArrayType(Ty)) {
1180 // Arrays are treated like structures.
1182 uint64_t Size = getContext().getTypeSize(Ty);
1184 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger
1185 // than four eightbytes, ..., it has class MEMORY.
1189 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned
1190 // fields, it has class MEMORY.
1192 // Only need to check alignment of array base.
1193 if (OffsetBase % getContext().getTypeAlign(AT->getElementType()))
1196 // Otherwise implement simplified merge. We could be smarter about
1197 // this, but it isn't worth it and would be harder to verify.
1199 uint64_t EltSize = getContext().getTypeSize(AT->getElementType());
1200 uint64_t ArraySize = AT->getSize().getZExtValue();
1202 // The only case a 256-bit wide vector could be used is when the array
1203 // contains a single 256-bit element. Since Lo and Hi logic isn't extended
1204 // to work for sizes wider than 128, early check and fallback to memory.
1205 if (Size > 128 && EltSize != 256)
1208 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) {
1209 Class FieldLo, FieldHi;
1210 classify(AT->getElementType(), Offset, FieldLo, FieldHi);
1211 Lo = merge(Lo, FieldLo);
1212 Hi = merge(Hi, FieldHi);
1213 if (Lo == Memory || Hi == Memory)
1217 postMerge(Size, Lo, Hi);
1218 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification.");
1222 if (const RecordType *RT = Ty->getAs<RecordType>()) {
1223 uint64_t Size = getContext().getTypeSize(Ty);
1225 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger
1226 // than four eightbytes, ..., it has class MEMORY.
1230 // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial
1231 // copy constructor or a non-trivial destructor, it is passed by invisible
1233 if (hasNonTrivialDestructorOrCopyConstructor(RT))
1236 const RecordDecl *RD = RT->getDecl();
1238 // Assume variable sized types are passed in memory.
1239 if (RD->hasFlexibleArrayMember())
1242 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD);
1244 // Reset Lo class, this will be recomputed.
1247 // If this is a C++ record, classify the bases first.
1248 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) {
1249 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(),
1250 e = CXXRD->bases_end(); i != e; ++i) {
1251 assert(!i->isVirtual() && !i->getType()->isDependentType() &&
1252 "Unexpected base class!");
1253 const CXXRecordDecl *Base =
1254 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl());
1256 // Classify this field.
1258 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a
1259 // single eightbyte, each is classified separately. Each eightbyte gets
1260 // initialized to class NO_CLASS.
1261 Class FieldLo, FieldHi;
1262 uint64_t Offset = OffsetBase + Layout.getBaseClassOffsetInBits(Base);
1263 classify(i->getType(), Offset, FieldLo, FieldHi);
1264 Lo = merge(Lo, FieldLo);
1265 Hi = merge(Hi, FieldHi);
1266 if (Lo == Memory || Hi == Memory)
1271 // Classify the fields one at a time, merging the results.
1273 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
1274 i != e; ++i, ++idx) {
1275 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx);
1276 bool BitField = i->isBitField();
1278 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger than
1279 // four eightbytes, or it contains unaligned fields, it has class MEMORY.
1281 // The only case a 256-bit wide vector could be used is when the struct
1282 // contains a single 256-bit element. Since Lo and Hi logic isn't extended
1283 // to work for sizes wider than 128, early check and fallback to memory.
1285 if (Size > 128 && getContext().getTypeSize(i->getType()) != 256) {
1289 // Note, skip this test for bit-fields, see below.
1290 if (!BitField && Offset % getContext().getTypeAlign(i->getType())) {
1295 // Classify this field.
1297 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate
1298 // exceeds a single eightbyte, each is classified
1299 // separately. Each eightbyte gets initialized to class
1301 Class FieldLo, FieldHi;
1303 // Bit-fields require special handling, they do not force the
1304 // structure to be passed in memory even if unaligned, and
1305 // therefore they can straddle an eightbyte.
1307 // Ignore padding bit-fields.
1308 if (i->isUnnamedBitfield())
1311 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx);
1313 i->getBitWidth()->EvaluateAsInt(getContext()).getZExtValue();
1315 uint64_t EB_Lo = Offset / 64;
1316 uint64_t EB_Hi = (Offset + Size - 1) / 64;
1317 FieldLo = FieldHi = NoClass;
1319 assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes.");
1324 FieldHi = EB_Hi ? Integer : NoClass;
1327 classify(i->getType(), Offset, FieldLo, FieldHi);
1328 Lo = merge(Lo, FieldLo);
1329 Hi = merge(Hi, FieldHi);
1330 if (Lo == Memory || Hi == Memory)
1334 postMerge(Size, Lo, Hi);
1338 ABIArgInfo X86_64ABIInfo::getIndirectReturnResult(QualType Ty) const {
1339 // If this is a scalar LLVM value then assume LLVM will pass it in the right
1341 if (!isAggregateTypeForABI(Ty)) {
1342 // Treat an enum type as its underlying type.
1343 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
1344 Ty = EnumTy->getDecl()->getIntegerType();
1346 return (Ty->isPromotableIntegerType() ?
1347 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
1350 return ABIArgInfo::getIndirect(0);
1353 ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty) const {
1354 // If this is a scalar LLVM value then assume LLVM will pass it in the right
1356 if (!isAggregateTypeForABI(Ty)) {
1357 // Treat an enum type as its underlying type.
1358 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
1359 Ty = EnumTy->getDecl()->getIntegerType();
1361 return (Ty->isPromotableIntegerType() ?
1362 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
1365 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty))
1366 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
1368 // Compute the byval alignment. We specify the alignment of the byval in all
1369 // cases so that the mid-level optimizer knows the alignment of the byval.
1370 unsigned Align = std::max(getContext().getTypeAlign(Ty) / 8, 8U);
1371 return ABIArgInfo::getIndirect(Align);
1374 /// GetByteVectorType - The ABI specifies that a value should be passed in an
1375 /// full vector XMM/YMM register. Pick an LLVM IR type that will be passed as a
1376 /// vector register.
1377 llvm::Type *X86_64ABIInfo::GetByteVectorType(QualType Ty) const {
1378 llvm::Type *IRType = CGT.ConvertType(Ty);
1380 // Wrapper structs that just contain vectors are passed just like vectors,
1381 // strip them off if present.
1382 llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType);
1383 while (STy && STy->getNumElements() == 1) {
1384 IRType = STy->getElementType(0);
1385 STy = dyn_cast<llvm::StructType>(IRType);
1388 // If the preferred type is a 16-byte vector, prefer to pass it.
1389 if (llvm::VectorType *VT = dyn_cast<llvm::VectorType>(IRType)){
1390 llvm::Type *EltTy = VT->getElementType();
1391 unsigned BitWidth = VT->getBitWidth();
1392 if ((BitWidth == 128 || BitWidth == 256) &&
1393 (EltTy->isFloatTy() || EltTy->isDoubleTy() ||
1394 EltTy->isIntegerTy(8) || EltTy->isIntegerTy(16) ||
1395 EltTy->isIntegerTy(32) || EltTy->isIntegerTy(64) ||
1396 EltTy->isIntegerTy(128)))
1400 return llvm::VectorType::get(llvm::Type::getDoubleTy(getVMContext()), 2);
1403 /// BitsContainNoUserData - Return true if the specified [start,end) bit range
1404 /// is known to either be off the end of the specified type or being in
1405 /// alignment padding. The user type specified is known to be at most 128 bits
1406 /// in size, and have passed through X86_64ABIInfo::classify with a successful
1407 /// classification that put one of the two halves in the INTEGER class.
1409 /// It is conservatively correct to return false.
1410 static bool BitsContainNoUserData(QualType Ty, unsigned StartBit,
1411 unsigned EndBit, ASTContext &Context) {
1412 // If the bytes being queried are off the end of the type, there is no user
1413 // data hiding here. This handles analysis of builtins, vectors and other
1414 // types that don't contain interesting padding.
1415 unsigned TySize = (unsigned)Context.getTypeSize(Ty);
1416 if (TySize <= StartBit)
1419 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) {
1420 unsigned EltSize = (unsigned)Context.getTypeSize(AT->getElementType());
1421 unsigned NumElts = (unsigned)AT->getSize().getZExtValue();
1423 // Check each element to see if the element overlaps with the queried range.
1424 for (unsigned i = 0; i != NumElts; ++i) {
1425 // If the element is after the span we care about, then we're done..
1426 unsigned EltOffset = i*EltSize;
1427 if (EltOffset >= EndBit) break;
1429 unsigned EltStart = EltOffset < StartBit ? StartBit-EltOffset :0;
1430 if (!BitsContainNoUserData(AT->getElementType(), EltStart,
1431 EndBit-EltOffset, Context))
1434 // If it overlaps no elements, then it is safe to process as padding.
1438 if (const RecordType *RT = Ty->getAs<RecordType>()) {
1439 const RecordDecl *RD = RT->getDecl();
1440 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD);
1442 // If this is a C++ record, check the bases first.
1443 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) {
1444 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(),
1445 e = CXXRD->bases_end(); i != e; ++i) {
1446 assert(!i->isVirtual() && !i->getType()->isDependentType() &&
1447 "Unexpected base class!");
1448 const CXXRecordDecl *Base =
1449 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl());
1451 // If the base is after the span we care about, ignore it.
1452 unsigned BaseOffset = (unsigned)Layout.getBaseClassOffsetInBits(Base);
1453 if (BaseOffset >= EndBit) continue;
1455 unsigned BaseStart = BaseOffset < StartBit ? StartBit-BaseOffset :0;
1456 if (!BitsContainNoUserData(i->getType(), BaseStart,
1457 EndBit-BaseOffset, Context))
1462 // Verify that no field has data that overlaps the region of interest. Yes
1463 // this could be sped up a lot by being smarter about queried fields,
1464 // however we're only looking at structs up to 16 bytes, so we don't care
1467 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
1468 i != e; ++i, ++idx) {
1469 unsigned FieldOffset = (unsigned)Layout.getFieldOffset(idx);
1471 // If we found a field after the region we care about, then we're done.
1472 if (FieldOffset >= EndBit) break;
1474 unsigned FieldStart = FieldOffset < StartBit ? StartBit-FieldOffset :0;
1475 if (!BitsContainNoUserData(i->getType(), FieldStart, EndBit-FieldOffset,
1480 // If nothing in this record overlapped the area of interest, then we're
1488 /// ContainsFloatAtOffset - Return true if the specified LLVM IR type has a
1489 /// float member at the specified offset. For example, {int,{float}} has a
1490 /// float at offset 4. It is conservatively correct for this routine to return
1492 static bool ContainsFloatAtOffset(const llvm::Type *IRType, unsigned IROffset,
1493 const llvm::TargetData &TD) {
1494 // Base case if we find a float.
1495 if (IROffset == 0 && IRType->isFloatTy())
1498 // If this is a struct, recurse into the field at the specified offset.
1499 if (const llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) {
1500 const llvm::StructLayout *SL = TD.getStructLayout(STy);
1501 unsigned Elt = SL->getElementContainingOffset(IROffset);
1502 IROffset -= SL->getElementOffset(Elt);
1503 return ContainsFloatAtOffset(STy->getElementType(Elt), IROffset, TD);
1506 // If this is an array, recurse into the field at the specified offset.
1507 if (const llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) {
1508 const llvm::Type *EltTy = ATy->getElementType();
1509 unsigned EltSize = TD.getTypeAllocSize(EltTy);
1510 IROffset -= IROffset/EltSize*EltSize;
1511 return ContainsFloatAtOffset(EltTy, IROffset, TD);
1518 /// GetSSETypeAtOffset - Return a type that will be passed by the backend in the
1519 /// low 8 bytes of an XMM register, corresponding to the SSE class.
1520 llvm::Type *X86_64ABIInfo::
1521 GetSSETypeAtOffset(llvm::Type *IRType, unsigned IROffset,
1522 QualType SourceTy, unsigned SourceOffset) const {
1523 // The only three choices we have are either double, <2 x float>, or float. We
1524 // pass as float if the last 4 bytes is just padding. This happens for
1525 // structs that contain 3 floats.
1526 if (BitsContainNoUserData(SourceTy, SourceOffset*8+32,
1527 SourceOffset*8+64, getContext()))
1528 return llvm::Type::getFloatTy(getVMContext());
1530 // We want to pass as <2 x float> if the LLVM IR type contains a float at
1531 // offset+0 and offset+4. Walk the LLVM IR type to find out if this is the
1533 if (ContainsFloatAtOffset(IRType, IROffset, getTargetData()) &&
1534 ContainsFloatAtOffset(IRType, IROffset+4, getTargetData()))
1535 return llvm::VectorType::get(llvm::Type::getFloatTy(getVMContext()), 2);
1537 return llvm::Type::getDoubleTy(getVMContext());
1541 /// GetINTEGERTypeAtOffset - The ABI specifies that a value should be passed in
1542 /// an 8-byte GPR. This means that we either have a scalar or we are talking
1543 /// about the high or low part of an up-to-16-byte struct. This routine picks
1544 /// the best LLVM IR type to represent this, which may be i64 or may be anything
1545 /// else that the backend will pass in a GPR that works better (e.g. i8, %foo*,
1548 /// PrefType is an LLVM IR type that corresponds to (part of) the IR type for
1549 /// the source type. IROffset is an offset in bytes into the LLVM IR type that
1550 /// the 8-byte value references. PrefType may be null.
1552 /// SourceTy is the source level type for the entire argument. SourceOffset is
1553 /// an offset into this that we're processing (which is always either 0 or 8).
1555 llvm::Type *X86_64ABIInfo::
1556 GetINTEGERTypeAtOffset(llvm::Type *IRType, unsigned IROffset,
1557 QualType SourceTy, unsigned SourceOffset) const {
1558 // If we're dealing with an un-offset LLVM IR type, then it means that we're
1559 // returning an 8-byte unit starting with it. See if we can safely use it.
1560 if (IROffset == 0) {
1561 // Pointers and int64's always fill the 8-byte unit.
1562 if (isa<llvm::PointerType>(IRType) || IRType->isIntegerTy(64))
1565 // If we have a 1/2/4-byte integer, we can use it only if the rest of the
1566 // goodness in the source type is just tail padding. This is allowed to
1567 // kick in for struct {double,int} on the int, but not on
1568 // struct{double,int,int} because we wouldn't return the second int. We
1569 // have to do this analysis on the source type because we can't depend on
1570 // unions being lowered a specific way etc.
1571 if (IRType->isIntegerTy(8) || IRType->isIntegerTy(16) ||
1572 IRType->isIntegerTy(32)) {
1573 unsigned BitWidth = cast<llvm::IntegerType>(IRType)->getBitWidth();
1575 if (BitsContainNoUserData(SourceTy, SourceOffset*8+BitWidth,
1576 SourceOffset*8+64, getContext()))
1581 if (const llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) {
1582 // If this is a struct, recurse into the field at the specified offset.
1583 const llvm::StructLayout *SL = getTargetData().getStructLayout(STy);
1584 if (IROffset < SL->getSizeInBytes()) {
1585 unsigned FieldIdx = SL->getElementContainingOffset(IROffset);
1586 IROffset -= SL->getElementOffset(FieldIdx);
1588 return GetINTEGERTypeAtOffset(STy->getElementType(FieldIdx), IROffset,
1589 SourceTy, SourceOffset);
1593 if (const llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) {
1594 llvm::Type *EltTy = ATy->getElementType();
1595 unsigned EltSize = getTargetData().getTypeAllocSize(EltTy);
1596 unsigned EltOffset = IROffset/EltSize*EltSize;
1597 return GetINTEGERTypeAtOffset(EltTy, IROffset-EltOffset, SourceTy,
1601 // Okay, we don't have any better idea of what to pass, so we pass this in an
1602 // integer register that isn't too big to fit the rest of the struct.
1603 unsigned TySizeInBytes =
1604 (unsigned)getContext().getTypeSizeInChars(SourceTy).getQuantity();
1606 assert(TySizeInBytes != SourceOffset && "Empty field?");
1608 // It is always safe to classify this as an integer type up to i64 that
1609 // isn't larger than the structure.
1610 return llvm::IntegerType::get(getVMContext(),
1611 std::min(TySizeInBytes-SourceOffset, 8U)*8);
1615 /// GetX86_64ByValArgumentPair - Given a high and low type that can ideally
1616 /// be used as elements of a two register pair to pass or return, return a
1617 /// first class aggregate to represent them. For example, if the low part of
1618 /// a by-value argument should be passed as i32* and the high part as float,
1619 /// return {i32*, float}.
1621 GetX86_64ByValArgumentPair(llvm::Type *Lo, llvm::Type *Hi,
1622 const llvm::TargetData &TD) {
1623 // In order to correctly satisfy the ABI, we need to the high part to start
1624 // at offset 8. If the high and low parts we inferred are both 4-byte types
1625 // (e.g. i32 and i32) then the resultant struct type ({i32,i32}) won't have
1626 // the second element at offset 8. Check for this:
1627 unsigned LoSize = (unsigned)TD.getTypeAllocSize(Lo);
1628 unsigned HiAlign = TD.getABITypeAlignment(Hi);
1629 unsigned HiStart = llvm::TargetData::RoundUpAlignment(LoSize, HiAlign);
1630 assert(HiStart != 0 && HiStart <= 8 && "Invalid x86-64 argument pair!");
1632 // To handle this, we have to increase the size of the low part so that the
1633 // second element will start at an 8 byte offset. We can't increase the size
1634 // of the second element because it might make us access off the end of the
1637 // There are only two sorts of types the ABI generation code can produce for
1638 // the low part of a pair that aren't 8 bytes in size: float or i8/i16/i32.
1639 // Promote these to a larger type.
1640 if (Lo->isFloatTy())
1641 Lo = llvm::Type::getDoubleTy(Lo->getContext());
1643 assert(Lo->isIntegerTy() && "Invalid/unknown lo type");
1644 Lo = llvm::Type::getInt64Ty(Lo->getContext());
1648 llvm::StructType *Result = llvm::StructType::get(Lo, Hi, NULL);
1651 // Verify that the second element is at an 8-byte offset.
1652 assert(TD.getStructLayout(Result)->getElementOffset(1) == 8 &&
1653 "Invalid x86-64 argument pair!");
1657 ABIArgInfo X86_64ABIInfo::
1658 classifyReturnType(QualType RetTy) const {
1659 // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the
1660 // classification algorithm.
1661 X86_64ABIInfo::Class Lo, Hi;
1662 classify(RetTy, 0, Lo, Hi);
1664 // Check some invariants.
1665 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification.");
1666 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification.");
1668 llvm::Type *ResType = 0;
1672 return ABIArgInfo::getIgnore();
1673 // If the low part is just padding, it takes no register, leave ResType
1675 assert((Hi == SSE || Hi == Integer || Hi == X87Up) &&
1676 "Unknown missing lo part");
1681 assert(0 && "Invalid classification for lo word.");
1683 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via
1686 return getIndirectReturnResult(RetTy);
1688 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next
1689 // available register of the sequence %rax, %rdx is used.
1691 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0);
1693 // If we have a sign or zero extended integer, make sure to return Extend
1694 // so that the parameter gets the right LLVM IR attributes.
1695 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) {
1696 // Treat an enum type as its underlying type.
1697 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
1698 RetTy = EnumTy->getDecl()->getIntegerType();
1700 if (RetTy->isIntegralOrEnumerationType() &&
1701 RetTy->isPromotableIntegerType())
1702 return ABIArgInfo::getExtend();
1706 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next
1707 // available SSE register of the sequence %xmm0, %xmm1 is used.
1709 ResType = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0);
1712 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is
1713 // returned on the X87 stack in %st0 as 80-bit x87 number.
1715 ResType = llvm::Type::getX86_FP80Ty(getVMContext());
1718 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real
1719 // part of the value is returned in %st0 and the imaginary part in
1722 assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification.");
1723 ResType = llvm::StructType::get(llvm::Type::getX86_FP80Ty(getVMContext()),
1724 llvm::Type::getX86_FP80Ty(getVMContext()),
1729 llvm::Type *HighPart = 0;
1731 // Memory was handled previously and X87 should
1732 // never occur as a hi class.
1735 assert(0 && "Invalid classification for hi word.");
1737 case ComplexX87: // Previously handled.
1742 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8);
1743 if (Lo == NoClass) // Return HighPart at offset 8 in memory.
1744 return ABIArgInfo::getDirect(HighPart, 8);
1747 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8);
1748 if (Lo == NoClass) // Return HighPart at offset 8 in memory.
1749 return ABIArgInfo::getDirect(HighPart, 8);
1752 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte
1753 // is passed in the next available eightbyte chunk if the last used
1756 // SSEUP should always be preceded by SSE, just widen.
1758 assert(Lo == SSE && "Unexpected SSEUp classification.");
1759 ResType = GetByteVectorType(RetTy);
1762 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is
1763 // returned together with the previous X87 value in %st0.
1765 // If X87Up is preceded by X87, we don't need to do
1766 // anything. However, in some cases with unions it may not be
1767 // preceded by X87. In such situations we follow gcc and pass the
1768 // extra bits in an SSE reg.
1770 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8);
1771 if (Lo == NoClass) // Return HighPart at offset 8 in memory.
1772 return ABIArgInfo::getDirect(HighPart, 8);
1777 // If a high part was specified, merge it together with the low part. It is
1778 // known to pass in the high eightbyte of the result. We do this by forming a
1779 // first class struct aggregate with the high and low part: {low, high}
1781 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getTargetData());
1783 return ABIArgInfo::getDirect(ResType);
1786 ABIArgInfo X86_64ABIInfo::classifyArgumentType(QualType Ty, unsigned &neededInt,
1787 unsigned &neededSSE) const {
1788 X86_64ABIInfo::Class Lo, Hi;
1789 classify(Ty, 0, Lo, Hi);
1791 // Check some invariants.
1792 // FIXME: Enforce these by construction.
1793 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification.");
1794 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification.");
1798 llvm::Type *ResType = 0;
1802 return ABIArgInfo::getIgnore();
1803 // If the low part is just padding, it takes no register, leave ResType
1805 assert((Hi == SSE || Hi == Integer || Hi == X87Up) &&
1806 "Unknown missing lo part");
1809 // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument
1813 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or
1814 // COMPLEX_X87, it is passed in memory.
1817 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty))
1819 return getIndirectResult(Ty);
1823 assert(0 && "Invalid classification for lo word.");
1825 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next
1826 // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8
1831 // Pick an 8-byte type based on the preferred type.
1832 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 0, Ty, 0);
1834 // If we have a sign or zero extended integer, make sure to return Extend
1835 // so that the parameter gets the right LLVM IR attributes.
1836 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) {
1837 // Treat an enum type as its underlying type.
1838 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
1839 Ty = EnumTy->getDecl()->getIntegerType();
1841 if (Ty->isIntegralOrEnumerationType() &&
1842 Ty->isPromotableIntegerType())
1843 return ABIArgInfo::getExtend();
1848 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next
1849 // available SSE register is used, the registers are taken in the
1850 // order from %xmm0 to %xmm7.
1852 llvm::Type *IRType = CGT.ConvertType(Ty);
1853 ResType = GetSSETypeAtOffset(IRType, 0, Ty, 0);
1859 llvm::Type *HighPart = 0;
1861 // Memory was handled previously, ComplexX87 and X87 should
1862 // never occur as hi classes, and X87Up must be preceded by X87,
1863 // which is passed in memory.
1867 assert(0 && "Invalid classification for hi word.");
1870 case NoClass: break;
1874 // Pick an 8-byte type based on the preferred type.
1875 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8);
1877 if (Lo == NoClass) // Pass HighPart at offset 8 in memory.
1878 return ABIArgInfo::getDirect(HighPart, 8);
1881 // X87Up generally doesn't occur here (long double is passed in
1882 // memory), except in situations involving unions.
1885 HighPart = GetSSETypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8);
1887 if (Lo == NoClass) // Pass HighPart at offset 8 in memory.
1888 return ABIArgInfo::getDirect(HighPart, 8);
1893 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the
1894 // eightbyte is passed in the upper half of the last used SSE
1895 // register. This only happens when 128-bit vectors are passed.
1897 assert(Lo == SSE && "Unexpected SSEUp classification");
1898 ResType = GetByteVectorType(Ty);
1902 // If a high part was specified, merge it together with the low part. It is
1903 // known to pass in the high eightbyte of the result. We do this by forming a
1904 // first class struct aggregate with the high and low part: {low, high}
1906 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getTargetData());
1908 return ABIArgInfo::getDirect(ResType);
1911 void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const {
1913 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
1915 // Keep track of the number of assigned registers.
1916 unsigned freeIntRegs = 6, freeSSERegs = 8;
1918 // If the return value is indirect, then the hidden argument is consuming one
1919 // integer register.
1920 if (FI.getReturnInfo().isIndirect())
1923 // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers
1924 // get assigned (in left-to-right order) for passing as follows...
1925 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
1927 unsigned neededInt, neededSSE;
1928 it->info = classifyArgumentType(it->type, neededInt, neededSSE);
1930 // AMD64-ABI 3.2.3p3: If there are no registers available for any
1931 // eightbyte of an argument, the whole argument is passed on the
1932 // stack. If registers have already been assigned for some
1933 // eightbytes of such an argument, the assignments get reverted.
1934 if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) {
1935 freeIntRegs -= neededInt;
1936 freeSSERegs -= neededSSE;
1938 it->info = getIndirectResult(it->type);
1943 static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr,
1945 CodeGenFunction &CGF) {
1946 llvm::Value *overflow_arg_area_p =
1947 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_p");
1948 llvm::Value *overflow_arg_area =
1949 CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area");
1951 // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16
1952 // byte boundary if alignment needed by type exceeds 8 byte boundary.
1953 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8;
1955 // Note that we follow the ABI & gcc here, even though the type
1956 // could in theory have an alignment greater than 16. This case
1957 // shouldn't ever matter in practice.
1959 // overflow_arg_area = (overflow_arg_area + 15) & ~15;
1960 llvm::Value *Offset =
1961 llvm::ConstantInt::get(CGF.Int32Ty, 15);
1962 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset);
1963 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area,
1965 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int64Ty, ~15LL);
1967 CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask),
1968 overflow_arg_area->getType(),
1969 "overflow_arg_area.align");
1972 // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area.
1973 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty);
1975 CGF.Builder.CreateBitCast(overflow_arg_area,
1976 llvm::PointerType::getUnqual(LTy));
1978 // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to:
1979 // l->overflow_arg_area + sizeof(type).
1980 // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to
1981 // an 8 byte boundary.
1983 uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8;
1984 llvm::Value *Offset =
1985 llvm::ConstantInt::get(CGF.Int32Ty, (SizeInBytes + 7) & ~7);
1986 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset,
1987 "overflow_arg_area.next");
1988 CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p);
1990 // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type.
1994 llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
1995 CodeGenFunction &CGF) const {
1996 llvm::LLVMContext &VMContext = CGF.getLLVMContext();
1998 // Assume that va_list type is correct; should be pointer to LLVM type:
2002 // i8* overflow_arg_area;
2003 // i8* reg_save_area;
2005 unsigned neededInt, neededSSE;
2007 Ty = CGF.getContext().getCanonicalType(Ty);
2008 ABIArgInfo AI = classifyArgumentType(Ty, neededInt, neededSSE);
2010 // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed
2011 // in the registers. If not go to step 7.
2012 if (!neededInt && !neededSSE)
2013 return EmitVAArgFromMemory(VAListAddr, Ty, CGF);
2015 // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of
2016 // general purpose registers needed to pass type and num_fp to hold
2017 // the number of floating point registers needed.
2019 // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into
2020 // registers. In the case: l->gp_offset > 48 - num_gp * 8 or
2021 // l->fp_offset > 304 - num_fp * 16 go to step 7.
2023 // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of
2024 // register save space).
2026 llvm::Value *InRegs = 0;
2027 llvm::Value *gp_offset_p = 0, *gp_offset = 0;
2028 llvm::Value *fp_offset_p = 0, *fp_offset = 0;
2030 gp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "gp_offset_p");
2031 gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset");
2032 InRegs = llvm::ConstantInt::get(CGF.Int32Ty, 48 - neededInt * 8);
2033 InRegs = CGF.Builder.CreateICmpULE(gp_offset, InRegs, "fits_in_gp");
2037 fp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 1, "fp_offset_p");
2038 fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset");
2039 llvm::Value *FitsInFP =
2040 llvm::ConstantInt::get(CGF.Int32Ty, 176 - neededSSE * 16);
2041 FitsInFP = CGF.Builder.CreateICmpULE(fp_offset, FitsInFP, "fits_in_fp");
2042 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP;
2045 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg");
2046 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem");
2047 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end");
2048 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock);
2050 // Emit code to load the value if it was passed in registers.
2052 CGF.EmitBlock(InRegBlock);
2054 // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with
2055 // an offset of l->gp_offset and/or l->fp_offset. This may require
2056 // copying to a temporary location in case the parameter is passed
2057 // in different register classes or requires an alignment greater
2058 // than 8 for general purpose registers and 16 for XMM registers.
2060 // FIXME: This really results in shameful code when we end up needing to
2061 // collect arguments from different places; often what should result in a
2062 // simple assembling of a structure from scattered addresses has many more
2063 // loads than necessary. Can we clean this up?
2064 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty);
2065 llvm::Value *RegAddr =
2066 CGF.Builder.CreateLoad(CGF.Builder.CreateStructGEP(VAListAddr, 3),
2068 if (neededInt && neededSSE) {
2070 assert(AI.isDirect() && "Unexpected ABI info for mixed regs");
2071 const llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType());
2072 llvm::Value *Tmp = CGF.CreateTempAlloca(ST);
2073 assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs");
2074 const llvm::Type *TyLo = ST->getElementType(0);
2075 const llvm::Type *TyHi = ST->getElementType(1);
2076 assert((TyLo->isFPOrFPVectorTy() ^ TyHi->isFPOrFPVectorTy()) &&
2077 "Unexpected ABI info for mixed regs");
2078 const llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo);
2079 const llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi);
2080 llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset);
2081 llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset);
2082 llvm::Value *RegLoAddr = TyLo->isFloatingPointTy() ? FPAddr : GPAddr;
2083 llvm::Value *RegHiAddr = TyLo->isFloatingPointTy() ? GPAddr : FPAddr;
2085 CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo));
2086 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0));
2087 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi));
2088 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1));
2090 RegAddr = CGF.Builder.CreateBitCast(Tmp,
2091 llvm::PointerType::getUnqual(LTy));
2092 } else if (neededInt) {
2093 RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset);
2094 RegAddr = CGF.Builder.CreateBitCast(RegAddr,
2095 llvm::PointerType::getUnqual(LTy));
2096 } else if (neededSSE == 1) {
2097 RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset);
2098 RegAddr = CGF.Builder.CreateBitCast(RegAddr,
2099 llvm::PointerType::getUnqual(LTy));
2101 assert(neededSSE == 2 && "Invalid number of needed registers!");
2102 // SSE registers are spaced 16 bytes apart in the register save
2103 // area, we need to collect the two eightbytes together.
2104 llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset);
2105 llvm::Value *RegAddrHi = CGF.Builder.CreateConstGEP1_32(RegAddrLo, 16);
2106 llvm::Type *DoubleTy = llvm::Type::getDoubleTy(VMContext);
2107 const llvm::Type *DblPtrTy =
2108 llvm::PointerType::getUnqual(DoubleTy);
2109 const llvm::StructType *ST = llvm::StructType::get(DoubleTy,
2111 llvm::Value *V, *Tmp = CGF.CreateTempAlloca(ST);
2112 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo,
2114 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0));
2115 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi,
2117 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1));
2118 RegAddr = CGF.Builder.CreateBitCast(Tmp,
2119 llvm::PointerType::getUnqual(LTy));
2122 // AMD64-ABI 3.5.7p5: Step 5. Set:
2123 // l->gp_offset = l->gp_offset + num_gp * 8
2124 // l->fp_offset = l->fp_offset + num_fp * 16.
2126 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededInt * 8);
2127 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset),
2131 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededSSE * 16);
2132 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset),
2135 CGF.EmitBranch(ContBlock);
2137 // Emit code to load the value if it was passed in memory.
2139 CGF.EmitBlock(InMemBlock);
2140 llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF);
2142 // Return the appropriate result.
2144 CGF.EmitBlock(ContBlock);
2145 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(), 2,
2147 ResAddr->addIncoming(RegAddr, InRegBlock);
2148 ResAddr->addIncoming(MemAddr, InMemBlock);
2152 ABIArgInfo WinX86_64ABIInfo::classify(QualType Ty) const {
2154 if (Ty->isVoidType())
2155 return ABIArgInfo::getIgnore();
2157 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
2158 Ty = EnumTy->getDecl()->getIntegerType();
2160 uint64_t Size = getContext().getTypeSize(Ty);
2162 if (const RecordType *RT = Ty->getAs<RecordType>()) {
2163 if (hasNonTrivialDestructorOrCopyConstructor(RT) ||
2164 RT->getDecl()->hasFlexibleArrayMember())
2165 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
2167 // FIXME: mingw-w64-gcc emits 128-bit struct as i128
2169 getContext().Target.getTriple().getOS() == llvm::Triple::MinGW32)
2170 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
2173 // MS x64 ABI requirement: "Any argument that doesn't fit in 8 bytes, or is
2174 // not 1, 2, 4, or 8 bytes, must be passed by reference."
2176 (Size & (Size - 1)) == 0)
2177 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
2180 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
2183 if (Ty->isPromotableIntegerType())
2184 return ABIArgInfo::getExtend();
2186 return ABIArgInfo::getDirect();
2189 void WinX86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const {
2191 QualType RetTy = FI.getReturnType();
2192 FI.getReturnInfo() = classify(RetTy);
2194 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
2196 it->info = classify(it->type);
2199 llvm::Value *WinX86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2200 CodeGenFunction &CGF) const {
2201 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext());
2202 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP);
2204 CGBuilderTy &Builder = CGF.Builder;
2205 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP,
2207 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
2209 llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
2210 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy);
2213 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 8);
2214 llvm::Value *NextAddr =
2215 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset),
2217 Builder.CreateStore(NextAddr, VAListAddrAsBPP);
2225 class PPC32TargetCodeGenInfo : public DefaultTargetCodeGenInfo {
2227 PPC32TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {}
2229 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const {
2230 // This is recovered from gcc output.
2231 return 1; // r1 is the dedicated stack pointer
2234 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
2235 llvm::Value *Address) const;
2241 PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
2242 llvm::Value *Address) const {
2243 // This is calculated from the LLVM and GCC tables and verified
2244 // against gcc output. AFAIK all ABIs use the same encoding.
2246 CodeGen::CGBuilderTy &Builder = CGF.Builder;
2247 llvm::LLVMContext &Context = CGF.getLLVMContext();
2249 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context);
2250 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4);
2251 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8);
2252 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16);
2254 // 0-31: r0-31, the 4-byte general-purpose registers
2255 AssignToArrayRange(Builder, Address, Four8, 0, 31);
2257 // 32-63: fp0-31, the 8-byte floating-point registers
2258 AssignToArrayRange(Builder, Address, Eight8, 32, 63);
2260 // 64-76 are various 4-byte special-purpose registers:
2267 AssignToArrayRange(Builder, Address, Four8, 64, 76);
2269 // 77-108: v0-31, the 16-byte vector registers
2270 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108);
2277 AssignToArrayRange(Builder, Address, Four8, 109, 113);
2283 //===----------------------------------------------------------------------===//
2284 // ARM ABI Implementation
2285 //===----------------------------------------------------------------------===//
2289 class ARMABIInfo : public ABIInfo {
2301 ARMABIInfo(CodeGenTypes &CGT, ABIKind _Kind) : ABIInfo(CGT), Kind(_Kind) {}
2304 ABIKind getABIKind() const { return Kind; }
2306 ABIArgInfo classifyReturnType(QualType RetTy) const;
2307 ABIArgInfo classifyArgumentType(QualType RetTy) const;
2309 virtual void computeInfo(CGFunctionInfo &FI) const;
2311 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2312 CodeGenFunction &CGF) const;
2315 class ARMTargetCodeGenInfo : public TargetCodeGenInfo {
2317 ARMTargetCodeGenInfo(CodeGenTypes &CGT, ARMABIInfo::ABIKind K)
2318 :TargetCodeGenInfo(new ARMABIInfo(CGT, K)) {}
2320 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const {
2324 llvm::StringRef getARCRetainAutoreleasedReturnValueMarker() const {
2325 return "mov\tr7, r7\t\t@ marker for objc_retainAutoreleaseReturnValue";
2328 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
2329 llvm::Value *Address) const {
2330 CodeGen::CGBuilderTy &Builder = CGF.Builder;
2331 llvm::LLVMContext &Context = CGF.getLLVMContext();
2333 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context);
2334 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4);
2336 // 0-15 are the 16 integer registers.
2337 AssignToArrayRange(Builder, Address, Four8, 0, 15);
2345 void ARMABIInfo::computeInfo(CGFunctionInfo &FI) const {
2346 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
2347 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
2349 it->info = classifyArgumentType(it->type);
2351 // Always honor user-specified calling convention.
2352 if (FI.getCallingConvention() != llvm::CallingConv::C)
2355 // Calling convention as default by an ABI.
2356 llvm::CallingConv::ID DefaultCC;
2357 llvm::StringRef Env = getContext().Target.getTriple().getEnvironmentName();
2358 if (Env == "gnueabi" || Env == "eabi")
2359 DefaultCC = llvm::CallingConv::ARM_AAPCS;
2361 DefaultCC = llvm::CallingConv::ARM_APCS;
2363 // If user did not ask for specific calling convention explicitly (e.g. via
2364 // pcs attribute), set effective calling convention if it's different than ABI
2366 switch (getABIKind()) {
2368 if (DefaultCC != llvm::CallingConv::ARM_APCS)
2369 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_APCS);
2372 if (DefaultCC != llvm::CallingConv::ARM_AAPCS)
2373 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS);
2376 if (DefaultCC != llvm::CallingConv::ARM_AAPCS_VFP)
2377 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS_VFP);
2382 ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty) const {
2383 if (!isAggregateTypeForABI(Ty)) {
2384 // Treat an enum type as its underlying type.
2385 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
2386 Ty = EnumTy->getDecl()->getIntegerType();
2388 return (Ty->isPromotableIntegerType() ?
2389 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
2392 // Ignore empty records.
2393 if (isEmptyRecord(getContext(), Ty, true))
2394 return ABIArgInfo::getIgnore();
2396 // Structures with either a non-trivial destructor or a non-trivial
2397 // copy constructor are always indirect.
2398 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty))
2399 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
2401 // Otherwise, pass by coercing to a structure of the appropriate size.
2403 // FIXME: This doesn't handle alignment > 64 bits.
2404 const llvm::Type* ElemTy;
2406 if (getContext().getTypeSizeInChars(Ty) <= CharUnits::fromQuantity(64)) {
2407 ElemTy = llvm::Type::getInt32Ty(getVMContext());
2408 SizeRegs = (getContext().getTypeSize(Ty) + 31) / 32;
2409 } else if (getABIKind() == ARMABIInfo::APCS) {
2410 // Initial ARM ByVal support is APCS-only.
2411 return ABIArgInfo::getIndirect(0, /*ByVal=*/true);
2413 // FIXME: This is kind of nasty... but there isn't much choice
2414 // because most of the ARM calling conventions don't yet support
2416 ElemTy = llvm::Type::getInt64Ty(getVMContext());
2417 SizeRegs = (getContext().getTypeSize(Ty) + 63) / 64;
2421 llvm::StructType::get(llvm::ArrayType::get(ElemTy, SizeRegs), NULL);
2422 return ABIArgInfo::getDirect(STy);
2425 static bool isIntegerLikeType(QualType Ty, ASTContext &Context,
2426 llvm::LLVMContext &VMContext) {
2427 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure
2428 // is called integer-like if its size is less than or equal to one word, and
2429 // the offset of each of its addressable sub-fields is zero.
2431 uint64_t Size = Context.getTypeSize(Ty);
2433 // Check that the type fits in a word.
2437 // FIXME: Handle vector types!
2438 if (Ty->isVectorType())
2441 // Float types are never treated as "integer like".
2442 if (Ty->isRealFloatingType())
2445 // If this is a builtin or pointer type then it is ok.
2446 if (Ty->getAs<BuiltinType>() || Ty->isPointerType())
2449 // Small complex integer types are "integer like".
2450 if (const ComplexType *CT = Ty->getAs<ComplexType>())
2451 return isIntegerLikeType(CT->getElementType(), Context, VMContext);
2453 // Single element and zero sized arrays should be allowed, by the definition
2454 // above, but they are not.
2456 // Otherwise, it must be a record type.
2457 const RecordType *RT = Ty->getAs<RecordType>();
2458 if (!RT) return false;
2460 // Ignore records with flexible arrays.
2461 const RecordDecl *RD = RT->getDecl();
2462 if (RD->hasFlexibleArrayMember())
2465 // Check that all sub-fields are at offset 0, and are themselves "integer
2467 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD);
2469 bool HadField = false;
2471 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
2472 i != e; ++i, ++idx) {
2473 const FieldDecl *FD = *i;
2475 // Bit-fields are not addressable, we only need to verify they are "integer
2476 // like". We still have to disallow a subsequent non-bitfield, for example:
2477 // struct { int : 0; int x }
2478 // is non-integer like according to gcc.
2479 if (FD->isBitField()) {
2483 if (!isIntegerLikeType(FD->getType(), Context, VMContext))
2489 // Check if this field is at offset 0.
2490 if (Layout.getFieldOffset(idx) != 0)
2493 if (!isIntegerLikeType(FD->getType(), Context, VMContext))
2496 // Only allow at most one field in a structure. This doesn't match the
2497 // wording above, but follows gcc in situations with a field following an
2499 if (!RD->isUnion()) {
2510 ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy) const {
2511 if (RetTy->isVoidType())
2512 return ABIArgInfo::getIgnore();
2514 // Large vector types should be returned via memory.
2515 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 128)
2516 return ABIArgInfo::getIndirect(0);
2518 if (!isAggregateTypeForABI(RetTy)) {
2519 // Treat an enum type as its underlying type.
2520 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
2521 RetTy = EnumTy->getDecl()->getIntegerType();
2523 return (RetTy->isPromotableIntegerType() ?
2524 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
2527 // Structures with either a non-trivial destructor or a non-trivial
2528 // copy constructor are always indirect.
2529 if (isRecordWithNonTrivialDestructorOrCopyConstructor(RetTy))
2530 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
2532 // Are we following APCS?
2533 if (getABIKind() == APCS) {
2534 if (isEmptyRecord(getContext(), RetTy, false))
2535 return ABIArgInfo::getIgnore();
2537 // Complex types are all returned as packed integers.
2539 // FIXME: Consider using 2 x vector types if the back end handles them
2541 if (RetTy->isAnyComplexType())
2542 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
2543 getContext().getTypeSize(RetTy)));
2545 // Integer like structures are returned in r0.
2546 if (isIntegerLikeType(RetTy, getContext(), getVMContext())) {
2547 // Return in the smallest viable integer type.
2548 uint64_t Size = getContext().getTypeSize(RetTy);
2550 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext()));
2552 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext()));
2553 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext()));
2556 // Otherwise return in memory.
2557 return ABIArgInfo::getIndirect(0);
2560 // Otherwise this is an AAPCS variant.
2562 if (isEmptyRecord(getContext(), RetTy, true))
2563 return ABIArgInfo::getIgnore();
2565 // Aggregates <= 4 bytes are returned in r0; other aggregates
2566 // are returned indirectly.
2567 uint64_t Size = getContext().getTypeSize(RetTy);
2569 // Return in the smallest viable integer type.
2571 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext()));
2573 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext()));
2574 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext()));
2577 return ABIArgInfo::getIndirect(0);
2580 llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2581 CodeGenFunction &CGF) const {
2582 // FIXME: Need to handle alignment
2583 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext());
2584 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP);
2586 CGBuilderTy &Builder = CGF.Builder;
2587 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP,
2589 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
2591 llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
2592 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy);
2595 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4);
2596 llvm::Value *NextAddr =
2597 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset),
2599 Builder.CreateStore(NextAddr, VAListAddrAsBPP);
2604 //===----------------------------------------------------------------------===//
2605 // PTX ABI Implementation
2606 //===----------------------------------------------------------------------===//
2610 class PTXABIInfo : public ABIInfo {
2612 PTXABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {}
2614 ABIArgInfo classifyReturnType(QualType RetTy) const;
2615 ABIArgInfo classifyArgumentType(QualType Ty) const;
2617 virtual void computeInfo(CGFunctionInfo &FI) const;
2618 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2619 CodeGenFunction &CFG) const;
2622 class PTXTargetCodeGenInfo : public TargetCodeGenInfo {
2624 PTXTargetCodeGenInfo(CodeGenTypes &CGT)
2625 : TargetCodeGenInfo(new PTXABIInfo(CGT)) {}
2628 ABIArgInfo PTXABIInfo::classifyReturnType(QualType RetTy) const {
2629 if (RetTy->isVoidType())
2630 return ABIArgInfo::getIgnore();
2631 if (isAggregateTypeForABI(RetTy))
2632 return ABIArgInfo::getIndirect(0);
2633 return ABIArgInfo::getDirect();
2636 ABIArgInfo PTXABIInfo::classifyArgumentType(QualType Ty) const {
2637 if (isAggregateTypeForABI(Ty))
2638 return ABIArgInfo::getIndirect(0);
2640 return ABIArgInfo::getDirect();
2643 void PTXABIInfo::computeInfo(CGFunctionInfo &FI) const {
2644 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
2645 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
2647 it->info = classifyArgumentType(it->type);
2649 // Always honor user-specified calling convention.
2650 if (FI.getCallingConvention() != llvm::CallingConv::C)
2653 // Calling convention as default by an ABI.
2654 llvm::CallingConv::ID DefaultCC;
2655 llvm::StringRef Env = getContext().Target.getTriple().getEnvironmentName();
2656 if (Env == "device")
2657 DefaultCC = llvm::CallingConv::PTX_Device;
2659 DefaultCC = llvm::CallingConv::PTX_Kernel;
2661 FI.setEffectiveCallingConvention(DefaultCC);
2664 llvm::Value *PTXABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2665 CodeGenFunction &CFG) const {
2666 llvm_unreachable("PTX does not support varargs");
2672 //===----------------------------------------------------------------------===//
2673 // SystemZ ABI Implementation
2674 //===----------------------------------------------------------------------===//
2678 class SystemZABIInfo : public ABIInfo {
2680 SystemZABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {}
2682 bool isPromotableIntegerType(QualType Ty) const;
2684 ABIArgInfo classifyReturnType(QualType RetTy) const;
2685 ABIArgInfo classifyArgumentType(QualType RetTy) const;
2687 virtual void computeInfo(CGFunctionInfo &FI) const {
2688 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
2689 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
2691 it->info = classifyArgumentType(it->type);
2694 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2695 CodeGenFunction &CGF) const;
2698 class SystemZTargetCodeGenInfo : public TargetCodeGenInfo {
2700 SystemZTargetCodeGenInfo(CodeGenTypes &CGT)
2701 : TargetCodeGenInfo(new SystemZABIInfo(CGT)) {}
2706 bool SystemZABIInfo::isPromotableIntegerType(QualType Ty) const {
2707 // SystemZ ABI requires all 8, 16 and 32 bit quantities to be extended.
2708 if (const BuiltinType *BT = Ty->getAs<BuiltinType>())
2709 switch (BT->getKind()) {
2710 case BuiltinType::Bool:
2711 case BuiltinType::Char_S:
2712 case BuiltinType::Char_U:
2713 case BuiltinType::SChar:
2714 case BuiltinType::UChar:
2715 case BuiltinType::Short:
2716 case BuiltinType::UShort:
2717 case BuiltinType::Int:
2718 case BuiltinType::UInt:
2726 llvm::Value *SystemZABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2727 CodeGenFunction &CGF) const {
2733 ABIArgInfo SystemZABIInfo::classifyReturnType(QualType RetTy) const {
2734 if (RetTy->isVoidType())
2735 return ABIArgInfo::getIgnore();
2736 if (isAggregateTypeForABI(RetTy))
2737 return ABIArgInfo::getIndirect(0);
2739 return (isPromotableIntegerType(RetTy) ?
2740 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
2743 ABIArgInfo SystemZABIInfo::classifyArgumentType(QualType Ty) const {
2744 if (isAggregateTypeForABI(Ty))
2745 return ABIArgInfo::getIndirect(0);
2747 return (isPromotableIntegerType(Ty) ?
2748 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
2751 //===----------------------------------------------------------------------===//
2752 // MBlaze ABI Implementation
2753 //===----------------------------------------------------------------------===//
2757 class MBlazeABIInfo : public ABIInfo {
2759 MBlazeABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {}
2761 bool isPromotableIntegerType(QualType Ty) const;
2763 ABIArgInfo classifyReturnType(QualType RetTy) const;
2764 ABIArgInfo classifyArgumentType(QualType RetTy) const;
2766 virtual void computeInfo(CGFunctionInfo &FI) const {
2767 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
2768 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
2770 it->info = classifyArgumentType(it->type);
2773 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2774 CodeGenFunction &CGF) const;
2777 class MBlazeTargetCodeGenInfo : public TargetCodeGenInfo {
2779 MBlazeTargetCodeGenInfo(CodeGenTypes &CGT)
2780 : TargetCodeGenInfo(new MBlazeABIInfo(CGT)) {}
2781 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
2782 CodeGen::CodeGenModule &M) const;
2787 bool MBlazeABIInfo::isPromotableIntegerType(QualType Ty) const {
2788 // MBlaze ABI requires all 8 and 16 bit quantities to be extended.
2789 if (const BuiltinType *BT = Ty->getAs<BuiltinType>())
2790 switch (BT->getKind()) {
2791 case BuiltinType::Bool:
2792 case BuiltinType::Char_S:
2793 case BuiltinType::Char_U:
2794 case BuiltinType::SChar:
2795 case BuiltinType::UChar:
2796 case BuiltinType::Short:
2797 case BuiltinType::UShort:
2805 llvm::Value *MBlazeABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2806 CodeGenFunction &CGF) const {
2812 ABIArgInfo MBlazeABIInfo::classifyReturnType(QualType RetTy) const {
2813 if (RetTy->isVoidType())
2814 return ABIArgInfo::getIgnore();
2815 if (isAggregateTypeForABI(RetTy))
2816 return ABIArgInfo::getIndirect(0);
2818 return (isPromotableIntegerType(RetTy) ?
2819 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
2822 ABIArgInfo MBlazeABIInfo::classifyArgumentType(QualType Ty) const {
2823 if (isAggregateTypeForABI(Ty))
2824 return ABIArgInfo::getIndirect(0);
2826 return (isPromotableIntegerType(Ty) ?
2827 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
2830 void MBlazeTargetCodeGenInfo::SetTargetAttributes(const Decl *D,
2831 llvm::GlobalValue *GV,
2832 CodeGen::CodeGenModule &M)
2834 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D);
2837 llvm::CallingConv::ID CC = llvm::CallingConv::C;
2838 if (FD->hasAttr<MBlazeInterruptHandlerAttr>())
2839 CC = llvm::CallingConv::MBLAZE_INTR;
2840 else if (FD->hasAttr<MBlazeSaveVolatilesAttr>())
2841 CC = llvm::CallingConv::MBLAZE_SVOL;
2843 if (CC != llvm::CallingConv::C) {
2844 // Handle 'interrupt_handler' attribute:
2845 llvm::Function *F = cast<llvm::Function>(GV);
2847 // Step 1: Set ISR calling convention.
2848 F->setCallingConv(CC);
2850 // Step 2: Add attributes goodness.
2851 F->addFnAttr(llvm::Attribute::NoInline);
2854 // Step 3: Emit _interrupt_handler alias.
2855 if (CC == llvm::CallingConv::MBLAZE_INTR)
2856 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage,
2857 "_interrupt_handler", GV, &M.getModule());
2861 //===----------------------------------------------------------------------===//
2862 // MSP430 ABI Implementation
2863 //===----------------------------------------------------------------------===//
2867 class MSP430TargetCodeGenInfo : public TargetCodeGenInfo {
2869 MSP430TargetCodeGenInfo(CodeGenTypes &CGT)
2870 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {}
2871 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
2872 CodeGen::CodeGenModule &M) const;
2877 void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D,
2878 llvm::GlobalValue *GV,
2879 CodeGen::CodeGenModule &M) const {
2880 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) {
2881 if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) {
2882 // Handle 'interrupt' attribute:
2883 llvm::Function *F = cast<llvm::Function>(GV);
2885 // Step 1: Set ISR calling convention.
2886 F->setCallingConv(llvm::CallingConv::MSP430_INTR);
2888 // Step 2: Add attributes goodness.
2889 F->addFnAttr(llvm::Attribute::NoInline);
2891 // Step 3: Emit ISR vector alias.
2892 unsigned Num = attr->getNumber() + 0xffe0;
2893 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage,
2894 "vector_" + llvm::Twine::utohexstr(Num),
2895 GV, &M.getModule());
2900 //===----------------------------------------------------------------------===//
2901 // MIPS ABI Implementation. This works for both little-endian and
2902 // big-endian variants.
2903 //===----------------------------------------------------------------------===//
2906 class MipsABIInfo : public ABIInfo {
2908 MipsABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {}
2910 ABIArgInfo classifyReturnType(QualType RetTy) const;
2911 ABIArgInfo classifyArgumentType(QualType RetTy) const;
2912 virtual void computeInfo(CGFunctionInfo &FI) const;
2913 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2914 CodeGenFunction &CGF) const;
2917 class MIPSTargetCodeGenInfo : public TargetCodeGenInfo {
2919 MIPSTargetCodeGenInfo(CodeGenTypes &CGT)
2920 : TargetCodeGenInfo(new MipsABIInfo(CGT)) {}
2922 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const {
2926 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
2927 llvm::Value *Address) const;
2931 ABIArgInfo MipsABIInfo::classifyArgumentType(QualType Ty) const {
2932 if (isAggregateTypeForABI(Ty)) {
2933 // Ignore empty aggregates.
2934 if (getContext().getTypeSize(Ty) == 0)
2935 return ABIArgInfo::getIgnore();
2937 return ABIArgInfo::getIndirect(0);
2940 // Treat an enum type as its underlying type.
2941 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
2942 Ty = EnumTy->getDecl()->getIntegerType();
2944 return (Ty->isPromotableIntegerType() ?
2945 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
2948 ABIArgInfo MipsABIInfo::classifyReturnType(QualType RetTy) const {
2949 if (RetTy->isVoidType())
2950 return ABIArgInfo::getIgnore();
2952 if (isAggregateTypeForABI(RetTy)) {
2953 if (RetTy->isAnyComplexType())
2954 return ABIArgInfo::getDirect();
2956 return ABIArgInfo::getIndirect(0);
2959 // Treat an enum type as its underlying type.
2960 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
2961 RetTy = EnumTy->getDecl()->getIntegerType();
2963 return (RetTy->isPromotableIntegerType() ?
2964 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
2967 void MipsABIInfo::computeInfo(CGFunctionInfo &FI) const {
2968 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
2969 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
2971 it->info = classifyArgumentType(it->type);
2974 llvm::Value* MipsABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2975 CodeGenFunction &CGF) const {
2980 MIPSTargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
2981 llvm::Value *Address) const {
2982 // This information comes from gcc's implementation, which seems to
2983 // as canonical as it gets.
2985 CodeGen::CGBuilderTy &Builder = CGF.Builder;
2986 llvm::LLVMContext &Context = CGF.getLLVMContext();
2988 // Everything on MIPS is 4 bytes. Double-precision FP registers
2989 // are aliased to pairs of single-precision FP registers.
2990 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context);
2991 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4);
2993 // 0-31 are the general purpose registers, $0 - $31.
2994 // 32-63 are the floating-point registers, $f0 - $f31.
2995 // 64 and 65 are the multiply/divide registers, $hi and $lo.
2996 // 66 is the (notional, I think) register for signal-handler return.
2997 AssignToArrayRange(Builder, Address, Four8, 0, 65);
2999 // 67-74 are the floating-point status registers, $fcc0 - $fcc7.
3000 // They are one bit wide and ignored here.
3002 // 80-111 are the coprocessor 0 registers, $c0r0 - $c0r31.
3003 // (coprocessor 1 is the FP unit)
3004 // 112-143 are the coprocessor 2 registers, $c2r0 - $c2r31.
3005 // 144-175 are the coprocessor 3 registers, $c3r0 - $c3r31.
3006 // 176-181 are the DSP accumulator registers.
3007 AssignToArrayRange(Builder, Address, Four8, 80, 181);
3013 const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() {
3014 if (TheTargetCodeGenInfo)
3015 return *TheTargetCodeGenInfo;
3017 // For now we just cache the TargetCodeGenInfo in CodeGenModule and don't
3020 const llvm::Triple &Triple = getContext().Target.getTriple();
3021 switch (Triple.getArch()) {
3023 return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo(Types));
3025 case llvm::Triple::mips:
3026 case llvm::Triple::mipsel:
3027 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types));
3029 case llvm::Triple::arm:
3030 case llvm::Triple::thumb:
3032 ARMABIInfo::ABIKind Kind = ARMABIInfo::AAPCS;
3034 if (strcmp(getContext().Target.getABI(), "apcs-gnu") == 0)
3035 Kind = ARMABIInfo::APCS;
3036 else if (CodeGenOpts.FloatABI == "hard")
3037 Kind = ARMABIInfo::AAPCS_VFP;
3039 return *(TheTargetCodeGenInfo = new ARMTargetCodeGenInfo(Types, Kind));
3042 case llvm::Triple::ppc:
3043 return *(TheTargetCodeGenInfo = new PPC32TargetCodeGenInfo(Types));
3045 case llvm::Triple::ptx32:
3046 case llvm::Triple::ptx64:
3047 return *(TheTargetCodeGenInfo = new PTXTargetCodeGenInfo(Types));
3049 case llvm::Triple::systemz:
3050 return *(TheTargetCodeGenInfo = new SystemZTargetCodeGenInfo(Types));
3052 case llvm::Triple::mblaze:
3053 return *(TheTargetCodeGenInfo = new MBlazeTargetCodeGenInfo(Types));
3055 case llvm::Triple::msp430:
3056 return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo(Types));
3058 case llvm::Triple::x86: {
3059 bool DisableMMX = strcmp(getContext().Target.getABI(), "no-mmx") == 0;
3061 if (Triple.isOSDarwin())
3062 return *(TheTargetCodeGenInfo =
3063 new X86_32TargetCodeGenInfo(Types, true, true, DisableMMX));
3065 switch (Triple.getOS()) {
3066 case llvm::Triple::Cygwin:
3067 case llvm::Triple::MinGW32:
3068 case llvm::Triple::AuroraUX:
3069 case llvm::Triple::DragonFly:
3070 case llvm::Triple::FreeBSD:
3071 case llvm::Triple::OpenBSD:
3072 case llvm::Triple::NetBSD:
3073 return *(TheTargetCodeGenInfo =
3074 new X86_32TargetCodeGenInfo(Types, false, true, DisableMMX));
3077 return *(TheTargetCodeGenInfo =
3078 new X86_32TargetCodeGenInfo(Types, false, false, DisableMMX));
3082 case llvm::Triple::x86_64:
3083 switch (Triple.getOS()) {
3084 case llvm::Triple::Win32:
3085 case llvm::Triple::MinGW32:
3086 case llvm::Triple::Cygwin:
3087 return *(TheTargetCodeGenInfo = new WinX86_64TargetCodeGenInfo(Types));
3089 return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo(Types));