sys/dev/smc/if_smc.c

   1 /*-
   2  * Copyright (c) 2008 Benno Rice.  All rights reserved.
   3  *
   4  * Redistribution and use in source and binary forms, with or without
   5  * modification, are permitted provided that the following conditions
   6  * are met:
   7  * 1. Redistributions of source code must retain the above copyright
   8  *    notice, this list of conditions and the following disclaimer.
   9  * 2. Redistributions in binary form must reproduce the above copyright
  10  *    notice, this list of conditions and the following disclaimer in the
  11  *    documentation and/or other materials provided with the distribution.
  12  *
  13  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  14  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  15  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  16  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  17  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  18  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  19  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  20  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  21  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  22  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  23  */
  24
  25 #include <sys/cdefs.h>
  26 __FBSDID("$FreeBSD$");
  27
  28 /*
  29  * Driver for SMSC LAN91C111, may work for older variants.
  30  */
  31
  32 #ifdef HAVE_KERNEL_OPTION_HEADERS
  33 #include "opt_device_polling.h"
  34 #endif
  35
  36 #include <sys/param.h>
  37 #include <sys/systm.h>
  38 #include <sys/errno.h>
  39 #include <sys/kernel.h>
  40 #include <sys/sockio.h>
  41 #include <sys/malloc.h>
  42 #include <sys/mbuf.h>
  43 #include <sys/queue.h>
  44 #include <sys/socket.h>
  45 #include <sys/syslog.h>
  46 #include <sys/taskqueue.h>
  47
  48 #include <sys/module.h>
  49 #include <sys/bus.h>
  50
  51 #include <machine/bus.h>
  52 #include <machine/resource.h>
  53 #include <sys/rman.h>
  54
  55 #include <net/ethernet.h>
  56 #include <net/if.h>
  57 #include <net/if_arp.h>
  58 #include <net/if_dl.h>
  59 #include <net/if_types.h>
  60 #include <net/if_mib.h>
  61 #include <net/if_media.h>
  62
  63 #ifdef INET
  64 #include <netinet/in.h>
  65 #include <netinet/in_systm.h>
  66 #include <netinet/in_var.h>
  67 #include <netinet/ip.h>
  68 #endif
  69
  70 #include <net/bpf.h>
  71 #include <net/bpfdesc.h>
  72
  73 #include <dev/smc/if_smcreg.h>
  74 #include <dev/smc/if_smcvar.h>
  75
  76 #include <dev/mii/mii.h>
  77 #include <dev/mii/miivar.h>
  78
  79 #define SMC_LOCK(sc)            mtx_lock(&(sc)->smc_mtx)
  80 #define SMC_UNLOCK(sc)          mtx_unlock(&(sc)->smc_mtx)
  81 #define SMC_ASSERT_LOCKED(sc)   mtx_assert(&(sc)->smc_mtx, MA_OWNED)
  82
  83 #define SMC_INTR_PRIORITY       0
  84 #define SMC_RX_PRIORITY         5
  85 #define SMC_TX_PRIORITY         10
  86
  87 devclass_t      smc_devclass;
  88
  89 static const char *smc_chip_ids[16] = {
  90         NULL, NULL, NULL,
  91         /* 3 */ "SMSC LAN91C90 or LAN91C92",
  92         /* 4 */ "SMSC LAN91C94",
  93         /* 5 */ "SMSC LAN91C95",
  94         /* 6 */ "SMSC LAN91C96",
  95         /* 7 */ "SMSC LAN91C100",
  96         /* 8 */ "SMSC LAN91C100FD",
  97         /* 9 */ "SMSC LAN91C110FD or LAN91C111FD",
  98         NULL, NULL, NULL,
  99         NULL, NULL, NULL
 100 };
 101
 102 static void     smc_init(void *);
 103 static void     smc_start(struct ifnet *);
 104 static void     smc_stop(struct smc_softc *);
 105 static int      smc_ioctl(struct ifnet *, u_long, caddr_t);
 106
 107 static void     smc_init_locked(struct smc_softc *);
 108 static void     smc_start_locked(struct ifnet *);
 109 static void     smc_reset(struct smc_softc *);
 110 static int      smc_mii_ifmedia_upd(struct ifnet *);
 111 static void     smc_mii_ifmedia_sts(struct ifnet *, struct ifmediareq *);
 112 static void     smc_mii_tick(void *);
 113 static void     smc_mii_mediachg(struct smc_softc *);
 114 static int      smc_mii_mediaioctl(struct smc_softc *, struct ifreq *, u_long);
 115
 116 static void     smc_task_intr(void *, int);
 117 static void     smc_task_rx(void *, int);
 118 static void     smc_task_tx(void *, int);
 119
 120 static driver_filter_t  smc_intr;
 121 static timeout_t        smc_watchdog;
 122 #ifdef DEVICE_POLLING
 123 static poll_handler_t   smc_poll;
 124 #endif
 125
 126 static __inline void
 127 smc_select_bank(struct smc_softc *sc, uint16_t bank)
 128 {
 129
 130         bus_write_2(sc->smc_reg, BSR, bank & BSR_BANK_MASK);
 131 }
 132
 133 /* Never call this when not in bank 2. */
 134 static __inline void
 135 smc_mmu_wait(struct smc_softc *sc)
 136 {
 137
 138         KASSERT((bus_read_2(sc->smc_reg, BSR) &
 139             BSR_BANK_MASK) == 2, ("%s: smc_mmu_wait called when not in bank 2",
 140             device_get_nameunit(sc->smc_dev)));
 141         while (bus_read_2(sc->smc_reg, MMUCR) & MMUCR_BUSY)
 142                 ;
 143 }
 144
 145 static __inline uint8_t
 146 smc_read_1(struct smc_softc *sc, bus_addr_t offset)
 147 {
 148
 149         return (bus_read_1(sc->smc_reg, offset));
 150 }
 151
 152 static __inline void
 153 smc_write_1(struct smc_softc *sc, bus_addr_t offset, uint8_t val)
 154 {
 155
 156         bus_write_1(sc->smc_reg, offset, val);
 157 }
 158
 159 static __inline uint16_t
 160 smc_read_2(struct smc_softc *sc, bus_addr_t offset)
 161 {
 162
 163         return (bus_read_2(sc->smc_reg, offset));
 164 }
 165
 166 static __inline void
 167 smc_write_2(struct smc_softc *sc, bus_addr_t offset, uint16_t val)
 168 {
 169
 170         bus_write_2(sc->smc_reg, offset, val);
 171 }
 172
 173 static __inline void
 174 smc_read_multi_2(struct smc_softc *sc, bus_addr_t offset, uint16_t *datap,
 175     bus_size_t count)
 176 {
 177
 178         bus_read_multi_2(sc->smc_reg, offset, datap, count);
 179 }
 180
 181 static __inline void
 182 smc_write_multi_2(struct smc_softc *sc, bus_addr_t offset, uint16_t *datap,
 183     bus_size_t count)
 184 {
 185
 186         bus_write_multi_2(sc->smc_reg, offset, datap, count);
 187 }
 188
 189 int
 190 smc_probe(device_t dev)
 191 {
 192         int                     rid, type, error;
 193         uint16_t                val;
 194         struct smc_softc        *sc;
 195         struct resource         *reg;
 196
 197         sc = device_get_softc(dev);
 198         rid = 0;
 199         type = SYS_RES_IOPORT;
 200         error = 0;
 201
 202         if (sc->smc_usemem)
 203                 type = SYS_RES_MEMORY;
 204
 205         reg = bus_alloc_resource(dev, type, &rid, 0, ~0, 16, RF_ACTIVE);
 206         if (reg == NULL) {
 207                 if (bootverbose)
 208                         device_printf(dev,
 209                             "could not allocate I/O resource for probe\n");
 210                 return (ENXIO);
 211         }
 212
 213         /* Check for the identification value in the BSR. */
 214         val = bus_read_2(reg, BSR);
 215         if ((val & BSR_IDENTIFY_MASK) != BSR_IDENTIFY) {
 216                 if (bootverbose)
 217                         device_printf(dev, "identification value not in BSR\n");
 218                 error = ENXIO;
 219                 goto done;
 220         }
 221
 222         /*
 223          * Try switching banks and make sure we still get the identification
 224          * value.
 225          */
 226         bus_write_2(reg, BSR, 0);
 227         val = bus_read_2(reg, BSR);
 228         if ((val & BSR_IDENTIFY_MASK) != BSR_IDENTIFY) {
 229                 if (bootverbose)
 230                         device_printf(dev,
 231                             "identification value not in BSR after write\n");
 232                 error = ENXIO;
 233                 goto done;
 234         }
 235
 236 #if 0
 237         /* Check the BAR. */
 238         bus_write_2(reg, BSR, 1);
 239         val = bus_read_2(reg, BAR);
 240         val = BAR_ADDRESS(val);
 241         if (rman_get_start(reg) != val) {
 242                 if (bootverbose)
 243                         device_printf(dev, "BAR address %x does not match "
 244                             "I/O resource address %lx\n", val,
 245                             rman_get_start(reg));
 246                 error = ENXIO;
 247                 goto done;
 248         }
 249 #endif
 250
 251         /* Compare REV against known chip revisions. */
 252         bus_write_2(reg, BSR, 3);
 253         val = bus_read_2(reg, REV);
 254         val = (val & REV_CHIP_MASK) >> REV_CHIP_SHIFT;
 255         if (smc_chip_ids[val] == NULL) {
 256                 if (bootverbose)
 257                         device_printf(dev, "Unknown chip revision: %d\n", val);
 258                 error = ENXIO;
 259                 goto done;
 260         }
 261
 262         device_set_desc(dev, smc_chip_ids[val]);
 263
 264 done:
 265         bus_release_resource(dev, type, rid, reg);
 266         return (error);
 267 }
 268
 269 int
 270 smc_attach(device_t dev)
 271 {
 272         int                     type, error;
 273         uint16_t                val;
 274         u_char                  eaddr[ETHER_ADDR_LEN];
 275         struct smc_softc        *sc;
 276         struct ifnet            *ifp;
 277
 278         sc = device_get_softc(dev);
 279         error = 0;
 280
 281         sc->smc_dev = dev;
 282
 283         ifp = sc->smc_ifp = if_alloc(IFT_ETHER);
 284         if (ifp == NULL) {
 285                 error = ENOSPC;
 286                 goto done;
 287         }
 288
 289         mtx_init(&sc->smc_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
 290
 291         /* Set up watchdog callout. */
 292         callout_init_mtx(&sc->smc_watchdog, &sc->smc_mtx, 0);
 293
 294         type = SYS_RES_IOPORT;
 295         if (sc->smc_usemem)
 296                 type = SYS_RES_MEMORY;
 297
 298         sc->smc_reg_rid = 0;
 299         sc->smc_reg = bus_alloc_resource(dev, type, &sc->smc_reg_rid, 0, ~0,
 300             16, RF_ACTIVE);
 301         if (sc->smc_reg == NULL) {
 302                 error = ENXIO;
 303                 goto done;
 304         }
 305
 306         sc->smc_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->smc_irq_rid, 0,
 307             ~0, 1, RF_ACTIVE | RF_SHAREABLE);
 308         if (sc->smc_irq == NULL) {
 309                 error = ENXIO;
 310                 goto done;
 311         }
 312
 313         SMC_LOCK(sc);
 314         smc_reset(sc);
 315         SMC_UNLOCK(sc);
 316
 317         smc_select_bank(sc, 3);
 318         val = smc_read_2(sc, REV);
 319         sc->smc_chip = (val & REV_CHIP_MASK) >> REV_CHIP_SHIFT;
 320         sc->smc_rev = (val * REV_REV_MASK) >> REV_REV_SHIFT;
 321         if (bootverbose)
 322                 device_printf(dev, "revision %x\n", sc->smc_rev);
 323
 324         callout_init_mtx(&sc->smc_mii_tick_ch, &sc->smc_mtx,
 325             CALLOUT_RETURNUNLOCKED);
 326         if (sc->smc_chip >= REV_CHIP_91110FD) {
 327                 (void)mii_attach(dev, &sc->smc_miibus, ifp,
 328                     smc_mii_ifmedia_upd, smc_mii_ifmedia_sts, BMSR_DEFCAPMASK,
 329                     MII_PHY_ANY, MII_OFFSET_ANY, 0);
 330                 if (sc->smc_miibus != NULL) {
 331                         sc->smc_mii_tick = smc_mii_tick;
 332                         sc->smc_mii_mediachg = smc_mii_mediachg;
 333                         sc->smc_mii_mediaioctl = smc_mii_mediaioctl;
 334                 }
 335         }
 336
 337         smc_select_bank(sc, 1);
 338         eaddr[0] = smc_read_1(sc, IAR0);
 339         eaddr[1] = smc_read_1(sc, IAR1);
 340         eaddr[2] = smc_read_1(sc, IAR2);
 341         eaddr[3] = smc_read_1(sc, IAR3);
 342         eaddr[4] = smc_read_1(sc, IAR4);
 343         eaddr[5] = smc_read_1(sc, IAR5);
 344
 345         if_initname(ifp, device_get_name(dev), device_get_unit(dev));
 346         ifp->if_softc = sc;
 347         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
 348         ifp->if_init = smc_init;
 349         ifp->if_ioctl = smc_ioctl;
 350         ifp->if_start = smc_start;
 351         IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
 352         IFQ_SET_READY(&ifp->if_snd);
 353
 354         ifp->if_capabilities = ifp->if_capenable = 0;
 355
 356 #ifdef DEVICE_POLLING
 357         ifp->if_capabilities |= IFCAP_POLLING;
 358 #endif
 359
 360         ether_ifattach(ifp, eaddr);
 361
 362         /* Set up taskqueue */
 363         TASK_INIT(&sc->smc_intr, SMC_INTR_PRIORITY, smc_task_intr, ifp);
 364         TASK_INIT(&sc->smc_rx, SMC_RX_PRIORITY, smc_task_rx, ifp);
 365         TASK_INIT(&sc->smc_tx, SMC_TX_PRIORITY, smc_task_tx, ifp);
 366         sc->smc_tq = taskqueue_create_fast("smc_taskq", M_NOWAIT,
 367             taskqueue_thread_enqueue, &sc->smc_tq);
 368         taskqueue_start_threads(&sc->smc_tq, 1, PI_NET, "%s taskq",
 369             device_get_nameunit(sc->smc_dev));
 370
 371         /* Mask all interrupts. */
 372         sc->smc_mask = 0;
 373         smc_write_1(sc, MSK, 0);
 374
 375         /* Wire up interrupt */
 376         error = bus_setup_intr(dev, sc->smc_irq,
 377             INTR_TYPE_NET|INTR_MPSAFE, smc_intr, NULL, sc, &sc->smc_ih);
 378         if (error != 0)
 379                 goto done;
 380
 381 done:
 382         if (error != 0)
 383                 smc_detach(dev);
 384         return (error);
 385 }
 386
 387 int
 388 smc_detach(device_t dev)
 389 {
 390         int                     type;
 391         struct smc_softc        *sc;
 392
 393         sc = device_get_softc(dev);
 394         SMC_LOCK(sc);
 395         smc_stop(sc);
 396         SMC_UNLOCK(sc);
 397
 398         if (sc->smc_ifp != NULL) {
 399                 ether_ifdetach(sc->smc_ifp);
 400         }
 401
 402         callout_drain(&sc->smc_watchdog);
 403         callout_drain(&sc->smc_mii_tick_ch);
 404
 405 #ifdef DEVICE_POLLING
 406         if (sc->smc_ifp->if_capenable & IFCAP_POLLING)
 407                 ether_poll_deregister(sc->smc_ifp);
 408 #endif
 409
 410         if (sc->smc_ih != NULL)
 411                 bus_teardown_intr(sc->smc_dev, sc->smc_irq, sc->smc_ih);
 412
 413         if (sc->smc_tq != NULL) {
 414                 taskqueue_drain(sc->smc_tq, &sc->smc_intr);
 415                 taskqueue_drain(sc->smc_tq, &sc->smc_rx);
 416                 taskqueue_drain(sc->smc_tq, &sc->smc_tx);
 417                 taskqueue_free(sc->smc_tq);
 418                 sc->smc_tq = NULL;
 419         }
 420
 421         if (sc->smc_ifp != NULL) {
 422                 if_free(sc->smc_ifp);
 423         }
 424
 425         if (sc->smc_miibus != NULL) {
 426                 device_delete_child(sc->smc_dev, sc->smc_miibus);
 427                 bus_generic_detach(sc->smc_dev);
 428         }
 429
 430         if (sc->smc_reg != NULL) {
 431                 type = SYS_RES_IOPORT;
 432                 if (sc->smc_usemem)
 433                         type = SYS_RES_MEMORY;
 434
 435                 bus_release_resource(sc->smc_dev, type, sc->smc_reg_rid,
 436                     sc->smc_reg);
 437         }
 438
 439         if (sc->smc_irq != NULL)
 440                 bus_release_resource(sc->smc_dev, SYS_RES_IRQ, sc->smc_irq_rid,
 441                    sc->smc_irq);
 442
 443         if (mtx_initialized(&sc->smc_mtx))
 444                 mtx_destroy(&sc->smc_mtx);
 445
 446         return (0);
 447 }
 448
 449 static void
 450 smc_start(struct ifnet *ifp)
 451 {
 452         struct smc_softc        *sc;
 453
 454         sc = ifp->if_softc;
 455         SMC_LOCK(sc);
 456         smc_start_locked(ifp);
 457         SMC_UNLOCK(sc);
 458 }
 459
 460 static void
 461 smc_start_locked(struct ifnet *ifp)
 462 {
 463         struct smc_softc        *sc;
 464         struct mbuf             *m;
 465         u_int                   len, npages, spin_count;
 466
 467         sc = ifp->if_softc;
 468         SMC_ASSERT_LOCKED(sc);
 469
 470         if (ifp->if_drv_flags & IFF_DRV_OACTIVE)
 471                 return;
 472         if (IFQ_IS_EMPTY(&ifp->if_snd))
 473                 return;
 474
 475         /*
 476          * Grab the next packet.  If it's too big, drop it.
 477          */
 478         IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
 479         len = m_length(m, NULL);
 480         len += (len & 1);
 481         if (len > ETHER_MAX_LEN - ETHER_CRC_LEN) {
 482                 if_printf(ifp, "large packet discarded\n");
 483                 ++ifp->if_oerrors;
 484                 m_freem(m);
 485                 return; /* XXX readcheck? */
 486         }
 487
 488         /*
 489          * Flag that we're busy.
 490          */
 491         ifp->if_drv_flags |= IFF_DRV_OACTIVE;
 492         sc->smc_pending = m;
 493
 494         /*
 495          * Work out how many 256 byte "pages" we need.  We have to include the
 496          * control data for the packet in this calculation.
 497          */
 498         npages = (len * PKT_CTRL_DATA_LEN) >> 8;
 499         if (npages == 0)
 500                 npages = 1;
 501
 502         /*
 503          * Request memory.
 504          */
 505         smc_select_bank(sc, 2);
 506         smc_mmu_wait(sc);
 507         smc_write_2(sc, MMUCR, MMUCR_CMD_TX_ALLOC | npages);
 508
 509         /*
 510          * Spin briefly to see if the allocation succeeds.
 511          */
 512         spin_count = TX_ALLOC_WAIT_TIME;
 513         do {
 514                 if (smc_read_1(sc, IST) & ALLOC_INT) {
 515                         smc_write_1(sc, ACK, ALLOC_INT);
 516                         break;
 517                 }
 518         } while (--spin_count);
 519
 520         /*
 521          * If the allocation is taking too long, unmask the alloc interrupt
 522          * and wait.
 523          */
 524         if (spin_count == 0) {
 525                 sc->smc_mask |= ALLOC_INT;
 526                 if ((ifp->if_capenable & IFCAP_POLLING) == 0)
 527                         smc_write_1(sc, MSK, sc->smc_mask);
 528                 return;
 529         }
 530
 531         taskqueue_enqueue_fast(sc->smc_tq, &sc->smc_tx);
 532 }
 533
 534 static void
 535 smc_task_tx(void *context, int pending)
 536 {
 537         struct ifnet            *ifp;
 538         struct smc_softc        *sc;
 539         struct mbuf             *m, *m0;
 540         u_int                   packet, len;
 541         int                     last_len;
 542         uint8_t                 *data;
 543
 544         (void)pending;
 545         ifp = (struct ifnet *)context;
 546         sc = ifp->if_softc;
 547
 548         SMC_LOCK(sc);
 549
 550         if (sc->smc_pending == NULL) {
 551                 SMC_UNLOCK(sc);
 552                 goto next_packet;
 553         }
 554
 555         m = m0 = sc->smc_pending;
 556         sc->smc_pending = NULL;
 557         smc_select_bank(sc, 2);
 558
 559         /*
 560          * Check the allocation result.
 561          */
 562         packet = smc_read_1(sc, ARR);
 563
 564         /*
 565          * If the allocation failed, requeue the packet and retry.
 566          */
 567         if (packet & ARR_FAILED) {
 568                 IFQ_DRV_PREPEND(&ifp->if_snd, m);
 569                 ++ifp->if_oerrors;
 570                 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
 571                 smc_start_locked(ifp);
 572                 SMC_UNLOCK(sc);
 573                 return;
 574         }
 575
 576         /*
 577          * Tell the device to write to our packet number.
 578          */
 579         smc_write_1(sc, PNR, packet);
 580         smc_write_2(sc, PTR, 0 | PTR_AUTO_INCR);
 581
 582         /*
 583          * Tell the device how long the packet is (including control data).
 584          */
 585         len = m_length(m, 0);
 586         len += PKT_CTRL_DATA_LEN;
 587         smc_write_2(sc, DATA0, 0);
 588         smc_write_2(sc, DATA0, len);
 589
 590         /*
 591          * Push the data out to the device.
 592          */
 593         data = NULL;
 594         last_len = 0;
 595         for (; m != NULL; m = m->m_next) {
 596                 data = mtod(m, uint8_t *);
 597                 smc_write_multi_2(sc, DATA0, (uint16_t *)data, m->m_len / 2);
 598                 last_len = m->m_len;
 599         }
 600
 601         /*
 602          * Push out the control byte and and the odd byte if needed.
 603          */
 604         if ((len & 1) != 0 && data != NULL)
 605                 smc_write_2(sc, DATA0, (CTRL_ODD << 8) | data[last_len - 1]);
 606         else
 607                 smc_write_2(sc, DATA0, 0);
 608
 609         /*
 610          * Unmask the TX empty interrupt.
 611          */
 612         sc->smc_mask |= TX_EMPTY_INT;
 613         if ((ifp->if_capenable & IFCAP_POLLING) == 0)
 614                 smc_write_1(sc, MSK, sc->smc_mask);
 615
 616         /*
 617          * Enqueue the packet.
 618          */
 619         smc_mmu_wait(sc);
 620         smc_write_2(sc, MMUCR, MMUCR_CMD_ENQUEUE);
 621         callout_reset(&sc->smc_watchdog, hz * 2, smc_watchdog, sc);
 622
 623         /*
 624          * Finish up.
 625          */
 626         ifp->if_opackets++;
 627         ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
 628         SMC_UNLOCK(sc);
 629         BPF_MTAP(ifp, m0);
 630         m_freem(m0);
 631
 632 next_packet:
 633         /*
 634          * See if there's anything else to do.
 635          */
 636         smc_start(ifp);
 637 }
 638
 639 static void
 640 smc_task_rx(void *context, int pending)
 641 {
 642         u_int                   packet, status, len;
 643         uint8_t                 *data;
 644         struct ifnet            *ifp;
 645         struct smc_softc        *sc;
 646         struct mbuf             *m, *mhead, *mtail;
 647
 648         (void)pending;
 649         ifp = (struct ifnet *)context;
 650         sc = ifp->if_softc;
 651         mhead = mtail = NULL;
 652
 653         SMC_LOCK(sc);
 654
 655         packet = smc_read_1(sc, FIFO_RX);
 656         while ((packet & FIFO_EMPTY) == 0) {
 657                 /*
 658                  * Grab an mbuf and attach a cluster.
 659                  */
 660                 MGETHDR(m, M_DONTWAIT, MT_DATA);
 661                 if (m == NULL) {
 662                         break;
 663                 }
 664                 MCLGET(m, M_DONTWAIT);
 665                 if ((m->m_flags & M_EXT) == 0) {
 666                         m_freem(m);
 667                         break;
 668                 }
 669
 670                 /*
 671                  * Point to the start of the packet.
 672                  */
 673                 smc_select_bank(sc, 2);
 674                 smc_write_1(sc, PNR, packet);
 675                 smc_write_2(sc, PTR, 0 | PTR_READ | PTR_RCV | PTR_AUTO_INCR);
 676
 677                 /*
 678                  * Grab status and packet length.
 679                  */
 680                 status = smc_read_2(sc, DATA0);
 681                 len = smc_read_2(sc, DATA0) & RX_LEN_MASK;
 682                 len -= 6;
 683                 if (status & RX_ODDFRM)
 684                         len += 1;
 685
 686                 /*
 687                  * Check for errors.
 688                  */
 689                 if (status & (RX_TOOSHORT | RX_TOOLNG | RX_BADCRC | RX_ALGNERR)) {
 690                         smc_mmu_wait(sc);
 691                         smc_write_2(sc, MMUCR, MMUCR_CMD_RELEASE);
 692                         ifp->if_ierrors++;
 693                         m_freem(m);
 694                         break;
 695                 }
 696
 697                 /*
 698                  * Set the mbuf up the way we want it.
 699                  */
 700                 m->m_pkthdr.rcvif = ifp;
 701                 m->m_pkthdr.len = m->m_len = len + 2; /* XXX: Is this right? */
 702                 m_adj(m, ETHER_ALIGN);
 703
 704                 /*
 705                  * Pull the packet out of the device.  Make sure we're in the
 706                  * right bank first as things may have changed while we were
 707                  * allocating our mbuf.
 708                  */
 709                 smc_select_bank(sc, 2);
 710                 smc_write_1(sc, PNR, packet);
 711                 smc_write_2(sc, PTR, 4 | PTR_READ | PTR_RCV | PTR_AUTO_INCR);
 712                 data = mtod(m, uint8_t *);
 713                 smc_read_multi_2(sc, DATA0, (uint16_t *)data, len >> 1);
 714                 if (len & 1) {
 715                         data += len & ~1;
 716                         *data = smc_read_1(sc, DATA0);
 717                 }
 718
 719                 /*
 720                  * Tell the device we're done.
 721                  */
 722                 smc_mmu_wait(sc);
 723                 smc_write_2(sc, MMUCR, MMUCR_CMD_RELEASE);
 724                 if (m == NULL) {
 725                         break;
 726                 }
 727
 728                 if (mhead == NULL) {
 729                         mhead = mtail = m;
 730                         m->m_next = NULL;
 731                 } else {
 732                         mtail->m_next = m;
 733                         mtail = m;
 734                 }
 735                 packet = smc_read_1(sc, FIFO_RX);
 736         }
 737
 738         sc->smc_mask |= RCV_INT;
 739         if ((ifp->if_capenable & IFCAP_POLLING) == 0)
 740                 smc_write_1(sc, MSK, sc->smc_mask);
 741
 742         SMC_UNLOCK(sc);
 743
 744         while (mhead != NULL) {
 745                 m = mhead;
 746                 mhead = mhead->m_next;
 747                 m->m_next = NULL;
 748                 ifp->if_ipackets++;
 749                 (*ifp->if_input)(ifp, m);
 750         }
 751 }
 752
 753 #ifdef DEVICE_POLLING
 754 static void
 755 smc_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
 756 {
 757         struct smc_softc        *sc;
 758
 759         sc = ifp->if_softc;
 760
 761         SMC_LOCK(sc);
 762         if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
 763                 SMC_UNLOCK(sc);
 764                 return;
 765         }
 766         SMC_UNLOCK(sc);
 767
 768         if (cmd == POLL_AND_CHECK_STATUS)
 769                 taskqueue_enqueue_fast(sc->smc_tq, &sc->smc_intr);
 770 }
 771 #endif
 772
 773 static int
 774 smc_intr(void *context)
 775 {
 776         struct smc_softc        *sc;
 777
 778         sc = (struct smc_softc *)context;
 779         taskqueue_enqueue_fast(sc->smc_tq, &sc->smc_intr);
 780         return (FILTER_HANDLED);
 781 }
 782
 783 static void
 784 smc_task_intr(void *context, int pending)
 785 {
 786         struct smc_softc        *sc;
 787         struct ifnet            *ifp;
 788         u_int                   status, packet, counter, tcr;
 789
 790         (void)pending;
 791         ifp = (struct ifnet *)context;
 792         sc = ifp->if_softc;
 793
 794         SMC_LOCK(sc);
 795
 796         smc_select_bank(sc, 2);
 797
 798         /*
 799          * Get the current mask, and then block all interrupts while we're
 800          * working.
 801          */
 802         if ((ifp->if_capenable & IFCAP_POLLING) == 0)
 803                 smc_write_1(sc, MSK, 0);
 804
 805         /*
 806          * Find out what interrupts are flagged.
 807          */
 808         status = smc_read_1(sc, IST) & sc->smc_mask;
 809
 810         /*
 811          * Transmit error
 812          */
 813         if (status & TX_INT) {
 814                 /*
 815                  * Kill off the packet if there is one and re-enable transmit.
 816                  */
 817                 packet = smc_read_1(sc, FIFO_TX);
 818                 if ((packet & FIFO_EMPTY) == 0) {
 819                         smc_write_1(sc, PNR, packet);
 820                         smc_write_2(sc, PTR, 0 | PTR_READ |
 821                             PTR_AUTO_INCR);
 822                         tcr = smc_read_2(sc, DATA0);
 823                         if ((tcr & EPHSR_TX_SUC) == 0)
 824                                 device_printf(sc->smc_dev,
 825                                     "bad packet\n");
 826                         smc_mmu_wait(sc);
 827                         smc_write_2(sc, MMUCR, MMUCR_CMD_RELEASE_PKT);
 828
 829                         smc_select_bank(sc, 0);
 830                         tcr = smc_read_2(sc, TCR);
 831                         tcr |= TCR_TXENA | TCR_PAD_EN;
 832                         smc_write_2(sc, TCR, tcr);
 833                         smc_select_bank(sc, 2);
 834                         taskqueue_enqueue_fast(sc->smc_tq, &sc->smc_tx);
 835                 }
 836
 837                 /*
 838                  * Ack the interrupt.
 839                  */
 840                 smc_write_1(sc, ACK, TX_INT);
 841         }
 842
 843         /*
 844          * Receive
 845          */
 846         if (status & RCV_INT) {
 847                 smc_write_1(sc, ACK, RCV_INT);
 848                 sc->smc_mask &= ~RCV_INT;
 849                 taskqueue_enqueue_fast(sc->smc_tq, &sc->smc_rx);
 850         }
 851
 852         /*
 853          * Allocation
 854          */
 855         if (status & ALLOC_INT) {
 856                 smc_write_1(sc, ACK, ALLOC_INT);
 857                 sc->smc_mask &= ~ALLOC_INT;
 858                 taskqueue_enqueue_fast(sc->smc_tq, &sc->smc_tx);
 859         }
 860
 861         /*
 862          * Receive overrun
 863          */
 864         if (status & RX_OVRN_INT) {
 865                 smc_write_1(sc, ACK, RX_OVRN_INT);
 866                 ifp->if_ierrors++;
 867         }
 868
 869         /*
 870          * Transmit empty
 871          */
 872         if (status & TX_EMPTY_INT) {
 873                 smc_write_1(sc, ACK, TX_EMPTY_INT);
 874                 sc->smc_mask &= ~TX_EMPTY_INT;
 875                 callout_stop(&sc->smc_watchdog);
 876
 877                 /*
 878                  * Update collision stats.
 879                  */
 880                 smc_select_bank(sc, 0);
 881                 counter = smc_read_2(sc, ECR);
 882                 smc_select_bank(sc, 2);
 883                 ifp->if_collisions +=
 884                     (counter & ECR_SNGLCOL_MASK) >> ECR_SNGLCOL_SHIFT;
 885                 ifp->if_collisions +=
 886                     (counter & ECR_MULCOL_MASK) >> ECR_MULCOL_SHIFT;
 887
 888                 /*
 889                  * See if there are any packets to transmit.
 890                  */
 891                 taskqueue_enqueue_fast(sc->smc_tq, &sc->smc_tx);
 892         }
 893
 894         /*
 895          * Update the interrupt mask.
 896          */
 897         if ((ifp->if_capenable & IFCAP_POLLING) == 0)
 898                 smc_write_1(sc, MSK, sc->smc_mask);
 899
 900         SMC_UNLOCK(sc);
 901 }
 902
 903 static u_int
 904 smc_mii_readbits(struct smc_softc *sc, int nbits)
 905 {
 906         u_int   mgmt, mask, val;
 907
 908         SMC_ASSERT_LOCKED(sc);
 909         KASSERT((smc_read_2(sc, BSR) & BSR_BANK_MASK) == 3,
 910             ("%s: smc_mii_readbits called with bank %d (!= 3)",
 911             device_get_nameunit(sc->smc_dev),
 912             smc_read_2(sc, BSR) & BSR_BANK_MASK));
 913
 914         /*
 915          * Set up the MGMT (aka MII) register.
 916          */
 917         mgmt = smc_read_2(sc, MGMT) & ~(MGMT_MCLK | MGMT_MDOE | MGMT_MDO);
 918         smc_write_2(sc, MGMT, mgmt);
 919
 920         /*
 921          * Read the bits in.
 922          */
 923         for (mask = 1 << (nbits - 1), val = 0; mask; mask >>= 1) {
 924                 if (smc_read_2(sc, MGMT) & MGMT_MDI)
 925                         val |= mask;
 926
 927                 smc_write_2(sc, MGMT, mgmt);
 928                 DELAY(1);
 929                 smc_write_2(sc, MGMT, mgmt | MGMT_MCLK);
 930                 DELAY(1);
 931         }
 932
 933         return (val);
 934 }
 935
 936 static void
 937 smc_mii_writebits(struct smc_softc *sc, u_int val, int nbits)
 938 {
 939         u_int   mgmt, mask;
 940
 941         SMC_ASSERT_LOCKED(sc);
 942         KASSERT((smc_read_2(sc, BSR) & BSR_BANK_MASK) == 3,
 943             ("%s: smc_mii_writebits called with bank %d (!= 3)",
 944             device_get_nameunit(sc->smc_dev),
 945             smc_read_2(sc, BSR) & BSR_BANK_MASK));
 946
 947         /*
 948          * Set up the MGMT (aka MII) register).
 949          */
 950         mgmt = smc_read_2(sc, MGMT) & ~(MGMT_MCLK | MGMT_MDOE | MGMT_MDO);
 951         mgmt |= MGMT_MDOE;
 952
 953         /*
 954          * Push the bits out.
 955          */
 956         for (mask = 1 << (nbits - 1); mask; mask >>= 1) {
 957                 if (val & mask)
 958                         mgmt |= MGMT_MDO;
 959                 else
 960                         mgmt &= ~MGMT_MDO;
 961
 962                 smc_write_2(sc, MGMT, mgmt);
 963                 DELAY(1);
 964                 smc_write_2(sc, MGMT, mgmt | MGMT_MCLK);
 965                 DELAY(1);
 966         }
 967 }
 968
 969 int
 970 smc_miibus_readreg(device_t dev, int phy, int reg)
 971 {
 972         struct smc_softc        *sc;
 973         int                     val;
 974
 975         sc = device_get_softc(dev);
 976
 977         SMC_LOCK(sc);
 978
 979         smc_select_bank(sc, 3);
 980
 981         /*
 982          * Send out the idle pattern.
 983          */
 984         smc_mii_writebits(sc, 0xffffffff, 32);
 985
 986         /*
 987          * Start code + read opcode + phy address + phy register
 988          */
 989         smc_mii_writebits(sc, 6 << 10 | phy << 5 | reg, 14);
 990
 991         /*
 992          * Turnaround + data
 993          */
 994         val = smc_mii_readbits(sc, 18);
 995
 996         /*
 997          * Reset the MDIO interface.
 998          */
 999         smc_write_2(sc, MGMT,
1000             smc_read_2(sc, MGMT) & ~(MGMT_MCLK | MGMT_MDOE | MGMT_MDO));
1001
1002         SMC_UNLOCK(sc);
1003         return (val);
1004 }
1005
1006 int
1007 smc_miibus_writereg(device_t dev, int phy, int reg, int data)
1008 {
1009         struct smc_softc        *sc;
1010
1011         sc = device_get_softc(dev);
1012
1013         SMC_LOCK(sc);
1014
1015         smc_select_bank(sc, 3);
1016
1017         /*
1018          * Send idle pattern.
1019          */
1020         smc_mii_writebits(sc, 0xffffffff, 32);
1021
1022         /*
1023          * Start code + write opcode + phy address + phy register + turnaround
1024          * + data.
1025          */
1026         smc_mii_writebits(sc, 5 << 28 | phy << 23 | reg << 18 | 2 << 16 | data,
1027             32);
1028
1029         /*
1030          * Reset MDIO interface.
1031          */
1032         smc_write_2(sc, MGMT,
1033             smc_read_2(sc, MGMT) & ~(MGMT_MCLK | MGMT_MDOE | MGMT_MDO));
1034
1035         SMC_UNLOCK(sc);
1036         return (0);
1037 }
1038
1039 void
1040 smc_miibus_statchg(device_t dev)
1041 {
1042         struct smc_softc        *sc;
1043         struct mii_data         *mii;
1044         uint16_t                tcr;
1045
1046         sc = device_get_softc(dev);
1047         mii = device_get_softc(sc->smc_miibus);
1048
1049         SMC_LOCK(sc);
1050
1051         smc_select_bank(sc, 0);
1052         tcr = smc_read_2(sc, TCR);
1053
1054         if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0)
1055                 tcr |= TCR_SWFDUP;
1056         else
1057                 tcr &= ~TCR_SWFDUP;
1058
1059         smc_write_2(sc, TCR, tcr);
1060
1061         SMC_UNLOCK(sc);
1062 }
1063
1064 static int
1065 smc_mii_ifmedia_upd(struct ifnet *ifp)
1066 {
1067         struct smc_softc        *sc;
1068         struct mii_data         *mii;
1069
1070         sc = ifp->if_softc;
1071         if (sc->smc_miibus == NULL)
1072                 return (ENXIO);
1073
1074         mii = device_get_softc(sc->smc_miibus);
1075         return (mii_mediachg(mii));
1076 }
1077
1078 static void
1079 smc_mii_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1080 {
1081         struct smc_softc        *sc;
1082         struct mii_data         *mii;
1083
1084         sc = ifp->if_softc;
1085         if (sc->smc_miibus == NULL)
1086                 return;
1087
1088         mii = device_get_softc(sc->smc_miibus);
1089         mii_pollstat(mii);
1090         ifmr->ifm_active = mii->mii_media_active;
1091         ifmr->ifm_status = mii->mii_media_status;
1092 }
1093
1094 static void
1095 smc_mii_tick(void *context)
1096 {
1097         struct smc_softc        *sc;
1098
1099         sc = (struct smc_softc *)context;
1100
1101         if (sc->smc_miibus == NULL)
1102                 return;
1103
1104         SMC_UNLOCK(sc);
1105
1106         mii_tick(device_get_softc(sc->smc_miibus));
1107         callout_reset(&sc->smc_mii_tick_ch, hz, smc_mii_tick, sc);
1108 }
1109
1110 static void
1111 smc_mii_mediachg(struct smc_softc *sc)
1112 {
1113
1114         if (sc->smc_miibus == NULL)
1115                 return;
1116         mii_mediachg(device_get_softc(sc->smc_miibus));
1117 }
1118
1119 static int
1120 smc_mii_mediaioctl(struct smc_softc *sc, struct ifreq *ifr, u_long command)
1121 {
1122         struct mii_data *mii;
1123
1124         if (sc->smc_miibus == NULL)
1125                 return (EINVAL);
1126
1127         mii = device_get_softc(sc->smc_miibus);
1128         return (ifmedia_ioctl(sc->smc_ifp, ifr, &mii->mii_media, command));
1129 }
1130
1131 static void
1132 smc_reset(struct smc_softc *sc)
1133 {
1134         u_int   ctr;
1135
1136         SMC_ASSERT_LOCKED(sc);
1137
1138         smc_select_bank(sc, 2);
1139
1140         /*
1141          * Mask all interrupts.
1142          */
1143         smc_write_1(sc, MSK, 0);
1144
1145         /*
1146          * Tell the device to reset.
1147          */
1148         smc_select_bank(sc, 0);
1149         smc_write_2(sc, RCR, RCR_SOFT_RST);
1150
1151         /*
1152          * Set up the configuration register.
1153          */
1154         smc_select_bank(sc, 1);
1155         smc_write_2(sc, CR, CR_EPH_POWER_EN);
1156         DELAY(1);
1157
1158         /*
1159          * Turn off transmit and receive.
1160          */
1161         smc_select_bank(sc, 0);
1162         smc_write_2(sc, TCR, 0);
1163         smc_write_2(sc, RCR, 0);
1164
1165         /*
1166          * Set up the control register.
1167          */
1168         smc_select_bank(sc, 1);
1169         ctr = smc_read_2(sc, CTR);
1170         ctr |= CTR_LE_ENABLE | CTR_AUTO_RELEASE;
1171         smc_write_2(sc, CTR, ctr);
1172
1173         /*
1174          * Reset the MMU.
1175          */
1176         smc_select_bank(sc, 2);
1177         smc_mmu_wait(sc);
1178         smc_write_2(sc, MMUCR, MMUCR_CMD_MMU_RESET);
1179 }
1180
1181 static void
1182 smc_enable(struct smc_softc *sc)
1183 {
1184         struct ifnet            *ifp;
1185
1186         SMC_ASSERT_LOCKED(sc);
1187         ifp = sc->smc_ifp;
1188
1189         /*
1190          * Set up the receive/PHY control register.
1191          */
1192         smc_select_bank(sc, 0);
1193         smc_write_2(sc, RPCR, RPCR_ANEG | (RPCR_LED_LINK_ANY << RPCR_LSA_SHIFT)
1194             | (RPCR_LED_ACT_ANY << RPCR_LSB_SHIFT));
1195
1196         /*
1197          * Set up the transmit and receive control registers.
1198          */
1199         smc_write_2(sc, TCR, TCR_TXENA | TCR_PAD_EN);
1200         smc_write_2(sc, RCR, RCR_RXEN | RCR_STRIP_CRC);
1201
1202         /*
1203          * Set up the interrupt mask.
1204          */
1205         smc_select_bank(sc, 2);
1206         sc->smc_mask = EPH_INT | RX_OVRN_INT | RCV_INT | TX_INT;
1207         if ((ifp->if_capenable & IFCAP_POLLING) != 0)
1208                 smc_write_1(sc, MSK, sc->smc_mask);
1209 }
1210
1211 static void
1212 smc_stop(struct smc_softc *sc)
1213 {
1214
1215         SMC_ASSERT_LOCKED(sc);
1216
1217         /*
1218          * Turn off callouts.
1219          */
1220         callout_stop(&sc->smc_watchdog);
1221         callout_stop(&sc->smc_mii_tick_ch);
1222
1223         /*
1224          * Mask all interrupts.
1225          */
1226         smc_select_bank(sc, 2);
1227         sc->smc_mask = 0;
1228         smc_write_1(sc, MSK, 0);
1229 #ifdef DEVICE_POLLING
1230         ether_poll_deregister(sc->smc_ifp);
1231         sc->smc_ifp->if_capenable &= ~IFCAP_POLLING;
1232         sc->smc_ifp->if_capenable &= ~IFCAP_POLLING_NOCOUNT;
1233 #endif
1234
1235         /*
1236          * Disable transmit and receive.
1237          */
1238         smc_select_bank(sc, 0);
1239         smc_write_2(sc, TCR, 0);
1240         smc_write_2(sc, RCR, 0);
1241
1242         sc->smc_ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1243 }
1244
1245 static void
1246 smc_watchdog(void *arg)
1247 {
1248         struct smc_softc        *sc;
1249
1250         sc = (struct smc_softc *)arg;
1251         device_printf(sc->smc_dev, "watchdog timeout\n");
1252         taskqueue_enqueue_fast(sc->smc_tq, &sc->smc_intr);
1253 }
1254
1255 static void
1256 smc_init(void *context)
1257 {
1258         struct smc_softc        *sc;
1259
1260         sc = (struct smc_softc *)context;
1261         SMC_LOCK(sc);
1262         smc_init_locked(sc);
1263         SMC_UNLOCK(sc);
1264 }
1265
1266 static void
1267 smc_init_locked(struct smc_softc *sc)
1268 {
1269         struct ifnet    *ifp;
1270
1271         ifp = sc->smc_ifp;
1272
1273         SMC_ASSERT_LOCKED(sc);
1274
1275         smc_reset(sc);
1276         smc_enable(sc);
1277
1278         ifp->if_drv_flags |= IFF_DRV_RUNNING;
1279         ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1280
1281         smc_start_locked(ifp);
1282
1283         if (sc->smc_mii_tick != NULL)
1284                 callout_reset(&sc->smc_mii_tick_ch, hz, sc->smc_mii_tick, sc);
1285
1286 #ifdef DEVICE_POLLING
1287         SMC_UNLOCK(sc);
1288         ether_poll_register(smc_poll, ifp);
1289         SMC_LOCK(sc);
1290         ifp->if_capenable |= IFCAP_POLLING;
1291         ifp->if_capenable |= IFCAP_POLLING_NOCOUNT;
1292 #endif
1293 }
1294
1295 static int
1296 smc_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1297 {
1298         struct smc_softc        *sc;
1299         int                     error;
1300
1301         sc = ifp->if_softc;
1302         error = 0;
1303
1304         switch (cmd) {
1305         case SIOCSIFFLAGS:
1306                 if ((ifp->if_flags & IFF_UP) == 0 &&
1307                     (ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) {
1308                         SMC_LOCK(sc);
1309                         smc_stop(sc);
1310                         SMC_UNLOCK(sc);
1311                 } else {
1312                         smc_init(sc);
1313                         if (sc->smc_mii_mediachg != NULL)
1314                                 sc->smc_mii_mediachg(sc);
1315                 }
1316                 break;
1317
1318         case SIOCADDMULTI:
1319         case SIOCDELMULTI:
1320                 /* XXX
1321                 SMC_LOCK(sc);
1322                 smc_setmcast(sc);
1323                 SMC_UNLOCK(sc);
1324                 */
1325                 error = EINVAL;
1326                 break;
1327
1328         case SIOCGIFMEDIA:
1329         case SIOCSIFMEDIA:
1330                 if (sc->smc_mii_mediaioctl == NULL) {
1331                         error = EINVAL;
1332                         break;
1333                 }
1334                 sc->smc_mii_mediaioctl(sc, (struct ifreq *)data, cmd);
1335                 break;
1336
1337         default:
1338                 error = ether_ioctl(ifp, cmd, data);
1339                 break;
1340         }
1341
1342         return (error);
1343 }