2 * Copyright (c) 2007, 2014 Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
37 #include <linux/bitops.h>
38 #include <linux/compiler.h>
39 #include <linux/list.h>
40 #include <linux/mutex.h>
41 #include <linux/kobject.h>
42 #include <linux/netdevice.h>
43 #include <linux/if_vlan.h>
44 #include <linux/if_ether.h>
45 #ifdef CONFIG_MLX4_EN_DCB
46 #include <linux/dcbnl.h>
49 #include <linux/mlx4/device.h>
50 #include <linux/mlx4/qp.h>
51 #include <linux/mlx4/cq.h>
52 #include <linux/mlx4/srq.h>
53 #include <linux/mlx4/doorbell.h>
54 #include <linux/mlx4/cmd.h>
56 #include <netinet/tcp_lro.h>
59 #include "mlx4_stats.h"
61 #define DRV_NAME "mlx4_en"
62 #define DRV_VERSION "2.1"
63 #define DRV_RELDATE __DATE__
65 #define MLX4_EN_MSG_LEVEL (NETIF_MSG_LINK | NETIF_MSG_IFDOWN)
72 #define MLX4_EN_PAGE_SHIFT 12
73 #define MLX4_EN_PAGE_SIZE (1 << MLX4_EN_PAGE_SHIFT)
74 #define DEF_RX_RINGS 16
75 #define MAX_RX_RINGS 128
76 #define MIN_RX_RINGS 4
78 #define HEADROOM (2048 / TXBB_SIZE + 1)
79 #define STAMP_STRIDE 64
80 #define STAMP_DWORDS (STAMP_STRIDE / 4)
81 #define STAMP_SHIFT 31
82 #define STAMP_VAL 0x7fffffff
83 #define STATS_DELAY (HZ / 4)
84 #define SERVICE_TASK_DELAY (HZ / 4)
85 #define MAX_NUM_OF_FS_RULES 256
87 #define MLX4_EN_FILTER_HASH_SHIFT 4
88 #define MLX4_EN_FILTER_EXPIRY_QUOTA 60
90 #ifdef CONFIG_NET_RX_BUSY_POLL
91 #define LL_EXTENDED_STATS
94 /* vlan valid range */
95 #define VLAN_MIN_VALUE 1
96 #define VLAN_MAX_VALUE 4094
98 /* Typical TSO descriptor with 16 gather entries is 352 bytes... */
99 #define MAX_DESC_SIZE 512
100 #define MAX_DESC_TXBBS (MAX_DESC_SIZE / TXBB_SIZE)
103 * OS related constants and tunables
106 #define MLX4_EN_WATCHDOG_TIMEOUT (15 * HZ)
108 #define MLX4_EN_ALLOC_SIZE PAGE_ALIGN(PAGE_SIZE)
109 #define MLX4_EN_ALLOC_ORDER get_order(MLX4_EN_ALLOC_SIZE)
111 enum mlx4_en_alloc_type {
112 MLX4_EN_ALLOC_NEW = 0,
113 MLX4_EN_ALLOC_REPLACEMENT = 1,
116 /* Receive fragment sizes; we use at most 3 fragments (for 9600 byte MTU
117 * and 4K allocations) */
118 #if MJUMPAGESIZE == 4096
121 FRAG_SZ1 = MJUMPAGESIZE,
122 FRAG_SZ2 = MJUMPAGESIZE,
124 #define MLX4_EN_MAX_RX_FRAGS 3
125 #elif MJUMPAGESIZE == 8192
128 FRAG_SZ1 = MJUMPAGESIZE,
130 #define MLX4_EN_MAX_RX_FRAGS 2
131 #elif MJUMPAGESIZE == 8192
133 #error "Unknown PAGE_SIZE"
136 /* Maximum ring sizes */
137 #define MLX4_EN_DEF_TX_QUEUE_SIZE 4096
139 /* Minimum packet number till arming the CQ */
140 #define MLX4_EN_MIN_RX_ARM 2048
141 #define MLX4_EN_MIN_TX_ARM 2048
143 /* Maximum ring sizes */
144 #define MLX4_EN_MAX_TX_SIZE 8192
145 #define MLX4_EN_MAX_RX_SIZE 8192
147 /* Minimum ring sizes */
148 #define MLX4_EN_MIN_RX_SIZE (4096 / TXBB_SIZE)
149 #define MLX4_EN_MIN_TX_SIZE (4096 / TXBB_SIZE)
151 #define MLX4_EN_SMALL_PKT_SIZE 64
153 #define MLX4_EN_MAX_TX_RING_P_UP 32
154 #define MLX4_EN_NUM_UP 1
156 #define MAX_TX_RINGS (MLX4_EN_MAX_TX_RING_P_UP * \
157 (MLX4_EN_NUM_UP + 1))
159 #define MLX4_EN_DEF_TX_RING_SIZE 1024
160 #define MLX4_EN_DEF_RX_RING_SIZE 1024
162 /* Target number of bytes to coalesce with interrupt moderation */
163 #define MLX4_EN_RX_COAL_TARGET 0x20000
164 #define MLX4_EN_RX_COAL_TIME 0x10
166 #define MLX4_EN_TX_COAL_PKTS 64
167 #define MLX4_EN_TX_COAL_TIME 64
169 #define MLX4_EN_RX_RATE_LOW 400000
170 #define MLX4_EN_RX_COAL_TIME_LOW 0
171 #define MLX4_EN_RX_RATE_HIGH 450000
172 #define MLX4_EN_RX_COAL_TIME_HIGH 128
173 #define MLX4_EN_RX_SIZE_THRESH 1024
174 #define MLX4_EN_RX_RATE_THRESH (1000000 / MLX4_EN_RX_COAL_TIME_HIGH)
175 #define MLX4_EN_SAMPLE_INTERVAL 0
176 #define MLX4_EN_AVG_PKT_SMALL 256
178 #define MLX4_EN_AUTO_CONF 0xffff
180 #define MLX4_EN_DEF_RX_PAUSE 1
181 #define MLX4_EN_DEF_TX_PAUSE 1
183 /* Interval between successive polls in the Tx routine when polling is used
184 instead of interrupts (in per-core Tx rings) - should be power of 2 */
185 #define MLX4_EN_TX_POLL_MODER 16
186 #define MLX4_EN_TX_POLL_TIMEOUT (HZ / 4)
188 #define MLX4_EN_64_ALIGN (64 - NET_SKB_PAD)
189 #define SMALL_PACKET_SIZE (256 - NET_IP_ALIGN)
190 #define HEADER_COPY_SIZE (128)
191 #define MLX4_LOOPBACK_TEST_PAYLOAD (HEADER_COPY_SIZE - ETHER_HDR_LEN)
193 #define MLX4_EN_MIN_MTU 46
194 #define ETH_BCAST 0xffffffffffffULL
196 #define MLX4_EN_LOOPBACK_RETRIES 5
197 #define MLX4_EN_LOOPBACK_TIMEOUT 100
199 #ifdef MLX4_EN_PERF_STAT
200 /* Number of samples to 'average' */
202 #define AVG_FACTOR 1024
204 #define INC_PERF_COUNTER(cnt) (++(cnt))
205 #define ADD_PERF_COUNTER(cnt, add) ((cnt) += (add))
206 #define AVG_PERF_COUNTER(cnt, sample) \
207 ((cnt) = ((cnt) * (AVG_SIZE - 1) + (sample) * AVG_FACTOR) / AVG_SIZE)
208 #define GET_PERF_COUNTER(cnt) (cnt)
209 #define GET_AVG_PERF_COUNTER(cnt) ((cnt) / AVG_FACTOR)
213 #define INC_PERF_COUNTER(cnt) do {} while (0)
214 #define ADD_PERF_COUNTER(cnt, add) do {} while (0)
215 #define AVG_PERF_COUNTER(cnt, sample) do {} while (0)
216 #define GET_PERF_COUNTER(cnt) (0)
217 #define GET_AVG_PERF_COUNTER(cnt) (0)
218 #endif /* MLX4_EN_PERF_STAT */
233 #define ROUNDUP_LOG2(x) ilog2(roundup_pow_of_two(x))
234 #define XNOR(x, y) (!(x) == !(y))
235 #define ILLEGAL_MAC(addr) (addr == 0xffffffffffffULL || addr == 0x0)
237 struct mlx4_en_tx_info {
251 #define MLX4_EN_BIT_DESC_OWN 0x80000000
252 #define CTRL_SIZE sizeof(struct mlx4_wqe_ctrl_seg)
253 #define MLX4_EN_MEMTYPE_PAD 0x100
254 #define DS_SIZE sizeof(struct mlx4_wqe_data_seg)
257 struct mlx4_en_tx_desc {
258 struct mlx4_wqe_ctrl_seg ctrl;
260 struct mlx4_wqe_data_seg data; /* at least one data segment */
261 struct mlx4_wqe_lso_seg lso;
262 struct mlx4_wqe_inline_seg inl;
266 #define MLX4_EN_USE_SRQ 0x01000000
268 #define MLX4_EN_TX_BUDGET 64*4 //Compensate for no NAPI in freeBSD - might need some fine tunning in the future.
269 #define MLX4_EN_RX_BUDGET 64
271 #define MLX4_EN_CX3_LOW_ID 0x1000
272 #define MLX4_EN_CX3_HIGH_ID 0x1005
274 struct mlx4_en_tx_ring {
276 struct mlx4_hwq_resources wqres;
277 u32 size ; /* number of TXBBs */
280 u16 cqn; /* index of port CQ associated with this ring */
288 struct mlx4_en_tx_info *tx_info;
291 cpuset_t affinity_mask;
295 struct mlx4_qp_context context;
297 enum mlx4_qp_state qp_state;
298 struct mlx4_srq dummy;
300 unsigned long packets;
301 unsigned long tx_csum;
302 unsigned long queue_stopped;
303 unsigned long wake_queue;
306 struct netdev_queue *tx_queue;
307 int hwtstamp_tx_type;
308 spinlock_t comp_lock;
314 struct mlx4_en_rx_desc {
315 /* actual number of entries depends on rx ring stride */
316 struct mlx4_wqe_data_seg data[0];
319 struct mlx4_en_rx_buf {
322 unsigned int page_offset;
325 struct mlx4_en_rx_ring {
326 struct mlx4_hwq_resources wqres;
327 u32 size ; /* number of Rx descs*/
332 u16 cqn; /* index of port CQ associated with this ring */
344 unsigned long errors;
346 unsigned long packets;
347 #ifdef LL_EXTENDED_STATS
348 unsigned long yields;
349 unsigned long misses;
350 unsigned long cleaned;
352 unsigned long csum_ok;
353 unsigned long csum_none;
354 int hwtstamp_rx_filter;
359 static inline int mlx4_en_can_lro(__be16 status)
361 static __be16 status_all;
362 static __be16 status_ipv4_ipok_tcp;
363 static __be16 status_ipv6_ipok_tcp;
365 status_all = cpu_to_be16(
366 MLX4_CQE_STATUS_IPV4 |
367 MLX4_CQE_STATUS_IPV4F |
368 MLX4_CQE_STATUS_IPV6 |
369 MLX4_CQE_STATUS_IPV4OPT |
370 MLX4_CQE_STATUS_TCP |
371 MLX4_CQE_STATUS_UDP |
372 MLX4_CQE_STATUS_IPOK);
373 status_ipv4_ipok_tcp = cpu_to_be16(
374 MLX4_CQE_STATUS_IPV4 |
375 MLX4_CQE_STATUS_IPOK |
376 MLX4_CQE_STATUS_TCP);
377 status_ipv6_ipok_tcp = cpu_to_be16(
378 MLX4_CQE_STATUS_IPV6 |
379 MLX4_CQE_STATUS_IPOK |
380 MLX4_CQE_STATUS_TCP);
382 status &= status_all;
383 return (status == status_ipv4_ipok_tcp ||
384 status == status_ipv6_ipok_tcp);
390 struct mlx4_hwq_resources wqres;
393 struct net_device *dev;
394 /* Per-core Tx cq processing support */
395 struct timer_list timer;
402 struct mlx4_cqe *buf;
404 struct taskqueue *tq;
405 #define MLX4_EN_OPCODE_ERROR 0x1e
409 #ifdef CONFIG_NET_RX_BUSY_POLL
411 #define MLX4_EN_CQ_STATEIDLE 0
412 #define MLX4_EN_CQ_STATENAPI 1 /* NAPI owns this CQ */
413 #define MLX4_EN_CQ_STATEPOLL 2 /* poll owns this CQ */
414 #define MLX4_CQ_LOCKED (MLX4_EN_CQ_STATENAPI | MLX4_EN_CQ_STATEPOLL)
415 #define MLX4_EN_CQ_STATENAPI_YIELD 4 /* NAPI yielded this CQ */
416 #define MLX4_EN_CQ_STATEPOLL_YIELD 8 /* poll yielded this CQ */
417 #define CQ_YIELD (MLX4_EN_CQ_STATENAPI_YIELD | MLX4_EN_CQ_STATEPOLL_YIELD)
418 #define CQ_USER_PEND (MLX4_EN_CQ_STATEPOLL | MLX4_EN_CQ_STATEPOLL_YIELD)
419 spinlock_t poll_lock; /* protects from LLS/napi conflicts */
420 #endif /* CONFIG_NET_RX_BUSY_POLL */
423 struct mlx4_en_port_profile {
436 struct mlx4_en_profile {
443 u8 num_tx_rings_p_up;
444 struct mlx4_en_port_profile prof[MLX4_MAX_PORTS + 1];
448 struct mlx4_dev *dev;
449 struct pci_dev *pdev;
450 struct mutex state_lock;
451 struct net_device *pndev[MLX4_MAX_PORTS + 1];
454 struct mlx4_en_profile profile;
456 struct workqueue_struct *workqueue;
457 struct device *dma_device;
458 void __iomem *uar_map;
459 struct mlx4_uar priv_uar;
463 u8 mac_removed[MLX4_MAX_PORTS + 1];
464 unsigned long last_overflow_check;
465 unsigned long overflow_period;
469 struct mlx4_en_rss_map {
471 struct mlx4_qp qps[MAX_RX_RINGS];
472 enum mlx4_qp_state state[MAX_RX_RINGS];
473 struct mlx4_qp indir_qp;
474 enum mlx4_qp_state indir_state;
477 struct mlx4_en_port_state {
484 enum mlx4_en_mclist_act {
490 struct mlx4_en_mc_list {
491 struct list_head list;
492 enum mlx4_en_mclist_act action;
497 #ifdef CONFIG_MLX4_EN_DCB
498 /* Minimal TC BW - setting to 0 will block traffic */
499 #define MLX4_EN_BW_MIN 1
500 #define MLX4_EN_BW_MAX 100 /* Utilize 100% of the line */
502 #define MLX4_EN_TC_ETS 7
508 MLX4_EN_FLAG_PROMISC = (1 << 0),
509 MLX4_EN_FLAG_MC_PROMISC = (1 << 1),
510 /* whether we need to enable hardware loopback by putting dmac
513 MLX4_EN_FLAG_ENABLE_HW_LOOPBACK = (1 << 2),
514 /* whether we need to drop packets that hardware loopback-ed */
515 MLX4_EN_FLAG_RX_FILTER_NEEDED = (1 << 3),
516 MLX4_EN_FLAG_FORCE_PROMISC = (1 << 4),
517 #ifdef CONFIG_MLX4_EN_DCB
518 MLX4_EN_FLAG_DCB_ENABLED = (1 << 5)
522 #define MLX4_EN_MAC_HASH_SIZE (1 << BITS_PER_BYTE)
523 #define MLX4_EN_MAC_HASH_IDX 5
527 struct mlx4_dev *dev;
532 struct mlx4_en_frag_info {
534 u16 frag_prefix_size;
538 struct mlx4_en_priv {
539 struct mlx4_en_dev *mdev;
540 struct mlx4_en_port_profile *prof;
541 struct net_device *dev;
542 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
543 struct mlx4_en_port_state port_state;
544 spinlock_t stats_lock;
545 /* To allow rules removal while port is going down */
546 struct list_head ethtool_list;
548 unsigned long last_moder_packets[MAX_RX_RINGS];
549 unsigned long last_moder_tx_packets;
550 unsigned long last_moder_bytes[MAX_RX_RINGS];
551 unsigned long last_moder_jiffies;
552 int last_moder_time[MAX_RX_RINGS];
562 u32 adaptive_rx_coal;
565 u32 validate_loopback;
567 struct mlx4_hwq_resources res;
575 unsigned char current_mac[ETH_ALEN + 2];
582 struct mlx4_en_rss_map rss_map;
585 u8 num_tx_rings_p_up;
589 struct mlx4_en_frag_info frag_info[MLX4_EN_MAX_RX_FRAGS];
596 struct mlx4_en_tx_ring **tx_ring;
597 struct mlx4_en_rx_ring *rx_ring[MAX_RX_RINGS];
598 struct mlx4_en_cq **tx_cq;
599 struct mlx4_en_cq *rx_cq[MAX_RX_RINGS];
600 struct mlx4_qp drop_qp;
601 struct work_struct rx_mode_task;
602 struct work_struct watchdog_task;
603 struct work_struct linkstate_task;
604 struct delayed_work stats_task;
605 struct delayed_work service_task;
606 struct mlx4_en_perf_stats pstats;
607 struct mlx4_en_pkt_stats pkstats;
608 struct mlx4_en_flow_stats flowstats[MLX4_NUM_PRIORITIES];
609 struct mlx4_en_port_stats port_stats;
610 struct mlx4_en_vport_stats vport_stats;
611 struct mlx4_en_vf_stats vf_stats;
612 DECLARE_BITMAP(stats_bitmap, NUM_ALL_STATS);
613 struct list_head mc_list;
614 struct list_head curr_list;
616 struct mlx4_en_stat_out_mbox hw_stats;
620 struct dentry *dev_root;
622 eventhandler_tag vlan_attach;
623 eventhandler_tag vlan_detach;
624 struct callout watchdog_timer;
625 struct ifmedia media;
626 volatile int blocked;
627 struct sysctl_oid *sysctl;
628 struct sysctl_ctx_list conf_ctx;
629 struct sysctl_ctx_list stat_ctx;
630 #define MLX4_EN_MAC_HASH_IDX 5
631 struct hlist_head mac_hash[MLX4_EN_MAC_HASH_SIZE];
633 #ifdef CONFIG_MLX4_EN_DCB
635 u16 maxrate[IEEE_8021QAZ_MAX_TCS];
638 #ifdef CONFIG_RFS_ACCEL
639 spinlock_t filters_lock;
641 struct list_head filters;
642 struct hlist_head filter_hash[1 << MLX4_EN_FILTER_HASH_SHIFT];
644 struct en_port *vf_ports[MLX4_MAX_NUM_VF];
645 unsigned long last_ifq_jiffies;
646 u64 if_counters_rx_errors;
647 u64 if_counters_rx_no_buffer;
652 MLX4_EN_WOL_MAGIC = (1ULL << 61),
653 MLX4_EN_WOL_ENABLED = (1ULL << 62),
656 struct mlx4_mac_entry {
657 struct hlist_node hlist;
658 unsigned char mac[ETH_ALEN + 2];
662 #ifdef CONFIG_NET_RX_BUSY_POLL
663 static inline void mlx4_en_cq_init_lock(struct mlx4_en_cq *cq)
665 spin_lock_init(&cq->poll_lock);
666 cq->state = MLX4_EN_CQ_STATEIDLE;
669 /* called from the device poll rutine to get ownership of a cq */
670 static inline bool mlx4_en_cq_lock_napi(struct mlx4_en_cq *cq)
673 spin_lock(&cq->poll_lock);
674 if (cq->state & MLX4_CQ_LOCKED) {
675 WARN_ON(cq->state & MLX4_EN_CQ_STATENAPI);
676 cq->state |= MLX4_EN_CQ_STATENAPI_YIELD;
679 /* we don't care if someone yielded */
680 cq->state = MLX4_EN_CQ_STATENAPI;
681 spin_unlock(&cq->poll_lock);
685 /* returns true is someone tried to get the cq while napi had it */
686 static inline bool mlx4_en_cq_unlock_napi(struct mlx4_en_cq *cq)
689 spin_lock(&cq->poll_lock);
690 WARN_ON(cq->state & (MLX4_EN_CQ_STATEPOLL |
691 MLX4_EN_CQ_STATENAPI_YIELD));
693 if (cq->state & MLX4_EN_CQ_STATEPOLL_YIELD)
695 cq->state = MLX4_EN_CQ_STATEIDLE;
696 spin_unlock(&cq->poll_lock);
700 /* called from mlx4_en_low_latency_poll() */
701 static inline bool mlx4_en_cq_lock_poll(struct mlx4_en_cq *cq)
704 spin_lock_bh(&cq->poll_lock);
705 if ((cq->state & MLX4_CQ_LOCKED)) {
706 struct net_device *dev = cq->dev;
707 struct mlx4_en_priv *priv = netdev_priv(dev);
708 struct mlx4_en_rx_ring *rx_ring = priv->rx_ring[cq->ring];
710 cq->state |= MLX4_EN_CQ_STATEPOLL_YIELD;
712 #ifdef LL_EXTENDED_STATS
716 /* preserve yield marks */
717 cq->state |= MLX4_EN_CQ_STATEPOLL;
718 spin_unlock_bh(&cq->poll_lock);
722 /* returns true if someone tried to get the cq while it was locked */
723 static inline bool mlx4_en_cq_unlock_poll(struct mlx4_en_cq *cq)
726 spin_lock_bh(&cq->poll_lock);
727 WARN_ON(cq->state & (MLX4_EN_CQ_STATENAPI));
729 if (cq->state & MLX4_EN_CQ_STATEPOLL_YIELD)
731 cq->state = MLX4_EN_CQ_STATEIDLE;
732 spin_unlock_bh(&cq->poll_lock);
736 /* true if a socket is polling, even if it did not get the lock */
737 static inline bool mlx4_en_cq_ll_polling(struct mlx4_en_cq *cq)
739 WARN_ON(!(cq->state & MLX4_CQ_LOCKED));
740 return cq->state & CQ_USER_PEND;
743 static inline void mlx4_en_cq_init_lock(struct mlx4_en_cq *cq)
747 static inline bool mlx4_en_cq_lock_napi(struct mlx4_en_cq *cq)
752 static inline bool mlx4_en_cq_unlock_napi(struct mlx4_en_cq *cq)
757 static inline bool mlx4_en_cq_lock_poll(struct mlx4_en_cq *cq)
762 static inline bool mlx4_en_cq_unlock_poll(struct mlx4_en_cq *cq)
767 static inline bool mlx4_en_cq_ll_polling(struct mlx4_en_cq *cq)
771 #endif /* CONFIG_NET_RX_BUSY_POLL */
773 #define MLX4_EN_WOL_DO_MODIFY (1ULL << 63)
775 void mlx4_en_destroy_netdev(struct net_device *dev);
776 int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
777 struct mlx4_en_port_profile *prof);
779 int mlx4_en_start_port(struct net_device *dev);
780 void mlx4_en_stop_port(struct net_device *dev);
782 void mlx4_en_free_resources(struct mlx4_en_priv *priv);
783 int mlx4_en_alloc_resources(struct mlx4_en_priv *priv);
785 int mlx4_en_pre_config(struct mlx4_en_priv *priv);
786 int mlx4_en_create_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq **pcq,
787 int entries, int ring, enum cq_type mode, int node);
788 void mlx4_en_destroy_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq **pcq);
789 int mlx4_en_activate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq,
791 void mlx4_en_deactivate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq);
792 int mlx4_en_set_cq_moder(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq);
793 int mlx4_en_arm_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq);
795 void mlx4_en_tx_irq(struct mlx4_cq *mcq);
796 u16 mlx4_en_select_queue(struct net_device *dev, struct mbuf *mb);
798 int mlx4_en_transmit(struct ifnet *dev, struct mbuf *m);
799 int mlx4_en_create_tx_ring(struct mlx4_en_priv *priv,
800 struct mlx4_en_tx_ring **pring,
801 u32 size, u16 stride, int node, int queue_idx);
802 void mlx4_en_destroy_tx_ring(struct mlx4_en_priv *priv,
803 struct mlx4_en_tx_ring **pring);
804 int mlx4_en_activate_tx_ring(struct mlx4_en_priv *priv,
805 struct mlx4_en_tx_ring *ring,
806 int cq, int user_prio);
807 void mlx4_en_deactivate_tx_ring(struct mlx4_en_priv *priv,
808 struct mlx4_en_tx_ring *ring);
809 void mlx4_en_qflush(struct ifnet *dev);
811 int mlx4_en_create_rx_ring(struct mlx4_en_priv *priv,
812 struct mlx4_en_rx_ring **pring,
814 void mlx4_en_destroy_rx_ring(struct mlx4_en_priv *priv,
815 struct mlx4_en_rx_ring **pring,
816 u32 size, u16 stride);
817 void mlx4_en_tx_que(void *context, int pending);
818 void mlx4_en_rx_que(void *context, int pending);
819 int mlx4_en_activate_rx_rings(struct mlx4_en_priv *priv);
820 void mlx4_en_deactivate_rx_ring(struct mlx4_en_priv *priv,
821 struct mlx4_en_rx_ring *ring);
822 int mlx4_en_process_rx_cq(struct net_device *dev,
823 struct mlx4_en_cq *cq,
825 void mlx4_en_poll_tx_cq(unsigned long data);
826 void mlx4_en_fill_qp_context(struct mlx4_en_priv *priv, int size, int stride,
827 int is_tx, int rss, int qpn, int cqn, int user_prio,
828 struct mlx4_qp_context *context);
829 void mlx4_en_sqp_event(struct mlx4_qp *qp, enum mlx4_event event);
830 int mlx4_en_map_buffer(struct mlx4_buf *buf);
831 void mlx4_en_unmap_buffer(struct mlx4_buf *buf);
832 void mlx4_en_calc_rx_buf(struct net_device *dev);
834 int mlx4_en_config_rss_steer(struct mlx4_en_priv *priv);
835 void mlx4_en_release_rss_steer(struct mlx4_en_priv *priv);
836 int mlx4_en_create_drop_qp(struct mlx4_en_priv *priv);
837 void mlx4_en_destroy_drop_qp(struct mlx4_en_priv *priv);
838 int mlx4_en_free_tx_buf(struct net_device *dev, struct mlx4_en_tx_ring *ring);
839 void mlx4_en_rx_irq(struct mlx4_cq *mcq);
841 int mlx4_SET_MCAST_FLTR(struct mlx4_dev *dev, u8 port, u64 mac, u64 clear, u8 mode);
842 int mlx4_SET_VLAN_FLTR(struct mlx4_dev *dev, struct mlx4_en_priv *priv);
844 int mlx4_en_DUMP_ETH_STATS(struct mlx4_en_dev *mdev, u8 port, u8 reset);
845 int mlx4_en_QUERY_PORT(struct mlx4_en_dev *mdev, u8 port);
846 int mlx4_en_get_vport_stats(struct mlx4_en_dev *mdev, u8 port);
847 void mlx4_en_create_debug_files(struct mlx4_en_priv *priv);
848 void mlx4_en_delete_debug_files(struct mlx4_en_priv *priv);
849 int mlx4_en_register_debugfs(void);
850 void mlx4_en_unregister_debugfs(void);
852 #ifdef CONFIG_MLX4_EN_DCB
853 extern const struct dcbnl_rtnl_ops mlx4_en_dcbnl_ops;
854 extern const struct dcbnl_rtnl_ops mlx4_en_dcbnl_pfc_ops;
857 int mlx4_en_setup_tc(struct net_device *dev, u8 up);
859 #ifdef CONFIG_RFS_ACCEL
860 void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv,
861 struct mlx4_en_rx_ring *rx_ring);
864 #define MLX4_EN_NUM_SELF_TEST 5
865 void mlx4_en_ex_selftest(struct net_device *dev, u32 *flags, u64 *buf);
866 void mlx4_en_ptp_overflow_check(struct mlx4_en_dev *mdev);
869 * Functions for time stamping
871 #define SKBTX_HW_TSTAMP (1 << 0)
872 #define SKBTX_IN_PROGRESS (1 << 2)
874 u64 mlx4_en_get_cqe_ts(struct mlx4_cqe *cqe);
876 /* Functions for caching and restoring statistics */
877 int mlx4_en_get_sset_count(struct net_device *dev, int sset);
878 void mlx4_en_restore_ethtool_stats(struct mlx4_en_priv *priv,
884 extern const struct ethtool_ops mlx4_en_ethtool_ops;
887 * Defines for link speed - needed by selftest
889 #define MLX4_EN_LINK_SPEED_1G 1000
890 #define MLX4_EN_LINK_SPEED_10G 10000
891 #define MLX4_EN_LINK_SPEED_40G 40000
894 NETIF_MSG_DRV = 0x0001,
895 NETIF_MSG_PROBE = 0x0002,
896 NETIF_MSG_LINK = 0x0004,
897 NETIF_MSG_TIMER = 0x0008,
898 NETIF_MSG_IFDOWN = 0x0010,
899 NETIF_MSG_IFUP = 0x0020,
900 NETIF_MSG_RX_ERR = 0x0040,
901 NETIF_MSG_TX_ERR = 0x0080,
902 NETIF_MSG_TX_QUEUED = 0x0100,
903 NETIF_MSG_INTR = 0x0200,
904 NETIF_MSG_TX_DONE = 0x0400,
905 NETIF_MSG_RX_STATUS = 0x0800,
906 NETIF_MSG_PKTDATA = 0x1000,
907 NETIF_MSG_HW = 0x2000,
908 NETIF_MSG_WOL = 0x4000,
913 * printk / logging functions
916 #define en_print(level, priv, format, arg...) \
918 if ((priv)->registered) \
919 printk(level "%s: %s: " format, DRV_NAME, \
920 (priv->dev)->if_xname, ## arg); \
922 printk(level "%s: %s: Port %d: " format, \
923 DRV_NAME, dev_name(&priv->mdev->pdev->dev), \
924 (priv)->port, ## arg); \
928 #define en_dbg(mlevel, priv, format, arg...) \
930 if (NETIF_MSG_##mlevel & priv->msg_enable) \
931 en_print(KERN_DEBUG, priv, format, ##arg); \
933 #define en_warn(priv, format, arg...) \
934 en_print(KERN_WARNING, priv, format, ##arg)
935 #define en_err(priv, format, arg...) \
936 en_print(KERN_ERR, priv, format, ##arg)
937 #define en_info(priv, format, arg...) \
938 en_print(KERN_INFO, priv, format, ## arg)
940 #define mlx4_err(mdev, format, arg...) \
941 pr_err("%s %s: " format, DRV_NAME, \
942 dev_name(&mdev->pdev->dev), ##arg)
943 #define mlx4_info(mdev, format, arg...) \
944 pr_info("%s %s: " format, DRV_NAME, \
945 dev_name(&mdev->pdev->dev), ##arg)
946 #define mlx4_warn(mdev, format, arg...) \
947 pr_warning("%s %s: " format, DRV_NAME, \
948 dev_name(&mdev->pdev->dev), ##arg)