2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/init.h>
36 #include <linux/mlx4/cmd.h>
37 #include <linux/mlx4/srq.h>
42 struct mlx4_srq_context {
43 __be32 state_logsize_srqn;
52 __be32 mtt_base_addr_l;
54 __be16 limit_watermark;
62 void mlx4_srq_event(struct mlx4_dev *dev, u32 srqn, int event_type)
64 struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table;
67 spin_lock(&srq_table->lock);
69 srq = radix_tree_lookup(&dev->srq_table_tree,
70 srqn & (dev->caps.num_srqs - 1));
72 atomic_inc(&srq->refcount);
74 spin_unlock(&srq_table->lock);
77 mlx4_warn(dev, "Async event for bogus SRQ %08x\n", srqn);
81 srq->event(srq, event_type);
83 if (atomic_dec_and_test(&srq->refcount))
87 static int mlx4_SW2HW_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox,
90 return mlx4_cmd(dev, mailbox->dma, srq_num, 0, MLX4_CMD_SW2HW_SRQ,
91 MLX4_CMD_TIME_CLASS_A);
94 static int mlx4_HW2SW_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox,
97 return mlx4_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, srq_num,
98 mailbox ? 0 : 1, MLX4_CMD_HW2SW_SRQ,
99 MLX4_CMD_TIME_CLASS_A);
102 static int mlx4_ARM_SRQ(struct mlx4_dev *dev, int srq_num, int limit_watermark)
104 return mlx4_cmd(dev, limit_watermark, srq_num, 0, MLX4_CMD_ARM_SRQ,
105 MLX4_CMD_TIME_CLASS_B);
108 static int mlx4_QUERY_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox,
111 return mlx4_cmd_box(dev, 0, mailbox->dma, srq_num, 0, MLX4_CMD_QUERY_SRQ,
112 MLX4_CMD_TIME_CLASS_A);
115 int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, u32 cqn, u16 xrcd,
116 struct mlx4_mtt *mtt, u64 db_rec, struct mlx4_srq *srq)
118 struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table;
119 struct mlx4_cmd_mailbox *mailbox;
120 struct mlx4_srq_context *srq_context;
124 srq->srqn = mlx4_bitmap_alloc(&srq_table->bitmap);
128 err = mlx4_table_get(dev, &srq_table->table, srq->srqn);
132 err = mlx4_table_get(dev, &srq_table->cmpt_table, srq->srqn);
136 spin_lock_irq(&srq_table->lock);
137 err = radix_tree_insert(&dev->srq_table_tree, srq->srqn, srq);
138 spin_unlock_irq(&srq_table->lock);
142 mailbox = mlx4_alloc_cmd_mailbox(dev);
143 if (IS_ERR(mailbox)) {
144 err = PTR_ERR(mailbox);
148 srq_context = mailbox->buf;
149 memset(srq_context, 0, sizeof *srq_context);
151 srq_context->state_logsize_srqn = cpu_to_be32((ilog2(srq->max) << 24) |
153 srq_context->logstride = srq->wqe_shift - 4;
154 srq_context->xrc_domain = cpu_to_be16(xrcd);
155 srq_context->pg_offset_cqn = cpu_to_be32(cqn & 0xffffff);
156 srq_context->log_page_size = mtt->page_shift - MLX4_ICM_PAGE_SHIFT;
158 mtt_addr = mlx4_mtt_addr(dev, mtt);
159 srq_context->mtt_base_addr_h = mtt_addr >> 32;
160 srq_context->mtt_base_addr_l = cpu_to_be32(mtt_addr & 0xffffffff);
161 srq_context->pd = cpu_to_be32(pdn);
162 srq_context->db_rec_addr = cpu_to_be64(db_rec);
164 err = mlx4_SW2HW_SRQ(dev, mailbox, srq->srqn);
165 mlx4_free_cmd_mailbox(dev, mailbox);
169 atomic_set(&srq->refcount, 1);
170 init_completion(&srq->free);
175 spin_lock_irq(&srq_table->lock);
176 radix_tree_delete(&dev->srq_table_tree, srq->srqn);
177 spin_unlock_irq(&srq_table->lock);
180 mlx4_table_put(dev, &srq_table->cmpt_table, srq->srqn);
183 mlx4_table_put(dev, &srq_table->table, srq->srqn);
186 mlx4_bitmap_free(&srq_table->bitmap, srq->srqn);
190 EXPORT_SYMBOL_GPL(mlx4_srq_alloc);
192 void mlx4_srq_invalidate(struct mlx4_dev *dev, struct mlx4_srq *srq)
196 err = mlx4_HW2SW_SRQ(dev, NULL, srq->srqn);
198 mlx4_warn(dev, "HW2SW_SRQ failed (%d) for SRQN %06x\n", err, srq->srqn);
200 EXPORT_SYMBOL_GPL(mlx4_srq_invalidate);
202 void mlx4_srq_remove(struct mlx4_dev *dev, struct mlx4_srq *srq)
204 struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table;
206 spin_lock_irq(&srq_table->lock);
207 radix_tree_delete(&dev->srq_table_tree, srq->srqn);
208 spin_unlock_irq(&srq_table->lock);
210 EXPORT_SYMBOL_GPL(mlx4_srq_remove);
212 void mlx4_srq_free(struct mlx4_dev *dev, struct mlx4_srq *srq)
214 struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table;
216 if (atomic_dec_and_test(&srq->refcount))
217 complete(&srq->free);
218 wait_for_completion(&srq->free);
220 mlx4_table_put(dev, &srq_table->table, srq->srqn);
221 mlx4_bitmap_free(&srq_table->bitmap, srq->srqn);
223 EXPORT_SYMBOL_GPL(mlx4_srq_free);
225 int mlx4_srq_arm(struct mlx4_dev *dev, struct mlx4_srq *srq, int limit_watermark)
227 return mlx4_ARM_SRQ(dev, srq->srqn, limit_watermark);
229 EXPORT_SYMBOL_GPL(mlx4_srq_arm);
231 int mlx4_srq_query(struct mlx4_dev *dev, struct mlx4_srq *srq, int *limit_watermark)
233 struct mlx4_cmd_mailbox *mailbox;
234 struct mlx4_srq_context *srq_context;
237 mailbox = mlx4_alloc_cmd_mailbox(dev);
239 return PTR_ERR(mailbox);
241 srq_context = mailbox->buf;
243 err = mlx4_QUERY_SRQ(dev, mailbox, srq->srqn);
246 *limit_watermark = be16_to_cpu(srq_context->limit_watermark);
249 mlx4_free_cmd_mailbox(dev, mailbox);
252 EXPORT_SYMBOL_GPL(mlx4_srq_query);
254 int mlx4_init_srq_table(struct mlx4_dev *dev)
256 struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table;
259 spin_lock_init(&srq_table->lock);
260 INIT_RADIX_TREE(&dev->srq_table_tree, GFP_ATOMIC);
262 err = mlx4_bitmap_init(&srq_table->bitmap, dev->caps.num_srqs,
263 dev->caps.num_srqs - 1, dev->caps.reserved_srqs, 0);
270 void mlx4_cleanup_srq_table(struct mlx4_dev *dev)
272 mlx4_bitmap_cleanup(&mlx4_priv(dev)->srq_table.bitmap);