hselasky [Fri, 23 May 2014 06:20:25 +0000 (06:20 +0000)]
MFC r265358, r265427, r265777, r265783,
r265806, r265872, r266012 and r266394:
- Multiple DWC OTG host mode related fixes, improvements and optimisations.
- Add full support for ISOCHRONOUS transfers to the DWC OTG driver.
- Use the interrupt filter to handle basic USB FIFO interrupts.
- Fixed unbalanced unlock in case of "dwc_otg_init_fifo()" failure.
- Add common spinlock to the USB bus structure.
gavin [Thu, 22 May 2014 20:55:57 +0000 (20:55 +0000)]
Merge r266111 from head:
Fix typo. Note that although this file is under contrib, it has diverged
sufficiently from upstream (including a full whitespace commit and large
portions rewritten) that this change does not move us further from the
upstream.
ken [Thu, 22 May 2014 16:34:00 +0000 (16:34 +0000)]
MFC mpr(4) changes: r265484, r265485, r265709 and r265712
------------------------------------------------------------------------
r265484 | ken | 2014-05-06 23:11:16 -0600 (Tue, 06 May 2014) | 5 lines
Remove some debugging code.
Submitted by: Steve McConnell <stephen.mcconnell@avagotech.com>
------------------------------------------------------------------------
------------------------------------------------------------------------
r265485 | ken | 2014-05-06 23:14:48 -0600 (Tue, 06 May 2014) | 9 lines
Hold the SIM lock when calling xpt_create_path() and xpt_action() in
mprsas_SSU_to_SATA_devices().
This fixes an assertion on shutdown with INVARIANTS enabled with SATA
drives present on an IR firmware controller.
Reviewed by: Steve McConnell <stephen.mcconnell@avagotech.com>.
------------------------------------------------------------------------
------------------------------------------------------------------------
r265709 | ken | 2014-05-08 14:28:22 -0600 (Thu, 08 May 2014) | 15 lines
Fix TLR (Transport Layer Retry) support in the mps(4) and mpr(4) drivers.
TLR is necessary for reliable communication with SAS tape drives.
This was broken by change 246713 in the mps(4) driver. It changed the
cm_data field for SCSI I/O requests to point to the CCB instead of the data
buffer. So, instead, look at the CCB's data pointer to determine whether
or not we're talking to a tape drive.
Also, take the residual into account to make sure that we don't go off the
end of the request.
Sponsored by: Spectra Logic Corporation
------------------------------------------------------------------------
------------------------------------------------------------------------
r265712 | ken | 2014-05-08 14:46:46 -0600 (Thu, 08 May 2014) | 10 lines
Add #ifdefs in the mpr(4) driver so that versions of stable/9 that
have implemented the PIM_NOSCAN rescan functionality will have it
enabled.
truckman [Thu, 22 May 2014 00:39:49 +0000 (00:39 +0000)]
MFC r266426
Slightly restructure the final loop in rman_reserve_resource_bound().
Replace with the existing loop termination test with a similar
condition from the nested "if" that may terminate the loop a bit
sooner, but still not too early. This condition can then be removed
from the nested "if". Relocate an operator to be style(9) compliant.
pho [Wed, 21 May 2014 09:19:05 +0000 (09:19 +0000)]
MFC r265534:
msync(2) must return ENOMEM and not EINVAL when the address is outside the
allowed range or when one or more pages are not mapped. This according to
The Open Group Base Specifications Issue 7.
jhb [Tue, 20 May 2014 21:05:36 +0000 (21:05 +0000)]
MFC 260237:
Fix a bug in the HPET emulation where a timer interrupt could be lost when the
guest disables the HPET.
The HPET timer interrupt is triggered from the callout handler associated with
the timer. It is possible for the callout handler to be delayed before it gets
a chance to execute. If the guest disables the HPET during this window then the
handler never gets a chance to execute and the timer interrupt is lost.
This is now fixed by injecting a timer interrupt into the guest if the callout
time is detected to be in the past when the HPET is disabled.
thomas [Mon, 19 May 2014 10:08:05 +0000 (10:08 +0000)]
MFC rev. 265926:
(NANO_CONFIG): New variable containing path of config file, so that
the configuration can reference additional files relative to its own
location.
(NANO_MODULES): If set to "default", install all built modules.
ian [Sun, 18 May 2014 19:28:15 +0000 (19:28 +0000)]
MFC r256790:
Fix the VCVT instruction. It must round towards zero when converting from
a floating-point to an integer value. This was not the case causing issues
when printing certain values.
ian [Sun, 18 May 2014 16:07:35 +0000 (16:07 +0000)]
MFC 256942, 256943:
- Fix a typo.
- Use bus_dmamap_unload(), it is not optional.
- The new allocator won't return coherent memory for any size > PAGE_SIZE,
so don't assume we have coherent memory, and explicitely use
bus_dmamap_sync().
jhb [Sun, 18 May 2014 15:28:25 +0000 (15:28 +0000)]
MFC 264765,264766:
- Don't claim the adapter is idle if it is clearing a drive.
- Fix an off by one error when checking for the stop event. This
resulted in not showing the most recent event by default.
- When the stop even is hit, break out of the outer loop to stop
fetching more events.
jhb [Sun, 18 May 2014 04:33:24 +0000 (04:33 +0000)]
MFC 259737, 262646:
Fix a couple of issues with vcpu state:
- Add a parameter to 'vcpu_set_state()' to enforce that the vcpu is in the
IDLE state before the requested state transition. This guarantees that
there is exactly one ioctl() operating on a vcpu at any point in time and
prevents unintended state transitions.
- Fix a race between VMRUN() and vcpu_notify_event() due to 'vcpu->hostcpu'
being updated outside of the vcpu_lock().
ian [Sun, 18 May 2014 01:18:42 +0000 (01:18 +0000)]
MFC 265913, 265914:
Interrupts need to be disabled on entry to cpu_sleep() for ARM. Given
that and the need to be in a critical section when switching to idleclock
mode for event timers, use spinlock_enter()/exit() to achieve both needs.
ian [Sun, 18 May 2014 00:30:04 +0000 (00:30 +0000)]
MFC 265694, 265705, 265784:
Move the mptramp code which is specific to the Marvell ArmadaXP SoC out of
the common locore.S file and into the mv/armadaxp directory.
Consolidate all the AP core startup stuff under a single #ifdef SMP block
Call idcache_inv_all from the AP core entry code before turning on the MMU.
Also, enable instruction and branch caches, which should be safe now that
they're properly initialized/invalidated first.
ian [Sat, 17 May 2014 22:50:16 +0000 (22:50 +0000)]
MFC 264990, 264994, 265020, 265025:
Call cpu_icache_sync_range() rather than sync_all since we know the range
and flushing the entire icache is needlessly expensive.
Provide a proper armv7 implementation of icache_sync_all rather than
using armv7_idcache_wbinv_all, because wbinv_all doesn't broadcast the
operation to other cores. In elf_cpu_load_file() use icache_sync_all()
and explain why it's needed (and why other sync operations aren't).
Remove cpu_idcache_wbinv_all() from kdb_cpu_trap(), it's no longer needed.
Explain why wbinv_all is SMP-safe when dumping, and add a missing l2 cache
flush. (Either it was missing here, or it isn't needed in the minidump
case. Adding it here seems like the safer path to consistancy.)
ian [Sat, 17 May 2014 22:29:24 +0000 (22:29 +0000)]
MFC 264977:
Stop calling imx51_ccm_foo() clock functions from imx6 code. Instead
define a few imx_ccm_foo() functions that are implemented by the imx51
or imx6 ccm code.
ian [Sat, 17 May 2014 21:07:54 +0000 (21:07 +0000)]
MFC 264128, 264129, 264130, 264135,
Fix TTB set operation for armv7. Perform sychronization (by "isb" barrier)
after TTB is set.
Fix TLB maintenance issues for armv6 and armv7.
- Add cpu_cpwait to comply with the convention.
- Add missing TLB invalidations, especially in pmap_kenter & pmap_kremove
with distinguishing between D and ID pages.
- Modify pmap init/bootstrap invalidations to ID, just to be safe.
- Fix TLB-inv and PTE_SYNC ordering.
Allocate per-cpu resources for doing pmap_zero_page() and pmap_copy_page().
This is performance enhancement rather than bugfix.
We don't support any ARM systems with an ISA bus and don't need a freelist
of memory to support ISA addressing limitations.
Actually save the mpcore clock frequency retrieved from fdt data.
imx6..
- Don't call sdhci_init_slot() until after handling the FDT properties
related to detecting card presence.
- Flag several sysctl variables as tunables.
- Rework the cpu frequency management code for imx6 to add "operating
points" and min/max frequency controls.
generic timer...
- Setup both secure and non-secure timer IRQs.
We don't know our ARM security state, so one of them will operate.
- Don't set frequency, since it's unpossible in non-secure state.
Only rely on DTS clock-frequency value or get clock from timer.
Add support for event timers whose clock frequency can change while running.
Apparently all ARM configs build kern_et.c, but only a few of them also
build kern_clocksource.c, un-break the build by not referencing functions in
kern_clocksource if NO_EVENTTIMERS is defined.
Add variable-frequency support to the arm mpcore eventtimer driver.
mpcore_timer: Disable the timer and clear any pending bit, then setup the
new counter register values, then restart the timer. Also re-nest the parens
properly for casting the result of converting time and frequency to a count.
Add more flags for the fpexc register from the ARM1176JZF-S Manual
Initialise fpscr to a sane value when we create the pcb. This sets NaNs to
be the default NaN and for denormalised numbers to be flushed to zero.
VFP fixes/cleanups for ARM11:
* Save the required VFP registers on context switch. If the exception bit
is set we need to save and restore the FPINST register, and if the fp2v
bit is also set we need to save and restore FPINST2.
* Move saving and restoring the floating point control registers to C.
* Clear the fpexc exception and fp2v flags on a floating-point exception.
* Signal a SIGFPE if the fpexc exception flag is set on an undefined
instruction. This is how the ARM core signals to software there is a
floating-point exception.
Add Cortex-A15 cpu id revisions.
Exynos/Arndale...
- Merge SoC-common parts
- Enable iicbus device
- Directly call kmem_alloc_contig to allocate framebuffer memory
and pass VM_MEMATTR_UNCACHEABLE (no-cache, no-buffer).
This fixes screen refreshing problem when data is updated too slowly.
- Add support for keyboard used in Samsung Chromebook (ARM machine)
Support covers device drivers for:
- Interrupt Combiner
- gpio/pad, External Interrupts Controller (pad)
- I2C Interface
- Chrome Embedded Controller
- Chrome Keyboard
- Use new gpio dev class in EHCI driver
- Expand device tree information
- Release i2c bus on detach.
loos [Sat, 17 May 2014 19:16:45 +0000 (19:16 +0000)]
MFC r265013
Revert r258678. Make the led gpio-specifier match again the #gpio-cells
settings from the GPIO controller, which i had broken in r258678. Restore
the active-low flag.
jhb [Sat, 17 May 2014 19:11:08 +0000 (19:11 +0000)]
MFC 259641,259863,259924,259937,259961,259978,260380,260383,260410,260466,
260531,260532,260550,260619,261170,261453,261621,263280,263290,264516:
Add support for local APIC hardware-assist.
- Restructure vlapic access and register handling to support hardware-assist
for the local APIC.
- Use the 'Virtual Interrupt Delivery' and 'Posted Interrupt Processing'
feature of Intel VT-x if supported by hardware.
- Add an API to rendezvous all active vcpus in a virtual machine and use
it to support level triggered interrupts with VT-x 'Virtual Interrupt
Delivery'.
- Use a cheaper IPI handler than IPI_AST for nested page table shootdowns
and avoid doing unnecessary nested TLB invalidations.
Use the same cache terminology as the ARM docs in comments. No
functional changes.
Use armv7 TLB flush code, not arm11, for cortex-a processors.
Exynos/ Arndale...
- Disable debugging by default.
- Add display-related and clk devices to the tree
- Prevent resources intersection with EHCI driver
- Add display-related and clk devices to the tree
- Prevent resources intersection with EHCI driver
- Add driver for Display Controller.
- Add support for Samsung Chromebook (ARM Cortex A15 machine).
- Rename mct and ehci drivers files to match common naming.
ian [Sat, 17 May 2014 17:34:37 +0000 (17:34 +0000)]
MFC 263301
In kernel config files, it is supposed to be 'options<space><tab>' not
'options<tab><tab>', per long standing (but recently not so strictly
enforced) convention.
Export _libc_arm_fpu_present as a private symbol to be used by other
system libraries, for example libm.
On armv6 access both the softfloat and, when available, the vfp to get and
set the floating-point environment.
Build fenv-vfp.c with the softfp float abi. Without this gcc generates an
incorrect assembly file that doesn't allow for vfp instructions.
Only build the vfp/softfp switching code on armv6 as we don't support vfp
on anything earlier than this. This should fix the armeb and arm builds
when using gcc.
Add an optimised version of the float and double helper functions.
Remove all the redundant external declarations of exception vectors and
runtime setting of the pointers that's scattered around various places.
Remove all traces of support for ARM chips prior to the arm9 series.
Make the default exception handler vectors point to where I thought they
were already pointing: the default handlers (not a panic that says there
is no default handler).
Eliminate irq_dispatch.S. Move the data items it contained into
arm/intr.c and the functionality it provided into arm/exception.S.
Move the exception vector table (so-called "page0" data) into exception.S
and eliminate vectors.S.
Change the way the asm GET_CURTHREAD_PTR() macro is defined so that code
using it doesn't have to have an "AST_LOCALS" macro somewhere in the file.
Arrange for arm fork_trampoline() to return to userland via the standard
swi_exit code in exception.S instead of having its own inline expansion
of the DO_AST and PULLFRAME macros.
Now that the PUSHFRAME and PULLFRAME macros are used only in the swi
entry/exit code, they don't need to be macros. Except that didn't work
and the whole change was reverted.
Remove some unnecessary indirection and jump right to the handler functions.
Use panic rather than printf to "handle" an arm26 address exception
(should never happen on arm32).
Remove the unreferenced DATA() macro.
Remove #include <machine/asmacros.h> from files that don't need it.
dim [Sat, 17 May 2014 12:47:11 +0000 (12:47 +0000)]
MFC r266053:
Use the new -d option that was added to tblgen between llvm/clang 3.3
and 3.4 to generate dependency files for the '.inc.h' files generated
from .td files, and .sinclude those dependency files in clang.build.mk.
This will make future incremental builds of lib/clang and usr.bin/clang
work correctly, whenever any of the .td files get modified.
Note that this will not fix any problems with incremental builds from
*before* this revision, since there will not yet be any generated
dependency files. A quick workaround is to run the following:
find /usr/obj -type f -name '*.inc.h' | xargs rm
and then a regular incremental buildworld (e.g. with -DNO_CLEAN).
kib [Sat, 17 May 2014 11:36:31 +0000 (11:36 +0000)]
MFC r265843:
For the upgrade case in vm_fault_copy_entry(), when the entry does not
need COW and is writeable, do not create a new backing object for the entry.
bdrewery [Sat, 17 May 2014 02:45:59 +0000 (02:45 +0000)]
MFC r265267:
Fix width/alignment of JID column. Make it support up to the maximum 7-wide
JIDs. On a system using jails for common tasks the JID can quickly increase.
bdrewery [Sat, 17 May 2014 02:39:20 +0000 (02:39 +0000)]
MFC r265249,r265250,r265251:
- Add -J command/flag to filter by jail name/jid. This will automatically
display the JID as well (the -j command/flag).
- Add a hint for 'u' and 'J' command that '+' displays all.
- Add J command to help.
imx6: Add a tunable to set the number of active cores, enable SMP by default.
ffec: Fix multicast filtering.
Allwinner a10/a20...
- Add gpio and clock bits for A10/A20's EMAC ethernet controller driver
- EMAC gpio configuration
- EMAC clock activation
- Add Static Random Access Memory controller driver for A10/A20.
A10/A20's SRAM is used by devices, such as CPU, EMAC,
for extra fast memory or as cache.
- Add EMAC 10/100 Ethernet controller driver for A10/A20.
It is available mostly in A10 devices like Hackberry, Marsboard,
Mele A1000, A2000, A100 HTPC, cubieboard1 and A20 device
like cubieboard2.
TX performance can be improved using both channels 0 and 1.
RX performance is poor and needs improvement with the assistance of
external DMA controller in case there
- Add EMAC and SRAM controller entries to FDT.
- Add EMAC device to kernel config files and enable EMAC, SRAM drivers.
OMAP: When calculating the MPU freq, make sure not to overflow.
Vybrid:
- Add driver for Port control and interrupts (PORT).
- Export panel info to DTS
- Reset all the layers before setup first one
- Enable display
nandfs: Slight code reordering to make error branch last.
Add option TMPFS to arm/conf/DEFAULTS, remove it from the few configs
that have it individually. Concensus on freebsd-arm@ is that it should
be included in all ARM kernels.
Fix the arm sys_sigreturn(): its argument is a struct ucontext, not a
struct sigframe containing the struct ucontext.