1 //===-- CoalesceBranches.cpp - Coalesce blocks with the same condition ---===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 /// Coalesce basic blocks guarded by the same branch condition into a single
13 //===----------------------------------------------------------------------===//
16 #include "llvm/ADT/BitVector.h"
17 #include "llvm/ADT/Statistic.h"
18 #include "llvm/CodeGen/MachineDominators.h"
19 #include "llvm/CodeGen/MachineFunctionPass.h"
20 #include "llvm/CodeGen/MachinePostDominators.h"
21 #include "llvm/CodeGen/MachineRegisterInfo.h"
22 #include "llvm/CodeGen/Passes.h"
23 #include "llvm/CodeGen/TargetFrameLowering.h"
24 #include "llvm/CodeGen/TargetInstrInfo.h"
25 #include "llvm/CodeGen/TargetSubtargetInfo.h"
26 #include "llvm/Support/Debug.h"
30 #define DEBUG_TYPE "ppc-branch-coalescing"
32 STATISTIC(NumBlocksCoalesced, "Number of blocks coalesced");
33 STATISTIC(NumPHINotMoved, "Number of PHI Nodes that cannot be merged");
34 STATISTIC(NumBlocksNotCoalesced, "Number of blocks not coalesced");
36 //===----------------------------------------------------------------------===//
37 // PPCBranchCoalescing
38 //===----------------------------------------------------------------------===//
40 /// Improve scheduling by coalescing branches that depend on the same condition.
41 /// This pass looks for blocks that are guarded by the same branch condition
42 /// and attempts to merge the blocks together. Such opportunities arise from
43 /// the expansion of select statements in the IR.
45 /// This pass does not handle implicit operands on branch statements. In order
46 /// to run on targets that use implicit operands, changes need to be made in the
47 /// canCoalesceBranch and canMerge methods.
49 /// Example: the following LLVM IR
51 /// %test = icmp eq i32 %x 0
52 /// %tmp1 = select i1 %test, double %a, double 2.000000e-03
53 /// %tmp2 = select i1 %test, double %b, double 5.000000e-03
55 /// expands to the following machine code:
57 /// %bb.0: derived from LLVM BB %entry
58 /// liveins: %f1 %f3 %x6
60 /// %0 = COPY %f1; F8RC:%0
61 /// %5 = CMPLWI killed %4, 0; CRRC:%5 GPRC:%4
62 /// %8 = LXSDX %zero8, killed %7, implicit %rm;
63 /// mem:LD8[ConstantPool] F8RC:%8 G8RC:%7
64 /// BCC 76, %5, <%bb.2>; CRRC:%5
65 /// Successors according to CFG: %bb.1(?%) %bb.2(?%)
67 /// %bb.1: derived from LLVM BB %entry
68 /// Predecessors according to CFG: %bb.0
69 /// Successors according to CFG: %bb.2(?%)
71 /// %bb.2: derived from LLVM BB %entry
72 /// Predecessors according to CFG: %bb.0 %bb.1
73 /// %9 = PHI %8, <%bb.1>, %0, <%bb.0>;
76 /// BCC 76, %5, <%bb.4>; CRRC:%5
77 /// Successors according to CFG: %bb.3(?%) %bb.4(?%)
79 /// %bb.3: derived from LLVM BB %entry
80 /// Predecessors according to CFG: %bb.2
81 /// Successors according to CFG: %bb.4(?%)
83 /// %bb.4: derived from LLVM BB %entry
84 /// Predecessors according to CFG: %bb.2 %bb.3
85 /// %13 = PHI %12, <%bb.3>, %2, <%bb.2>;
88 /// BLR8 implicit %lr8, implicit %rm, implicit %f1
90 /// When this pattern is detected, branch coalescing will try to collapse
91 /// it by moving code in %bb.2 to %bb.0 and/or %bb.4 and removing %bb.3.
93 /// If all conditions are meet, IR should collapse to:
95 /// %bb.0: derived from LLVM BB %entry
96 /// liveins: %f1 %f3 %x6
98 /// %0 = COPY %f1; F8RC:%0
99 /// %5 = CMPLWI killed %4, 0; CRRC:%5 GPRC:%4
100 /// %8 = LXSDX %zero8, killed %7, implicit %rm;
101 /// mem:LD8[ConstantPool] F8RC:%8 G8RC:%7
103 /// BCC 76, %5, <%bb.4>; CRRC:%5
104 /// Successors according to CFG: %bb.1(0x2aaaaaaa / 0x80000000 = 33.33%)
105 /// %bb.4(0x55555554 / 0x80000000 = 66.67%)
107 /// %bb.1: derived from LLVM BB %entry
108 /// Predecessors according to CFG: %bb.0
109 /// Successors according to CFG: %bb.4(0x40000000 / 0x80000000 = 50.00%)
111 /// %bb.4: derived from LLVM BB %entry
112 /// Predecessors according to CFG: %bb.0 %bb.1
113 /// %9 = PHI %8, <%bb.1>, %0, <%bb.0>;
115 /// %13 = PHI %12, <%bb.1>, %2, <%bb.0>;
118 /// BLR8 implicit %lr8, implicit %rm, implicit %f1
120 /// Branch Coalescing does not split blocks, it moves everything in the same
121 /// direction ensuring it does not break use/definition semantics.
123 /// PHI nodes and its corresponding use instructions are moved to its successor
124 /// block if there are no uses within the successor block PHI nodes. PHI
125 /// node ordering cannot be assumed.
127 /// Non-PHI can be moved up to the predecessor basic block or down to the
128 /// successor basic block following any PHI instructions. Whether it moves
129 /// up or down depends on whether the register(s) defined in the instructions
130 /// are used in current block or in any PHI instructions at the beginning of
131 /// the successor block.
135 class PPCBranchCoalescing : public MachineFunctionPass {
136 struct CoalescingCandidateInfo {
137 MachineBasicBlock *BranchBlock; // Block containing the branch
138 MachineBasicBlock *BranchTargetBlock; // Block branched to
139 MachineBasicBlock *FallThroughBlock; // Fall-through if branch not taken
140 SmallVector<MachineOperand, 4> Cond;
144 CoalescingCandidateInfo();
148 MachineDominatorTree *MDT;
149 MachinePostDominatorTree *MPDT;
150 const TargetInstrInfo *TII;
151 MachineRegisterInfo *MRI;
153 void initialize(MachineFunction &F);
154 bool canCoalesceBranch(CoalescingCandidateInfo &Cand);
155 bool identicalOperands(ArrayRef<MachineOperand> OperandList1,
156 ArrayRef<MachineOperand> OperandList2) const;
157 bool validateCandidates(CoalescingCandidateInfo &SourceRegion,
158 CoalescingCandidateInfo &TargetRegion) const;
163 PPCBranchCoalescing() : MachineFunctionPass(ID) {
164 initializePPCBranchCoalescingPass(*PassRegistry::getPassRegistry());
167 void getAnalysisUsage(AnalysisUsage &AU) const override {
168 AU.addRequired<MachineDominatorTree>();
169 AU.addRequired<MachinePostDominatorTree>();
170 MachineFunctionPass::getAnalysisUsage(AU);
173 StringRef getPassName() const override { return "Branch Coalescing"; }
175 bool mergeCandidates(CoalescingCandidateInfo &SourceRegion,
176 CoalescingCandidateInfo &TargetRegion);
177 bool canMoveToBeginning(const MachineInstr &MI,
178 const MachineBasicBlock &MBB) const;
179 bool canMoveToEnd(const MachineInstr &MI,
180 const MachineBasicBlock &MBB) const;
181 bool canMerge(CoalescingCandidateInfo &SourceRegion,
182 CoalescingCandidateInfo &TargetRegion) const;
183 void moveAndUpdatePHIs(MachineBasicBlock *SourceRegionMBB,
184 MachineBasicBlock *TargetRegionMBB);
185 bool runOnMachineFunction(MachineFunction &MF) override;
187 } // End anonymous namespace.
189 char PPCBranchCoalescing::ID = 0;
190 /// createPPCBranchCoalescingPass - returns an instance of the Branch Coalescing
192 FunctionPass *llvm::createPPCBranchCoalescingPass() {
193 return new PPCBranchCoalescing();
196 INITIALIZE_PASS_BEGIN(PPCBranchCoalescing, DEBUG_TYPE,
197 "Branch Coalescing", false, false)
198 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
199 INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTree)
200 INITIALIZE_PASS_END(PPCBranchCoalescing, DEBUG_TYPE, "Branch Coalescing",
203 PPCBranchCoalescing::CoalescingCandidateInfo::CoalescingCandidateInfo()
204 : BranchBlock(nullptr), BranchTargetBlock(nullptr),
205 FallThroughBlock(nullptr), MustMoveDown(false), MustMoveUp(false) {}
207 void PPCBranchCoalescing::CoalescingCandidateInfo::clear() {
208 BranchBlock = nullptr;
209 BranchTargetBlock = nullptr;
210 FallThroughBlock = nullptr;
212 MustMoveDown = false;
216 void PPCBranchCoalescing::initialize(MachineFunction &MF) {
217 MDT = &getAnalysis<MachineDominatorTree>();
218 MPDT = &getAnalysis<MachinePostDominatorTree>();
219 TII = MF.getSubtarget().getInstrInfo();
220 MRI = &MF.getRegInfo();
224 /// Analyze the branch statement to determine if it can be coalesced. This
225 /// method analyses the branch statement for the given candidate to determine
226 /// if it can be coalesced. If the branch can be coalesced, then the
227 /// BranchTargetBlock and the FallThroughBlock are recorded in the specified
230 ///\param[in,out] Cand The coalescing candidate to analyze
231 ///\return true if and only if the branch can be coalesced, false otherwise
233 bool PPCBranchCoalescing::canCoalesceBranch(CoalescingCandidateInfo &Cand) {
234 LLVM_DEBUG(dbgs() << "Determine if branch block "
235 << Cand.BranchBlock->getNumber() << " can be coalesced:");
236 MachineBasicBlock *FalseMBB = nullptr;
238 if (TII->analyzeBranch(*Cand.BranchBlock, Cand.BranchTargetBlock, FalseMBB,
240 LLVM_DEBUG(dbgs() << "TII unable to Analyze Branch - skip\n");
244 for (auto &I : Cand.BranchBlock->terminators()) {
245 LLVM_DEBUG(dbgs() << "Looking at terminator : " << I << "\n");
249 // The analyzeBranch method does not include any implicit operands.
250 // This is not an issue on PPC but must be handled on other targets.
251 // For this pass to be made target-independent, the analyzeBranch API
252 // need to be updated to support implicit operands and there would
253 // need to be a way to verify that any implicit operands would not be
254 // clobbered by merging blocks. This would include identifying the
255 // implicit operands as well as the basic block they are defined in.
256 // This could be done by changing the analyzeBranch API to have it also
257 // record and return the implicit operands and the blocks where they are
258 // defined. Alternatively, the BranchCoalescing code would need to be
259 // extended to identify the implicit operands. The analysis in canMerge
260 // must then be extended to prove that none of the implicit operands are
261 // changed in the blocks that are combined during coalescing.
262 if (I.getNumOperands() != I.getNumExplicitOperands()) {
263 LLVM_DEBUG(dbgs() << "Terminator contains implicit operands - skip : "
269 if (Cand.BranchBlock->isEHPad() || Cand.BranchBlock->hasEHPadSuccessor()) {
270 LLVM_DEBUG(dbgs() << "EH Pad - skip\n");
274 // For now only consider triangles (i.e, BranchTargetBlock is set,
275 // FalseMBB is null, and BranchTargetBlock is a successor to BranchBlock)
276 if (!Cand.BranchTargetBlock || FalseMBB ||
277 !Cand.BranchBlock->isSuccessor(Cand.BranchTargetBlock)) {
278 LLVM_DEBUG(dbgs() << "Does not form a triangle - skip\n");
282 // Ensure there are only two successors
283 if (Cand.BranchBlock->succ_size() != 2) {
284 LLVM_DEBUG(dbgs() << "Does not have 2 successors - skip\n");
288 // Sanity check - the block must be able to fall through
289 assert(Cand.BranchBlock->canFallThrough() &&
290 "Expecting the block to fall through!");
292 // We have already ensured there are exactly two successors to
293 // BranchBlock and that BranchTargetBlock is a successor to BranchBlock.
294 // Ensure the single fall though block is empty.
295 MachineBasicBlock *Succ =
296 (*Cand.BranchBlock->succ_begin() == Cand.BranchTargetBlock)
297 ? *Cand.BranchBlock->succ_rbegin()
298 : *Cand.BranchBlock->succ_begin();
300 assert(Succ && "Expecting a valid fall-through block\n");
302 if (!Succ->empty()) {
303 LLVM_DEBUG(dbgs() << "Fall-through block contains code -- skip\n");
307 if (!Succ->isSuccessor(Cand.BranchTargetBlock)) {
310 << "Successor of fall through block is not branch taken block\n");
314 Cand.FallThroughBlock = Succ;
315 LLVM_DEBUG(dbgs() << "Valid Candidate\n");
320 /// Determine if the two operand lists are identical
322 /// \param[in] OpList1 operand list
323 /// \param[in] OpList2 operand list
324 /// \return true if and only if the operands lists are identical
326 bool PPCBranchCoalescing::identicalOperands(
327 ArrayRef<MachineOperand> OpList1, ArrayRef<MachineOperand> OpList2) const {
329 if (OpList1.size() != OpList2.size()) {
330 LLVM_DEBUG(dbgs() << "Operand list is different size\n");
334 for (unsigned i = 0; i < OpList1.size(); ++i) {
335 const MachineOperand &Op1 = OpList1[i];
336 const MachineOperand &Op2 = OpList2[i];
338 LLVM_DEBUG(dbgs() << "Op1: " << Op1 << "\n"
339 << "Op2: " << Op2 << "\n");
341 if (Op1.isIdenticalTo(Op2)) {
342 // filter out instructions with physical-register uses
343 if (Op1.isReg() && TargetRegisterInfo::isPhysicalRegister(Op1.getReg())
344 // If the physical register is constant then we can assume the value
345 // has not changed between uses.
346 && !(Op1.isUse() && MRI->isConstantPhysReg(Op1.getReg()))) {
347 LLVM_DEBUG(dbgs() << "The operands are not provably identical.\n");
350 LLVM_DEBUG(dbgs() << "Op1 and Op2 are identical!\n");
354 // If the operands are not identical, but are registers, check to see if the
355 // definition of the register produces the same value. If they produce the
356 // same value, consider them to be identical.
357 if (Op1.isReg() && Op2.isReg() &&
358 TargetRegisterInfo::isVirtualRegister(Op1.getReg()) &&
359 TargetRegisterInfo::isVirtualRegister(Op2.getReg())) {
360 MachineInstr *Op1Def = MRI->getVRegDef(Op1.getReg());
361 MachineInstr *Op2Def = MRI->getVRegDef(Op2.getReg());
362 if (TII->produceSameValue(*Op1Def, *Op2Def, MRI)) {
363 LLVM_DEBUG(dbgs() << "Op1Def: " << *Op1Def << " and " << *Op2Def
364 << " produce the same value!\n");
366 LLVM_DEBUG(dbgs() << "Operands produce different values\n");
370 LLVM_DEBUG(dbgs() << "The operands are not provably identical.\n");
379 /// Moves ALL PHI instructions in SourceMBB to beginning of TargetMBB
380 /// and update them to refer to the new block. PHI node ordering
381 /// cannot be assumed so it does not matter where the PHI instructions
382 /// are moved to in TargetMBB.
384 /// \param[in] SourceMBB block to move PHI instructions from
385 /// \param[in] TargetMBB block to move PHI instructions to
387 void PPCBranchCoalescing::moveAndUpdatePHIs(MachineBasicBlock *SourceMBB,
388 MachineBasicBlock *TargetMBB) {
390 MachineBasicBlock::iterator MI = SourceMBB->begin();
391 MachineBasicBlock::iterator ME = SourceMBB->getFirstNonPHI();
394 LLVM_DEBUG(dbgs() << "SourceMBB contains no PHI instructions.\n");
398 // Update all PHI instructions in SourceMBB and move to top of TargetMBB
399 for (MachineBasicBlock::iterator Iter = MI; Iter != ME; Iter++) {
400 MachineInstr &PHIInst = *Iter;
401 for (unsigned i = 2, e = PHIInst.getNumOperands() + 1; i != e; i += 2) {
402 MachineOperand &MO = PHIInst.getOperand(i);
403 if (MO.getMBB() == SourceMBB)
404 MO.setMBB(TargetMBB);
407 TargetMBB->splice(TargetMBB->begin(), SourceMBB, MI, ME);
411 /// This function checks if MI can be moved to the beginning of the TargetMBB
412 /// following PHI instructions. A MI instruction can be moved to beginning of
413 /// the TargetMBB if there are no uses of it within the TargetMBB PHI nodes.
415 /// \param[in] MI the machine instruction to move.
416 /// \param[in] TargetMBB the machine basic block to move to
417 /// \return true if it is safe to move MI to beginning of TargetMBB,
420 bool PPCBranchCoalescing::canMoveToBeginning(const MachineInstr &MI,
421 const MachineBasicBlock &TargetMBB
424 LLVM_DEBUG(dbgs() << "Checking if " << MI << " can move to beginning of "
425 << TargetMBB.getNumber() << "\n");
427 for (auto &Def : MI.defs()) { // Looking at Def
428 for (auto &Use : MRI->use_instructions(Def.getReg())) {
429 if (Use.isPHI() && Use.getParent() == &TargetMBB) {
430 LLVM_DEBUG(dbgs() << " *** used in a PHI -- cannot move ***\n");
436 LLVM_DEBUG(dbgs() << " Safe to move to the beginning.\n");
441 /// This function checks if MI can be moved to the end of the TargetMBB,
442 /// immediately before the first terminator. A MI instruction can be moved
443 /// to then end of the TargetMBB if no PHI node defines what MI uses within
446 /// \param[in] MI the machine instruction to move.
447 /// \param[in] TargetMBB the machine basic block to move to
448 /// \return true if it is safe to move MI to end of TargetMBB,
451 bool PPCBranchCoalescing::canMoveToEnd(const MachineInstr &MI,
452 const MachineBasicBlock &TargetMBB
455 LLVM_DEBUG(dbgs() << "Checking if " << MI << " can move to end of "
456 << TargetMBB.getNumber() << "\n");
458 for (auto &Use : MI.uses()) {
459 if (Use.isReg() && TargetRegisterInfo::isVirtualRegister(Use.getReg())) {
460 MachineInstr *DefInst = MRI->getVRegDef(Use.getReg());
461 if (DefInst->isPHI() && DefInst->getParent() == MI.getParent()) {
462 LLVM_DEBUG(dbgs() << " *** Cannot move this instruction ***\n");
466 dbgs() << " *** def is in another block -- safe to move!\n");
471 LLVM_DEBUG(dbgs() << " Safe to move to the end.\n");
476 /// This method checks to ensure the two coalescing candidates follows the
477 /// expected pattern required for coalescing.
479 /// \param[in] SourceRegion The candidate to move statements from
480 /// \param[in] TargetRegion The candidate to move statements to
481 /// \return true if all instructions in SourceRegion.BranchBlock can be merged
482 /// into a block in TargetRegion; false otherwise.
484 bool PPCBranchCoalescing::validateCandidates(
485 CoalescingCandidateInfo &SourceRegion,
486 CoalescingCandidateInfo &TargetRegion) const {
488 if (TargetRegion.BranchTargetBlock != SourceRegion.BranchBlock)
489 llvm_unreachable("Expecting SourceRegion to immediately follow TargetRegion");
490 else if (!MDT->dominates(TargetRegion.BranchBlock, SourceRegion.BranchBlock))
491 llvm_unreachable("Expecting TargetRegion to dominate SourceRegion");
492 else if (!MPDT->dominates(SourceRegion.BranchBlock, TargetRegion.BranchBlock))
493 llvm_unreachable("Expecting SourceRegion to post-dominate TargetRegion");
494 else if (!TargetRegion.FallThroughBlock->empty() ||
495 !SourceRegion.FallThroughBlock->empty())
496 llvm_unreachable("Expecting fall-through blocks to be empty");
502 /// This method determines whether the two coalescing candidates can be merged.
503 /// In order to be merged, all instructions must be able to
504 /// 1. Move to the beginning of the SourceRegion.BranchTargetBlock;
505 /// 2. Move to the end of the TargetRegion.BranchBlock.
506 /// Merging involves moving the instructions in the
507 /// TargetRegion.BranchTargetBlock (also SourceRegion.BranchBlock).
509 /// This function first try to move instructions from the
510 /// TargetRegion.BranchTargetBlock down, to the beginning of the
511 /// SourceRegion.BranchTargetBlock. This is not possible if any register defined
512 /// in TargetRegion.BranchTargetBlock is used in a PHI node in the
513 /// SourceRegion.BranchTargetBlock. In this case, check whether the statement
514 /// can be moved up, to the end of the TargetRegion.BranchBlock (immediately
515 /// before the branch statement). If it cannot move, then these blocks cannot
518 /// Note that there is no analysis for moving instructions past the fall-through
519 /// blocks because they are confirmed to be empty. An assert is thrown if they
522 /// \param[in] SourceRegion The candidate to move statements from
523 /// \param[in] TargetRegion The candidate to move statements to
524 /// \return true if all instructions in SourceRegion.BranchBlock can be merged
525 /// into a block in TargetRegion, false otherwise.
527 bool PPCBranchCoalescing::canMerge(CoalescingCandidateInfo &SourceRegion,
528 CoalescingCandidateInfo &TargetRegion) const {
529 if (!validateCandidates(SourceRegion, TargetRegion))
532 // Walk through PHI nodes first and see if they force the merge into the
533 // SourceRegion.BranchTargetBlock.
534 for (MachineBasicBlock::iterator
535 I = SourceRegion.BranchBlock->instr_begin(),
536 E = SourceRegion.BranchBlock->getFirstNonPHI();
538 for (auto &Def : I->defs())
539 for (auto &Use : MRI->use_instructions(Def.getReg())) {
540 if (Use.isPHI() && Use.getParent() == SourceRegion.BranchTargetBlock) {
543 << " defines register used in another "
544 "PHI within branch target block -- can't merge\n");
548 if (Use.getParent() == SourceRegion.BranchBlock) {
549 LLVM_DEBUG(dbgs() << "PHI " << *I
550 << " defines register used in this "
551 "block -- all must move down\n");
552 SourceRegion.MustMoveDown = true;
557 // Walk through the MI to see if they should be merged into
558 // TargetRegion.BranchBlock (up) or SourceRegion.BranchTargetBlock (down)
559 for (MachineBasicBlock::iterator
560 I = SourceRegion.BranchBlock->getFirstNonPHI(),
561 E = SourceRegion.BranchBlock->end();
563 if (!canMoveToBeginning(*I, *SourceRegion.BranchTargetBlock)) {
564 LLVM_DEBUG(dbgs() << "Instruction " << *I
565 << " cannot move down - must move up!\n");
566 SourceRegion.MustMoveUp = true;
568 if (!canMoveToEnd(*I, *TargetRegion.BranchBlock)) {
569 LLVM_DEBUG(dbgs() << "Instruction " << *I
570 << " cannot move up - must move down!\n");
571 SourceRegion.MustMoveDown = true;
575 return (SourceRegion.MustMoveUp && SourceRegion.MustMoveDown) ? false : true;
578 /// Merge the instructions from SourceRegion.BranchBlock,
579 /// SourceRegion.BranchTargetBlock, and SourceRegion.FallThroughBlock into
580 /// TargetRegion.BranchBlock, TargetRegion.BranchTargetBlock and
581 /// TargetRegion.FallThroughBlock respectively.
583 /// The successors for blocks in TargetRegion will be updated to use the
584 /// successors from blocks in SourceRegion. Finally, the blocks in SourceRegion
585 /// will be removed from the function.
587 /// A region consists of a BranchBlock, a FallThroughBlock, and a
588 /// BranchTargetBlock. Branch coalesce works on patterns where the
589 /// TargetRegion's BranchTargetBlock must also be the SourceRegions's
592 /// Before mergeCandidates:
594 /// +---------------------------+
595 /// | TargetRegion.BranchBlock |
596 /// +---------------------------+
598 /// / +--------------------------------+
599 /// | | TargetRegion.FallThroughBlock |
600 /// \ +--------------------------------+
602 /// +----------------------------------+
603 /// | TargetRegion.BranchTargetBlock |
604 /// | SourceRegion.BranchBlock |
605 /// +----------------------------------+
607 /// / +--------------------------------+
608 /// | | SourceRegion.FallThroughBlock |
609 /// \ +--------------------------------+
611 /// +----------------------------------+
612 /// | SourceRegion.BranchTargetBlock |
613 /// +----------------------------------+
615 /// After mergeCandidates:
617 /// +-----------------------------+
618 /// | TargetRegion.BranchBlock |
619 /// | SourceRegion.BranchBlock |
620 /// +-----------------------------+
622 /// / +---------------------------------+
623 /// | | TargetRegion.FallThroughBlock |
624 /// | | SourceRegion.FallThroughBlock |
625 /// \ +---------------------------------+
627 /// +----------------------------------+
628 /// | SourceRegion.BranchTargetBlock |
629 /// +----------------------------------+
631 /// \param[in] SourceRegion The candidate to move blocks from
632 /// \param[in] TargetRegion The candidate to move blocks to
634 bool PPCBranchCoalescing::mergeCandidates(CoalescingCandidateInfo &SourceRegion,
635 CoalescingCandidateInfo &TargetRegion) {
637 if (SourceRegion.MustMoveUp && SourceRegion.MustMoveDown) {
638 llvm_unreachable("Cannot have both MustMoveDown and MustMoveUp set!");
642 if (!validateCandidates(SourceRegion, TargetRegion))
645 // Start the merging process by first handling the BranchBlock.
646 // Move any PHIs in SourceRegion.BranchBlock down to the branch-taken block
647 moveAndUpdatePHIs(SourceRegion.BranchBlock, SourceRegion.BranchTargetBlock);
649 // Move remaining instructions in SourceRegion.BranchBlock into
650 // TargetRegion.BranchBlock
651 MachineBasicBlock::iterator firstInstr =
652 SourceRegion.BranchBlock->getFirstNonPHI();
653 MachineBasicBlock::iterator lastInstr =
654 SourceRegion.BranchBlock->getFirstTerminator();
656 MachineBasicBlock *Source = SourceRegion.MustMoveDown
657 ? SourceRegion.BranchTargetBlock
658 : TargetRegion.BranchBlock;
660 MachineBasicBlock::iterator Target =
661 SourceRegion.MustMoveDown
662 ? SourceRegion.BranchTargetBlock->getFirstNonPHI()
663 : TargetRegion.BranchBlock->getFirstTerminator();
665 Source->splice(Target, SourceRegion.BranchBlock, firstInstr, lastInstr);
667 // Once PHI and instructions have been moved we need to clean up the
670 // Remove SourceRegion.FallThroughBlock before transferring successors of
671 // SourceRegion.BranchBlock to TargetRegion.BranchBlock.
672 SourceRegion.BranchBlock->removeSuccessor(SourceRegion.FallThroughBlock);
673 TargetRegion.BranchBlock->transferSuccessorsAndUpdatePHIs(
674 SourceRegion.BranchBlock);
675 // Update branch in TargetRegion.BranchBlock to jump to
676 // SourceRegion.BranchTargetBlock
677 // In this case, TargetRegion.BranchTargetBlock == SourceRegion.BranchBlock.
678 TargetRegion.BranchBlock->ReplaceUsesOfBlockWith(
679 SourceRegion.BranchBlock, SourceRegion.BranchTargetBlock);
680 // Remove the branch statement(s) in SourceRegion.BranchBlock
681 MachineBasicBlock::iterator I =
682 SourceRegion.BranchBlock->terminators().begin();
683 while (I != SourceRegion.BranchBlock->terminators().end()) {
684 MachineInstr &CurrInst = *I;
686 if (CurrInst.isBranch())
687 CurrInst.eraseFromParent();
690 // Fall-through block should be empty since this is part of the condition
691 // to coalesce the branches.
692 assert(TargetRegion.FallThroughBlock->empty() &&
693 "FallThroughBlocks should be empty!");
695 // Transfer successor information and move PHIs down to the
696 // branch-taken block.
697 TargetRegion.FallThroughBlock->transferSuccessorsAndUpdatePHIs(
698 SourceRegion.FallThroughBlock);
699 TargetRegion.FallThroughBlock->removeSuccessor(SourceRegion.BranchBlock);
701 // Remove the blocks from the function.
702 assert(SourceRegion.BranchBlock->empty() &&
703 "Expecting branch block to be empty!");
704 SourceRegion.BranchBlock->eraseFromParent();
706 assert(SourceRegion.FallThroughBlock->empty() &&
707 "Expecting fall-through block to be empty!\n");
708 SourceRegion.FallThroughBlock->eraseFromParent();
710 NumBlocksCoalesced++;
714 bool PPCBranchCoalescing::runOnMachineFunction(MachineFunction &MF) {
716 if (skipFunction(MF.getFunction()) || MF.empty())
719 bool didSomething = false;
721 LLVM_DEBUG(dbgs() << "******** Branch Coalescing ********\n");
724 LLVM_DEBUG(dbgs() << "Function: "; MF.dump(); dbgs() << "\n");
726 CoalescingCandidateInfo Cand1, Cand2;
727 // Walk over blocks and find candidates to merge
728 // Continue trying to merge with the first candidate found, as long as merging
730 for (MachineBasicBlock &MBB : MF) {
731 bool MergedCandidates = false;
733 MergedCandidates = false;
737 Cand1.BranchBlock = &MBB;
739 // If unable to coalesce the branch, then continue to next block
740 if (!canCoalesceBranch(Cand1))
743 Cand2.BranchBlock = Cand1.BranchTargetBlock;
744 if (!canCoalesceBranch(Cand2))
748 // The branch-taken block of the second candidate should post-dominate the
750 assert(MPDT->dominates(Cand2.BranchTargetBlock, Cand1.BranchBlock) &&
751 "Branch-taken block should post-dominate first candidate");
753 if (!identicalOperands(Cand1.Cond, Cand2.Cond)) {
754 LLVM_DEBUG(dbgs() << "Blocks " << Cand1.BranchBlock->getNumber()
755 << " and " << Cand2.BranchBlock->getNumber()
756 << " have different branches\n");
759 if (!canMerge(Cand2, Cand1)) {
760 LLVM_DEBUG(dbgs() << "Cannot merge blocks "
761 << Cand1.BranchBlock->getNumber() << " and "
762 << Cand2.BranchBlock->getNumber() << "\n");
763 NumBlocksNotCoalesced++;
766 LLVM_DEBUG(dbgs() << "Merging blocks " << Cand1.BranchBlock->getNumber()
767 << " and " << Cand1.BranchTargetBlock->getNumber()
769 MergedCandidates = mergeCandidates(Cand2, Cand1);
770 if (MergedCandidates)
773 LLVM_DEBUG(dbgs() << "Function after merging: "; MF.dump();
775 } while (MergedCandidates);
779 // Verify MF is still valid after branch coalescing
781 MF.verify(nullptr, "Error in code produced by branch coalescing");
784 LLVM_DEBUG(dbgs() << "Finished Branch Coalescing\n");