1 //===- X86MacroFusion.cpp - X86 Macro Fusion ------------------------------===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 /// \file This file contains the X86 implementation of the DAG scheduling
10 /// mutation to pair instructions back to back.
12 //===----------------------------------------------------------------------===//
14 #include "X86MacroFusion.h"
15 #include "X86Subtarget.h"
16 #include "llvm/CodeGen/MacroFusion.h"
17 #include "llvm/CodeGen/TargetInstrInfo.h"
23 // The classification for the first instruction.
24 enum class FirstInstrKind { Test, Cmp, And, ALU, IncDec, Invalid };
26 // The classification for the second instruction (jump).
28 // JE, JL, JG and variants.
30 // JA, JB and variants.
32 // JS, JP, JO and variants.
34 // Not a fusable jump.
40 static FirstInstrKind classifyFirst(const MachineInstr &MI) {
41 switch (MI.getOpcode()) {
43 return FirstInstrKind::Invalid;
56 return FirstInstrKind::Test;
72 return FirstInstrKind::And;
92 return FirstInstrKind::Cmp;
95 case X86::ADD16ri8_DB:
102 case X86::ADD32ri8_DB:
103 case X86::ADD32ri_DB:
106 case X86::ADD32rr_DB:
108 case X86::ADD64ri32_DB:
110 case X86::ADD64ri8_DB:
113 case X86::ADD64rr_DB:
134 return FirstInstrKind::ALU;
143 return FirstInstrKind::IncDec;
147 static JumpKind classifySecond(const MachineInstr &MI) {
148 X86::CondCode CC = X86::getCondFromBranch(MI);
149 if (CC == X86::COND_INVALID)
150 return JumpKind::Invalid;
154 return JumpKind::Invalid;
161 return JumpKind::ELG;
173 return JumpKind::SPO;
177 /// Check if the instr pair, FirstMI and SecondMI, should be fused
178 /// together. Given SecondMI, when FirstMI is unspecified, then check if
179 /// SecondMI may be part of a fused pair at all.
180 static bool shouldScheduleAdjacent(const TargetInstrInfo &TII,
181 const TargetSubtargetInfo &TSI,
182 const MachineInstr *FirstMI,
183 const MachineInstr &SecondMI) {
184 const X86Subtarget &ST = static_cast<const X86Subtarget &>(TSI);
186 // Check if this processor supports any kind of fusion.
187 if (!(ST.hasBranchFusion() || ST.hasMacroFusion()))
190 const JumpKind BranchKind = classifySecond(SecondMI);
192 if (BranchKind == JumpKind::Invalid)
193 return false; // Second cannot be fused with anything.
195 if (FirstMI == nullptr)
196 return true; // We're only checking whether Second can be fused at all.
198 const FirstInstrKind TestKind = classifyFirst(*FirstMI);
200 if (ST.hasBranchFusion()) {
201 // Branch fusion can merge CMP and TEST with all conditional jumps.
202 return (TestKind == FirstInstrKind::Cmp ||
203 TestKind == FirstInstrKind::Test);
206 if (ST.hasMacroFusion()) {
207 // Macro Fusion rules are a bit more complex. See Agner Fog's
208 // Microarchitecture table 9.2 "Instruction Fusion".
210 case FirstInstrKind::Test:
211 case FirstInstrKind::And:
213 case FirstInstrKind::Cmp:
214 case FirstInstrKind::ALU:
215 return BranchKind == JumpKind::ELG || BranchKind == JumpKind::AB;
216 case FirstInstrKind::IncDec:
217 return BranchKind == JumpKind::ELG;
218 case FirstInstrKind::Invalid:
223 llvm_unreachable("unknown branch fusion type");
228 std::unique_ptr<ScheduleDAGMutation>
229 createX86MacroFusionDAGMutation () {
230 return createBranchMacroFusionDAGMutation(shouldScheduleAdjacent);
233 } // end namespace llvm