2 * Copyright (c) 2020 iXsystems, Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
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16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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29 #include <sys/cdefs.h>
30 #include <sys/types.h>
31 #include <sys/systm.h>
36 #include <machine/fpu.h>
38 #include <x86/x86_var.h>
39 #include <x86/specialreg.h>
41 #define kfpu_init() (0)
42 #define kfpu_fini() do {} while (0)
43 #define kfpu_allowed() 1
44 #define kfpu_initialize(tsk) do {} while (0)
46 #define kfpu_begin() { \
47 if (__predict_false(!is_fpu_kern_thread(0))) \
48 fpu_kern_enter(curthread, NULL, FPU_KERN_NOCTX);\
51 #define kfpu_end() { \
52 if (__predict_false(curpcb->pcb_flags & PCB_FPUNOSAVE)) \
53 fpu_kern_leave(curthread, NULL); \
57 * Check if OS supports AVX and AVX2 by checking XCR0
58 * Only call this function if CPUID indicates that AVX feature is
59 * supported by the CPU, otherwise it might be an illegal instruction.
61 static inline uint64_t
62 xgetbv(uint32_t index)
65 /* xgetbv - instruction byte code */
66 __asm__ __volatile__(".byte 0x0f; .byte 0x01; .byte 0xd0"
67 : "=a" (eax), "=d" (edx)
70 return ((((uint64_t)edx)<<32) | (uint64_t)eax);
75 * Detect register set support
77 static inline boolean_t
78 __simd_state_enabled(const uint64_t state)
80 boolean_t has_osxsave;
83 has_osxsave = !!(cpu_feature2 & CPUID2_OSXSAVE);
89 return ((xcr0 & state) == state);
92 #define _XSTATE_SSE_AVX (0x2 | 0x4)
93 #define _XSTATE_AVX512 (0xE0 | _XSTATE_SSE_AVX)
95 #define __ymm_enabled() __simd_state_enabled(_XSTATE_SSE_AVX)
96 #define __zmm_enabled() __simd_state_enabled(_XSTATE_AVX512)
100 * Check if SSE instruction set is available
102 static inline boolean_t
103 zfs_sse_available(void)
105 return (!!(cpu_feature & CPUID_SSE));
109 * Check if SSE2 instruction set is available
111 static inline boolean_t
112 zfs_sse2_available(void)
114 return (!!(cpu_feature & CPUID_SSE2));
118 * Check if SSE3 instruction set is available
120 static inline boolean_t
121 zfs_sse3_available(void)
123 return (!!(cpu_feature2 & CPUID2_SSE3));
127 * Check if SSSE3 instruction set is available
129 static inline boolean_t
130 zfs_ssse3_available(void)
132 return (!!(cpu_feature2 & CPUID2_SSSE3));
136 * Check if SSE4.1 instruction set is available
138 static inline boolean_t
139 zfs_sse4_1_available(void)
141 return (!!(cpu_feature2 & CPUID2_SSE41));
145 * Check if SSE4.2 instruction set is available
147 static inline boolean_t
148 zfs_sse4_2_available(void)
150 return (!!(cpu_feature2 & CPUID2_SSE42));
154 * Check if AVX instruction set is available
156 static inline boolean_t
157 zfs_avx_available(void)
161 has_avx = !!(cpu_feature2 & CPUID2_AVX);
163 return (has_avx && __ymm_enabled());
167 * Check if AVX2 instruction set is available
169 static inline boolean_t
170 zfs_avx2_available(void)
174 has_avx2 = !!(cpu_stdext_feature & CPUID_STDEXT_AVX2);
176 return (has_avx2 && __ymm_enabled());
180 * AVX-512 family of instruction sets:
183 * AVX512CD Conflict Detection Instructions
184 * AVX512ER Exponential and Reciprocal Instructions
185 * AVX512PF Prefetch Instructions
187 * AVX512BW Byte and Word Instructions
188 * AVX512DQ Double-word and Quadword Instructions
189 * AVX512VL Vector Length Extensions
191 * AVX512IFMA Integer Fused Multiply Add (Not supported by kernel 4.4)
192 * AVX512VBMI Vector Byte Manipulation Instructions
196 /* Check if AVX512F instruction set is available */
197 static inline boolean_t
198 zfs_avx512f_available(void)
200 boolean_t has_avx512;
202 has_avx512 = !!(cpu_stdext_feature & CPUID_STDEXT_AVX512F);
204 return (has_avx512 && __zmm_enabled());
207 /* Check if AVX512CD instruction set is available */
208 static inline boolean_t
209 zfs_avx512cd_available(void)
211 boolean_t has_avx512;
213 has_avx512 = !!(cpu_stdext_feature & CPUID_STDEXT_AVX512F) &&
214 !!(cpu_stdext_feature & CPUID_STDEXT_AVX512CD);
216 return (has_avx512 && __zmm_enabled());
219 /* Check if AVX512ER instruction set is available */
220 static inline boolean_t
221 zfs_avx512er_available(void)
223 boolean_t has_avx512;
225 has_avx512 = !!(cpu_stdext_feature & CPUID_STDEXT_AVX512F) &&
226 !!(cpu_stdext_feature & CPUID_STDEXT_AVX512CD);
228 return (has_avx512 && __zmm_enabled());
231 /* Check if AVX512PF instruction set is available */
232 static inline boolean_t
233 zfs_avx512pf_available(void)
235 boolean_t has_avx512;
237 has_avx512 = !!(cpu_stdext_feature & CPUID_STDEXT_AVX512F) &&
238 !!(cpu_stdext_feature & CPUID_STDEXT_AVX512PF);
240 return (has_avx512 && __zmm_enabled());
243 /* Check if AVX512BW instruction set is available */
244 static inline boolean_t
245 zfs_avx512bw_available(void)
247 boolean_t has_avx512 = B_FALSE;
249 has_avx512 = !!(cpu_stdext_feature & CPUID_STDEXT_AVX512BW);
251 return (has_avx512 && __zmm_enabled());
254 /* Check if AVX512DQ instruction set is available */
255 static inline boolean_t
256 zfs_avx512dq_available(void)
258 boolean_t has_avx512;
260 has_avx512 = !!(cpu_stdext_feature & CPUID_STDEXT_AVX512F) &&
261 !!(cpu_stdext_feature & CPUID_STDEXT_AVX512DQ);
263 return (has_avx512 && __zmm_enabled());
266 /* Check if AVX512VL instruction set is available */
267 static inline boolean_t
268 zfs_avx512vl_available(void)
270 boolean_t has_avx512;
272 has_avx512 = !!(cpu_stdext_feature & CPUID_STDEXT_AVX512F) &&
273 !!(cpu_stdext_feature & CPUID_STDEXT_AVX512VL);
275 return (has_avx512 && __zmm_enabled());
278 /* Check if AVX512IFMA instruction set is available */
279 static inline boolean_t
280 zfs_avx512ifma_available(void)
282 boolean_t has_avx512;
284 has_avx512 = !!(cpu_stdext_feature & CPUID_STDEXT_AVX512F) &&
285 !!(cpu_stdext_feature & CPUID_STDEXT_AVX512IFMA);
287 return (has_avx512 && __zmm_enabled());
290 /* Check if AVX512VBMI instruction set is available */
291 static inline boolean_t
292 zfs_avx512vbmi_available(void)
294 boolean_t has_avx512;
296 has_avx512 = !!(cpu_stdext_feature & CPUID_STDEXT_AVX512F) &&
297 !!(cpu_stdext_feature & CPUID_STDEXT_BMI1);
299 return (has_avx512 && __zmm_enabled());