1 //===-- MipsELFObjectWriter.cpp - Mips ELF Writer -------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "MCTargetDesc/MipsFixupKinds.h"
11 #include "MCTargetDesc/MipsMCTargetDesc.h"
12 #include "llvm/ADT/STLExtras.h"
13 #include "llvm/BinaryFormat/ELF.h"
14 #include "llvm/MC/MCELFObjectWriter.h"
15 #include "llvm/MC/MCFixup.h"
16 #include "llvm/MC/MCObjectWriter.h"
17 #include "llvm/MC/MCSymbolELF.h"
18 #include "llvm/Support/Casting.h"
19 #include "llvm/Support/Compiler.h"
20 #include "llvm/Support/Debug.h"
21 #include "llvm/Support/ErrorHandling.h"
22 #include "llvm/Support/MathExtras.h"
23 #include "llvm/Support/raw_ostream.h"
31 #define DEBUG_TYPE "mips-elf-object-writer"
37 /// Holds additional information needed by the relocation ordering algorithm.
38 struct MipsRelocationEntry {
39 const ELFRelocationEntry R; ///< The relocation.
40 bool Matched = false; ///< Is this relocation part of a match.
42 MipsRelocationEntry(const ELFRelocationEntry &R) : R(R) {}
44 void print(raw_ostream &Out) const {
46 Out << ", Matched=" << Matched;
51 raw_ostream &operator<<(raw_ostream &OS, const MipsRelocationEntry &RHS) {
57 class MipsELFObjectWriter : public MCELFObjectTargetWriter {
59 MipsELFObjectWriter(uint8_t OSABI, bool HasRelocationAddend, bool Is64);
61 ~MipsELFObjectWriter() override = default;
63 unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
64 const MCFixup &Fixup, bool IsPCRel) const override;
65 bool needsRelocateWithSymbol(const MCSymbol &Sym,
66 unsigned Type) const override;
67 void sortRelocs(const MCAssembler &Asm,
68 std::vector<ELFRelocationEntry> &Relocs) override;
71 /// The possible results of the Predicate function used by find_best.
72 enum FindBestPredicateResult {
73 FindBest_NoMatch = 0, ///< The current element is not a match.
74 FindBest_Match, ///< The current element is a match but better ones are
76 FindBest_PerfectMatch, ///< The current element is an unbeatable match.
79 } // end anonymous namespace
81 /// Copy elements in the range [First, Last) to d1 when the predicate is true or
82 /// d2 when the predicate is false. This is essentially both std::copy_if and
83 /// std::remove_copy_if combined into a single pass.
84 template <class InputIt, class OutputIt1, class OutputIt2, class UnaryPredicate>
85 static std::pair<OutputIt1, OutputIt2> copy_if_else(InputIt First, InputIt Last,
86 OutputIt1 d1, OutputIt2 d2,
87 UnaryPredicate Predicate) {
88 for (InputIt I = First; I != Last; ++I) {
98 return std::make_pair(d1, d2);
101 /// Find the best match in the range [First, Last).
103 /// An element matches when Predicate(X) returns FindBest_Match or
104 /// FindBest_PerfectMatch. A value of FindBest_PerfectMatch also terminates
105 /// the search. BetterThan(A, B) is a comparator that returns true when A is a
106 /// better match than B. The return value is the position of the best match.
108 /// This is similar to std::find_if but finds the best of multiple possible
110 template <class InputIt, class UnaryPredicate, class Comparator>
111 static InputIt find_best(InputIt First, InputIt Last, UnaryPredicate Predicate,
112 Comparator BetterThan) {
115 for (InputIt I = First; I != Last; ++I) {
116 unsigned Matched = Predicate(*I);
117 if (Matched != FindBest_NoMatch) {
118 LLVM_DEBUG(dbgs() << std::distance(First, I) << " is a match (";
119 I->print(dbgs()); dbgs() << ")\n");
120 if (Best == Last || BetterThan(*I, *Best)) {
121 LLVM_DEBUG(dbgs() << ".. and it beats the last one\n");
125 if (Matched == FindBest_PerfectMatch) {
126 LLVM_DEBUG(dbgs() << ".. and it is unbeatable\n");
134 /// Determine the low relocation that matches the given relocation.
135 /// If the relocation does not need a low relocation then the return value
136 /// is ELF::R_MIPS_NONE.
138 /// The relocations that need a matching low part are
139 /// R_(MIPS|MICROMIPS|MIPS16)_HI16 for all symbols and
140 /// R_(MIPS|MICROMIPS|MIPS16)_GOT16 for local symbols only.
141 static unsigned getMatchingLoType(const ELFRelocationEntry &Reloc) {
142 unsigned Type = Reloc.Type;
143 if (Type == ELF::R_MIPS_HI16)
144 return ELF::R_MIPS_LO16;
145 if (Type == ELF::R_MICROMIPS_HI16)
146 return ELF::R_MICROMIPS_LO16;
147 if (Type == ELF::R_MIPS16_HI16)
148 return ELF::R_MIPS16_LO16;
150 if (Reloc.OriginalSymbol &&
151 Reloc.OriginalSymbol->getBinding() != ELF::STB_LOCAL)
152 return ELF::R_MIPS_NONE;
154 if (Type == ELF::R_MIPS_GOT16)
155 return ELF::R_MIPS_LO16;
156 if (Type == ELF::R_MICROMIPS_GOT16)
157 return ELF::R_MICROMIPS_LO16;
158 if (Type == ELF::R_MIPS16_GOT16)
159 return ELF::R_MIPS16_LO16;
161 return ELF::R_MIPS_NONE;
164 /// Determine whether a relocation (X) matches the one given in R.
166 /// A relocation matches if:
167 /// - It's type matches that of a corresponding low part. This is provided in
168 /// MatchingType for efficiency.
169 /// - It's based on the same symbol.
170 /// - It's offset of greater or equal to that of the one given in R.
171 /// It should be noted that this rule assumes the programmer does not use
172 /// offsets that exceed the alignment of the symbol. The carry-bit will be
173 /// incorrect if this is not true.
175 /// A matching relocation is unbeatable if:
176 /// - It is not already involved in a match.
177 /// - It's offset is exactly that of the one given in R.
178 static FindBestPredicateResult isMatchingReloc(const MipsRelocationEntry &X,
179 const ELFRelocationEntry &R,
180 unsigned MatchingType) {
181 if (X.R.Type == MatchingType && X.R.OriginalSymbol == R.OriginalSymbol) {
183 X.R.OriginalAddend == R.OriginalAddend)
184 return FindBest_PerfectMatch;
185 else if (X.R.OriginalAddend >= R.OriginalAddend)
186 return FindBest_Match;
188 return FindBest_NoMatch;
191 /// Determine whether Candidate or PreviousBest is the better match.
192 /// The return value is true if Candidate is the better match.
194 /// A matching relocation is a better match if:
195 /// - It has a smaller addend.
196 /// - It is not already involved in a match.
197 static bool compareMatchingRelocs(const MipsRelocationEntry &Candidate,
198 const MipsRelocationEntry &PreviousBest) {
199 if (Candidate.R.OriginalAddend != PreviousBest.R.OriginalAddend)
200 return Candidate.R.OriginalAddend < PreviousBest.R.OriginalAddend;
201 return PreviousBest.Matched && !Candidate.Matched;
205 /// Print all the relocations.
206 template <class Container>
207 static void dumpRelocs(const char *Prefix, const Container &Relocs) {
208 for (const auto &R : Relocs)
209 dbgs() << Prefix << R << "\n";
213 MipsELFObjectWriter::MipsELFObjectWriter(uint8_t OSABI,
214 bool HasRelocationAddend, bool Is64)
215 : MCELFObjectTargetWriter(Is64, OSABI, ELF::EM_MIPS, HasRelocationAddend) {}
217 unsigned MipsELFObjectWriter::getRelocType(MCContext &Ctx,
218 const MCValue &Target,
219 const MCFixup &Fixup,
220 bool IsPCRel) const {
221 // Determine the type of the relocation.
222 unsigned Kind = (unsigned)Fixup.getKind();
225 case Mips::fixup_Mips_NONE:
226 return ELF::R_MIPS_NONE;
228 report_fatal_error("MIPS does not support one byte relocations");
229 case Mips::fixup_Mips_16:
231 return IsPCRel ? ELF::R_MIPS_PC16 : ELF::R_MIPS_16;
232 case Mips::fixup_Mips_32:
234 return IsPCRel ? ELF::R_MIPS_PC32 : ELF::R_MIPS_32;
239 case Mips::fixup_Mips_Branch_PCRel:
240 case Mips::fixup_Mips_PC16:
241 return ELF::R_MIPS_PC16;
242 case Mips::fixup_MICROMIPS_PC7_S1:
243 return ELF::R_MICROMIPS_PC7_S1;
244 case Mips::fixup_MICROMIPS_PC10_S1:
245 return ELF::R_MICROMIPS_PC10_S1;
246 case Mips::fixup_MICROMIPS_PC16_S1:
247 return ELF::R_MICROMIPS_PC16_S1;
248 case Mips::fixup_MICROMIPS_PC26_S1:
249 return ELF::R_MICROMIPS_PC26_S1;
250 case Mips::fixup_MICROMIPS_PC19_S2:
251 return ELF::R_MICROMIPS_PC19_S2;
252 case Mips::fixup_MICROMIPS_PC18_S3:
253 return ELF::R_MICROMIPS_PC18_S3;
254 case Mips::fixup_MICROMIPS_PC21_S1:
255 return ELF::R_MICROMIPS_PC21_S1;
256 case Mips::fixup_MIPS_PC19_S2:
257 return ELF::R_MIPS_PC19_S2;
258 case Mips::fixup_MIPS_PC18_S3:
259 return ELF::R_MIPS_PC18_S3;
260 case Mips::fixup_MIPS_PC21_S2:
261 return ELF::R_MIPS_PC21_S2;
262 case Mips::fixup_MIPS_PC26_S2:
263 return ELF::R_MIPS_PC26_S2;
264 case Mips::fixup_MIPS_PCHI16:
265 return ELF::R_MIPS_PCHI16;
266 case Mips::fixup_MIPS_PCLO16:
267 return ELF::R_MIPS_PCLO16;
270 llvm_unreachable("invalid PC-relative fixup kind!");
274 case Mips::fixup_Mips_64:
276 return ELF::R_MIPS_64;
278 return ELF::R_MIPS_TLS_DTPREL32;
280 return ELF::R_MIPS_TLS_DTPREL64;
282 return ELF::R_MIPS_TLS_TPREL32;
284 return ELF::R_MIPS_TLS_TPREL64;
287 unsigned Type = (unsigned)ELF::R_MIPS_NONE;
288 Type = setRType((unsigned)ELF::R_MIPS_GPREL32, Type);
289 Type = setRType2((unsigned)ELF::R_MIPS_64, Type);
290 Type = setRType3((unsigned)ELF::R_MIPS_NONE, Type);
293 return ELF::R_MIPS_GPREL32;
294 case Mips::fixup_Mips_GPREL16:
295 return ELF::R_MIPS_GPREL16;
296 case Mips::fixup_Mips_26:
297 return ELF::R_MIPS_26;
298 case Mips::fixup_Mips_CALL16:
299 return ELF::R_MIPS_CALL16;
300 case Mips::fixup_Mips_GOT:
301 return ELF::R_MIPS_GOT16;
302 case Mips::fixup_Mips_HI16:
303 return ELF::R_MIPS_HI16;
304 case Mips::fixup_Mips_LO16:
305 return ELF::R_MIPS_LO16;
306 case Mips::fixup_Mips_TLSGD:
307 return ELF::R_MIPS_TLS_GD;
308 case Mips::fixup_Mips_GOTTPREL:
309 return ELF::R_MIPS_TLS_GOTTPREL;
310 case Mips::fixup_Mips_TPREL_HI:
311 return ELF::R_MIPS_TLS_TPREL_HI16;
312 case Mips::fixup_Mips_TPREL_LO:
313 return ELF::R_MIPS_TLS_TPREL_LO16;
314 case Mips::fixup_Mips_TLSLDM:
315 return ELF::R_MIPS_TLS_LDM;
316 case Mips::fixup_Mips_DTPREL_HI:
317 return ELF::R_MIPS_TLS_DTPREL_HI16;
318 case Mips::fixup_Mips_DTPREL_LO:
319 return ELF::R_MIPS_TLS_DTPREL_LO16;
320 case Mips::fixup_Mips_GOT_PAGE:
321 return ELF::R_MIPS_GOT_PAGE;
322 case Mips::fixup_Mips_GOT_OFST:
323 return ELF::R_MIPS_GOT_OFST;
324 case Mips::fixup_Mips_GOT_DISP:
325 return ELF::R_MIPS_GOT_DISP;
326 case Mips::fixup_Mips_GPOFF_HI: {
327 unsigned Type = (unsigned)ELF::R_MIPS_NONE;
328 Type = setRType((unsigned)ELF::R_MIPS_GPREL16, Type);
329 Type = setRType2((unsigned)ELF::R_MIPS_SUB, Type);
330 Type = setRType3((unsigned)ELF::R_MIPS_HI16, Type);
333 case Mips::fixup_MICROMIPS_GPOFF_HI: {
334 unsigned Type = (unsigned)ELF::R_MIPS_NONE;
335 Type = setRType((unsigned)ELF::R_MICROMIPS_GPREL16, Type);
336 Type = setRType2((unsigned)ELF::R_MICROMIPS_SUB, Type);
337 Type = setRType3((unsigned)ELF::R_MICROMIPS_HI16, Type);
340 case Mips::fixup_Mips_GPOFF_LO: {
341 unsigned Type = (unsigned)ELF::R_MIPS_NONE;
342 Type = setRType((unsigned)ELF::R_MIPS_GPREL16, Type);
343 Type = setRType2((unsigned)ELF::R_MIPS_SUB, Type);
344 Type = setRType3((unsigned)ELF::R_MIPS_LO16, Type);
347 case Mips::fixup_MICROMIPS_GPOFF_LO: {
348 unsigned Type = (unsigned)ELF::R_MIPS_NONE;
349 Type = setRType((unsigned)ELF::R_MICROMIPS_GPREL16, Type);
350 Type = setRType2((unsigned)ELF::R_MICROMIPS_SUB, Type);
351 Type = setRType3((unsigned)ELF::R_MICROMIPS_LO16, Type);
354 case Mips::fixup_Mips_HIGHER:
355 return ELF::R_MIPS_HIGHER;
356 case Mips::fixup_Mips_HIGHEST:
357 return ELF::R_MIPS_HIGHEST;
358 case Mips::fixup_Mips_SUB:
359 return ELF::R_MIPS_SUB;
360 case Mips::fixup_Mips_GOT_HI16:
361 return ELF::R_MIPS_GOT_HI16;
362 case Mips::fixup_Mips_GOT_LO16:
363 return ELF::R_MIPS_GOT_LO16;
364 case Mips::fixup_Mips_CALL_HI16:
365 return ELF::R_MIPS_CALL_HI16;
366 case Mips::fixup_Mips_CALL_LO16:
367 return ELF::R_MIPS_CALL_LO16;
368 case Mips::fixup_MICROMIPS_26_S1:
369 return ELF::R_MICROMIPS_26_S1;
370 case Mips::fixup_MICROMIPS_HI16:
371 return ELF::R_MICROMIPS_HI16;
372 case Mips::fixup_MICROMIPS_LO16:
373 return ELF::R_MICROMIPS_LO16;
374 case Mips::fixup_MICROMIPS_GOT16:
375 return ELF::R_MICROMIPS_GOT16;
376 case Mips::fixup_MICROMIPS_CALL16:
377 return ELF::R_MICROMIPS_CALL16;
378 case Mips::fixup_MICROMIPS_GOT_DISP:
379 return ELF::R_MICROMIPS_GOT_DISP;
380 case Mips::fixup_MICROMIPS_GOT_PAGE:
381 return ELF::R_MICROMIPS_GOT_PAGE;
382 case Mips::fixup_MICROMIPS_GOT_OFST:
383 return ELF::R_MICROMIPS_GOT_OFST;
384 case Mips::fixup_MICROMIPS_TLS_GD:
385 return ELF::R_MICROMIPS_TLS_GD;
386 case Mips::fixup_MICROMIPS_TLS_LDM:
387 return ELF::R_MICROMIPS_TLS_LDM;
388 case Mips::fixup_MICROMIPS_TLS_DTPREL_HI16:
389 return ELF::R_MICROMIPS_TLS_DTPREL_HI16;
390 case Mips::fixup_MICROMIPS_TLS_DTPREL_LO16:
391 return ELF::R_MICROMIPS_TLS_DTPREL_LO16;
392 case Mips::fixup_MICROMIPS_GOTTPREL:
393 return ELF::R_MICROMIPS_TLS_GOTTPREL;
394 case Mips::fixup_MICROMIPS_TLS_TPREL_HI16:
395 return ELF::R_MICROMIPS_TLS_TPREL_HI16;
396 case Mips::fixup_MICROMIPS_TLS_TPREL_LO16:
397 return ELF::R_MICROMIPS_TLS_TPREL_LO16;
398 case Mips::fixup_MICROMIPS_SUB:
399 return ELF::R_MICROMIPS_SUB;
400 case Mips::fixup_MICROMIPS_HIGHER:
401 return ELF::R_MICROMIPS_HIGHER;
402 case Mips::fixup_MICROMIPS_HIGHEST:
403 return ELF::R_MICROMIPS_HIGHEST;
406 llvm_unreachable("invalid fixup kind!");
409 /// Sort relocation table entries by offset except where another order is
410 /// required by the MIPS ABI.
412 /// MIPS has a few relocations that have an AHL component in the expression used
413 /// to evaluate them. This AHL component is an addend with the same number of
414 /// bits as a symbol value but not all of our ABI's are able to supply a
415 /// sufficiently sized addend in a single relocation.
417 /// The O32 ABI for example, uses REL relocations which store the addend in the
418 /// section data. All the relocations with AHL components affect 16-bit fields
419 /// so the addend for a single relocation is limited to 16-bit. This ABI
420 /// resolves the limitation by linking relocations (e.g. R_MIPS_HI16 and
421 /// R_MIPS_LO16) and distributing the addend between the linked relocations. The
422 /// ABI mandates that such relocations must be next to each other in a
423 /// particular order (e.g. R_MIPS_HI16 must be immediately followed by a
424 /// matching R_MIPS_LO16) but the rule is less strict in practice.
426 /// The de facto standard is lenient in the following ways:
427 /// - 'Immediately following' does not refer to the next relocation entry but
428 /// the next matching relocation.
429 /// - There may be multiple high parts relocations for one low part relocation.
430 /// - There may be multiple low part relocations for one high part relocation.
431 /// - The AHL addend in each part does not have to be exactly equal as long as
432 /// the difference does not affect the carry bit from bit 15 into 16. This is
433 /// to allow, for example, the use of %lo(foo) and %lo(foo+4) when loading
434 /// both halves of a long long.
436 /// See getMatchingLoType() for a description of which high part relocations
437 /// match which low part relocations. One particular thing to note is that
438 /// R_MIPS_GOT16 and similar only have AHL addends if they refer to local
441 /// It should also be noted that this function is not affected by whether
442 /// the symbol was kept or rewritten into a section-relative equivalent. We
443 /// always match using the expressions from the source.
444 void MipsELFObjectWriter::sortRelocs(const MCAssembler &Asm,
445 std::vector<ELFRelocationEntry> &Relocs) {
446 // We do not need to sort the relocation table for RELA relocations which
447 // N32/N64 uses as the relocation addend contains the value we require,
448 // rather than it being split across a pair of relocations.
449 if (hasRelocationAddend())
452 if (Relocs.size() < 2)
455 // Sort relocations by the address they are applied to.
456 llvm::sort(Relocs.begin(), Relocs.end(),
457 [](const ELFRelocationEntry &A, const ELFRelocationEntry &B) {
458 return A.Offset < B.Offset;
461 std::list<MipsRelocationEntry> Sorted;
462 std::list<ELFRelocationEntry> Remainder;
464 LLVM_DEBUG(dumpRelocs("R: ", Relocs));
466 // Separate the movable relocations (AHL relocations using the high bits) from
467 // the immobile relocations (everything else). This does not preserve high/low
468 // matches that already existed in the input.
469 copy_if_else(Relocs.begin(), Relocs.end(), std::back_inserter(Remainder),
470 std::back_inserter(Sorted), [](const ELFRelocationEntry &Reloc) {
471 return getMatchingLoType(Reloc) != ELF::R_MIPS_NONE;
474 for (auto &R : Remainder) {
475 LLVM_DEBUG(dbgs() << "Matching: " << R << "\n");
477 unsigned MatchingType = getMatchingLoType(R);
478 assert(MatchingType != ELF::R_MIPS_NONE &&
479 "Wrong list for reloc that doesn't need a match");
481 // Find the best matching relocation for the current high part.
482 // See isMatchingReloc for a description of a matching relocation and
483 // compareMatchingRelocs for a description of what 'best' means.
484 auto InsertionPoint =
485 find_best(Sorted.begin(), Sorted.end(),
486 [&R, &MatchingType](const MipsRelocationEntry &X) {
487 return isMatchingReloc(X, R, MatchingType);
489 compareMatchingRelocs);
491 // If we matched then insert the high part in front of the match and mark
492 // both relocations as being involved in a match. We only mark the high
493 // part for cosmetic reasons in the debug output.
495 // If we failed to find a match then the high part is orphaned. This is not
496 // permitted since the relocation cannot be evaluated without knowing the
497 // carry-in. We can sometimes handle this using a matching low part that is
498 // already used in a match but we already cover that case in
499 // isMatchingReloc and compareMatchingRelocs. For the remaining cases we
500 // should insert the high part at the end of the list. This will cause the
501 // linker to fail but the alternative is to cause the linker to bind the
502 // high part to a semi-matching low part and silently calculate the wrong
503 // value. Unfortunately we have no means to warn the user that we did this
504 // so leave it up to the linker to complain about it.
505 if (InsertionPoint != Sorted.end())
506 InsertionPoint->Matched = true;
507 Sorted.insert(InsertionPoint, R)->Matched = true;
510 LLVM_DEBUG(dumpRelocs("S: ", Sorted));
512 assert(Relocs.size() == Sorted.size() && "Some relocs were not consumed");
514 // Overwrite the original vector with the sorted elements. The caller expects
515 // them in reverse order.
517 for (const auto &R : reverse(Sorted))
518 Relocs[CopyTo++] = R.R;
521 bool MipsELFObjectWriter::needsRelocateWithSymbol(const MCSymbol &Sym,
522 unsigned Type) const {
523 // If it's a compound relocation for N64 then we need the relocation if any
524 // sub-relocation needs it.
525 if (!isUInt<8>(Type))
526 return needsRelocateWithSymbol(Sym, Type & 0xff) ||
527 needsRelocateWithSymbol(Sym, (Type >> 8) & 0xff) ||
528 needsRelocateWithSymbol(Sym, (Type >> 16) & 0xff);
532 errs() << Type << "\n";
533 llvm_unreachable("Unexpected relocation");
536 // This relocation doesn't affect the section data.
537 case ELF::R_MIPS_NONE:
540 // On REL ABI's (e.g. O32), these relocations form pairs. The pairing is done
541 // by the static linker by matching the symbol and offset.
542 // We only see one relocation at a time but it's still safe to relocate with
543 // the section so long as both relocations make the same decision.
545 // Some older linkers may require the symbol for particular cases. Such cases
546 // are not supported yet but can be added as required.
547 case ELF::R_MIPS_GOT16:
548 case ELF::R_MIPS16_GOT16:
549 case ELF::R_MICROMIPS_GOT16:
550 case ELF::R_MIPS_HIGHER:
551 case ELF::R_MIPS_HIGHEST:
552 case ELF::R_MIPS_HI16:
553 case ELF::R_MIPS16_HI16:
554 case ELF::R_MICROMIPS_HI16:
555 case ELF::R_MIPS_LO16:
556 case ELF::R_MIPS16_LO16:
557 case ELF::R_MICROMIPS_LO16:
558 // FIXME: It should be safe to return false for the STO_MIPS_MICROMIPS but
559 // we neglect to handle the adjustment to the LSB of the addend that
560 // it causes in applyFixup() and similar.
561 if (cast<MCSymbolELF>(Sym).getOther() & ELF::STO_MIPS_MICROMIPS)
565 case ELF::R_MIPS_GOT_PAGE:
566 case ELF::R_MICROMIPS_GOT_PAGE:
567 case ELF::R_MIPS_GOT_OFST:
568 case ELF::R_MICROMIPS_GOT_OFST:
571 case ELF::R_MIPS_GPREL32:
572 if (cast<MCSymbolELF>(Sym).getOther() & ELF::STO_MIPS_MICROMIPS)
577 case ELF::R_MIPS_GPREL16:
578 case ELF::R_MIPS_PC16:
579 case ELF::R_MIPS_SUB:
582 // FIXME: Many of these relocations should probably return false but this
583 // hasn't been confirmed to be safe yet.
584 case ELF::R_MIPS_REL32:
585 case ELF::R_MIPS_LITERAL:
586 case ELF::R_MIPS_CALL16:
587 case ELF::R_MIPS_SHIFT5:
588 case ELF::R_MIPS_SHIFT6:
589 case ELF::R_MIPS_GOT_DISP:
590 case ELF::R_MIPS_GOT_HI16:
591 case ELF::R_MIPS_GOT_LO16:
592 case ELF::R_MIPS_INSERT_A:
593 case ELF::R_MIPS_INSERT_B:
594 case ELF::R_MIPS_DELETE:
595 case ELF::R_MIPS_CALL_HI16:
596 case ELF::R_MIPS_CALL_LO16:
597 case ELF::R_MIPS_SCN_DISP:
598 case ELF::R_MIPS_REL16:
599 case ELF::R_MIPS_ADD_IMMEDIATE:
600 case ELF::R_MIPS_PJUMP:
601 case ELF::R_MIPS_RELGOT:
602 case ELF::R_MIPS_JALR:
603 case ELF::R_MIPS_TLS_DTPMOD32:
604 case ELF::R_MIPS_TLS_DTPREL32:
605 case ELF::R_MIPS_TLS_DTPMOD64:
606 case ELF::R_MIPS_TLS_DTPREL64:
607 case ELF::R_MIPS_TLS_GD:
608 case ELF::R_MIPS_TLS_LDM:
609 case ELF::R_MIPS_TLS_DTPREL_HI16:
610 case ELF::R_MIPS_TLS_DTPREL_LO16:
611 case ELF::R_MIPS_TLS_GOTTPREL:
612 case ELF::R_MIPS_TLS_TPREL32:
613 case ELF::R_MIPS_TLS_TPREL64:
614 case ELF::R_MIPS_TLS_TPREL_HI16:
615 case ELF::R_MIPS_TLS_TPREL_LO16:
616 case ELF::R_MIPS_GLOB_DAT:
617 case ELF::R_MIPS_PC21_S2:
618 case ELF::R_MIPS_PC26_S2:
619 case ELF::R_MIPS_PC18_S3:
620 case ELF::R_MIPS_PC19_S2:
621 case ELF::R_MIPS_PCHI16:
622 case ELF::R_MIPS_PCLO16:
623 case ELF::R_MIPS_COPY:
624 case ELF::R_MIPS_JUMP_SLOT:
625 case ELF::R_MIPS_NUM:
626 case ELF::R_MIPS_PC32:
628 case ELF::R_MICROMIPS_26_S1:
629 case ELF::R_MICROMIPS_GPREL16:
630 case ELF::R_MICROMIPS_LITERAL:
631 case ELF::R_MICROMIPS_PC7_S1:
632 case ELF::R_MICROMIPS_PC10_S1:
633 case ELF::R_MICROMIPS_PC16_S1:
634 case ELF::R_MICROMIPS_CALL16:
635 case ELF::R_MICROMIPS_GOT_DISP:
636 case ELF::R_MICROMIPS_GOT_HI16:
637 case ELF::R_MICROMIPS_GOT_LO16:
638 case ELF::R_MICROMIPS_SUB:
639 case ELF::R_MICROMIPS_HIGHER:
640 case ELF::R_MICROMIPS_HIGHEST:
641 case ELF::R_MICROMIPS_CALL_HI16:
642 case ELF::R_MICROMIPS_CALL_LO16:
643 case ELF::R_MICROMIPS_SCN_DISP:
644 case ELF::R_MICROMIPS_JALR:
645 case ELF::R_MICROMIPS_HI0_LO16:
646 case ELF::R_MICROMIPS_TLS_GD:
647 case ELF::R_MICROMIPS_TLS_LDM:
648 case ELF::R_MICROMIPS_TLS_DTPREL_HI16:
649 case ELF::R_MICROMIPS_TLS_DTPREL_LO16:
650 case ELF::R_MICROMIPS_TLS_GOTTPREL:
651 case ELF::R_MICROMIPS_TLS_TPREL_HI16:
652 case ELF::R_MICROMIPS_TLS_TPREL_LO16:
653 case ELF::R_MICROMIPS_GPREL7_S2:
654 case ELF::R_MICROMIPS_PC23_S2:
655 case ELF::R_MICROMIPS_PC21_S1:
656 case ELF::R_MICROMIPS_PC26_S1:
657 case ELF::R_MICROMIPS_PC18_S3:
658 case ELF::R_MICROMIPS_PC19_S2:
661 // FIXME: Many of these should probably return false but MIPS16 isn't
662 // supported by the integrated assembler.
663 case ELF::R_MIPS16_26:
664 case ELF::R_MIPS16_GPREL:
665 case ELF::R_MIPS16_CALL16:
666 case ELF::R_MIPS16_TLS_GD:
667 case ELF::R_MIPS16_TLS_LDM:
668 case ELF::R_MIPS16_TLS_DTPREL_HI16:
669 case ELF::R_MIPS16_TLS_DTPREL_LO16:
670 case ELF::R_MIPS16_TLS_GOTTPREL:
671 case ELF::R_MIPS16_TLS_TPREL_HI16:
672 case ELF::R_MIPS16_TLS_TPREL_LO16:
673 llvm_unreachable("Unsupported MIPS16 relocation");
678 std::unique_ptr<MCObjectTargetWriter>
679 llvm::createMipsELFObjectWriter(const Triple &TT, bool IsN32) {
680 uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS());
681 bool IsN64 = TT.isArch64Bit() && !IsN32;
682 bool HasRelocationAddend = TT.isArch64Bit();
683 return llvm::make_unique<MipsELFObjectWriter>(OSABI, HasRelocationAddend,