1 //=- WebAssemblyMCCodeEmitter.cpp - Convert WebAssembly code to machine code -//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// This file implements the WebAssemblyMCCodeEmitter class.
13 //===----------------------------------------------------------------------===//
15 #include "MCTargetDesc/WebAssemblyFixupKinds.h"
16 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
17 #include "llvm/ADT/STLExtras.h"
18 #include "llvm/ADT/Statistic.h"
19 #include "llvm/MC/MCCodeEmitter.h"
20 #include "llvm/MC/MCFixup.h"
21 #include "llvm/MC/MCInst.h"
22 #include "llvm/MC/MCInstrInfo.h"
23 #include "llvm/MC/MCRegisterInfo.h"
24 #include "llvm/MC/MCSubtargetInfo.h"
25 #include "llvm/MC/MCSymbol.h"
26 #include "llvm/Support/Debug.h"
27 #include "llvm/Support/EndianStream.h"
28 #include "llvm/Support/LEB128.h"
29 #include "llvm/Support/raw_ostream.h"
33 #define DEBUG_TYPE "mccodeemitter"
35 STATISTIC(MCNumEmitted, "Number of MC instructions emitted.");
36 STATISTIC(MCNumFixups, "Number of MC fixups created.");
39 class WebAssemblyMCCodeEmitter final : public MCCodeEmitter {
40 const MCInstrInfo &MCII;
42 // Implementation generated by tablegen.
43 uint64_t getBinaryCodeForInstr(const MCInst &MI,
44 SmallVectorImpl<MCFixup> &Fixups,
45 const MCSubtargetInfo &STI) const;
47 void encodeInstruction(const MCInst &MI, raw_ostream &OS,
48 SmallVectorImpl<MCFixup> &Fixups,
49 const MCSubtargetInfo &STI) const override;
52 WebAssemblyMCCodeEmitter(const MCInstrInfo &mcii) : MCII(mcii) {}
54 } // end anonymous namespace
56 MCCodeEmitter *llvm::createWebAssemblyMCCodeEmitter(const MCInstrInfo &MCII) {
57 return new WebAssemblyMCCodeEmitter(MCII);
60 void WebAssemblyMCCodeEmitter::encodeInstruction(
61 const MCInst &MI, raw_ostream &OS, SmallVectorImpl<MCFixup> &Fixups,
62 const MCSubtargetInfo &STI) const {
63 uint64_t Start = OS.tell();
65 uint64_t Binary = getBinaryCodeForInstr(MI, Fixups, STI);
66 if (Binary <= UINT8_MAX) {
67 OS << uint8_t(Binary);
69 assert(Binary <= UINT16_MAX && "Several-byte opcodes not supported yet");
70 OS << uint8_t(Binary >> 8);
71 encodeULEB128(uint8_t(Binary), OS);
74 // For br_table instructions, encode the size of the table. In the MCInst,
75 // there's an index operand (if not a stack instruction), one operand for
76 // each table entry, and the default operand.
77 if (MI.getOpcode() == WebAssembly::BR_TABLE_I32_S ||
78 MI.getOpcode() == WebAssembly::BR_TABLE_I64_S)
79 encodeULEB128(MI.getNumOperands() - 1, OS);
80 if (MI.getOpcode() == WebAssembly::BR_TABLE_I32 ||
81 MI.getOpcode() == WebAssembly::BR_TABLE_I64)
82 encodeULEB128(MI.getNumOperands() - 2, OS);
84 const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
85 for (unsigned i = 0, e = MI.getNumOperands(); i < e; ++i) {
86 const MCOperand &MO = MI.getOperand(i);
88 /* nothing to encode */
90 } else if (MO.isImm()) {
91 if (i < Desc.getNumOperands()) {
92 const MCOperandInfo &Info = Desc.OpInfo[i];
93 LLVM_DEBUG(dbgs() << "Encoding immediate: type="
94 << int(Info.OperandType) << "\n");
95 switch (Info.OperandType) {
96 case WebAssembly::OPERAND_I32IMM:
97 encodeSLEB128(int32_t(MO.getImm()), OS);
99 case WebAssembly::OPERAND_OFFSET32:
100 encodeULEB128(uint32_t(MO.getImm()), OS);
102 case WebAssembly::OPERAND_I64IMM:
103 encodeSLEB128(int64_t(MO.getImm()), OS);
105 case WebAssembly::OPERAND_SIGNATURE:
106 OS << uint8_t(MO.getImm());
108 case WebAssembly::OPERAND_VEC_I8IMM:
109 support::endian::write<uint8_t>(OS, MO.getImm(), support::little);
111 case WebAssembly::OPERAND_VEC_I16IMM:
112 support::endian::write<uint16_t>(OS, MO.getImm(), support::little);
114 case WebAssembly::OPERAND_VEC_I32IMM:
115 support::endian::write<uint32_t>(OS, MO.getImm(), support::little);
117 case WebAssembly::OPERAND_VEC_I64IMM:
118 support::endian::write<uint64_t>(OS, MO.getImm(), support::little);
120 case WebAssembly::OPERAND_GLOBAL:
121 llvm_unreachable("wasm globals should only be accessed symbolicly");
123 encodeULEB128(uint64_t(MO.getImm()), OS);
126 encodeULEB128(uint64_t(MO.getImm()), OS);
129 } else if (MO.isFPImm()) {
130 const MCOperandInfo &Info = Desc.OpInfo[i];
131 if (Info.OperandType == WebAssembly::OPERAND_F32IMM) {
132 // TODO: MC converts all floating point immediate operands to double.
133 // This is fine for numeric values, but may cause NaNs to change bits.
134 float f = float(MO.getFPImm());
135 support::endian::write<float>(OS, f, support::little);
137 assert(Info.OperandType == WebAssembly::OPERAND_F64IMM);
138 double d = MO.getFPImm();
139 support::endian::write<double>(OS, d, support::little);
142 } else if (MO.isExpr()) {
143 const MCOperandInfo &Info = Desc.OpInfo[i];
144 llvm::MCFixupKind FixupKind;
145 size_t PaddedSize = 5;
146 switch (Info.OperandType) {
147 case WebAssembly::OPERAND_I32IMM:
148 FixupKind = MCFixupKind(WebAssembly::fixup_code_sleb128_i32);
150 case WebAssembly::OPERAND_I64IMM:
151 FixupKind = MCFixupKind(WebAssembly::fixup_code_sleb128_i64);
154 case WebAssembly::OPERAND_FUNCTION32:
155 case WebAssembly::OPERAND_OFFSET32:
156 case WebAssembly::OPERAND_TYPEINDEX:
157 case WebAssembly::OPERAND_GLOBAL:
158 case WebAssembly::OPERAND_EVENT:
159 FixupKind = MCFixupKind(WebAssembly::fixup_code_uleb128_i32);
162 llvm_unreachable("unexpected symbolic operand kind");
164 Fixups.push_back(MCFixup::create(OS.tell() - Start, MO.getExpr(),
165 FixupKind, MI.getLoc()));
167 encodeULEB128(0, OS, PaddedSize);
169 llvm_unreachable("unexpected operand kind");
173 ++MCNumEmitted; // Keep track of the # of mi's emitted.
176 #include "WebAssemblyGenMCCodeEmitter.inc"