src/arm/omap3-n900.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Copyright (C) 2013 Pavel Machek <pavel@ucw.cz>
   4  * Copyright (C) 2013-2014 Aaro Koskinen <aaro.koskinen@iki.fi>
   5  */
   6
   7 /dts-v1/;
   8
   9 #include "omap34xx.dtsi"
  10 #include <dt-bindings/input/input.h>
  11
  12 /*
  13  * Default secure signed bootloader (Nokia X-Loader) does not enable L3 firewall
  14  * for omap AES HW crypto support. When linux kernel try to access memory of AES
  15  * blocks then kernel receive "Unhandled fault: external abort on non-linefetch"
  16  * and crash. Until somebody fix omap-aes.c and omap_hwmod_3xxx_data.c code (no
  17  * crash anymore) omap AES support will be disabled for all Nokia N900 devices.
  18  * There is "unofficial" version of bootloader which enables AES in L3 firewall
  19  * but it is not widely used and to prevent kernel crash rather AES is disabled.
  20  * There is also no runtime detection code if AES is disabled in L3 firewall...
  21  */
  22 &aes {
  23         status = "disabled";
  24 };
  25
  26 / {
  27         model = "Nokia N900";
  28         compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3";
  29
  30         aliases {
  31                 i2c0;
  32                 i2c1 = &i2c1;
  33                 i2c2 = &i2c2;
  34                 i2c3 = &i2c3;
  35                 display0 = &lcd;
  36                 display1 = &tv;
  37         };
  38
  39         cpus {
  40                 cpu@0 {
  41                         cpu0-supply = <&vcc>;
  42                 };
  43         };
  44
  45         leds {
  46                 compatible = "gpio-leds";
  47                 heartbeat {
  48                         label = "debug::sleep";
  49                         gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>;  /* 162 */
  50                         linux,default-trigger = "default-on";
  51                         pinctrl-names = "default";
  52                         pinctrl-0 = <&debug_leds>;
  53                 };
  54         };
  55
  56         memory@80000000 {
  57                 device_type = "memory";
  58                 reg = <0x80000000 0x10000000>; /* 256 MB */
  59         };
  60
  61         gpio_keys {
  62                 compatible = "gpio-keys";
  63
  64                 camera_lens_cover {
  65                         label = "Camera Lens Cover";
  66                         gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; /* 110 */
  67                         linux,input-type = <EV_SW>;
  68                         linux,code = <SW_CAMERA_LENS_COVER>;
  69                         linux,can-disable;
  70                 };
  71
  72                 camera_focus {
  73                         label = "Camera Focus";
  74                         gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* 68 */
  75                         linux,code = <KEY_CAMERA_FOCUS>;
  76                         linux,can-disable;
  77                 };
  78
  79                 camera_capture {
  80                         label = "Camera Capture";
  81                         gpios = <&gpio3 5 GPIO_ACTIVE_LOW>; /* 69 */
  82                         linux,code = <KEY_CAMERA>;
  83                         linux,can-disable;
  84                 };
  85
  86                 lock_button {
  87                         label = "Lock Button";
  88                         gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; /* 113 */
  89                         linux,code = <KEY_SCREENLOCK>;
  90                         linux,can-disable;
  91                 };
  92
  93                 keypad_slide {
  94                         label = "Keypad Slide";
  95                         gpios = <&gpio3 7 GPIO_ACTIVE_LOW>; /* 71 */
  96                         linux,input-type = <EV_SW>;
  97                         linux,code = <SW_KEYPAD_SLIDE>;
  98                         linux,can-disable;
  99                 };
 100
 101                 proximity_sensor {
 102                         label = "Proximity Sensor";
 103                         gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>; /* 89 */
 104                         linux,input-type = <EV_SW>;
 105                         linux,code = <SW_FRONT_PROXIMITY>;
 106                         linux,can-disable;
 107                 };
 108         };
 109
 110         isp1707: isp1707 {
 111                 compatible = "nxp,isp1707";
 112                 nxp,enable-gpio = <&gpio3 3 GPIO_ACTIVE_HIGH>;
 113                 usb-phy = <&usb2_phy>;
 114         };
 115
 116         tv: connector {
 117                 compatible = "composite-video-connector";
 118                 label = "tv";
 119
 120                 port {
 121                         tv_connector_in: endpoint {
 122                                 remote-endpoint = <&venc_out>;
 123                         };
 124                 };
 125         };
 126
 127         sound: n900-audio {
 128                 compatible = "nokia,n900-audio";
 129
 130                 nokia,cpu-dai = <&mcbsp2>;
 131                 nokia,audio-codec = <&tlv320aic3x>, <&tlv320aic3x_aux>;
 132                 nokia,headphone-amplifier = <&tpa6130a2>;
 133
 134                 tvout-selection-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; /* 40 */
 135                 jack-detection-gpios = <&gpio6 17 GPIO_ACTIVE_HIGH>; /* 177 */
 136                 eci-switch-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* 182 */
 137                 speaker-amplifier-gpios = <&twl_gpio 7 GPIO_ACTIVE_HIGH>;
 138         };
 139
 140         battery: n900-battery {
 141                 compatible = "nokia,n900-battery";
 142                 io-channels = <&twl_madc 0>, <&twl_madc 4>, <&twl_madc 12>;
 143                 io-channel-names = "temp", "bsi", "vbat";
 144         };
 145
 146         pwm9: dmtimer-pwm {
 147                 compatible = "ti,omap-dmtimer-pwm";
 148                 #pwm-cells = <3>;
 149                 ti,timers = <&timer9>;
 150                 ti,clock-source = <0x00>; /* timer_sys_ck */
 151         };
 152
 153         ir: n900-ir {
 154                 compatible = "nokia,n900-ir";
 155                 pwms = <&pwm9 0 26316 0>; /* 38000 Hz */
 156         };
 157
 158         rom_rng: rng {
 159                 compatible = "nokia,n900-rom-rng";
 160                 clocks = <&rng_ick>;
 161                 clock-names = "ick";
 162         };
 163
 164         /* controlled (enabled/disabled) directly by bcm2048 and wl1251 */
 165         vctcxo: vctcxo {
 166                 compatible = "fixed-clock";
 167                 #clock-cells = <0>;
 168                 clock-frequency = <38400000>;
 169         };
 170 };
 171
 172 &isp {
 173         vdds_csib-supply = <&vaux2>;
 174
 175         pinctrl-names = "default";
 176         pinctrl-0 = <&camera_pins>;
 177
 178         ports {
 179                 port@1 {
 180                         reg = <1>;
 181
 182                         csi_isp: endpoint {
 183                                 remote-endpoint = <&csi_cam1>;
 184                                 bus-type = <3>; /* CCP2 */
 185                                 clock-lanes = <1>;
 186                                 data-lanes = <0>;
 187                                 lane-polarity = <0 0>;
 188                                 /* Select strobe = <1> for back camera, <0> for front camera */
 189                                 strobe = <1>;
 190                         };
 191                 };
 192         };
 193 };
 194
 195 &omap3_pmx_core {
 196         pinctrl-names = "default";
 197
 198         uart2_pins: pinmux_uart2_pins {
 199                 pinctrl-single,pins = <
 200                         OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0)         /* uart2_cts */
 201                         OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0)               /* uart2_rts */
 202                         OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)               /* uart2_tx */
 203                         OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)                /* uart2_rx */
 204                 >;
 205         };
 206
 207         uart3_pins: pinmux_uart3_pins {
 208                 pinctrl-single,pins = <
 209                         OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)                /* uart3_rx */
 210                         OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)               /* uart3_tx */
 211                 >;
 212         };
 213
 214         ethernet_pins: pinmux_ethernet_pins {
 215                 pinctrl-single,pins = <
 216                         OMAP3_CORE1_IOPAD(0x20b4, PIN_INPUT_PULLDOWN | MUX_MODE4)       /* gpmc_ncs3.gpio_54 */
 217                         OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE4)               /* dss_data16.gpio_86 */
 218                         OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4)               /* uart3_rts_sd.gpio_164 */
 219                 >;
 220         };
 221
 222         gpmc_pins: pinmux_gpmc_pins {
 223                 pinctrl-single,pins = <
 224
 225                         /* address lines */
 226                         OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a1.gpmc_a1 */
 227                         OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a2.gpmc_a2 */
 228                         OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a3.gpmc_a3 */
 229
 230                         /* data lines, gpmc_d0..d7 not muxable according to TRM */
 231                         OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0)        /* gpmc_d8.gpmc_d8 */
 232                         OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0)        /* gpmc_d9.gpmc_d9 */
 233                         OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0)        /* gpmc_d10.gpmc_d10 */
 234                         OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0)        /* gpmc_d11.gpmc_d11 */
 235                         OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0)        /* gpmc_d12.gpmc_d12 */
 236                         OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0)        /* gpmc_d13.gpmc_d13 */
 237                         OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0)        /* gpmc_d14.gpmc_d14 */
 238                         OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0)        /* gpmc_d15.gpmc_d15 */
 239
 240                         /*
 241                          * gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable
 242                          * according to TRM. OneNAND seems to require PIN_INPUT on clock.
 243                          */
 244                         OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0)       /* gpmc_ncs1.gpmc_ncs1 */
 245                         OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0)        /* gpmc_clk.gpmc_clk */
 246                 >;
 247         };
 248
 249         i2c1_pins: pinmux_i2c1_pins {
 250                 pinctrl-single,pins = <
 251                         OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)                /* i2c1_scl */
 252                         OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)                /* i2c1_sda */
 253                 >;
 254         };
 255
 256         i2c2_pins: pinmux_i2c2_pins {
 257                 pinctrl-single,pins = <
 258                         OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0)                /* i2c2_scl */
 259                         OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0)                /* i2c2_sda */
 260                 >;
 261         };
 262
 263         i2c3_pins: pinmux_i2c3_pins {
 264                 pinctrl-single,pins = <
 265                         OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)                /* i2c3_scl */
 266                         OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)                /* i2c3_sda */
 267                 >;
 268         };
 269
 270         debug_leds: pinmux_debug_led_pins {
 271                 pinctrl-single,pins = <
 272                         OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4)       /* mcbsp1_clkx.gpio_162 */
 273                 >;
 274         };
 275
 276         mcspi4_pins: pinmux_mcspi4_pins {
 277                 pinctrl-single,pins = <
 278                         OMAP3_CORE1_IOPAD(0x218c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_clk */
 279                         OMAP3_CORE1_IOPAD(0x2192, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_somi */
 280                         OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE1) /* mcspi4_simo */
 281                         OMAP3_CORE1_IOPAD(0x2196, PIN_OUTPUT | MUX_MODE1) /* mcspi4_cs0 */
 282                 >;
 283         };
 284
 285         mmc1_pins: pinmux_mmc1_pins {
 286                 pinctrl-single,pins = <
 287                         OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk */
 288                         OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd */
 289                         OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat0 */
 290                         OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1 */
 291                         OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2 */
 292                         OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3 */
 293                 >;
 294         };
 295
 296         mmc2_pins: pinmux_mmc2_pins {
 297                 pinctrl-single,pins = <
 298                         OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
 299                         OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
 300                         OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc2_dat0 */
 301                         OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
 302                         OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
 303                         OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
 304                         OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat4 */
 305                         OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat5 */
 306                         OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat6 */
 307                         OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat7 */
 308                 >;
 309         };
 310
 311         acx565akm_pins: pinmux_acx565akm_pins {
 312                 pinctrl-single,pins = <
 313                         OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE4)               /* RX51_LCD_RESET_GPIO */
 314                 >;
 315         };
 316
 317         dss_sdi_pins: pinmux_dss_sdi_pins {
 318                 pinctrl-single,pins = <
 319                         OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE1)   /* dss_data10.sdi_dat1n */
 320                         OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE1)   /* dss_data11.sdi_dat1p */
 321                         OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE1)   /* dss_data12.sdi_dat2n */
 322                         OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE1)   /* dss_data13.sdi_dat2p */
 323
 324                         OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE1)   /* dss_data22.sdi_clkp */
 325                         OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE1)   /* dss_data23.sdi_clkn */
 326                 >;
 327         };
 328
 329         wl1251_pins: pinmux_wl1251 {
 330                 pinctrl-single,pins = <
 331                         OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE4)               /* gpio 87 => wl1251 enable */
 332                         OMAP3_CORE1_IOPAD(0x208a, PIN_INPUT | MUX_MODE4)                /* gpio 42 => wl1251 irq */
 333                 >;
 334         };
 335
 336         ssi_pins: pinmux_ssi {
 337                 pinctrl-single,pins = <
 338                         OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE1) /* ssi1_rdy_tx */
 339                         OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE1)               /* ssi1_flag_tx */
 340                         OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE4)                /* ssi1_wake_tx (cawake) */
 341                         OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE1)               /* ssi1_dat_tx */
 342                         OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE1)                /* ssi1_dat_rx */
 343                         OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE1)                /* ssi1_flag_rx */
 344                         OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE1)               /* ssi1_rdy_rx */
 345                         OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE1)               /* ssi1_wake */
 346                 >;
 347         };
 348
 349         modem_pins: pinmux_modem {
 350                 pinctrl-single,pins = <
 351                         OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE4)               /* gpio 70 => cmt_apeslpx */
 352                         OMAP3_CORE1_IOPAD(0x20e0, PIN_INPUT | MUX_MODE4)                /* gpio 72 => ape_rst_rq */
 353                         OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE4)               /* gpio 73 => cmt_rst_rq */
 354                         OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE4)               /* gpio 74 => cmt_en */
 355                         OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE4)               /* gpio 75 => cmt_rst */
 356                         OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4)               /* gpio 157 => cmt_bsi */
 357                 >;
 358         };
 359
 360         camera_pins: pinmux_camera {
 361                 pinctrl-single,pins = <
 362                         OMAP3_CORE1_IOPAD(0x210c, PIN_OUTPUT | MUX_MODE7)       /* cam_hs */
 363                         OMAP3_CORE1_IOPAD(0x210e, PIN_OUTPUT | MUX_MODE7)       /* cam_vs */
 364                         OMAP3_CORE1_IOPAD(0x2110, PIN_OUTPUT | MUX_MODE0)       /* cam_xclka */
 365                         OMAP3_CORE1_IOPAD(0x211e, PIN_OUTPUT | MUX_MODE7)       /* cam_d4 */
 366                         OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT | MUX_MODE0)        /* cam_d6 */
 367                         OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT | MUX_MODE0)        /* cam_d7 */
 368                         OMAP3_CORE1_IOPAD(0x2126, PIN_INPUT | MUX_MODE0)        /* cam_d8 */
 369                         OMAP3_CORE1_IOPAD(0x2128, PIN_INPUT | MUX_MODE0)        /* cam_d9 */
 370                         OMAP3_CORE1_IOPAD(0x212a, PIN_OUTPUT | MUX_MODE7)       /* cam_d10 */
 371                         OMAP3_CORE1_IOPAD(0x212e, PIN_OUTPUT | MUX_MODE7)       /* cam_xclkb */
 372                         OMAP3_CORE1_IOPAD(0x2132, PIN_OUTPUT | MUX_MODE0)       /* cam_strobe */
 373                 >;
 374         };
 375 };
 376
 377 &i2c1 {
 378         pinctrl-names = "default";
 379         pinctrl-0 = <&i2c1_pins>;
 380
 381         clock-frequency = <2200000>;
 382
 383         twl: twl@48 {
 384                 reg = <0x48>;
 385                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
 386                 interrupt-parent = <&intc>;
 387         };
 388 };
 389
 390 #include "twl4030.dtsi"
 391 #include "twl4030_omap3.dtsi"
 392
 393 &vaux1 {
 394         regulator-name = "V28";
 395         regulator-min-microvolt = <2800000>;
 396         regulator-max-microvolt = <2800000>;
 397         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 398         regulator-always-on; /* due to battery cover sensor */
 399 };
 400
 401 &vaux2 {
 402         regulator-name = "VCSI";
 403         regulator-min-microvolt = <1800000>;
 404         regulator-max-microvolt = <1800000>;
 405         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 406 };
 407
 408 &vaux3 {
 409         regulator-name = "VMMC2_30";
 410         regulator-min-microvolt = <2800000>;
 411         regulator-max-microvolt = <3000000>;
 412         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 413 };
 414
 415 &vaux4 {
 416         regulator-name = "VCAM_ANA_28";
 417         regulator-min-microvolt = <2800000>;
 418         regulator-max-microvolt = <2800000>;
 419         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 420 };
 421
 422 &vmmc1 {
 423         regulator-name = "VMMC1";
 424         regulator-min-microvolt = <1850000>;
 425         regulator-max-microvolt = <3150000>;
 426         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 427 };
 428
 429 &vmmc2 {
 430         regulator-name = "V28_A";
 431         regulator-min-microvolt = <2800000>;
 432         regulator-max-microvolt = <3000000>;
 433         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 434         regulator-always-on; /* due VIO leak to AIC34 VDDs */
 435 };
 436
 437 &vpll1 {
 438         regulator-name = "VPLL";
 439         regulator-min-microvolt = <1800000>;
 440         regulator-max-microvolt = <1800000>;
 441         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 442         regulator-always-on;
 443 };
 444
 445 &vpll2 {
 446         regulator-name = "VSDI_CSI";
 447         regulator-min-microvolt = <1800000>;
 448         regulator-max-microvolt = <1800000>;
 449         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 450         regulator-always-on;
 451 };
 452
 453 &vsim {
 454         regulator-name = "VMMC2_IO_18";
 455         regulator-min-microvolt = <1800000>;
 456         regulator-max-microvolt = <1800000>;
 457         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 458 };
 459
 460 &vio {
 461         regulator-name = "VIO";
 462         regulator-min-microvolt = <1800000>;
 463         regulator-max-microvolt = <1800000>;
 464 };
 465
 466 &vintana1 {
 467         regulator-name = "VINTANA1";
 468         /* fixed to 1500000 */
 469         regulator-always-on;
 470 };
 471
 472 &vintana2 {
 473         regulator-name = "VINTANA2";
 474         regulator-min-microvolt = <2750000>;
 475         regulator-max-microvolt = <2750000>;
 476         regulator-always-on;
 477 };
 478
 479 &vintdig {
 480         regulator-name = "VINTDIG";
 481         /* fixed to 1500000 */
 482         regulator-always-on;
 483 };
 484
 485 /* First two dma channels are reserved on secure omap3 */
 486 &sdma {
 487         dma-channel-mask = <0xfffffffc>;
 488 };
 489
 490 &twl {
 491         twl_audio: audio {
 492                 compatible = "ti,twl4030-audio";
 493                 ti,enable-vibra = <1>;
 494         };
 495
 496         twl_power: power {
 497                 compatible = "ti,twl4030-power-n900", "ti,twl4030-power-idle-osc-off";
 498                 ti,use_poweroff;
 499         };
 500 };
 501
 502 &twl_keypad {
 503         linux,keymap = < MATRIX_KEY(0x00, 0x00, KEY_Q)
 504                          MATRIX_KEY(0x00, 0x01, KEY_O)
 505                          MATRIX_KEY(0x00, 0x02, KEY_P)
 506                          MATRIX_KEY(0x00, 0x03, KEY_COMMA)
 507                          MATRIX_KEY(0x00, 0x04, KEY_BACKSPACE)
 508                          MATRIX_KEY(0x00, 0x06, KEY_A)
 509                          MATRIX_KEY(0x00, 0x07, KEY_S)
 510
 511                          MATRIX_KEY(0x01, 0x00, KEY_W)
 512                          MATRIX_KEY(0x01, 0x01, KEY_D)
 513                          MATRIX_KEY(0x01, 0x02, KEY_F)
 514                          MATRIX_KEY(0x01, 0x03, KEY_G)
 515                          MATRIX_KEY(0x01, 0x04, KEY_H)
 516                          MATRIX_KEY(0x01, 0x05, KEY_J)
 517                          MATRIX_KEY(0x01, 0x06, KEY_K)
 518                          MATRIX_KEY(0x01, 0x07, KEY_L)
 519
 520                          MATRIX_KEY(0x02, 0x00, KEY_E)
 521                          MATRIX_KEY(0x02, 0x01, KEY_DOT)
 522                          MATRIX_KEY(0x02, 0x02, KEY_UP)
 523                          MATRIX_KEY(0x02, 0x03, KEY_ENTER)
 524                          MATRIX_KEY(0x02, 0x05, KEY_Z)
 525                          MATRIX_KEY(0x02, 0x06, KEY_X)
 526                          MATRIX_KEY(0x02, 0x07, KEY_C)
 527                          MATRIX_KEY(0x02, 0x08, KEY_F9)
 528
 529                          MATRIX_KEY(0x03, 0x00, KEY_R)
 530                          MATRIX_KEY(0x03, 0x01, KEY_V)
 531                          MATRIX_KEY(0x03, 0x02, KEY_B)
 532                          MATRIX_KEY(0x03, 0x03, KEY_N)
 533                          MATRIX_KEY(0x03, 0x04, KEY_M)
 534                          MATRIX_KEY(0x03, 0x05, KEY_SPACE)
 535                          MATRIX_KEY(0x03, 0x06, KEY_SPACE)
 536                          MATRIX_KEY(0x03, 0x07, KEY_LEFT)
 537
 538                          MATRIX_KEY(0x04, 0x00, KEY_T)
 539                          MATRIX_KEY(0x04, 0x01, KEY_DOWN)
 540                          MATRIX_KEY(0x04, 0x02, KEY_RIGHT)
 541                          MATRIX_KEY(0x04, 0x04, KEY_LEFTCTRL)
 542                          MATRIX_KEY(0x04, 0x05, KEY_RIGHTALT)
 543                          MATRIX_KEY(0x04, 0x06, KEY_LEFTSHIFT)
 544                          MATRIX_KEY(0x04, 0x08, KEY_F10)
 545
 546                          MATRIX_KEY(0x05, 0x00, KEY_Y)
 547                          MATRIX_KEY(0x05, 0x08, KEY_F11)
 548
 549                          MATRIX_KEY(0x06, 0x00, KEY_U)
 550
 551                          MATRIX_KEY(0x07, 0x00, KEY_I)
 552                          MATRIX_KEY(0x07, 0x01, KEY_F7)
 553                          MATRIX_KEY(0x07, 0x02, KEY_F8)
 554                          >;
 555 };
 556
 557 &twl_gpio {
 558         ti,pullups      = <0x0>;
 559         ti,pulldowns    = <0x03ff3f>; /* BIT(0..5) | BIT(8..17) */
 560 };
 561
 562 &i2c2 {
 563         pinctrl-names = "default";
 564         pinctrl-0 = <&i2c2_pins>;
 565
 566         clock-frequency = <100000>;
 567
 568         tlv320aic3x: tlv320aic3x@18 {
 569                 compatible = "ti,tlv320aic3x";
 570                 reg = <0x18>;
 571                 reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* 60 */
 572                 ai3x-gpio-func = <
 573                         0 /* AIC3X_GPIO1_FUNC_DISABLED */
 574                         5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */
 575                 >;
 576
 577                 AVDD-supply = <&vmmc2>;
 578                 DRVDD-supply = <&vmmc2>;
 579                 IOVDD-supply = <&vio>;
 580                 DVDD-supply = <&vio>;
 581
 582                 ai3x-micbias-vg = <1>;
 583         };
 584
 585         tlv320aic3x_aux: tlv320aic3x@19 {
 586                 compatible = "ti,tlv320aic3x";
 587                 reg = <0x19>;
 588                 reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* 60 */
 589
 590                 AVDD-supply = <&vmmc2>;
 591                 DRVDD-supply = <&vmmc2>;
 592                 IOVDD-supply = <&vio>;
 593                 DVDD-supply = <&vio>;
 594
 595                 ai3x-micbias-vg = <2>;
 596         };
 597
 598         tsl2563: tsl2563@29 {
 599                 compatible = "amstaos,tsl2563";
 600                 reg = <0x29>;
 601
 602                 amstaos,cover-comp-gain = <16>;
 603         };
 604
 605         adp1653: led-controller@30 {
 606                 compatible = "adi,adp1653";
 607                 reg = <0x30>;
 608                 enable-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; /* 88 */
 609
 610                 flash {
 611                         flash-timeout-us = <500000>;
 612                         flash-max-microamp = <320000>;
 613                         led-max-microamp = <50000>;
 614                 };
 615                 indicator {
 616                         led-max-microamp = <17500>;
 617                 };
 618         };
 619
 620         lp5523: lp5523@32 {
 621                 compatible = "national,lp5523";
 622                 reg = <0x32>;
 623                 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
 624                 enable-gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* 41 */
 625
 626                 chan0 {
 627                         chan-name = "lp5523:kb1";
 628                         led-cur = /bits/ 8 <50>;
 629                         max-cur = /bits/ 8 <100>;
 630                 };
 631
 632                 chan1 {
 633                         chan-name = "lp5523:kb2";
 634                         led-cur = /bits/ 8 <50>;
 635                         max-cur = /bits/ 8 <100>;
 636                 };
 637
 638                 chan2 {
 639                         chan-name = "lp5523:kb3";
 640                         led-cur = /bits/ 8 <50>;
 641                         max-cur = /bits/ 8 <100>;
 642                 };
 643
 644                 chan3 {
 645                         chan-name = "lp5523:kb4";
 646                         led-cur = /bits/ 8 <50>;
 647                         max-cur = /bits/ 8 <100>;
 648                 };
 649
 650                 chan4 {
 651                         chan-name = "lp5523:b";
 652                         led-cur = /bits/ 8 <50>;
 653                         max-cur = /bits/ 8 <100>;
 654                 };
 655
 656                 chan5 {
 657                         chan-name = "lp5523:g";
 658                         led-cur = /bits/ 8 <50>;
 659                         max-cur = /bits/ 8 <100>;
 660                 };
 661
 662                 chan6 {
 663                         chan-name = "lp5523:r";
 664                         led-cur = /bits/ 8 <50>;
 665                         max-cur = /bits/ 8 <100>;
 666                 };
 667
 668                 chan7 {
 669                         chan-name = "lp5523:kb5";
 670                         led-cur = /bits/ 8 <50>;
 671                         max-cur = /bits/ 8 <100>;
 672                 };
 673
 674                 chan8 {
 675                         chan-name = "lp5523:kb6";
 676                         led-cur = /bits/ 8 <50>;
 677                         max-cur = /bits/ 8 <100>;
 678                 };
 679         };
 680
 681         bq27200: bq27200@55 {
 682                 compatible = "ti,bq27200";
 683                 reg = <0x55>;
 684                 power-supplies = <&bq24150a>;
 685         };
 686
 687         /* Stereo headphone amplifier */
 688         tpa6130a2: tpa6130a2@60 {
 689                 compatible = "ti,tpa6130a2";
 690                 reg = <0x60>;
 691
 692                 Vdd-supply = <&vmmc2>;
 693
 694                 power-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>; /* 98 */
 695         };
 696
 697         si4713: si4713@63 {
 698                 compatible = "silabs,si4713";
 699                 reg = <0x63>;
 700
 701                 interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
 702                 reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */
 703                 vio-supply = <&vio>;
 704                 vdd-supply = <&vaux1>;
 705         };
 706
 707         bq24150a: bq24150a@6b {
 708                 compatible = "ti,bq24150a";
 709                 reg = <0x6b>;
 710
 711                 ti,current-limit = <100>;
 712                 ti,weak-battery-voltage = <3400>;
 713                 ti,battery-regulation-voltage = <4200>;
 714                 ti,charge-current = <650>;
 715                 ti,termination-current = <100>;
 716                 ti,resistor-sense = <68>;
 717
 718                 ti,usb-charger-detection = <&isp1707>;
 719         };
 720 };
 721
 722 &i2c3 {
 723         pinctrl-names = "default";
 724         pinctrl-0 = <&i2c3_pins>;
 725
 726         clock-frequency = <400000>;
 727
 728         lis302dl: lis3lv02d@1d {
 729                 compatible = "st,lis3lv02d";
 730                 reg = <0x1d>;
 731
 732                 Vdd-supply = <&vaux1>;
 733                 Vdd_IO-supply = <&vio>;
 734
 735                 interrupt-parent = <&gpio6>;
 736                 interrupts = <21 20>; /* 181 and 180 */
 737
 738                 /* click flags */
 739                 st,click-single-x;
 740                 st,click-single-y;
 741                 st,click-single-z;
 742
 743                 /* Limits are 0.5g * value */
 744                 st,click-threshold-x = <8>;
 745                 st,click-threshold-y = <8>;
 746                 st,click-threshold-z = <10>;
 747
 748                 /* Click must be longer than time limit */
 749                 st,click-time-limit = <9>;
 750
 751                 /* Kind of debounce filter */
 752                 st,click-latency = <50>;
 753
 754                 /* Interrupt line 2 for click detection */
 755                 st,irq2-click;
 756
 757                 st,wakeup-x-hi;
 758                 st,wakeup-y-hi;
 759                 st,wakeup-threshold = <(800/18)>; /* millig-value / 18 to get HW values */
 760
 761                 st,wakeup2-z-hi;
 762                 st,wakeup2-threshold = <(900/18)>; /* millig-value / 18 to get HW values */
 763
 764                 st,hipass1-disable;
 765                 st,hipass2-disable;
 766
 767                 st,axis-x = <1>;    /* LIS3_DEV_X */
 768                 st,axis-y = <(-2)>; /* LIS3_INV_DEV_Y */
 769                 st,axis-z = <(-3)>; /* LIS3_INV_DEV_Z */
 770
 771                 st,min-limit-x = <(-32)>;
 772                 st,min-limit-y = <3>;
 773                 st,min-limit-z = <3>;
 774
 775                 st,max-limit-x = <(-3)>;
 776                 st,max-limit-y = <32>;
 777                 st,max-limit-z = <32>;
 778         };
 779
 780         cam1: camera@3e {
 781                 compatible = "toshiba,et8ek8";
 782                 reg = <0x3e>;
 783
 784                 vana-supply = <&vaux4>;
 785
 786                 clocks = <&isp 0>;
 787                 clock-names = "extclk";
 788                 clock-frequency = <9600000>;
 789
 790                 reset-gpio = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 */
 791
 792                 lens-focus = <&ad5820>;
 793
 794                 port {
 795                         csi_cam1: endpoint {
 796                                 bus-type = <3>; /* CCP2 */
 797                                 strobe = <1>;
 798                                 clock-inv = <0>;
 799                                 crc = <1>;
 800
 801                                 remote-endpoint = <&csi_isp>;
 802                         };
 803                 };
 804         };
 805
 806         /* D/A converter for auto-focus */
 807         ad5820: dac@c {
 808                 compatible = "adi,ad5820";
 809                 reg = <0x0c>;
 810
 811                 VANA-supply = <&vaux4>;
 812
 813                 #io-channel-cells = <0>;
 814         };
 815 };
 816
 817 &mmc1 {
 818         pinctrl-names = "default";
 819         pinctrl-0 = <&mmc1_pins>;
 820         vmmc-supply = <&vmmc1>;
 821         bus-width = <4>;
 822         /* For debugging, it is often good idea to remove this GPIO.
 823            It means you can remove back cover (to reboot by removing
 824            battery) and still use the MMC card. */
 825         cd-gpios = <&gpio6 0 GPIO_ACTIVE_LOW>; /* 160 */
 826 };
 827
 828 /* most boards use vaux3, only some old versions use vmmc2 instead */
 829 &mmc2 {
 830         pinctrl-names = "default";
 831         pinctrl-0 = <&mmc2_pins>;
 832         vmmc-supply = <&vaux3>;
 833         vqmmc-supply = <&vsim>;
 834         bus-width = <8>;
 835         non-removable;
 836         no-sdio;
 837         no-sd;
 838 };
 839
 840 &mmc3 {
 841         status = "disabled";
 842 };
 843
 844 &gpmc {
 845         ranges = <0 0 0x01000000 0x01000000>,   /* 16 MB for OneNAND */
 846                  <1 0 0x02000000 0x01000000>;   /* 16 MB for smc91c96 */
 847         pinctrl-names = "default";
 848         pinctrl-0 = <&gpmc_pins>;
 849
 850         /* sys_ndmareq1 could be used by the driver, not as gpio65 though */
 851         onenand@0,0 {
 852                 #address-cells = <1>;
 853                 #size-cells = <1>;
 854                 compatible = "ti,omap2-onenand";
 855                 reg = <0 0 0x20000>;    /* CS0, offset 0, IO size 128K */
 856
 857                 /*
 858                  * These timings are based on CONFIG_OMAP_GPMC_DEBUG=y reported
 859                  * bootloader set values when booted with v5.1
 860                  * (OneNAND Manufacturer: Samsung):
 861                  *
 862                  *   cs0 GPMC_CS_CONFIG1: 0xfb001202
 863                  *   cs0 GPMC_CS_CONFIG2: 0x00111100
 864                  *   cs0 GPMC_CS_CONFIG3: 0x00020200
 865                  *   cs0 GPMC_CS_CONFIG4: 0x11001102
 866                  *   cs0 GPMC_CS_CONFIG5: 0x03101616
 867                  *   cs0 GPMC_CS_CONFIG6: 0x90060000
 868                  */
 869                 gpmc,sync-read;
 870                 gpmc,sync-write;
 871                 gpmc,burst-length = <16>;
 872                 gpmc,burst-read;
 873                 gpmc,burst-wrap;
 874                 gpmc,burst-write;
 875                 gpmc,device-width = <2>;
 876                 gpmc,mux-add-data = <2>;
 877                 gpmc,cs-on-ns = <0>;
 878                 gpmc,cs-rd-off-ns = <102>;
 879                 gpmc,cs-wr-off-ns = <102>;
 880                 gpmc,adv-on-ns = <0>;
 881                 gpmc,adv-rd-off-ns = <12>;
 882                 gpmc,adv-wr-off-ns = <12>;
 883                 gpmc,oe-on-ns = <12>;
 884                 gpmc,oe-off-ns = <102>;
 885                 gpmc,we-on-ns = <0>;
 886                 gpmc,we-off-ns = <102>;
 887                 gpmc,rd-cycle-ns = <132>;
 888                 gpmc,wr-cycle-ns = <132>;
 889                 gpmc,access-ns = <96>;
 890                 gpmc,page-burst-access-ns = <18>;
 891                 gpmc,bus-turnaround-ns = <0>;
 892                 gpmc,cycle2cycle-delay-ns = <0>;
 893                 gpmc,wait-monitoring-ns = <0>;
 894                 gpmc,clk-activation-ns = <6>;
 895                 gpmc,wr-data-mux-bus-ns = <36>;
 896                 gpmc,wr-access-ns = <96>;
 897                 gpmc,sync-clk-ps = <15000>;
 898
 899                 /*
 900                  * MTD partition table corresponding to Nokia's
 901                  * Maemo 5 (Fremantle) release.
 902                  */
 903                 partition@0 {
 904                         label = "bootloader";
 905                         reg = <0x00000000 0x00020000>;
 906                         read-only;
 907                 };
 908                 partition@1 {
 909                         label = "config";
 910                         reg = <0x00020000 0x00060000>;
 911                 };
 912                 partition@2 {
 913                         label = "log";
 914                         reg = <0x00080000 0x00040000>;
 915                 };
 916                 partition@3 {
 917                         label = "kernel";
 918                         reg = <0x000c0000 0x00200000>;
 919                 };
 920                 partition@4 {
 921                         label = "initfs";
 922                         reg = <0x002c0000 0x00200000>;
 923                 };
 924                 partition@5 {
 925                         label = "rootfs";
 926                         reg = <0x004c0000 0x0fb40000>;
 927                 };
 928         };
 929
 930         /* Ethernet is on some early development boards and qemu */
 931         ethernet@gpmc {
 932                 compatible = "smsc,lan91c94";
 933                 interrupt-parent = <&gpio2>;
 934                 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;  /* gpio54 */
 935                 reg = <1 0 0xf>;                /* 16 byte IO range */
 936                 bank-width = <2>;
 937                 pinctrl-names = "default";
 938                 pinctrl-0 = <&ethernet_pins>;
 939                 power-gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;     /* gpio86 */
 940                 reset-gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>;      /* gpio164 */
 941                 gpmc,device-width = <2>;
 942                 gpmc,sync-clk-ps = <0>;
 943                 gpmc,cs-on-ns = <0>;
 944                 gpmc,cs-rd-off-ns = <48>;
 945                 gpmc,cs-wr-off-ns = <24>;
 946                 gpmc,adv-on-ns = <0>;
 947                 gpmc,adv-rd-off-ns = <0>;
 948                 gpmc,adv-wr-off-ns = <0>;
 949                 gpmc,we-on-ns = <12>;
 950                 gpmc,we-off-ns = <18>;
 951                 gpmc,oe-on-ns = <12>;
 952                 gpmc,oe-off-ns = <48>;
 953                 gpmc,page-burst-access-ns = <0>;
 954                 gpmc,access-ns = <42>;
 955                 gpmc,rd-cycle-ns = <180>;
 956                 gpmc,wr-cycle-ns = <180>;
 957                 gpmc,bus-turnaround-ns = <0>;
 958                 gpmc,cycle2cycle-delay-ns = <0>;
 959                 gpmc,wait-monitoring-ns = <0>;
 960                 gpmc,clk-activation-ns = <0>;
 961                 gpmc,wr-access-ns = <0>;
 962                 gpmc,wr-data-mux-bus-ns = <12>;
 963         };
 964 };
 965
 966 &mcspi1 {
 967         /*
 968          * For some reason, touchscreen is necessary for screen to work at
 969          * all on real hw. It works well without it on emulator.
 970          *
 971          * Also... order in the device tree actually matters here.
 972          */
 973         tsc2005@0 {
 974                 compatible = "ti,tsc2005";
 975                 spi-max-frequency = <6000000>;
 976                 reg = <0>;
 977
 978                 vio-supply = <&vio>;
 979
 980                 reset-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* 104 */
 981                 interrupts-extended = <&gpio4 4 IRQ_TYPE_EDGE_RISING>; /* 100 */
 982
 983                 touchscreen-fuzz-x = <4>;
 984                 touchscreen-fuzz-y = <7>;
 985                 touchscreen-fuzz-pressure = <2>;
 986                 touchscreen-size-x = <4096>;
 987                 touchscreen-size-y = <4096>;
 988                 touchscreen-max-pressure = <2048>;
 989
 990                 ti,x-plate-ohms = <280>;
 991                 ti,esd-recovery-timeout-ms = <8000>;
 992         };
 993
 994         lcd: acx565akm@2 {
 995                 compatible = "sony,acx565akm";
 996                 spi-max-frequency = <6000000>;
 997                 reg = <2>;
 998
 999                 pinctrl-names = "default";
1000                 pinctrl-0 = <&acx565akm_pins>;
1001
1002                 label = "lcd";
1003                 reset-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* 90 */
1004
1005                 port {
1006                         lcd_in: endpoint {
1007                                 remote-endpoint = <&sdi_out>;
1008                         };
1009                 };
1010         };
1011 };
1012
1013 &mcspi4 {
1014         pinctrl-names = "default";
1015         pinctrl-0 = <&mcspi4_pins>;
1016
1017         wl1251@0 {
1018                 pinctrl-names = "default";
1019                 pinctrl-0 = <&wl1251_pins>;
1020
1021                 vio-supply = <&vio>;
1022
1023                 compatible = "ti,wl1251";
1024                 reg = <0>;
1025                 spi-max-frequency = <48000000>;
1026
1027                 spi-cpol;
1028                 spi-cpha;
1029
1030                 ti,power-gpio = <&gpio3 23 GPIO_ACTIVE_HIGH>; /* 87 */
1031
1032                 interrupt-parent = <&gpio2>;
1033                 interrupts = <10 IRQ_TYPE_NONE>; /* gpio line 42 */
1034
1035                 clocks = <&vctcxo>;
1036         };
1037 };
1038
1039 /* RNG not directly accessible on n900, see omap3-rom-rng instead */
1040 &rng_target {
1041         status = "disabled";
1042 };
1043
1044 &usb_otg_hs {
1045         interface-type = <0>;
1046         usb-phy = <&usb2_phy>;
1047         phys = <&usb2_phy>;
1048         phy-names = "usb2-phy";
1049         mode = <2>;
1050         power = <50>;
1051 };
1052
1053 &uart1 {
1054         status = "disabled";
1055 };
1056
1057 &uart2 {
1058         pinctrl-names = "default";
1059         pinctrl-0 = <&uart2_pins>;
1060
1061         bcm2048: bluetooth {
1062                 compatible = "brcm,bcm2048-nokia", "nokia,h4p-bluetooth";
1063                 reset-gpios = <&gpio3 27 GPIO_ACTIVE_LOW>; /* 91 */
1064                 host-wakeup-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* 101 */
1065                 bluetooth-wakeup-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* 37 */
1066                 clocks = <&vctcxo>;
1067                 clock-names = "sysclk";
1068         };
1069 };
1070
1071 &uart3 {
1072         interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
1073         pinctrl-names = "default";
1074         pinctrl-0 = <&uart3_pins>;
1075 };
1076
1077 &dss {
1078         status = "ok";
1079
1080         pinctrl-names = "default";
1081         pinctrl-0 = <&dss_sdi_pins>;
1082
1083         vdds_sdi-supply = <&vaux1>;
1084
1085         ports {
1086                 #address-cells = <1>;
1087                 #size-cells = <0>;
1088
1089                 port@1 {
1090                         reg = <1>;
1091
1092                         sdi_out: endpoint {
1093                                 remote-endpoint = <&lcd_in>;
1094                                 datapairs = <2>;
1095                         };
1096                 };
1097         };
1098 };
1099
1100 &venc {
1101         status = "ok";
1102
1103         vdda-supply = <&vdac>;
1104
1105         port {
1106                 venc_out: endpoint {
1107                         remote-endpoint = <&tv_connector_in>;
1108                         ti,channels = <1>;
1109                 };
1110         };
1111 };
1112
1113 &mcbsp2 {
1114         status = "ok";
1115 };
1116
1117 &ssi_port1 {
1118         pinctrl-names = "default";
1119         pinctrl-0 = <&ssi_pins>;
1120
1121         ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */
1122
1123         modem: hsi-client {
1124                 compatible = "nokia,n900-modem";
1125
1126                 pinctrl-names = "default";
1127                 pinctrl-0 = <&modem_pins>;
1128
1129                 hsi-channel-ids = <0>, <1>, <2>, <3>;
1130                 hsi-channel-names = "mcsaab-control",
1131                                     "speech-control",
1132                                     "speech-data",
1133                                     "mcsaab-data";
1134                 hsi-speed-kbps = <55000>;
1135                 hsi-mode = "frame";
1136                 hsi-flow = "synchronized";
1137                 hsi-arb-mode = "round-robin";
1138
1139                 interrupts-extended = <&gpio3 8 IRQ_TYPE_EDGE_FALLING>; /* 72 */
1140
1141                 gpios = <&gpio3  6 GPIO_ACTIVE_HIGH>, /* 70 */
1142                         <&gpio3  9 GPIO_ACTIVE_HIGH>, /* 73 */
1143                         <&gpio3 10 GPIO_ACTIVE_HIGH>, /* 74 */
1144                         <&gpio3 11 GPIO_ACTIVE_HIGH>, /* 75 */
1145                         <&gpio5 29 GPIO_ACTIVE_HIGH>; /* 157 */
1146                 gpio-names = "cmt_apeslpx",
1147                              "cmt_rst_rq",
1148                              "cmt_en",
1149                              "cmt_rst",
1150                              "cmt_bsi";
1151         };
1152 };
1153
1154 &ssi_port2 {
1155         status = "disabled";
1156 };