src/arm64/freescale/fsl-ls1012a-qds.dts

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Device Tree file for Freescale LS1012A QDS Board.
   4  *
   5  * Copyright 2016 Freescale Semiconductor, Inc.
   6  *
   7  */
   8 /dts-v1/;
   9
  10 #include "fsl-ls1012a.dtsi"
  11
  12 / {
  13         model = "LS1012A QDS Board";
  14         compatible = "fsl,ls1012a-qds", "fsl,ls1012a";
  15
  16         sys_mclk: clock-mclk {
  17                 compatible = "fixed-clock";
  18                 #clock-cells = <0>;
  19                 clock-frequency = <24576000>;
  20         };
  21
  22         reg_3p3v: regulator-3p3v {
  23                 compatible = "regulator-fixed";
  24                 regulator-name = "3P3V";
  25                 regulator-min-microvolt = <3300000>;
  26                 regulator-max-microvolt = <3300000>;
  27                 regulator-always-on;
  28         };
  29
  30         sound {
  31                 compatible = "simple-audio-card";
  32                 simple-audio-card,format = "i2s";
  33                 simple-audio-card,widgets =
  34                         "Microphone", "Microphone Jack",
  35                         "Headphone", "Headphone Jack",
  36                         "Speaker", "Speaker Ext",
  37                         "Line", "Line In Jack";
  38                 simple-audio-card,routing =
  39                         "MIC_IN", "Microphone Jack",
  40                         "Microphone Jack", "Mic Bias",
  41                         "LINE_IN", "Line In Jack",
  42                         "Headphone Jack", "HP_OUT",
  43                         "Speaker Ext", "LINE_OUT";
  44
  45                 simple-audio-card,cpu {
  46                         sound-dai = <&sai2>;
  47                         frame-master;
  48                         bitclock-master;
  49                 };
  50
  51                 simple-audio-card,codec {
  52                         sound-dai = <&codec>;
  53                         frame-master;
  54                         bitclock-master;
  55                         system-clock-frequency = <24576000>;
  56                 };
  57         };
  58 };
  59
  60 &dspi {
  61         bus-num = <0>;
  62         status = "okay";
  63
  64         flash@0 {
  65                 #address-cells = <1>;
  66                 #size-cells = <1>;
  67                 compatible = "n25q128a11", "jedec,spi-nor";
  68                 reg = <0>;
  69                 spi-max-frequency = <10000000>;
  70         };
  71
  72         flash@1 {
  73                 #address-cells = <1>;
  74                 #size-cells = <1>;
  75                 compatible = "sst25wf040b", "jedec,spi-nor";
  76                 spi-cpol;
  77                 spi-cpha;
  78                 reg = <1>;
  79                 spi-max-frequency = <10000000>;
  80         };
  81
  82         flash@2 {
  83                 #address-cells = <1>;
  84                 #size-cells = <1>;
  85                 compatible = "en25s64", "jedec,spi-nor";
  86                 spi-cpol;
  87                 spi-cpha;
  88                 reg = <2>;
  89                 spi-max-frequency = <10000000>;
  90         };
  91 };
  92
  93 &duart0 {
  94         status = "okay";
  95 };
  96
  97 &esdhc0 {
  98         status = "okay";
  99 };
 100
 101 &esdhc1 {
 102         status = "okay";
 103 };
 104
 105 &i2c0 {
 106         status = "okay";
 107
 108         pca9547@77 {
 109                 compatible = "nxp,pca9547";
 110                 reg = <0x77>;
 111                 #address-cells = <1>;
 112                 #size-cells = <0>;
 113
 114                 i2c@4 {
 115                         #address-cells = <1>;
 116                         #size-cells = <0>;
 117                         reg = <0x4>;
 118
 119                         codec: sgtl5000@a {
 120                                 #sound-dai-cells = <0>;
 121                                 compatible = "fsl,sgtl5000";
 122                                 reg = <0xa>;
 123                                 VDDA-supply = <&reg_3p3v>;
 124                                 VDDIO-supply = <&reg_3p3v>;
 125                                 clocks = <&sys_mclk>;
 126                         };
 127                 };
 128         };
 129 };
 130
 131 &sai2 {
 132         status = "okay";
 133 };
 134
 135 &sata {
 136         status = "okay";
 137 };