sys/arm/allwinner/clkng/aw_ccung.c

   1 /*-
   2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
   3  *
   4  * Copyright (c) 2017,2018 Emmanuel Vadot <manu@freebsd.org>
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  20  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  21  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  22  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  23  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  25  * SUCH DAMAGE.
  26  *
  27  * $FreeBSD$
  28  */
  29
  30 /*
  31  * Allwinner Clock Control Unit
  32  */
  33
  34 #include <sys/cdefs.h>
  35 __FBSDID("$FreeBSD$");
  36
  37 #include <sys/param.h>
  38 #include <sys/systm.h>
  39 #include <sys/bus.h>
  40 #include <sys/rman.h>
  41 #include <sys/kernel.h>
  42 #include <sys/lock.h>
  43 #include <sys/module.h>
  44 #include <sys/mutex.h>
  45 #include <machine/bus.h>
  46
  47 #include <dev/fdt/simplebus.h>
  48
  49 #include <dev/ofw/ofw_bus.h>
  50 #include <dev/ofw/ofw_bus_subr.h>
  51
  52 #include <dev/extres/clk/clk.h>
  53 #include <dev/extres/clk/clk_gate.h>
  54
  55 #include <dev/extres/hwreset/hwreset.h>
  56
  57 #include <arm/allwinner/clkng/aw_ccung.h>
  58 #include <arm/allwinner/clkng/aw_clk.h>
  59
  60 #ifdef __aarch64__
  61 #include "opt_soc.h"
  62 #endif
  63
  64 #include "clkdev_if.h"
  65 #include "hwreset_if.h"
  66
  67 static struct resource_spec aw_ccung_spec[] = {
  68         { SYS_RES_MEMORY,       0,      RF_ACTIVE },
  69         { -1, 0 }
  70 };
  71
  72 #define CCU_READ4(sc, reg)              bus_read_4((sc)->res, (reg))
  73 #define CCU_WRITE4(sc, reg, val)        bus_write_4((sc)->res, (reg), (val))
  74
  75 static int
  76 aw_ccung_write_4(device_t dev, bus_addr_t addr, uint32_t val)
  77 {
  78         struct aw_ccung_softc *sc;
  79
  80         sc = device_get_softc(dev);
  81         CCU_WRITE4(sc, addr, val);
  82         return (0);
  83 }
  84
  85 static int
  86 aw_ccung_read_4(device_t dev, bus_addr_t addr, uint32_t *val)
  87 {
  88         struct aw_ccung_softc *sc;
  89
  90         sc = device_get_softc(dev);
  91
  92         *val = CCU_READ4(sc, addr);
  93         return (0);
  94 }
  95
  96 static int
  97 aw_ccung_modify_4(device_t dev, bus_addr_t addr, uint32_t clr, uint32_t set)
  98 {
  99         struct aw_ccung_softc *sc;
 100         uint32_t reg;
 101
 102         sc = device_get_softc(dev);
 103
 104         reg = CCU_READ4(sc, addr);
 105         reg &= ~clr;
 106         reg |= set;
 107         CCU_WRITE4(sc, addr, reg);
 108
 109         return (0);
 110 }
 111
 112 static int
 113 aw_ccung_reset_assert(device_t dev, intptr_t id, bool reset)
 114 {
 115         struct aw_ccung_softc *sc;
 116         uint32_t val;
 117
 118         sc = device_get_softc(dev);
 119
 120         if (id >= sc->nresets || sc->resets[id].offset == 0)
 121                 return (0);
 122
 123         mtx_lock(&sc->mtx);
 124         val = CCU_READ4(sc, sc->resets[id].offset);
 125         if (reset)
 126                 val &= ~(1 << sc->resets[id].shift);
 127         else
 128                 val |= 1 << sc->resets[id].shift;
 129         CCU_WRITE4(sc, sc->resets[id].offset, val);
 130         mtx_unlock(&sc->mtx);
 131
 132         return (0);
 133 }
 134
 135 static int
 136 aw_ccung_reset_is_asserted(device_t dev, intptr_t id, bool *reset)
 137 {
 138         struct aw_ccung_softc *sc;
 139         uint32_t val;
 140
 141         sc = device_get_softc(dev);
 142
 143         if (id >= sc->nresets || sc->resets[id].offset == 0)
 144                 return (0);
 145
 146         mtx_lock(&sc->mtx);
 147         val = CCU_READ4(sc, sc->resets[id].offset);
 148         *reset = (val & (1 << sc->resets[id].shift)) != 0 ? false : true;
 149         mtx_unlock(&sc->mtx);
 150
 151         return (0);
 152 }
 153
 154 static void
 155 aw_ccung_device_lock(device_t dev)
 156 {
 157         struct aw_ccung_softc *sc;
 158
 159         sc = device_get_softc(dev);
 160         mtx_lock(&sc->mtx);
 161 }
 162
 163 static void
 164 aw_ccung_device_unlock(device_t dev)
 165 {
 166         struct aw_ccung_softc *sc;
 167
 168         sc = device_get_softc(dev);
 169         mtx_unlock(&sc->mtx);
 170 }
 171
 172 static int
 173 aw_ccung_register_gates(struct aw_ccung_softc *sc)
 174 {
 175         struct clk_gate_def def;
 176         int i;
 177
 178         for (i = 0; i < sc->ngates; i++) {
 179                 if (sc->gates[i].name == NULL)
 180                         continue;
 181                 memset(&def, 0, sizeof(def));
 182                 def.clkdef.id = i;
 183                 def.clkdef.name = sc->gates[i].name;
 184                 def.clkdef.parent_names = &sc->gates[i].parent_name;
 185                 def.clkdef.parent_cnt = 1;
 186                 def.offset = sc->gates[i].offset;
 187                 def.shift = sc->gates[i].shift;
 188                 def.mask = 1;
 189                 def.on_value = 1;
 190                 def.off_value = 0;
 191                 clknode_gate_register(sc->clkdom, &def);
 192         }
 193
 194         return (0);
 195 }
 196
 197 static void
 198 aw_ccung_init_clocks(struct aw_ccung_softc *sc)
 199 {
 200         struct clknode *clknode;
 201         int i, error;
 202
 203         for (i = 0; i < sc->n_clk_init; i++) {
 204                 clknode = clknode_find_by_name(sc->clk_init[i].name);
 205                 if (clknode == NULL) {
 206                         device_printf(sc->dev, "Cannot find clock %s\n",
 207                             sc->clk_init[i].name);
 208                         continue;
 209                 }
 210
 211                 if (sc->clk_init[i].parent_name != NULL) {
 212                         if (bootverbose)
 213                                 device_printf(sc->dev, "Setting %s as parent for %s\n",
 214                                     sc->clk_init[i].parent_name,
 215                                     sc->clk_init[i].name);
 216                         error = clknode_set_parent_by_name(clknode,
 217                             sc->clk_init[i].parent_name);
 218                         if (error != 0) {
 219                                 device_printf(sc->dev,
 220                                     "Cannot set parent to %s for %s\n",
 221                                     sc->clk_init[i].parent_name,
 222                                     sc->clk_init[i].name);
 223                                 continue;
 224                         }
 225                 }
 226                 if (sc->clk_init[i].default_freq != 0) {
 227                         error = clknode_set_freq(clknode,
 228                             sc->clk_init[i].default_freq, 0 , 0);
 229                         if (error != 0) {
 230                                 device_printf(sc->dev,
 231                                     "Cannot set frequency for %s to %ju\n",
 232                                     sc->clk_init[i].name,
 233                                     sc->clk_init[i].default_freq);
 234                                 continue;
 235                         }
 236                 }
 237                 if (sc->clk_init[i].enable) {
 238                         error = clknode_enable(clknode);
 239                         if (error != 0) {
 240                                 device_printf(sc->dev,
 241                                     "Cannot enable %s\n",
 242                                     sc->clk_init[i].name);
 243                                 continue;
 244                         }
 245                 }
 246         }
 247 }
 248
 249 int
 250 aw_ccung_attach(device_t dev)
 251 {
 252         struct aw_ccung_softc *sc;
 253         int i;
 254
 255         sc = device_get_softc(dev);
 256         sc->dev = dev;
 257
 258         if (bus_alloc_resources(dev, aw_ccung_spec, &sc->res) != 0) {
 259                 device_printf(dev, "cannot allocate resources for device\n");
 260                 return (ENXIO);
 261         }
 262
 263         mtx_init(&sc->mtx, device_get_nameunit(dev), NULL, MTX_DEF);
 264
 265         sc->clkdom = clkdom_create(dev);
 266         if (sc->clkdom == NULL)
 267                 panic("Cannot create clkdom\n");
 268
 269         for (i = 0; i < sc->nclks; i++) {
 270                 switch (sc->clks[i].type) {
 271                 case AW_CLK_UNDEFINED:
 272                         break;
 273                 case AW_CLK_MUX:
 274                         clknode_mux_register(sc->clkdom, sc->clks[i].clk.mux);
 275                         break;
 276                 case AW_CLK_DIV:
 277                         clknode_div_register(sc->clkdom, sc->clks[i].clk.div);
 278                         break;
 279                 case AW_CLK_FIXED:
 280                         clknode_fixed_register(sc->clkdom,
 281                             sc->clks[i].clk.fixed);
 282                         break;
 283                 case AW_CLK_NKMP:
 284                         aw_clk_nkmp_register(sc->clkdom, sc->clks[i].clk.nkmp);
 285                         break;
 286                 case AW_CLK_NM:
 287                         aw_clk_nm_register(sc->clkdom, sc->clks[i].clk.nm);
 288                         break;
 289                 case AW_CLK_PREDIV_MUX:
 290                         aw_clk_prediv_mux_register(sc->clkdom,
 291                             sc->clks[i].clk.prediv_mux);
 292                         break;
 293                 }
 294         }
 295
 296         if (sc->gates)
 297                 aw_ccung_register_gates(sc);
 298         if (clkdom_finit(sc->clkdom) != 0)
 299                 panic("cannot finalize clkdom initialization\n");
 300
 301         clkdom_xlock(sc->clkdom);
 302         aw_ccung_init_clocks(sc);
 303         clkdom_unlock(sc->clkdom);
 304
 305         if (bootverbose)
 306                 clkdom_dump(sc->clkdom);
 307
 308         /* If we have resets, register our self as a reset provider */
 309         if (sc->resets)
 310                 hwreset_register_ofw_provider(dev);
 311
 312         return (0);
 313 }
 314
 315 static device_method_t aw_ccung_methods[] = {
 316         /* clkdev interface */
 317         DEVMETHOD(clkdev_write_4,       aw_ccung_write_4),
 318         DEVMETHOD(clkdev_read_4,        aw_ccung_read_4),
 319         DEVMETHOD(clkdev_modify_4,      aw_ccung_modify_4),
 320         DEVMETHOD(clkdev_device_lock,   aw_ccung_device_lock),
 321         DEVMETHOD(clkdev_device_unlock, aw_ccung_device_unlock),
 322
 323         /* Reset interface */
 324         DEVMETHOD(hwreset_assert,       aw_ccung_reset_assert),
 325         DEVMETHOD(hwreset_is_asserted,  aw_ccung_reset_is_asserted),
 326
 327         DEVMETHOD_END
 328 };
 329
 330 DEFINE_CLASS_0(aw_ccung, aw_ccung_driver, aw_ccung_methods,
 331     sizeof(struct aw_ccung_softc));