2 * Copyright (c) 2006-2008 Stanislav Sedov <stas@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
32 #include <sys/systm.h>
34 #include <sys/fcntl.h>
35 #include <sys/ioccom.h>
36 #include <sys/malloc.h>
37 #include <sys/module.h>
38 #include <sys/mutex.h>
41 #include <sys/queue.h>
42 #include <sys/sched.h>
43 #include <sys/kernel.h>
44 #include <sys/sysctl.h>
48 #include <sys/pmckern.h>
49 #include <sys/cpuctl.h>
52 #include <vm/vm_param.h>
55 #include <machine/cpufunc.h>
56 #include <machine/md_var.h>
57 #include <machine/specialreg.h>
58 #include <x86/ucode.h>
60 static d_open_t cpuctl_open;
61 static d_ioctl_t cpuctl_ioctl;
63 #define CPUCTL_VERSION 1
66 # define DPRINTF(format,...) printf(format, __VA_ARGS__);
71 #define UCODE_SIZE_MAX (4 * 1024 * 1024)
73 static int cpuctl_do_msr(int cpu, cpuctl_msr_args_t *data, u_long cmd,
75 static int cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data,
77 static int cpuctl_do_cpuid_count(int cpu, cpuctl_cpuid_count_args_t *data,
79 static int cpuctl_do_eval_cpu_features(int cpu, struct thread *td);
80 static int cpuctl_do_update(int cpu, cpuctl_update_args_t *data,
82 static int update_intel(int cpu, cpuctl_update_args_t *args,
84 static int update_amd(int cpu, cpuctl_update_args_t *args, struct thread *td);
85 static int update_via(int cpu, cpuctl_update_args_t *args,
88 static struct cdev **cpuctl_devs;
89 static MALLOC_DEFINE(M_CPUCTL, "cpuctl", "CPUCTL buffer");
91 static struct cdevsw cpuctl_cdevsw = {
92 .d_version = D_VERSION,
93 .d_open = cpuctl_open,
94 .d_ioctl = cpuctl_ioctl,
99 * This function checks if specified cpu enabled or not.
105 return (pmc_cpu_is_disabled(cpu) == 0);
109 * Check if the current thread is bound to a specific cpu.
112 cpu_sched_is_bound(struct thread *td)
117 ret = sched_is_bound(td);
123 * Switch to target cpu to run.
126 set_cpu(int cpu, struct thread *td)
129 KASSERT(cpu >= 0 && cpu <= mp_maxid && cpu_enabled(cpu),
130 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
134 KASSERT(td->td_oncpu == cpu,
135 ("[cpuctl,%d]: cannot bind to target cpu %d on cpu %d", __LINE__,
140 restore_cpu(int oldcpu, int is_bound, struct thread *td)
143 KASSERT(oldcpu >= 0 && oldcpu <= mp_maxid && cpu_enabled(oldcpu),
144 ("[cpuctl,%d]: bad cpu number %d", __LINE__, oldcpu));
149 sched_bind(td, oldcpu);
154 cpuctl_ioctl(struct cdev *dev, u_long cmd, caddr_t data,
155 int flags, struct thread *td)
160 if (cpu > mp_maxid || !cpu_enabled(cpu)) {
161 DPRINTF("[cpuctl,%d]: bad cpu number %d\n", __LINE__, cpu);
164 /* Require write flag for "write" requests. */
165 if ((cmd == CPUCTL_MSRCBIT || cmd == CPUCTL_MSRSBIT ||
166 cmd == CPUCTL_UPDATE || cmd == CPUCTL_WRMSR ||
167 cmd == CPUCTL_EVAL_CPU_FEATURES) &&
168 (flags & FWRITE) == 0)
172 ret = cpuctl_do_msr(cpu, (cpuctl_msr_args_t *)data, cmd, td);
177 ret = priv_check(td, PRIV_CPUCTL_WRMSR);
180 ret = cpuctl_do_msr(cpu, (cpuctl_msr_args_t *)data, cmd, td);
183 ret = cpuctl_do_cpuid(cpu, (cpuctl_cpuid_args_t *)data, td);
186 ret = priv_check(td, PRIV_CPUCTL_UPDATE);
189 ret = cpuctl_do_update(cpu, (cpuctl_update_args_t *)data, td);
191 case CPUCTL_CPUID_COUNT:
192 ret = cpuctl_do_cpuid_count(cpu,
193 (cpuctl_cpuid_count_args_t *)data, td);
195 case CPUCTL_EVAL_CPU_FEATURES:
196 ret = cpuctl_do_eval_cpu_features(cpu, td);
207 * Actually perform cpuid operation.
210 cpuctl_do_cpuid_count(int cpu, cpuctl_cpuid_count_args_t *data,
216 KASSERT(cpu >= 0 && cpu <= mp_maxid,
217 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
219 /* Explicitly clear cpuid data to avoid returning stale info. */
220 bzero(data->data, sizeof(data->data));
221 DPRINTF("[cpuctl,%d]: retrieving cpuid lev %#0x type %#0x for %d cpu\n",
222 __LINE__, data->level, data->level_type, cpu);
227 oldcpu = td->td_oncpu;
228 is_bound = cpu_sched_is_bound(td);
230 cpuid_count(data->level, data->level_type, data->data);
231 restore_cpu(oldcpu, is_bound, td);
236 cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data, struct thread *td)
238 cpuctl_cpuid_count_args_t cdata;
241 cdata.level = data->level;
242 /* Override the level type. */
243 cdata.level_type = 0;
244 error = cpuctl_do_cpuid_count(cpu, &cdata, td);
245 bcopy(cdata.data, data->data, sizeof(data->data)); /* Ignore error */
250 * Actually perform MSR operations.
253 cpuctl_do_msr(int cpu, cpuctl_msr_args_t *data, u_long cmd, struct thread *td)
260 KASSERT(cpu >= 0 && cpu <= mp_maxid,
261 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
264 * Explicitly clear cpuid data to avoid returning stale
267 DPRINTF("[cpuctl,%d]: operating on MSR %#0x for %d cpu\n", __LINE__,
270 if ((cpu_feature & CPUID_MSR) == 0)
273 oldcpu = td->td_oncpu;
274 is_bound = cpu_sched_is_bound(td);
276 if (cmd == CPUCTL_RDMSR) {
278 ret = rdmsr_safe(data->msr, &data->data);
279 } else if (cmd == CPUCTL_WRMSR) {
280 ret = wrmsr_safe(data->msr, data->data);
281 } else if (cmd == CPUCTL_MSRSBIT) {
283 ret = rdmsr_safe(data->msr, ®);
285 ret = wrmsr_safe(data->msr, reg | data->data);
287 } else if (cmd == CPUCTL_MSRCBIT) {
289 ret = rdmsr_safe(data->msr, ®);
291 ret = wrmsr_safe(data->msr, reg & ~data->data);
294 panic("[cpuctl,%d]: unknown operation requested: %lu",
296 restore_cpu(oldcpu, is_bound, td);
301 * Actually perform microcode update.
304 cpuctl_do_update(int cpu, cpuctl_update_args_t *data, struct thread *td)
306 cpuctl_cpuid_args_t args = {
312 KASSERT(cpu >= 0 && cpu <= mp_maxid,
313 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
314 DPRINTF("[cpuctl,%d]: XXX %d", __LINE__, cpu);
316 ret = cpuctl_do_cpuid(cpu, &args, td);
319 ((uint32_t *)vendor)[0] = args.data[1];
320 ((uint32_t *)vendor)[1] = args.data[3];
321 ((uint32_t *)vendor)[2] = args.data[2];
323 if (strncmp(vendor, INTEL_VENDOR_ID, sizeof(INTEL_VENDOR_ID)) == 0)
324 ret = update_intel(cpu, data, td);
325 else if(strncmp(vendor, AMD_VENDOR_ID, sizeof(AMD_VENDOR_ID)) == 0)
326 ret = update_amd(cpu, data, td);
327 else if(strncmp(vendor, CENTAUR_VENDOR_ID, sizeof(CENTAUR_VENDOR_ID))
329 ret = update_via(cpu, data, td);
335 struct ucode_update_data {
342 ucode_intel_load_rv(void *arg)
344 struct ucode_update_data *d;
347 if (PCPU_GET(cpuid) == d->cpu)
348 d->ret = ucode_intel_load(d->ptr, true, NULL, NULL);
352 update_intel(int cpu, cpuctl_update_args_t *args, struct thread *td)
354 struct ucode_update_data d;
356 int is_bound, oldcpu, ret;
358 if (args->size == 0 || args->data == NULL) {
359 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__);
362 if (args->size > UCODE_SIZE_MAX) {
363 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__);
368 * 16 byte alignment required. Rely on the fact that
369 * malloc(9) always returns the pointer aligned at least on
370 * the size of the allocation.
372 ptr = malloc(args->size + 16, M_CPUCTL, M_WAITOK);
373 if (copyin(args->data, ptr, args->size) != 0) {
374 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed",
375 __LINE__, args->data, ptr, args->size);
379 oldcpu = td->td_oncpu;
380 is_bound = cpu_sched_is_bound(td);
384 smp_rendezvous(NULL, ucode_intel_load_rv, NULL, &d);
385 restore_cpu(oldcpu, is_bound, td);
389 * Replace any existing update. This ensures that the new update
390 * will be reloaded automatically during ACPI resume.
393 ptr = ucode_update(ptr);
401 * NB: MSR 0xc0010020, MSR_K8_UCODE_UPDATE, is not documented by AMD.
402 * Coreboot, illumos and Linux source code was used to understand
406 amd_ucode_wrmsr(void *ucode_ptr)
410 wrmsr_safe(MSR_K8_UCODE_UPDATE, (uintptr_t)ucode_ptr);
415 update_amd(int cpu, cpuctl_update_args_t *args, struct thread *td)
420 if (args->size == 0 || args->data == NULL) {
421 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__);
424 if (args->size > UCODE_SIZE_MAX) {
425 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__);
430 * 16 byte alignment required. Rely on the fact that
431 * malloc(9) always returns the pointer aligned at least on
432 * the size of the allocation.
434 ptr = malloc(args->size + 16, M_CPUCTL, M_ZERO | M_WAITOK);
435 if (copyin(args->data, ptr, args->size) != 0) {
436 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed",
437 __LINE__, args->data, ptr, args->size);
441 smp_rendezvous(NULL, amd_ucode_wrmsr, NULL, ptr);
449 update_via(int cpu, cpuctl_update_args_t *args, struct thread *td)
452 uint64_t rev0, rev1, res;
458 if (args->size == 0 || args->data == NULL) {
459 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__);
462 if (args->size > UCODE_SIZE_MAX) {
463 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__);
468 * 4 byte alignment required.
470 ptr = malloc(args->size, M_CPUCTL, M_WAITOK);
471 if (copyin(args->data, ptr, args->size) != 0) {
472 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed",
473 __LINE__, args->data, ptr, args->size);
477 oldcpu = td->td_oncpu;
478 is_bound = cpu_sched_is_bound(td);
481 rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */
486 wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr));
490 * Result are in low byte of MSR FCR5:
491 * 0x00: No update has been attempted since RESET.
492 * 0x01: The last attempted update was successful.
493 * 0x02: The last attempted update was unsuccessful due to a bad
494 * environment. No update was loaded and any preexisting
495 * patches are still active.
496 * 0x03: The last attempted update was not applicable to this processor.
497 * No update was loaded and any preexisting patches are still
499 * 0x04: The last attempted update was not successful due to an invalid
500 * update data block. No update was loaded and any preexisting
501 * patches are still active
503 rdmsr_safe(0x1205, &res);
506 rdmsr_safe(MSR_BIOS_SIGN, &rev1); /* Get new microcode revision. */
507 restore_cpu(oldcpu, is_bound, td);
509 DPRINTF("[cpu,%d]: rev0=%x rev1=%x res=%x\n", __LINE__,
510 (unsigned)(rev0 >> 32), (unsigned)(rev1 >> 32), (unsigned)res);
522 cpuctl_do_eval_cpu_features(int cpu, struct thread *td)
527 KASSERT(cpu >= 0 && cpu <= mp_maxid,
528 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
534 oldcpu = td->td_oncpu;
535 is_bound = cpu_sched_is_bound(td);
539 hw_ibrs_recalculate();
540 restore_cpu(oldcpu, is_bound, td);
541 hw_ssb_recalculate(true);
543 pmap_allow_2m_x_ept_recalculate();
545 hw_mds_recalculate();
552 cpuctl_open(struct cdev *dev, int flags, int fmt __unused, struct thread *td)
558 if (cpu > mp_maxid || !cpu_enabled(cpu)) {
559 DPRINTF("[cpuctl,%d]: incorrect cpu number %d\n", __LINE__,
564 ret = securelevel_gt(td->td_ucred, 0);
569 cpuctl_modevent(module_t mod __unused, int type, void *data __unused)
576 printf("cpuctl: access to MSR registers/cpuid info.\n");
577 cpuctl_devs = malloc(sizeof(*cpuctl_devs) * (mp_maxid + 1), M_CPUCTL,
580 if (cpu_enabled(cpu))
581 cpuctl_devs[cpu] = make_dev(&cpuctl_cdevsw, cpu,
582 UID_ROOT, GID_KMEM, 0640, "cpuctl%d", cpu);
586 if (cpuctl_devs[cpu] != NULL)
587 destroy_dev(cpuctl_devs[cpu]);
589 free(cpuctl_devs, M_CPUCTL);
599 DEV_MODULE(cpuctl, cpuctl_modevent, NULL);
600 MODULE_VERSION(cpuctl, CPUCTL_VERSION);