1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright (c) 2020, Intel Corporation
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of the Intel Corporation nor the names of its
16 * contributors may be used to endorse or promote products derived from
17 * this software without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
33 #ifndef _ICE_COMMON_H_
34 #define _ICE_COMMON_H_
38 #include "ice_flex_pipe.h"
40 #include "ice_switch.h"
49 /* prototype for functions used for SW locks */
50 void ice_free_list(struct LIST_HEAD_TYPE *list);
51 void ice_init_lock(struct ice_lock *lock);
52 void ice_acquire_lock(struct ice_lock *lock);
53 void ice_release_lock(struct ice_lock *lock);
54 void ice_destroy_lock(struct ice_lock *lock);
55 void *ice_alloc_dma_mem(struct ice_hw *hw, struct ice_dma_mem *m, u64 size);
56 void ice_free_dma_mem(struct ice_hw *hw, struct ice_dma_mem *m);
58 void ice_idle_aq(struct ice_hw *hw, struct ice_ctl_q_info *cq);
59 bool ice_sq_done(struct ice_hw *hw, struct ice_ctl_q_info *cq);
61 enum ice_status ice_init_hw(struct ice_hw *hw);
62 void ice_deinit_hw(struct ice_hw *hw);
63 enum ice_status ice_check_reset(struct ice_hw *hw);
64 enum ice_status ice_reset(struct ice_hw *hw, enum ice_reset_req req);
66 enum ice_status ice_create_all_ctrlq(struct ice_hw *hw);
67 enum ice_status ice_init_all_ctrlq(struct ice_hw *hw);
68 void ice_shutdown_all_ctrlq(struct ice_hw *hw);
69 void ice_destroy_all_ctrlq(struct ice_hw *hw);
71 ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,
72 struct ice_rq_event_info *e, u16 *pending);
74 ice_get_link_status(struct ice_port_info *pi, bool *link_up);
75 enum ice_status ice_update_link_info(struct ice_port_info *pi);
77 ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,
78 enum ice_aq_res_access_type access, u32 timeout);
79 void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res);
81 ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res);
83 ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res);
85 ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries,
86 struct ice_aqc_alloc_free_res_elem *buf, u16 buf_size,
87 enum ice_adminq_opc opc, struct ice_sq_cd *cd);
89 ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq,
90 struct ice_aq_desc *desc, void *buf, u16 buf_size,
91 struct ice_sq_cd *cd);
92 void ice_clear_pxe_mode(struct ice_hw *hw);
94 enum ice_status ice_get_caps(struct ice_hw *hw);
96 void ice_set_safe_mode_caps(struct ice_hw *hw);
98 enum ice_status ice_set_mac_type(struct ice_hw *hw);
100 /* Define a macro that will align a pointer to point to the next memory address
101 * that falls on the given power of 2 (i.e., 2, 4, 8, 16, 32, 64...). For
102 * example, given the variable pointer = 0x1006, then after the following call:
104 * pointer = ICE_ALIGN(pointer, 4)
106 * ... the value of pointer would equal 0x1008, since 0x1008 is the next
107 * address after 0x1006 which is divisible by 4.
109 #define ICE_ALIGN(ptr, align) (((ptr) + ((align) - 1)) & ~((align) - 1))
112 ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
114 enum ice_status ice_clear_rxq_ctx(struct ice_hw *hw, u32 rxq_index);
116 ice_clear_tx_cmpltnq_ctx(struct ice_hw *hw, u32 tx_cmpltnq_index);
118 ice_write_tx_cmpltnq_ctx(struct ice_hw *hw,
119 struct ice_tx_cmpltnq_ctx *tx_cmpltnq_ctx,
120 u32 tx_cmpltnq_index);
122 ice_clear_tx_drbell_q_ctx(struct ice_hw *hw, u32 tx_drbell_q_index);
124 ice_write_tx_drbell_q_ctx(struct ice_hw *hw,
125 struct ice_tx_drbell_q_ctx *tx_drbell_q_ctx,
126 u32 tx_drbell_q_index);
129 ice_aq_get_rss_lut(struct ice_hw *hw, u16 vsi_handle, u8 lut_type, u8 *lut,
132 ice_aq_set_rss_lut(struct ice_hw *hw, u16 vsi_handle, u8 lut_type, u8 *lut,
135 ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle,
136 struct ice_aqc_get_set_rss_keys *keys);
138 ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle,
139 struct ice_aqc_get_set_rss_keys *keys);
141 ice_aq_add_lan_txq(struct ice_hw *hw, u8 count,
142 struct ice_aqc_add_tx_qgrp *qg_list, u16 buf_size,
143 struct ice_sq_cd *cd);
145 ice_aq_move_recfg_lan_txq(struct ice_hw *hw, u8 num_qs, bool is_move,
146 bool is_tc_change, bool subseq_call, bool flush_pipe,
147 u8 timeout, u32 *blocked_cgds,
148 struct ice_aqc_move_txqs_data *buf, u16 buf_size,
149 u8 *txqs_moved, struct ice_sq_cd *cd);
151 bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq);
152 enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading);
153 void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode);
154 extern const struct ice_ctx_ele ice_tlan_ctx_info[];
156 ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx,
157 const struct ice_ctx_ele *ce_info);
160 ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc,
161 void *buf, u16 buf_size, struct ice_sq_cd *cd);
162 enum ice_status ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd);
165 ice_aq_send_driver_ver(struct ice_hw *hw, struct ice_driver_ver *dv,
166 struct ice_sq_cd *cd);
168 ice_aq_set_port_params(struct ice_port_info *pi, u16 bad_frame_vsi,
169 bool save_bad_pac, bool pad_short_pac, bool double_vlan,
170 struct ice_sq_cd *cd);
172 ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode,
173 struct ice_aqc_get_phy_caps_data *caps,
174 struct ice_sq_cd *cd);
176 ice_update_phy_type(u64 *phy_type_low, u64 *phy_type_high,
177 u16 link_speeds_bitmap);
179 ice_aq_manage_mac_read(struct ice_hw *hw, void *buf, u16 buf_size,
180 struct ice_sq_cd *cd);
182 ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags,
183 struct ice_sq_cd *cd);
185 enum ice_status ice_clear_pf_cfg(struct ice_hw *hw);
187 ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi,
188 struct ice_aqc_set_phy_cfg_data *cfg, struct ice_sq_cd *cd);
189 bool ice_fw_supports_link_override(struct ice_hw *hw);
191 ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,
192 struct ice_port_info *pi);
193 bool ice_is_phy_caps_an_enabled(struct ice_aqc_get_phy_caps_data *caps);
195 enum ice_fc_mode ice_caps_to_fc_mode(u8 caps);
196 enum ice_fec_mode ice_caps_to_fec_mode(u8 caps, u8 fec_options);
198 ice_set_fc(struct ice_port_info *pi, u8 *aq_failures,
199 bool ena_auto_link_update);
201 ice_phy_caps_equals_cfg(struct ice_aqc_get_phy_caps_data *caps,
202 struct ice_aqc_set_phy_cfg_data *cfg);
204 ice_copy_phy_caps_to_cfg(struct ice_port_info *pi,
205 struct ice_aqc_get_phy_caps_data *caps,
206 struct ice_aqc_set_phy_cfg_data *cfg);
208 ice_cfg_phy_fec(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,
209 enum ice_fec_mode fec);
211 ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,
212 struct ice_sq_cd *cd);
214 ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd);
216 ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
217 struct ice_link_status *link, struct ice_sq_cd *cd);
219 ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask,
220 struct ice_sq_cd *cd);
222 ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd);
225 ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
226 struct ice_sq_cd *cd);
228 ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr,
229 u16 mem_addr, u8 page, u8 set_page, u8 *data, u8 length,
230 bool write, struct ice_sq_cd *cd);
233 ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info);
235 __ice_write_sr_word(struct ice_hw *hw, u32 offset, const u16 *data);
237 __ice_write_sr_buf(struct ice_hw *hw, u32 offset, u16 words, const u16 *data);
239 ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
240 u16 *q_handle, u16 *q_ids, u32 *q_teids,
241 enum ice_disq_rst_src rst_src, u16 vmvf_num,
242 struct ice_sq_cd *cd);
244 ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u16 tc_bitmap,
247 ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,
248 u8 num_qgrps, struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
249 struct ice_sq_cd *cd);
250 enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle);
251 void ice_replay_post(struct ice_hw *hw);
252 void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw);
253 void ice_sched_replay_agg(struct ice_hw *hw);
254 enum ice_status ice_sched_replay_tc_node_bw(struct ice_port_info *pi);
255 enum ice_status ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle);
256 enum ice_status ice_sched_replay_root_node_bw(struct ice_port_info *pi);
258 ice_sched_replay_q_bw(struct ice_port_info *pi, struct ice_q_ctx *q_ctx);
260 ice_get_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 q_handle);
262 ice_stat_update40(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
263 u64 *prev_stat, u64 *cur_stat);
265 ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
266 u64 *prev_stat, u64 *cur_stat);
268 ice_stat_update_repc(struct ice_hw *hw, u16 vsi_handle, bool prev_stat_loaded,
269 struct ice_eth_stats *cur_stats);
270 enum ice_fw_modes ice_get_fw_mode(struct ice_hw *hw);
271 void ice_print_rollback_msg(struct ice_hw *hw);
273 ice_aq_alternate_write(struct ice_hw *hw, u32 reg_addr0, u32 reg_val0,
274 u32 reg_addr1, u32 reg_val1);
276 ice_aq_alternate_read(struct ice_hw *hw, u32 reg_addr0, u32 *reg_val0,
277 u32 reg_addr1, u32 *reg_val1);
279 ice_aq_alternate_write_done(struct ice_hw *hw, u8 bios_mode,
281 enum ice_status ice_aq_alternate_clear(struct ice_hw *hw);
283 ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
284 struct ice_aqc_txsched_elem_data *buf);
286 ice_get_cur_lldp_persist_status(struct ice_hw *hw, u32 *lldp_status);
288 ice_get_dflt_lldp_persist_status(struct ice_hw *hw, u32 *lldp_status);
289 enum ice_status ice_get_netlist_ver_info(struct ice_hw *hw);
291 ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,
292 struct ice_sq_cd *cd);
293 bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw);
295 ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add);
296 #endif /* _ICE_COMMON_H_ */