sys/gnu/dts/arm64/qcom/sdm845-cheza.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Google Cheza device tree source (common between revisions)
   4  *
   5  * Copyright 2018 Google LLC.
   6  */
   7
   8 #include <dt-bindings/gpio/gpio.h>
   9 #include <dt-bindings/input/input.h>
  10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
  11 #include "sdm845.dtsi"
  12
  13 /* PMICs depend on spmi_bus label and so must come after SoC */
  14 #include "pm8005.dtsi"
  15 #include "pm8998.dtsi"
  16
  17 / {
  18         aliases {
  19                 bluetooth0 = &bluetooth;
  20                 hsuart0 = &uart6;
  21                 serial0 = &uart9;
  22                 wifi0 = &wifi;
  23         };
  24
  25         chosen {
  26                 stdout-path = "serial0:115200n8";
  27         };
  28
  29         backlight: backlight {
  30                 compatible = "pwm-backlight";
  31                 pwms = <&cros_ec_pwm 0>;
  32                 enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
  33                 power-supply = <&ppvar_sys>;
  34                 pinctrl-names = "default";
  35                 pinctrl-0 = <&ap_edp_bklten>;
  36         };
  37
  38         /* FIXED REGULATORS - parents above children */
  39
  40         /* This is the top level supply and variable voltage */
  41         ppvar_sys: ppvar-sys-regulator {
  42                 compatible = "regulator-fixed";
  43                 regulator-name = "ppvar_sys";
  44                 regulator-always-on;
  45                 regulator-boot-on;
  46         };
  47
  48         /* This divides ppvar_sys by 2, so voltage is variable */
  49         src_vph_pwr: src-vph-pwr-regulator {
  50                 compatible = "regulator-fixed";
  51                 regulator-name = "src_vph_pwr";
  52
  53                 /* EC turns on with switchcap_on_l; always on for AP */
  54                 regulator-always-on;
  55                 regulator-boot-on;
  56
  57                 vin-supply = <&ppvar_sys>;
  58         };
  59
  60         pp5000_a: pp5000-a-regulator {
  61                 compatible = "regulator-fixed";
  62                 regulator-name = "pp5000_a";
  63
  64                 /* EC turns on with en_pp5000_a; always on for AP */
  65                 regulator-always-on;
  66                 regulator-boot-on;
  67                 regulator-min-microvolt = <5000000>;
  68                 regulator-max-microvolt = <5000000>;
  69
  70                 vin-supply = <&ppvar_sys>;
  71         };
  72
  73         src_vreg_bob: src-vreg-bob-regulator {
  74                 compatible = "regulator-fixed";
  75                 regulator-name = "src_vreg_bob";
  76
  77                 /* EC turns on with vbob_en; always on for AP */
  78                 regulator-always-on;
  79                 regulator-boot-on;
  80                 regulator-min-microvolt = <3600000>;
  81                 regulator-max-microvolt = <3600000>;
  82
  83                 vin-supply = <&ppvar_sys>;
  84         };
  85
  86         pp3300_dx_edp: pp3300-dx-edp-regulator {
  87                 compatible = "regulator-fixed";
  88                 regulator-name = "pp3300_dx_edp";
  89
  90                 regulator-min-microvolt = <3300000>;
  91                 regulator-max-microvolt = <3300000>;
  92
  93                 gpio = <&tlmm 43 GPIO_ACTIVE_HIGH>;
  94                 enable-active-high;
  95                 pinctrl-names = "default";
  96                 pinctrl-0 = <&en_pp3300_dx_edp>;
  97         };
  98
  99         /*
 100          * Apparently RPMh does not provide support for PM8998 S4 because it
 101          * is always-on; model it as a fixed regulator.
 102          */
 103         src_pp1800_s4a: pm8998-smps4 {
 104                 compatible = "regulator-fixed";
 105                 regulator-name = "src_pp1800_s4a";
 106
 107                 regulator-min-microvolt = <1800000>;
 108                 regulator-max-microvolt = <1800000>;
 109
 110                 regulator-always-on;
 111                 regulator-boot-on;
 112
 113                 vin-supply = <&src_vph_pwr>;
 114         };
 115
 116         /* BOARD-SPECIFIC TOP LEVEL NODES */
 117
 118         gpio-keys {
 119                 compatible = "gpio-keys";
 120                 pinctrl-names = "default";
 121                 pinctrl-0 = <&pen_eject_odl>;
 122
 123                 pen-insert {
 124                         label = "Pen Insert";
 125                         /* Insert = low, eject = high */
 126                         gpios = <&tlmm 119 GPIO_ACTIVE_LOW>;
 127                         linux,code = <SW_PEN_INSERTED>;
 128                         linux,input-type = <EV_SW>;
 129                         wakeup-source;
 130                 };
 131         };
 132
 133         panel: panel {
 134                 compatible ="innolux,p120zdg-bf1";
 135                 power-supply = <&pp3300_dx_edp>;
 136                 backlight = <&backlight>;
 137                 no-hpd;
 138
 139                 ports {
 140                         panel_in: port {
 141                                 panel_in_edp: endpoint {
 142                                         remote-endpoint = <&sn65dsi86_out>;
 143                                 };
 144                         };
 145                 };
 146         };
 147 };
 148
 149 /*
 150  * Reserved memory changes
 151  *
 152  * Putting this all together (out of order with the rest of the file) to keep
 153  * all modifications to the memory map (from sdm845.dtsi) in one place.
 154  */
 155
 156 /*
 157  * Our mpss_region is 8MB bigger than the default one and that conflicts
 158  * with venus_mem and cdsp_mem.
 159  *
 160  * For venus_mem we'll delete and re-create at a different address.
 161  *
 162  * cdsp_mem isn't used on cheza right now so we won't bother re-creating it; but
 163  * that also means we need to delete cdsp_pas.
 164  */
 165 /delete-node/ &venus_mem;
 166 /delete-node/ &cdsp_mem;
 167 /delete-node/ &cdsp_pas;
 168
 169 /* Increase the size from 120 MB to 128 MB */
 170 &mpss_region {
 171         reg = <0 0x8e000000 0 0x8000000>;
 172 };
 173
 174 /* Increase the size from 2MB to 8MB */
 175 &rmtfs_mem {
 176         reg = <0 0x88f00000 0 0x800000>;
 177 };
 178
 179 / {
 180         reserved-memory {
 181                 venus_mem: memory@96000000 {
 182                         reg = <0 0x96000000 0 0x500000>;
 183                         no-map;
 184                 };
 185         };
 186 };
 187
 188 &qspi {
 189         status = "okay";
 190         pinctrl-names = "default";
 191         pinctrl-0 = <&qspi_clk &qspi_cs0 &qspi_data01>;
 192
 193         flash@0 {
 194                 compatible = "jedec,spi-nor";
 195                 reg = <0>;
 196
 197                 /*
 198                  * In theory chip supports up to 104 MHz and controller up
 199                  * to 80 MHz, but above 25 MHz wasn't reliable so we'll use
 200                  * that for now.  b:117440651
 201                  */
 202                 spi-max-frequency = <25000000>;
 203                 spi-tx-bus-width = <2>;
 204                 spi-rx-bus-width = <2>;
 205         };
 206 };
 207
 208
 209 &apps_rsc {
 210         pm8998-rpmh-regulators {
 211                 compatible = "qcom,pm8998-rpmh-regulators";
 212                 qcom,pmic-id = "a";
 213
 214                 vdd-s1-supply = <&src_vph_pwr>;
 215                 vdd-s2-supply = <&src_vph_pwr>;
 216                 vdd-s3-supply = <&src_vph_pwr>;
 217                 vdd-s4-supply = <&src_vph_pwr>;
 218                 vdd-s5-supply = <&src_vph_pwr>;
 219                 vdd-s6-supply = <&src_vph_pwr>;
 220                 vdd-s7-supply = <&src_vph_pwr>;
 221                 vdd-s8-supply = <&src_vph_pwr>;
 222                 vdd-s9-supply = <&src_vph_pwr>;
 223                 vdd-s10-supply = <&src_vph_pwr>;
 224                 vdd-s11-supply = <&src_vph_pwr>;
 225                 vdd-s12-supply = <&src_vph_pwr>;
 226                 vdd-s13-supply = <&src_vph_pwr>;
 227                 vdd-l1-l27-supply = <&src_pp1025_s7a>;
 228                 vdd-l2-l8-l17-supply = <&src_pp1350_s3a>;
 229                 vdd-l3-l11-supply = <&src_pp1025_s7a>;
 230                 vdd-l4-l5-supply = <&src_pp1025_s7a>;
 231                 vdd-l6-supply = <&src_vph_pwr>;
 232                 vdd-l7-l12-l14-l15-supply = <&src_pp2040_s5a>;
 233                 vdd-l9-supply = <&src_pp2040_s5a>;
 234                 vdd-l10-l23-l25-supply = <&src_vreg_bob>;
 235                 vdd-l13-l19-l21-supply = <&src_vreg_bob>;
 236                 vdd-l16-l28-supply = <&src_vreg_bob>;
 237                 vdd-l18-l22-supply = <&src_vreg_bob>;
 238                 vdd-l20-l24-supply = <&src_vreg_bob>;
 239                 vdd-l26-supply = <&src_pp1350_s3a>;
 240                 vin-lvs-1-2-supply = <&src_pp1800_s4a>;
 241
 242                 src_pp1125_s2a: smps2 {
 243                         regulator-min-microvolt = <1100000>;
 244                         regulator-max-microvolt = <1100000>;
 245                 };
 246
 247                 src_pp1350_s3a: smps3 {
 248                         regulator-min-microvolt = <1352000>;
 249                         regulator-max-microvolt = <1352000>;
 250                 };
 251
 252                 src_pp2040_s5a: smps5 {
 253                         regulator-min-microvolt = <1904000>;
 254                         regulator-max-microvolt = <2040000>;
 255                 };
 256
 257                 src_pp1025_s7a: smps7 {
 258                         regulator-min-microvolt = <900000>;
 259                         regulator-max-microvolt = <1028000>;
 260                 };
 261
 262                 vdd_qusb_hs0:
 263                 vdda_hp_pcie_core:
 264                 vdda_mipi_csi0_0p9:
 265                 vdda_mipi_csi1_0p9:
 266                 vdda_mipi_csi2_0p9:
 267                 vdda_mipi_dsi0_pll:
 268                 vdda_mipi_dsi1_pll:
 269                 vdda_qlink_lv:
 270                 vdda_qlink_lv_ck:
 271                 vdda_qrefs_0p875:
 272                 vdda_pcie_core:
 273                 vdda_pll_cc_ebi01:
 274                 vdda_pll_cc_ebi23:
 275                 vdda_sp_sensor:
 276                 vdda_ufs1_core:
 277                 vdda_ufs2_core:
 278                 vdda_usb1_ss_core:
 279                 vdda_usb2_ss_core:
 280                 src_pp875_l1a: ldo1 {
 281                         regulator-min-microvolt = <880000>;
 282                         regulator-max-microvolt = <880000>;
 283                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 284                 };
 285
 286                 vddpx_10:
 287                 src_pp1200_l2a: ldo2 {
 288                         regulator-min-microvolt = <1200000>;
 289                         regulator-max-microvolt = <1200000>;
 290                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 291
 292                         /* TODO: why??? */
 293                         regulator-always-on;
 294                 };
 295
 296                 pp1000_l3a_sdr845: ldo3 {
 297                         regulator-min-microvolt = <1000000>;
 298                         regulator-max-microvolt = <1000000>;
 299                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 300                 };
 301
 302                 vdd_wcss_cx:
 303                 vdd_wcss_mx:
 304                 vdda_wcss_pll:
 305                 src_pp800_l5a: ldo5 {
 306                         regulator-min-microvolt = <800000>;
 307                         regulator-max-microvolt = <800000>;
 308                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 309                 };
 310
 311                 vddpx_13:
 312                 src_pp1800_l6a: ldo6 {
 313                         regulator-min-microvolt = <1856000>;
 314                         regulator-max-microvolt = <1856000>;
 315                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 316                 };
 317
 318                 pp1800_l7a_wcn3990: ldo7 {
 319                         regulator-min-microvolt = <1800000>;
 320                         regulator-max-microvolt = <1800000>;
 321                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 322                 };
 323
 324                 src_pp1200_l8a: ldo8 {
 325                         regulator-min-microvolt = <1200000>;
 326                         regulator-max-microvolt = <1248000>;
 327                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 328                 };
 329
 330                 pp1800_dx_pen:
 331                 src_pp1800_l9a: ldo9 {
 332                         regulator-min-microvolt = <1800000>;
 333                         regulator-max-microvolt = <1800000>;
 334                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 335                 };
 336
 337                 src_pp1800_l10a: ldo10 {
 338                         regulator-min-microvolt = <1800000>;
 339                         regulator-max-microvolt = <1800000>;
 340                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 341                 };
 342
 343                 pp1000_l11a_sdr845: ldo11 {
 344                         regulator-min-microvolt = <1000000>;
 345                         regulator-max-microvolt = <1048000>;
 346                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 347                 };
 348
 349                 vdd_qfprom:
 350                 vdd_qfprom_sp:
 351                 vdda_apc1_cs_1p8:
 352                 vdda_gfx_cs_1p8:
 353                 vdda_qrefs_1p8:
 354                 vdda_qusb_hs0_1p8:
 355                 vddpx_11:
 356                 src_pp1800_l12a: ldo12 {
 357                         regulator-min-microvolt = <1800000>;
 358                         regulator-max-microvolt = <1800000>;
 359                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 360                 };
 361
 362                 vddpx_2:
 363                 src_pp2950_l13a: ldo13 {
 364                         regulator-min-microvolt = <1800000>;
 365                         regulator-max-microvolt = <2960000>;
 366                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 367                 };
 368
 369                 src_pp1800_l14a: ldo14 {
 370                         regulator-min-microvolt = <1800000>;
 371                         regulator-max-microvolt = <1800000>;
 372                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 373                 };
 374
 375                 src_pp1800_l15a: ldo15 {
 376                         regulator-min-microvolt = <1800000>;
 377                         regulator-max-microvolt = <1800000>;
 378                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 379                 };
 380
 381                 pp2700_l16a: ldo16 {
 382                         regulator-min-microvolt = <2704000>;
 383                         regulator-max-microvolt = <2704000>;
 384                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 385                 };
 386
 387                 src_pp1300_l17a: ldo17 {
 388                         regulator-min-microvolt = <1304000>;
 389                         regulator-max-microvolt = <1304000>;
 390                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 391                 };
 392
 393                 pp2700_l18a: ldo18 {
 394                         regulator-min-microvolt = <2704000>;
 395                         regulator-max-microvolt = <2960000>;
 396                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 397                 };
 398
 399                 /*
 400                  * NOTE: this rail should have been called
 401                  * src_pp3300_l19a in the schematic
 402                  */
 403                 src_pp3000_l19a: ldo19 {
 404                         regulator-min-microvolt = <3304000>;
 405                         regulator-max-microvolt = <3304000>;
 406
 407                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 408                 };
 409
 410                 src_pp2950_l20a: ldo20 {
 411                         regulator-min-microvolt = <2704000>;
 412                         regulator-max-microvolt = <2960000>;
 413                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 414                 };
 415
 416                 src_pp2950_l21a: ldo21 {
 417                         regulator-min-microvolt = <2704000>;
 418                         regulator-max-microvolt = <2960000>;
 419                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 420                 };
 421
 422                 pp3300_hub:
 423                 src_pp3300_l22a: ldo22 {
 424                         regulator-min-microvolt = <3304000>;
 425                         regulator-max-microvolt = <3304000>;
 426                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 427                         /*
 428                          * HACK: Should add a usb hub node and driver
 429                          * to turn this on and off at suspend/resume time
 430                          */
 431                         regulator-boot-on;
 432                         regulator-always-on;
 433                 };
 434
 435                 pp3300_l23a_ch1_wcn3990: ldo23 {
 436                         regulator-min-microvolt = <3000000>;
 437                         regulator-max-microvolt = <3312000>;
 438                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 439                 };
 440
 441                 vdda_qusb_hs0_3p1:
 442                 src_pp3075_l24a: ldo24 {
 443                         regulator-min-microvolt = <3088000>;
 444                         regulator-max-microvolt = <3088000>;
 445                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 446                 };
 447
 448                 pp3300_l25a_ch0_wcn3990: ldo25 {
 449                         regulator-min-microvolt = <3304000>;
 450                         regulator-max-microvolt = <3304000>;
 451                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 452                 };
 453
 454                 pp1200_hub:
 455                 vdda_hp_pcie_1p2:
 456                 vdda_hv_ebi0:
 457                 vdda_hv_ebi1:
 458                 vdda_hv_ebi2:
 459                 vdda_hv_ebi3:
 460                 vdda_mipi_csi_1p25:
 461                 vdda_mipi_dsi0_1p2:
 462                 vdda_mipi_dsi1_1p2:
 463                 vdda_pcie_1p2:
 464                 vdda_ufs1_1p2:
 465                 vdda_ufs2_1p2:
 466                 vdda_usb1_ss_1p2:
 467                 vdda_usb2_ss_1p2:
 468                 src_pp1200_l26a: ldo26 {
 469                         regulator-min-microvolt = <1200000>;
 470                         regulator-max-microvolt = <1200000>;
 471                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 472                 };
 473
 474                 pp3300_dx_pen:
 475                 src_pp3300_l28a: ldo28 {
 476                         regulator-min-microvolt = <3304000>;
 477                         regulator-max-microvolt = <3304000>;
 478                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 479                 };
 480
 481                 src_pp1800_lvs1: lvs1 {
 482                         regulator-min-microvolt = <1800000>;
 483                         regulator-max-microvolt = <1800000>;
 484                 };
 485
 486                 src_pp1800_lvs2: lvs2 {
 487                         regulator-min-microvolt = <1800000>;
 488                         regulator-max-microvolt = <1800000>;
 489                 };
 490         };
 491
 492         pm8005-rpmh-regulators {
 493                 compatible = "qcom,pm8005-rpmh-regulators";
 494                 qcom,pmic-id = "c";
 495
 496                 vdd-s1-supply = <&src_vph_pwr>;
 497                 vdd-s2-supply = <&src_vph_pwr>;
 498                 vdd-s3-supply = <&src_vph_pwr>;
 499                 vdd-s4-supply = <&src_vph_pwr>;
 500
 501                 src_pp600_s3c: smps3 {
 502                         regulator-min-microvolt = <600000>;
 503                         regulator-max-microvolt = <600000>;
 504                 };
 505         };
 506 };
 507
 508 &dsi0 {
 509         status = "okay";
 510         vdda-supply = <&vdda_mipi_dsi0_1p2>;
 511
 512         ports {
 513                 port@1 {
 514                         endpoint {
 515                                 remote-endpoint = <&sn65dsi86_in>;
 516                                 data-lanes = <0 1 2 3>;
 517                         };
 518                 };
 519         };
 520 };
 521
 522 &dsi0_phy {
 523         status = "okay";
 524         vdds-supply = <&vdda_mipi_dsi0_pll>;
 525 };
 526
 527 edp_brij_i2c: &i2c3 {
 528         status = "okay";
 529         clock-frequency = <400000>;
 530
 531         sn65dsi86_bridge: bridge@2d {
 532                 compatible = "ti,sn65dsi86";
 533                 reg = <0x2d>;
 534                 pinctrl-names = "default";
 535                 pinctrl-0 = <&edp_brij_en &edp_brij_irq>;
 536
 537                 interrupt-parent = <&tlmm>;
 538                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
 539
 540                 enable-gpios = <&tlmm 102 GPIO_ACTIVE_HIGH>;
 541
 542                 vpll-supply = <&src_pp1800_s4a>;
 543                 vccio-supply = <&src_pp1800_s4a>;
 544                 vcca-supply = <&src_pp1200_l2a>;
 545                 vcc-supply = <&src_pp1200_l2a>;
 546
 547                 clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
 548                 clock-names = "refclk";
 549
 550                 ports {
 551                         #address-cells = <1>;
 552                         #size-cells = <0>;
 553
 554                         port@0 {
 555                                 reg = <0>;
 556                                 sn65dsi86_in: endpoint {
 557                                         remote-endpoint = <&dsi0_out>;
 558                                 };
 559                         };
 560
 561                         port@1 {
 562                                 reg = <1>;
 563                                 sn65dsi86_out: endpoint {
 564                                         remote-endpoint = <&panel_in_edp>;
 565                                 };
 566                         };
 567                 };
 568         };
 569 };
 570
 571 ap_pen_1v8: &i2c11 {
 572         status = "okay";
 573         clock-frequency = <400000>;
 574
 575         digitizer@9 {
 576                 compatible = "wacom,w9013", "hid-over-i2c";
 577                 reg = <0x9>;
 578                 pinctrl-names = "default";
 579                 pinctrl-0 = <&pen_irq_l>, <&pen_pdct_l>, <&pen_rst_l>;
 580
 581                 vdd-supply = <&pp3300_dx_pen>;
 582                 vddl-supply = <&pp1800_dx_pen>;
 583                 post-power-on-delay-ms = <100>;
 584
 585                 interrupt-parent = <&tlmm>;
 586                 interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
 587
 588                 hid-descr-addr = <0x1>;
 589         };
 590 };
 591
 592 amp_i2c: &i2c12 {
 593         status = "okay";
 594         clock-frequency = <400000>;
 595 };
 596
 597 ap_ts_i2c: &i2c14 {
 598         status = "okay";
 599         clock-frequency = <400000>;
 600
 601         touchscreen@10 {
 602                 compatible = "elan,ekth3500";
 603                 reg = <0x10>;
 604                 pinctrl-names = "default";
 605                 pinctrl-0 = <&ts_int_l &ts_reset_l>;
 606
 607                 interrupt-parent = <&tlmm>;
 608                 interrupts = <125 IRQ_TYPE_LEVEL_LOW>;
 609
 610                 vcc33-supply = <&src_pp3300_l28a>;
 611
 612                 reset-gpios = <&tlmm 118 GPIO_ACTIVE_LOW>;
 613         };
 614 };
 615
 616 &lpasscc {
 617         status = "okay";
 618 };
 619
 620 &mdss {
 621         status = "okay";
 622 };
 623
 624 &mdss_mdp {
 625         status = "okay";
 626 };
 627
 628 &qupv3_id_0 {
 629         status = "okay";
 630 };
 631
 632 &qupv3_id_1 {
 633         status = "okay";
 634 };
 635
 636 &sdhc_2 {
 637         status = "okay";
 638
 639         pinctrl-names = "default";
 640         pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data &sd_cd_odl>;
 641
 642         vmmc-supply = <&src_pp2950_l21a>;
 643         vqmmc-supply = <&vddpx_2>;
 644
 645         cd-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
 646 };
 647
 648 &spi0 {
 649         status = "okay";
 650 };
 651
 652 &spi10 {
 653         status = "okay";
 654
 655         cros_ec: ec@0 {
 656                 compatible = "google,cros-ec-spi";
 657                 reg = <0>;
 658                 interrupt-parent = <&tlmm>;
 659                 interrupts = <122 IRQ_TYPE_LEVEL_LOW>;
 660                 pinctrl-names = "default";
 661                 pinctrl-0 = <&ec_ap_int_l>;
 662                 spi-max-frequency = <3000000>;
 663
 664                 cros_ec_pwm: ec-pwm {
 665                         compatible = "google,cros-ec-pwm";
 666                         #pwm-cells = <1>;
 667                 };
 668
 669                 i2c_tunnel: i2c-tunnel {
 670                         compatible = "google,cros-ec-i2c-tunnel";
 671                         google,remote-bus = <0>;
 672                         #address-cells = <1>;
 673                         #size-cells = <0>;
 674                 };
 675
 676                 pdupdate {
 677                         compatible = "google,cros-ec-pd-update";
 678                 };
 679         };
 680 };
 681
 682 #include <arm/cros-ec-keyboard.dtsi>
 683 #include <arm/cros-ec-sbs.dtsi>
 684
 685 &uart6 {
 686         status = "okay";
 687
 688         bluetooth: wcn3990-bt {
 689                 compatible = "qcom,wcn3990-bt";
 690                 vddio-supply = <&src_pp1800_s4a>;
 691                 vddxo-supply = <&pp1800_l7a_wcn3990>;
 692                 vddrf-supply = <&src_pp1300_l17a>;
 693                 vddch0-supply = <&pp3300_l25a_ch0_wcn3990>;
 694                 max-speed = <3200000>;
 695         };
 696 };
 697
 698 &uart9 {
 699         status = "okay";
 700 };
 701
 702 &ufs_mem_hc {
 703         status = "okay";
 704         pinctrl-names = "init", "default";
 705         pinctrl-0 = <&ufs_dev_reset_assert>;
 706         pinctrl-1 = <&ufs_dev_reset_deassert>;
 707
 708         vcc-supply = <&src_pp2950_l20a>;
 709         vcc-max-microamp = <600000>;
 710 };
 711
 712 &ufs_mem_phy {
 713         status = "okay";
 714
 715         vdda-phy-supply = <&vdda_ufs1_core>;
 716         vdda-pll-supply = <&vdda_ufs1_1p2>;
 717 };
 718
 719 &usb_1 {
 720         status = "okay";
 721
 722         /* We'll use this as USB 2.0 only */
 723         qcom,select-utmi-as-pipe-clk;
 724 };
 725
 726 &usb_1_dwc3 {
 727         /*
 728          * The hardware design intends this port to be hooked up in peripheral
 729          * mode, so we'll hardcode it here.  Some details:
 730          * - SDM845 expects only a single Type C connector so it has only one
 731          *   native Type C port but cheza has two Type C connectors.
 732          * - The only source of DP is the single native Type C port.
 733          * - On cheza we want to be able to hook DP up to _either_ of the
 734          *   two Type C connectors and want to be able to achieve 4 lanes of DP.
 735          * - When you configure a Type C port for 4 lanes of DP you lose USB3.
 736          * - In order to make everything work, the native Type C port is always
 737          *   configured as 4-lanes DP so it's always available.
 738          * - The extra USB3 port on SDM845 goes to a USB 3 hub which is then
 739          *   sent to the two Type C connectors.
 740          * - The extra USB2 lines from the native Type C port are always
 741          *   setup as "peripheral" so that we can mux them over to one connector
 742          *   or the other if someone needs the connector configured as a gadget
 743          *   (but they only get USB2 speeds).
 744          *
 745          * All the hardware muxes would allow us to hook things up in different
 746          * ways to some potential benefit for static configurations (you could
 747          * achieve extra USB2 bandwidth by using two different ports for the
 748          * two conenctors or possibly even get USB3 peripheral mode), but in
 749          * each case you end up forcing to disconnect/reconnect an in-use
 750          * USB session in some cases depending on what you hotplug into the
 751          * other connector.  Thus hardcoding this as peripheral makes sense.
 752          */
 753         dr_mode = "peripheral";
 754
 755         /*
 756          * We always need the high speed pins as 4-lanes DP in case someone
 757          * hotplugs a DP peripheral.  Thus limit this port to a max of high
 758          * speed.
 759          */
 760         maximum-speed = "high-speed";
 761
 762         /*
 763          * We don't need the usb3-phy since we run in highspeed mode always, so
 764          * re-define these properties removing the superspeed USB PHY reference.
 765          */
 766         phys = <&usb_1_hsphy>;
 767         phy-names = "usb2-phy";
 768 };
 769
 770 &usb_1_hsphy {
 771         status = "okay";
 772
 773         vdd-supply = <&vdda_usb1_ss_core>;
 774         vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
 775         vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
 776
 777         qcom,imp-res-offset-value = <8>;
 778         qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
 779         qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
 780         qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
 781 };
 782
 783 &usb_2 {
 784         status = "okay";
 785 };
 786
 787 &usb_2_dwc3 {
 788         /* We have this hooked up to a hub and we always use in host mode */
 789         dr_mode = "host";
 790 };
 791
 792 &usb_2_hsphy {
 793         status = "okay";
 794
 795         vdd-supply = <&vdda_usb2_ss_core>;
 796         vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
 797         vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
 798
 799         qcom,imp-res-offset-value = <8>;
 800         qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
 801 };
 802
 803 &usb_2_qmpphy {
 804         status = "okay";
 805
 806         vdda-phy-supply = <&vdda_usb2_ss_1p2>;
 807         vdda-pll-supply = <&vdda_usb2_ss_core>;
 808 };
 809
 810 &wifi {
 811         status = "okay";
 812
 813         vdd-0.8-cx-mx-supply = <&src_pp800_l5a >;
 814         vdd-1.8-xo-supply = <&pp1800_l7a_wcn3990>;
 815         vdd-1.3-rfa-supply = <&src_pp1300_l17a>;
 816         vdd-3.3-ch0-supply = <&pp3300_l25a_ch0_wcn3990>;
 817 };
 818
 819 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
 820
 821 &qspi_cs0 {
 822         pinconf {
 823                 pins = "gpio90";
 824                 bias-disable;
 825         };
 826 };
 827
 828 &qspi_clk {
 829         pinconf {
 830                 pins = "gpio95";
 831                 bias-disable;
 832         };
 833 };
 834
 835 &qspi_data01 {
 836         pinconf {
 837                 pins = "gpio91", "gpio92";
 838
 839                 /* High-Z when no transfers; nice to park the lines */
 840                 bias-pull-up;
 841         };
 842 };
 843
 844 &qup_i2c3_default {
 845         pinconf {
 846                 pins = "gpio41", "gpio42";
 847                 drive-strength = <2>;
 848
 849                 /* Has external pullup */
 850                 bias-disable;
 851         };
 852 };
 853
 854 &qup_i2c11_default {
 855         pinconf {
 856                 pins = "gpio31", "gpio32";
 857                 drive-strength = <2>;
 858
 859                 /* Has external pullup */
 860                 bias-disable;
 861         };
 862 };
 863
 864 &qup_i2c12_default {
 865         pinconf {
 866                 pins = "gpio49", "gpio50";
 867                 drive-strength = <2>;
 868
 869                 /* Has external pullup */
 870                 bias-disable;
 871         };
 872 };
 873
 874 &qup_i2c14_default {
 875         pinconf {
 876                 pins = "gpio33", "gpio34";
 877                 drive-strength = <2>;
 878
 879                 /* Has external pullup */
 880                 bias-disable;
 881         };
 882 };
 883
 884 &qup_spi0_default {
 885         pinconf {
 886                 pins = "gpio0", "gpio1", "gpio2", "gpio3";
 887                 drive-strength = <2>;
 888                 bias-disable;
 889         };
 890 };
 891
 892 &qup_spi5_default {
 893         pinconf {
 894                 pins = "gpio85", "gpio86", "gpio87", "gpio88";
 895                 drive-strength = <2>;
 896                 bias-disable;
 897         };
 898 };
 899
 900 &qup_spi10_default {
 901         pinconf {
 902                 pins = "gpio53", "gpio54", "gpio55", "gpio56";
 903                 drive-strength = <2>;
 904                 bias-disable;
 905         };
 906 };
 907
 908 &qup_uart6_default {
 909         /* Change pinmux to all 4 pins since CTS and RTS are connected */
 910         pinmux {
 911                 pins = "gpio45", "gpio46",
 912                        "gpio47", "gpio48";
 913         };
 914
 915         pinconf-cts {
 916                 /*
 917                  * Configure a pull-down on 45 (CTS) to match the pull of
 918                  * the Bluetooth module.
 919                  */
 920                 pins = "gpio45";
 921                 bias-pull-down;
 922         };
 923
 924         pinconf-rts-tx {
 925                 /* We'll drive 46 (RTS) and 47 (TX), so no pull */
 926                 pins = "gpio46", "gpio47";
 927                 drive-strength = <2>;
 928                 bias-disable;
 929         };
 930
 931         pinconf-rx {
 932                 /*
 933                  * Configure a pull-up on 48 (RX). This is needed to avoid
 934                  * garbage data when the TX pin of the Bluetooth module is
 935                  * in tri-state (module powered off or not driving the
 936                  * signal yet).
 937                  */
 938                 pins = "gpio48";
 939                 bias-pull-up;
 940         };
 941 };
 942
 943 &qup_uart9_default {
 944         pinconf-tx {
 945                 pins = "gpio4";
 946                 drive-strength = <2>;
 947                 bias-disable;
 948         };
 949
 950         pinconf-rx {
 951                 pins = "gpio5";
 952                 drive-strength = <2>;
 953                 bias-pull-up;
 954         };
 955 };
 956
 957 /* PINCTRL - board-specific pinctrl */
 958 &pm8005_gpio {
 959         gpio-line-names = "",
 960                           "",
 961                           "SLB",
 962                           "";
 963 };
 964
 965 &pm8998_adc {
 966         adc-chan@ADC5_AMUX_THM1_100K_PU {
 967                 reg = <ADC5_AMUX_THM1_100K_PU>;
 968                 label = "sdm_temp";
 969         };
 970
 971         adc-chan@ADC5_AMUX_THM2_100K_PU {
 972                 reg = <ADC5_AMUX_THM2_100K_PU>;
 973                 label = "quiet_temp";
 974         };
 975
 976         adc-chan@ADC5_AMUX_THM3_100K_PU {
 977                 reg = <ADC5_AMUX_THM3_100K_PU>;
 978                 label = "lte_temp_1";
 979         };
 980
 981         adc-chan@ADC5_AMUX_THM4_100K_PU {
 982                 reg = <ADC5_AMUX_THM4_100K_PU>;
 983                 label = "lte_temp_2";
 984         };
 985
 986         adc-chan@ADC5_AMUX_THM5_100K_PU {
 987                 reg = <ADC5_AMUX_THM5_100K_PU>;
 988                 label = "charger_temp";
 989         };
 990 };
 991
 992 &pm8998_gpio {
 993         gpio-line-names = "",
 994                           "",
 995                           "SW_CTRL",
 996                           "",
 997                           "",
 998                           "",
 999                           "",
1000                           "",
1001                           "",
1002                           "",
1003                           "",
1004                           "",
1005                           "",
1006                           "",
1007                           "",
1008                           "",
1009                           "",
1010                           "",
1011                           "",
1012                           "",
1013                           "",
1014                           "CFG_OPT1",
1015                           "WCSS_PWR_REQ",
1016                           "",
1017                           "CFG_OPT2",
1018                           "SLB";
1019 };
1020
1021 &tlmm {
1022         /*
1023          * pinctrl settings for pins that have no real owners.
1024          */
1025         pinctrl-names = "default", "sleep";
1026         pinctrl-0 = <&bios_flash_wp_r_l>,
1027                     <&ap_suspend_l_deassert>;
1028
1029         pinctrl-1 = <&bios_flash_wp_r_l>,
1030                     <&ap_suspend_l_assert>;
1031
1032         /*
1033          * Hogs prevent usermode from changing the value. A GPIO can be both
1034          * here and in the pinctrl section.
1035          */
1036         ap-suspend-l-hog {
1037                 gpio-hog;
1038                 gpios = <126 GPIO_ACTIVE_LOW>;
1039                 output-low;
1040         };
1041
1042         ap_edp_bklten: ap-edp-bklten {
1043                 pinmux {
1044                         pins = "gpio37";
1045                         function = "gpio";
1046                 };
1047
1048                 pinconf {
1049                         pins = "gpio37";
1050                         drive-strength = <2>;
1051                         bias-disable;
1052                 };
1053         };
1054
1055         bios_flash_wp_r_l: bios-flash-wp-r-l {
1056                 pinmux {
1057                         pins = "gpio128";
1058                         function = "gpio";
1059                         input-enable;
1060                 };
1061
1062                 pinconf {
1063                         pins = "gpio128";
1064                         bias-disable;
1065                 };
1066         };
1067
1068         ec_ap_int_l: ec-ap-int-l {
1069                 pinmux {
1070                        pins = "gpio122";
1071                        function = "gpio";
1072                        input-enable;
1073                 };
1074
1075                 pinconf {
1076                        pins = "gpio122";
1077                        bias-pull-up;
1078                 };
1079         };
1080
1081         edp_brij_en: edp-brij-en {
1082                 pinmux {
1083                         pins = "gpio102";
1084                         function = "gpio";
1085                 };
1086
1087                 pinconf {
1088                         pins = "gpio102";
1089                         drive-strength = <2>;
1090                         bias-disable;
1091                 };
1092         };
1093
1094         edp_brij_irq: edp-brij-irq {
1095                 pinmux {
1096                         pins = "gpio10";
1097                         function = "gpio";
1098                 };
1099
1100                 pinconf {
1101                         pins = "gpio10";
1102                         drive-strength = <2>;
1103                         bias-pull-down;
1104                 };
1105         };
1106
1107         en_pp3300_dx_edp: en-pp3300-dx-edp {
1108                 pinmux {
1109                         pins = "gpio43";
1110                         function = "gpio";
1111                 };
1112
1113                 pinconf {
1114                         pins = "gpio43";
1115                         drive-strength = <2>;
1116                         bias-disable;
1117                 };
1118         };
1119
1120         h1_ap_int_odl: h1-ap-int-odl {
1121                 pinmux {
1122                         pins = "gpio129";
1123                         function = "gpio";
1124                         input-enable;
1125                 };
1126
1127                 pinconf {
1128                         pins = "gpio129";
1129                         bias-pull-up;
1130                 };
1131         };
1132
1133         pen_eject_odl: pen-eject-odl {
1134                 pinmux {
1135                         pins = "gpio119";
1136                         function = "gpio";
1137                         bias-pull-up;
1138                 };
1139         };
1140
1141         pen_irq_l: pen-irq-l {
1142                 pinmux {
1143                         pins = "gpio24";
1144                         function = "gpio";
1145                 };
1146
1147                 pinconf {
1148                         pins = "gpio24";
1149
1150                         /* Has external pullup */
1151                         bias-disable;
1152                 };
1153         };
1154
1155         pen_pdct_l: pen-pdct-l {
1156                 pinmux {
1157                         pins = "gpio63";
1158                         function = "gpio";
1159                 };
1160
1161                 pinconf {
1162                         pins = "gpio63";
1163
1164                         /* Has external pullup */
1165                         bias-disable;
1166                 };
1167         };
1168
1169         pen_rst_l: pen-rst-l {
1170                 pinmux  {
1171                         pins = "gpio23";
1172                         function = "gpio";
1173                 };
1174
1175                 pinconf {
1176                         pins = "gpio23";
1177                         bias-disable;
1178                         drive-strength = <2>;
1179
1180                         /*
1181                          * The pen driver doesn't currently support
1182                          * driving this reset line.  By specifying
1183                          * output-high here we're relying on the fact
1184                          * that this pin has a default pulldown at boot
1185                          * (which makes sure the pen was in reset if it
1186                          * was powered) and then we set it high here to
1187                          * take it out of reset.  Better would be if the
1188                          * pen driver could control this and we could
1189                          * remove "output-high" here.
1190                          */
1191                         output-high;
1192                 };
1193         };
1194
1195         sdc2_clk: sdc2-clk {
1196                 pinconf {
1197                         pins = "sdc2_clk";
1198                         bias-disable;
1199
1200                         /*
1201                          * It seems that mmc_test reports errors if drive
1202                          * strength is not 16.
1203                          */
1204                         drive-strength = <16>;
1205                 };
1206         };
1207
1208         sdc2_cmd: sdc2-cmd {
1209                 pinconf {
1210                         pins = "sdc2_cmd";
1211                         bias-pull-up;
1212                         drive-strength = <16>;
1213                 };
1214         };
1215
1216         sdc2_data: sdc2-data {
1217                 pinconf {
1218                         pins = "sdc2_data";
1219                         bias-pull-up;
1220                         drive-strength = <16>;
1221                 };
1222         };
1223
1224         sd_cd_odl: sd-cd-odl {
1225                 pinmux {
1226                         pins = "gpio44";
1227                         function = "gpio";
1228                 };
1229
1230                 pinconf {
1231                         pins = "gpio44";
1232                         bias-pull-up;
1233                 };
1234         };
1235
1236         ts_int_l: ts-int-l {
1237                 pinmux  {
1238                         pins = "gpio125";
1239                         function = "gpio";
1240                 };
1241
1242                 pinconf {
1243                         pins = "gpio125";
1244                         bias-pull-up;
1245                 };
1246         };
1247
1248         ts_reset_l: ts-reset-l {
1249                 pinmux  {
1250                         pins = "gpio118";
1251                         function = "gpio";
1252                 };
1253
1254                 pinconf {
1255                         pins = "gpio118";
1256                         bias-disable;
1257                         drive-strength = <2>;
1258                 };
1259         };
1260
1261         ufs_dev_reset_assert: ufs_dev_reset_assert {
1262                 config {
1263                         pins = "ufs_reset";
1264                         bias-pull-down;         /* default: pull down */
1265                         /*
1266                          * UFS_RESET driver strengths are having
1267                          * different values/steps compared to typical
1268                          * GPIO drive strengths.
1269                          *
1270                          * Following table clarifies:
1271                          *
1272                          * HDRV value | UFS_RESET | Typical GPIO
1273                          *   (dec)    |   (mA)    |    (mA)
1274                          *     0      |   0.8     |    2
1275                          *     1      |   1.55    |    4
1276                          *     2      |   2.35    |    6
1277                          *     3      |   3.1     |    8
1278                          *     4      |   3.9     |    10
1279                          *     5      |   4.65    |    12
1280                          *     6      |   5.4     |    14
1281                          *     7      |   6.15    |    16
1282                          *
1283                          * POR value for UFS_RESET HDRV is 3 which means
1284                          * 3.1mA and we want to use that. Hence just
1285                          * specify 8mA to "drive-strength" binding and
1286                          * that should result into writing 3 to HDRV
1287                          * field.
1288                          */
1289                         drive-strength = <8>;   /* default: 3.1 mA */
1290                         output-low; /* active low reset */
1291                 };
1292         };
1293
1294         ufs_dev_reset_deassert: ufs_dev_reset_deassert {
1295                 config {
1296                         pins = "ufs_reset";
1297                         bias-pull-down;         /* default: pull down */
1298                         /*
1299                          * default: 3.1 mA
1300                          * check comments under ufs_dev_reset_assert
1301                          */
1302                         drive-strength = <8>;
1303                         output-high; /* active low reset */
1304                 };
1305         };
1306
1307         ap_suspend_l_assert: ap_suspend_l_assert {
1308                 config {
1309                         pins = "gpio126";
1310                         function = "gpio";
1311                         bias-no-pull;
1312                         drive-strength = <2>;
1313                         output-low;
1314                 };
1315         };
1316
1317         ap_suspend_l_deassert: ap_suspend_l_deassert {
1318                 config {
1319                         pins = "gpio126";
1320                         function = "gpio";
1321                         bias-no-pull;
1322                         drive-strength = <2>;
1323                         output-high;
1324                 };
1325         };
1326 };