sys/gnu/dts/arm64/xilinx/zynqmp-zc1751-xm017-dc3.dts

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * dts file for Xilinx ZynqMP zc1751-xm017-dc3
   4  *
   5  * (C) Copyright 2016 - 2018, Xilinx, Inc.
   6  *
   7  * Michal Simek <michal.simek@xilinx.com>
   8  */
   9
  10 /dts-v1/;
  11
  12 #include "zynqmp.dtsi"
  13 #include "zynqmp-clk.dtsi"
  14
  15 / {
  16         model = "ZynqMP zc1751-xm017-dc3 RevA";
  17         compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
  18
  19         aliases {
  20                 ethernet0 = &gem0;
  21                 i2c0 = &i2c0;
  22                 i2c1 = &i2c1;
  23                 mmc0 = &sdhci1;
  24                 rtc0 = &rtc;
  25                 serial0 = &uart0;
  26                 serial1 = &uart1;
  27         };
  28
  29         chosen {
  30                 bootargs = "earlycon";
  31                 stdout-path = "serial0:115200n8";
  32         };
  33
  34         memory@0 {
  35                 device_type = "memory";
  36                 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
  37         };
  38 };
  39
  40 &fpd_dma_chan1 {
  41         status = "okay";
  42 };
  43
  44 &fpd_dma_chan2 {
  45         status = "okay";
  46 };
  47
  48 &fpd_dma_chan3 {
  49         status = "okay";
  50 };
  51
  52 &fpd_dma_chan4 {
  53         status = "okay";
  54 };
  55
  56 &fpd_dma_chan5 {
  57         status = "okay";
  58 };
  59
  60 &fpd_dma_chan6 {
  61         status = "okay";
  62 };
  63
  64 &fpd_dma_chan7 {
  65         status = "okay";
  66 };
  67
  68 &fpd_dma_chan8 {
  69         status = "okay";
  70 };
  71
  72 &gem0 {
  73         status = "okay";
  74         phy-handle = <&phy0>;
  75         phy-mode = "rgmii-id";
  76         phy0: phy@0 { /* VSC8211 */
  77                 reg = <0>;
  78         };
  79 };
  80
  81 &gpio {
  82         status = "okay";
  83 };
  84
  85 /* just eeprom here */
  86 &i2c0 {
  87         status = "okay";
  88         clock-frequency = <400000>;
  89
  90         tca6416_u26: gpio@20 {
  91                 compatible = "ti,tca6416";
  92                 reg = <0x20>;
  93                 gpio-controller;
  94                 #gpio-cells = <2>;
  95                 /* IRQ not connected */
  96         };
  97
  98         rtc@68 {
  99                 compatible = "dallas,ds1339";
 100                 reg = <0x68>;
 101         };
 102 };
 103
 104 /* eeprom24c02 and SE98A temp chip pca9306 */
 105 &i2c1 {
 106         status = "okay";
 107         clock-frequency = <400000>;
 108 };
 109
 110 &rtc {
 111         status = "okay";
 112 };
 113
 114 &sata {
 115         status = "okay";
 116         /* SATA phy OOB timing settings */
 117         ceva,p0-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>;
 118         ceva,p0-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>;
 119         ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
 120         ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
 121         ceva,p1-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>;
 122         ceva,p1-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>;
 123         ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
 124         ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
 125 };
 126
 127 &sdhci1 { /* emmc with some settings */
 128         status = "okay";
 129 };
 130
 131 /* main */
 132 &uart0 {
 133         status = "okay";
 134 };
 135
 136 /* DB9 */
 137 &uart1 {
 138         status = "okay";
 139 };
 140
 141 &usb0 {
 142         status = "okay";
 143         dr_mode = "host";
 144 };
 145
 146 /* ULPI SMSC USB3320 */
 147 &usb1 {
 148         status = "okay";
 149         dr_mode = "host";
 150 };