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1 /*-
2  * SPDX-License-Identifier: BSD-4-Clause
3  *
4  * Copyright (c) 1991 Regents of the University of California.
5  * All rights reserved.
6  * Copyright (c) 1994 John S. Dyson
7  * All rights reserved.
8  * Copyright (c) 1994 David Greenman
9  * All rights reserved.
10  * Copyright (c) 2003 Peter Wemm
11  * All rights reserved.
12  * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
13  * All rights reserved.
14  * Copyright (c) 2014 Andrew Turner
15  * All rights reserved.
16  * Copyright (c) 2014 The FreeBSD Foundation
17  * All rights reserved.
18  * Copyright (c) 2015-2018 Ruslan Bukin <br@bsdpad.com>
19  * All rights reserved.
20  *
21  * This code is derived from software contributed to Berkeley by
22  * the Systems Programming Group of the University of Utah Computer
23  * Science Department and William Jolitz of UUNET Technologies Inc.
24  *
25  * Portions of this software were developed by Andrew Turner under
26  * sponsorship from The FreeBSD Foundation.
27  *
28  * Portions of this software were developed by SRI International and the
29  * University of Cambridge Computer Laboratory under DARPA/AFRL contract
30  * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
31  *
32  * Portions of this software were developed by the University of Cambridge
33  * Computer Laboratory as part of the CTSRD Project, with support from the
34  * UK Higher Education Innovation Fund (HEIF).
35  *
36  * Redistribution and use in source and binary forms, with or without
37  * modification, are permitted provided that the following conditions
38  * are met:
39  * 1. Redistributions of source code must retain the above copyright
40  *    notice, this list of conditions and the following disclaimer.
41  * 2. Redistributions in binary form must reproduce the above copyright
42  *    notice, this list of conditions and the following disclaimer in the
43  *    documentation and/or other materials provided with the distribution.
44  * 3. All advertising materials mentioning features or use of this software
45  *    must display the following acknowledgement:
46  *      This product includes software developed by the University of
47  *      California, Berkeley and its contributors.
48  * 4. Neither the name of the University nor the names of its contributors
49  *    may be used to endorse or promote products derived from this software
50  *    without specific prior written permission.
51  *
52  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
53  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
56  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
62  * SUCH DAMAGE.
63  *
64  *      from:   @(#)pmap.c      7.7 (Berkeley)  5/12/91
65  */
66 /*-
67  * Copyright (c) 2003 Networks Associates Technology, Inc.
68  * All rights reserved.
69  *
70  * This software was developed for the FreeBSD Project by Jake Burkholder,
71  * Safeport Network Services, and Network Associates Laboratories, the
72  * Security Research Division of Network Associates, Inc. under
73  * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
74  * CHATS research program.
75  *
76  * Redistribution and use in source and binary forms, with or without
77  * modification, are permitted provided that the following conditions
78  * are met:
79  * 1. Redistributions of source code must retain the above copyright
80  *    notice, this list of conditions and the following disclaimer.
81  * 2. Redistributions in binary form must reproduce the above copyright
82  *    notice, this list of conditions and the following disclaimer in the
83  *    documentation and/or other materials provided with the distribution.
84  *
85  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
86  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
87  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
88  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
89  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
90  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
91  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
92  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
93  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
94  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
95  * SUCH DAMAGE.
96  */
97
98 #include <sys/cdefs.h>
99 __FBSDID("$FreeBSD$");
100
101 /*
102  *      Manages physical address maps.
103  *
104  *      Since the information managed by this module is
105  *      also stored by the logical address mapping module,
106  *      this module may throw away valid virtual-to-physical
107  *      mappings at almost any time.  However, invalidations
108  *      of virtual-to-physical mappings must be done as
109  *      requested.
110  *
111  *      In order to cope with hardware architectures which
112  *      make virtual-to-physical map invalidates expensive,
113  *      this module may delay invalidate or reduced protection
114  *      operations until such time as they are actually
115  *      necessary.  This module is given full information as
116  *      to which processors are currently using which maps,
117  *      and to when physical maps must be made correct.
118  */
119
120 #include <sys/param.h>
121 #include <sys/systm.h>
122 #include <sys/bitstring.h>
123 #include <sys/bus.h>
124 #include <sys/cpuset.h>
125 #include <sys/kernel.h>
126 #include <sys/ktr.h>
127 #include <sys/lock.h>
128 #include <sys/malloc.h>
129 #include <sys/mman.h>
130 #include <sys/msgbuf.h>
131 #include <sys/mutex.h>
132 #include <sys/proc.h>
133 #include <sys/rwlock.h>
134 #include <sys/sx.h>
135 #include <sys/vmem.h>
136 #include <sys/vmmeter.h>
137 #include <sys/sched.h>
138 #include <sys/sysctl.h>
139 #include <sys/smp.h>
140
141 #include <vm/vm.h>
142 #include <vm/vm_param.h>
143 #include <vm/vm_kern.h>
144 #include <vm/vm_page.h>
145 #include <vm/vm_map.h>
146 #include <vm/vm_object.h>
147 #include <vm/vm_extern.h>
148 #include <vm/vm_pageout.h>
149 #include <vm/vm_pager.h>
150 #include <vm/vm_phys.h>
151 #include <vm/vm_radix.h>
152 #include <vm/vm_reserv.h>
153 #include <vm/uma.h>
154
155 #include <machine/machdep.h>
156 #include <machine/md_var.h>
157 #include <machine/pcb.h>
158 #include <machine/sbi.h>
159
160 #define NUL1E           (Ln_ENTRIES * Ln_ENTRIES)
161 #define NUL2E           (Ln_ENTRIES * NUL1E)
162
163 #if !defined(DIAGNOSTIC)
164 #ifdef __GNUC_GNU_INLINE__
165 #define PMAP_INLINE     __attribute__((__gnu_inline__)) inline
166 #else
167 #define PMAP_INLINE     extern inline
168 #endif
169 #else
170 #define PMAP_INLINE
171 #endif
172
173 #ifdef PV_STATS
174 #define PV_STAT(x)      do { x ; } while (0)
175 #else
176 #define PV_STAT(x)      do { } while (0)
177 #endif
178
179 #define pmap_l2_pindex(v)       ((v) >> L2_SHIFT)
180 #define pa_to_pvh(pa)           (&pv_table[pa_index(pa)])
181
182 #define NPV_LIST_LOCKS  MAXCPU
183
184 #define PHYS_TO_PV_LIST_LOCK(pa)        \
185                         (&pv_list_locks[pmap_l2_pindex(pa) % NPV_LIST_LOCKS])
186
187 #define CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa)  do {    \
188         struct rwlock **_lockp = (lockp);               \
189         struct rwlock *_new_lock;                       \
190                                                         \
191         _new_lock = PHYS_TO_PV_LIST_LOCK(pa);           \
192         if (_new_lock != *_lockp) {                     \
193                 if (*_lockp != NULL)                    \
194                         rw_wunlock(*_lockp);            \
195                 *_lockp = _new_lock;                    \
196                 rw_wlock(*_lockp);                      \
197         }                                               \
198 } while (0)
199
200 #define CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m)        \
201                         CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, VM_PAGE_TO_PHYS(m))
202
203 #define RELEASE_PV_LIST_LOCK(lockp)             do {    \
204         struct rwlock **_lockp = (lockp);               \
205                                                         \
206         if (*_lockp != NULL) {                          \
207                 rw_wunlock(*_lockp);                    \
208                 *_lockp = NULL;                         \
209         }                                               \
210 } while (0)
211
212 #define VM_PAGE_TO_PV_LIST_LOCK(m)      \
213                         PHYS_TO_PV_LIST_LOCK(VM_PAGE_TO_PHYS(m))
214
215 /* The list of all the user pmaps */
216 LIST_HEAD(pmaplist, pmap);
217 static struct pmaplist allpmaps = LIST_HEAD_INITIALIZER();
218
219 struct pmap kernel_pmap_store;
220
221 vm_offset_t virtual_avail;      /* VA of first avail page (after kernel bss) */
222 vm_offset_t virtual_end;        /* VA of last avail page (end of kernel AS) */
223 vm_offset_t kernel_vm_end = 0;
224
225 vm_paddr_t dmap_phys_base;      /* The start of the dmap region */
226 vm_paddr_t dmap_phys_max;       /* The limit of the dmap region */
227 vm_offset_t dmap_max_addr;      /* The virtual address limit of the dmap */
228
229 /* This code assumes all L1 DMAP entries will be used */
230 CTASSERT((DMAP_MIN_ADDRESS  & ~L1_OFFSET) == DMAP_MIN_ADDRESS);
231 CTASSERT((DMAP_MAX_ADDRESS  & ~L1_OFFSET) == DMAP_MAX_ADDRESS);
232
233 static struct rwlock_padalign pvh_global_lock;
234 static struct mtx_padalign allpmaps_lock;
235
236 static SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0,
237     "VM/pmap parameters");
238
239 static int superpages_enabled = 1;
240 SYSCTL_INT(_vm_pmap, OID_AUTO, superpages_enabled,
241     CTLFLAG_RDTUN, &superpages_enabled, 0,
242     "Enable support for transparent superpages");
243
244 static SYSCTL_NODE(_vm_pmap, OID_AUTO, l2, CTLFLAG_RD, 0,
245     "2MB page mapping counters");
246
247 static u_long pmap_l2_demotions;
248 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, demotions, CTLFLAG_RD,
249     &pmap_l2_demotions, 0,
250     "2MB page demotions");
251
252 static u_long pmap_l2_mappings;
253 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, mappings, CTLFLAG_RD,
254     &pmap_l2_mappings, 0,
255     "2MB page mappings");
256
257 static u_long pmap_l2_p_failures;
258 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, p_failures, CTLFLAG_RD,
259     &pmap_l2_p_failures, 0,
260     "2MB page promotion failures");
261
262 static u_long pmap_l2_promotions;
263 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, promotions, CTLFLAG_RD,
264     &pmap_l2_promotions, 0,
265     "2MB page promotions");
266
267 /*
268  * Data for the pv entry allocation mechanism
269  */
270 static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
271 static struct mtx pv_chunks_mutex;
272 static struct rwlock pv_list_locks[NPV_LIST_LOCKS];
273 static struct md_page *pv_table;
274 static struct md_page pv_dummy;
275
276 extern cpuset_t all_harts;
277
278 /*
279  * Internal flags for pmap_enter()'s helper functions.
280  */
281 #define PMAP_ENTER_NORECLAIM    0x1000000       /* Don't reclaim PV entries. */
282 #define PMAP_ENTER_NOREPLACE    0x2000000       /* Don't replace mappings. */
283
284 static void     free_pv_chunk(struct pv_chunk *pc);
285 static void     free_pv_entry(pmap_t pmap, pv_entry_t pv);
286 static pv_entry_t get_pv_entry(pmap_t pmap, struct rwlock **lockp);
287 static vm_page_t reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp);
288 static void     pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
289 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
290                     vm_offset_t va);
291 static bool     pmap_demote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va);
292 static bool     pmap_demote_l2_locked(pmap_t pmap, pd_entry_t *l2,
293                     vm_offset_t va, struct rwlock **lockp);
294 static int      pmap_enter_l2(pmap_t pmap, vm_offset_t va, pd_entry_t new_l2,
295                     u_int flags, vm_page_t m, struct rwlock **lockp);
296 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
297     vm_page_t m, vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp);
298 static int pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t sva,
299     pd_entry_t ptepde, struct spglist *free, struct rwlock **lockp);
300 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
301     vm_page_t m, struct rwlock **lockp);
302
303 static vm_page_t _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex,
304                 struct rwlock **lockp);
305
306 static void _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m,
307     struct spglist *free);
308 static int pmap_unuse_pt(pmap_t, vm_offset_t, pd_entry_t, struct spglist *);
309
310 #define pmap_clear(pte)                 pmap_store(pte, 0)
311 #define pmap_clear_bits(pte, bits)      atomic_clear_64(pte, bits)
312 #define pmap_load_store(pte, entry)     atomic_swap_64(pte, entry)
313 #define pmap_load_clear(pte)            pmap_load_store(pte, 0)
314 #define pmap_load(pte)                  atomic_load_64(pte)
315 #define pmap_store(pte, entry)          atomic_store_64(pte, entry)
316 #define pmap_store_bits(pte, bits)      atomic_set_64(pte, bits)
317
318 /********************/
319 /* Inline functions */
320 /********************/
321
322 static __inline void
323 pagecopy(void *s, void *d)
324 {
325
326         memcpy(d, s, PAGE_SIZE);
327 }
328
329 static __inline void
330 pagezero(void *p)
331 {
332
333         bzero(p, PAGE_SIZE);
334 }
335
336 #define pmap_l1_index(va)       (((va) >> L1_SHIFT) & Ln_ADDR_MASK)
337 #define pmap_l2_index(va)       (((va) >> L2_SHIFT) & Ln_ADDR_MASK)
338 #define pmap_l3_index(va)       (((va) >> L3_SHIFT) & Ln_ADDR_MASK)
339
340 #define PTE_TO_PHYS(pte)        ((pte >> PTE_PPN0_S) * PAGE_SIZE)
341
342 static __inline pd_entry_t *
343 pmap_l1(pmap_t pmap, vm_offset_t va)
344 {
345
346         return (&pmap->pm_l1[pmap_l1_index(va)]);
347 }
348
349 static __inline pd_entry_t *
350 pmap_l1_to_l2(pd_entry_t *l1, vm_offset_t va)
351 {
352         vm_paddr_t phys;
353         pd_entry_t *l2;
354
355         phys = PTE_TO_PHYS(pmap_load(l1));
356         l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
357
358         return (&l2[pmap_l2_index(va)]);
359 }
360
361 static __inline pd_entry_t *
362 pmap_l2(pmap_t pmap, vm_offset_t va)
363 {
364         pd_entry_t *l1;
365
366         l1 = pmap_l1(pmap, va);
367         if ((pmap_load(l1) & PTE_V) == 0)
368                 return (NULL);
369         if ((pmap_load(l1) & PTE_RX) != 0)
370                 return (NULL);
371
372         return (pmap_l1_to_l2(l1, va));
373 }
374
375 static __inline pt_entry_t *
376 pmap_l2_to_l3(pd_entry_t *l2, vm_offset_t va)
377 {
378         vm_paddr_t phys;
379         pt_entry_t *l3;
380
381         phys = PTE_TO_PHYS(pmap_load(l2));
382         l3 = (pd_entry_t *)PHYS_TO_DMAP(phys);
383
384         return (&l3[pmap_l3_index(va)]);
385 }
386
387 static __inline pt_entry_t *
388 pmap_l3(pmap_t pmap, vm_offset_t va)
389 {
390         pd_entry_t *l2;
391
392         l2 = pmap_l2(pmap, va);
393         if (l2 == NULL)
394                 return (NULL);
395         if ((pmap_load(l2) & PTE_V) == 0)
396                 return (NULL);
397         if ((pmap_load(l2) & PTE_RX) != 0)
398                 return (NULL);
399
400         return (pmap_l2_to_l3(l2, va));
401 }
402
403 static __inline void
404 pmap_resident_count_inc(pmap_t pmap, int count)
405 {
406
407         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
408         pmap->pm_stats.resident_count += count;
409 }
410
411 static __inline void
412 pmap_resident_count_dec(pmap_t pmap, int count)
413 {
414
415         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
416         KASSERT(pmap->pm_stats.resident_count >= count,
417             ("pmap %p resident count underflow %ld %d", pmap,
418             pmap->pm_stats.resident_count, count));
419         pmap->pm_stats.resident_count -= count;
420 }
421
422 static void
423 pmap_distribute_l1(struct pmap *pmap, vm_pindex_t l1index,
424     pt_entry_t entry)
425 {
426         struct pmap *user_pmap;
427         pd_entry_t *l1;
428
429         /* Distribute new kernel L1 entry to all the user pmaps */
430         if (pmap != kernel_pmap)
431                 return;
432
433         mtx_lock(&allpmaps_lock);
434         LIST_FOREACH(user_pmap, &allpmaps, pm_list) {
435                 l1 = &user_pmap->pm_l1[l1index];
436                 pmap_store(l1, entry);
437         }
438         mtx_unlock(&allpmaps_lock);
439 }
440
441 static pt_entry_t *
442 pmap_early_page_idx(vm_offset_t l1pt, vm_offset_t va, u_int *l1_slot,
443     u_int *l2_slot)
444 {
445         pt_entry_t *l2;
446         pd_entry_t *l1;
447
448         l1 = (pd_entry_t *)l1pt;
449         *l1_slot = (va >> L1_SHIFT) & Ln_ADDR_MASK;
450
451         /* Check locore has used a table L1 map */
452         KASSERT((l1[*l1_slot] & PTE_RX) == 0,
453                 ("Invalid bootstrap L1 table"));
454
455         /* Find the address of the L2 table */
456         l2 = (pt_entry_t *)init_pt_va;
457         *l2_slot = pmap_l2_index(va);
458
459         return (l2);
460 }
461
462 static vm_paddr_t
463 pmap_early_vtophys(vm_offset_t l1pt, vm_offset_t va)
464 {
465         u_int l1_slot, l2_slot;
466         pt_entry_t *l2;
467         vm_paddr_t ret;
468
469         l2 = pmap_early_page_idx(l1pt, va, &l1_slot, &l2_slot);
470
471         /* Check locore has used L2 superpages */
472         KASSERT((l2[l2_slot] & PTE_RX) != 0,
473                 ("Invalid bootstrap L2 table"));
474
475         /* L2 is superpages */
476         ret = (l2[l2_slot] >> PTE_PPN1_S) << L2_SHIFT;
477         ret += (va & L2_OFFSET);
478
479         return (ret);
480 }
481
482 static void
483 pmap_bootstrap_dmap(vm_offset_t kern_l1, vm_paddr_t min_pa, vm_paddr_t max_pa)
484 {
485         vm_offset_t va;
486         vm_paddr_t pa;
487         pd_entry_t *l1;
488         u_int l1_slot;
489         pt_entry_t entry;
490         pn_t pn;
491
492         pa = dmap_phys_base = min_pa & ~L1_OFFSET;
493         va = DMAP_MIN_ADDRESS;
494         l1 = (pd_entry_t *)kern_l1;
495         l1_slot = pmap_l1_index(DMAP_MIN_ADDRESS);
496
497         for (; va < DMAP_MAX_ADDRESS && pa < max_pa;
498             pa += L1_SIZE, va += L1_SIZE, l1_slot++) {
499                 KASSERT(l1_slot < Ln_ENTRIES, ("Invalid L1 index"));
500
501                 /* superpages */
502                 pn = (pa / PAGE_SIZE);
503                 entry = PTE_KERN;
504                 entry |= (pn << PTE_PPN0_S);
505                 pmap_store(&l1[l1_slot], entry);
506         }
507
508         /* Set the upper limit of the DMAP region */
509         dmap_phys_max = pa;
510         dmap_max_addr = va;
511
512         sfence_vma();
513 }
514
515 static vm_offset_t
516 pmap_bootstrap_l3(vm_offset_t l1pt, vm_offset_t va, vm_offset_t l3_start)
517 {
518         vm_offset_t l3pt;
519         pt_entry_t entry;
520         pd_entry_t *l2;
521         vm_paddr_t pa;
522         u_int l2_slot;
523         pn_t pn;
524
525         KASSERT((va & L2_OFFSET) == 0, ("Invalid virtual address"));
526
527         l2 = pmap_l2(kernel_pmap, va);
528         l2 = (pd_entry_t *)((uintptr_t)l2 & ~(PAGE_SIZE - 1));
529         l2_slot = pmap_l2_index(va);
530         l3pt = l3_start;
531
532         for (; va < VM_MAX_KERNEL_ADDRESS; l2_slot++, va += L2_SIZE) {
533                 KASSERT(l2_slot < Ln_ENTRIES, ("Invalid L2 index"));
534
535                 pa = pmap_early_vtophys(l1pt, l3pt);
536                 pn = (pa / PAGE_SIZE);
537                 entry = (PTE_V);
538                 entry |= (pn << PTE_PPN0_S);
539                 pmap_store(&l2[l2_slot], entry);
540                 l3pt += PAGE_SIZE;
541         }
542
543
544         /* Clean the L2 page table */
545         memset((void *)l3_start, 0, l3pt - l3_start);
546
547         return (l3pt);
548 }
549
550 /*
551  *      Bootstrap the system enough to run with virtual memory.
552  */
553 void
554 pmap_bootstrap(vm_offset_t l1pt, vm_paddr_t kernstart, vm_size_t kernlen)
555 {
556         u_int l1_slot, l2_slot, avail_slot, map_slot;
557         vm_offset_t freemempos;
558         vm_offset_t dpcpu, msgbufpv;
559         vm_paddr_t end, max_pa, min_pa, pa, start;
560         int i;
561
562         printf("pmap_bootstrap %lx %lx %lx\n", l1pt, kernstart, kernlen);
563         printf("%lx\n", l1pt);
564         printf("%lx\n", (KERNBASE >> L1_SHIFT) & Ln_ADDR_MASK);
565
566         /* Set this early so we can use the pagetable walking functions */
567         kernel_pmap_store.pm_l1 = (pd_entry_t *)l1pt;
568         PMAP_LOCK_INIT(kernel_pmap);
569
570         rw_init(&pvh_global_lock, "pmap pv global");
571
572         CPU_FILL(&kernel_pmap->pm_active);
573
574         /* Assume the address we were loaded to is a valid physical address. */
575         min_pa = max_pa = kernstart;
576
577         /*
578          * Find the minimum physical address. physmap is sorted,
579          * but may contain empty ranges.
580          */
581         for (i = 0; i < physmap_idx * 2; i += 2) {
582                 if (physmap[i] == physmap[i + 1])
583                         continue;
584                 if (physmap[i] <= min_pa)
585                         min_pa = physmap[i];
586                 if (physmap[i + 1] > max_pa)
587                         max_pa = physmap[i + 1];
588         }
589         printf("physmap_idx %lx\n", physmap_idx);
590         printf("min_pa %lx\n", min_pa);
591         printf("max_pa %lx\n", max_pa);
592
593         /* Create a direct map region early so we can use it for pa -> va */
594         pmap_bootstrap_dmap(l1pt, min_pa, max_pa);
595
596         /*
597          * Read the page table to find out what is already mapped.
598          * This assumes we have mapped a block of memory from KERNBASE
599          * using a single L1 entry.
600          */
601         (void)pmap_early_page_idx(l1pt, KERNBASE, &l1_slot, &l2_slot);
602
603         /* Sanity check the index, KERNBASE should be the first VA */
604         KASSERT(l2_slot == 0, ("The L2 index is non-zero"));
605
606         freemempos = roundup2(KERNBASE + kernlen, PAGE_SIZE);
607
608         /* Create the l3 tables for the early devmap */
609         freemempos = pmap_bootstrap_l3(l1pt,
610             VM_MAX_KERNEL_ADDRESS - L2_SIZE, freemempos);
611
612         sfence_vma();
613
614 #define alloc_pages(var, np)                                            \
615         (var) = freemempos;                                             \
616         freemempos += (np * PAGE_SIZE);                                 \
617         memset((char *)(var), 0, ((np) * PAGE_SIZE));
618
619         /* Allocate dynamic per-cpu area. */
620         alloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
621         dpcpu_init((void *)dpcpu, 0);
622
623         /* Allocate memory for the msgbuf, e.g. for /sbin/dmesg */
624         alloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
625         msgbufp = (void *)msgbufpv;
626
627         virtual_avail = roundup2(freemempos, L2_SIZE);
628         virtual_end = VM_MAX_KERNEL_ADDRESS - L2_SIZE;
629         kernel_vm_end = virtual_avail;
630         
631         pa = pmap_early_vtophys(l1pt, freemempos);
632
633         /* Initialize phys_avail and dump_avail. */
634         for (avail_slot = map_slot = physmem = 0; map_slot < physmap_idx * 2;
635             map_slot += 2) {
636                 start = physmap[map_slot];
637                 end = physmap[map_slot + 1];
638
639                 if (start == end)
640                         continue;
641                 dump_avail[map_slot] = start;
642                 dump_avail[map_slot + 1] = end;
643                 realmem += atop((vm_offset_t)(end - start));
644
645                 if (start >= kernstart && end <= pa)
646                         continue;
647
648                 if (start < kernstart && end > kernstart)
649                         end = kernstart;
650                 else if (start < pa && end > pa)
651                         start = pa;
652                 phys_avail[avail_slot] = start;
653                 phys_avail[avail_slot + 1] = end;
654                 physmem += (end - start) >> PAGE_SHIFT;
655                 avail_slot += 2;
656
657                 if (end != physmap[map_slot + 1] && end > pa) {
658                         phys_avail[avail_slot] = pa;
659                         phys_avail[avail_slot + 1] = physmap[map_slot + 1];
660                         physmem += (physmap[map_slot + 1] - pa) >> PAGE_SHIFT;
661                         avail_slot += 2;
662                 }
663         }
664         phys_avail[avail_slot] = 0;
665         phys_avail[avail_slot + 1] = 0;
666
667         /*
668          * Maxmem isn't the "maximum memory", it's one larger than the
669          * highest page of the physical address space.  It should be
670          * called something like "Maxphyspage".
671          */
672         Maxmem = atop(phys_avail[avail_slot - 1]);
673 }
674
675 /*
676  *      Initialize a vm_page's machine-dependent fields.
677  */
678 void
679 pmap_page_init(vm_page_t m)
680 {
681
682         TAILQ_INIT(&m->md.pv_list);
683         m->md.pv_memattr = VM_MEMATTR_WRITE_BACK;
684 }
685
686 /*
687  *      Initialize the pmap module.
688  *      Called by vm_init, to initialize any structures that the pmap
689  *      system needs to map virtual memory.
690  */
691 void
692 pmap_init(void)
693 {
694         vm_size_t s;
695         int i, pv_npg;
696
697         /*
698          * Initialize the pv chunk and pmap list mutexes.
699          */
700         mtx_init(&pv_chunks_mutex, "pmap pv chunk list", NULL, MTX_DEF);
701         mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_DEF);
702
703         /*
704          * Initialize the pool of pv list locks.
705          */
706         for (i = 0; i < NPV_LIST_LOCKS; i++)
707                 rw_init(&pv_list_locks[i], "pmap pv list");
708
709         /*
710          * Calculate the size of the pv head table for superpages.
711          */
712         pv_npg = howmany(vm_phys_segs[vm_phys_nsegs - 1].end, L2_SIZE);
713
714         /*
715          * Allocate memory for the pv head table for superpages.
716          */
717         s = (vm_size_t)(pv_npg * sizeof(struct md_page));
718         s = round_page(s);
719         pv_table = (struct md_page *)kmem_malloc(s, M_WAITOK | M_ZERO);
720         for (i = 0; i < pv_npg; i++)
721                 TAILQ_INIT(&pv_table[i].pv_list);
722         TAILQ_INIT(&pv_dummy.pv_list);
723
724         if (superpages_enabled)
725                 pagesizes[1] = L2_SIZE;
726 }
727
728 #ifdef SMP
729 /*
730  * For SMP, these functions have to use IPIs for coherence.
731  *
732  * In general, the calling thread uses a plain fence to order the
733  * writes to the page tables before invoking an SBI callback to invoke
734  * sfence_vma() on remote CPUs.
735  */
736 static void
737 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
738 {
739         cpuset_t mask;
740
741         sched_pin();
742         mask = pmap->pm_active;
743         CPU_CLR(PCPU_GET(hart), &mask);
744         fence();
745         if (!CPU_EMPTY(&mask) && smp_started)
746                 sbi_remote_sfence_vma(mask.__bits, va, 1);
747         sfence_vma_page(va);
748         sched_unpin();
749 }
750
751 static void
752 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
753 {
754         cpuset_t mask;
755
756         sched_pin();
757         mask = pmap->pm_active;
758         CPU_CLR(PCPU_GET(hart), &mask);
759         fence();
760         if (!CPU_EMPTY(&mask) && smp_started)
761                 sbi_remote_sfence_vma(mask.__bits, sva, eva - sva + 1);
762
763         /*
764          * Might consider a loop of sfence_vma_page() for a small
765          * number of pages in the future.
766          */
767         sfence_vma();
768         sched_unpin();
769 }
770
771 static void
772 pmap_invalidate_all(pmap_t pmap)
773 {
774         cpuset_t mask;
775
776         sched_pin();
777         mask = pmap->pm_active;
778         CPU_CLR(PCPU_GET(hart), &mask);
779
780         /*
781          * XXX: The SBI doc doesn't detail how to specify x0 as the
782          * address to perform a global fence.  BBL currently treats
783          * all sfence_vma requests as global however.
784          */
785         fence();
786         if (!CPU_EMPTY(&mask) && smp_started)
787                 sbi_remote_sfence_vma(mask.__bits, 0, 0);
788         sfence_vma();
789         sched_unpin();
790 }
791 #else
792 /*
793  * Normal, non-SMP, invalidation functions.
794  * We inline these within pmap.c for speed.
795  */
796 static __inline void
797 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
798 {
799
800         sfence_vma_page(va);
801 }
802
803 static __inline void
804 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
805 {
806
807         /*
808          * Might consider a loop of sfence_vma_page() for a small
809          * number of pages in the future.
810          */
811         sfence_vma();
812 }
813
814 static __inline void
815 pmap_invalidate_all(pmap_t pmap)
816 {
817
818         sfence_vma();
819 }
820 #endif
821
822 /*
823  *      Routine:        pmap_extract
824  *      Function:
825  *              Extract the physical page address associated
826  *              with the given map/virtual_address pair.
827  */
828 vm_paddr_t 
829 pmap_extract(pmap_t pmap, vm_offset_t va)
830 {
831         pd_entry_t *l2p, l2;
832         pt_entry_t *l3p, l3;
833         vm_paddr_t pa;
834
835         pa = 0;
836         PMAP_LOCK(pmap);
837         /*
838          * Start with the l2 tabel. We are unable to allocate
839          * pages in the l1 table.
840          */
841         l2p = pmap_l2(pmap, va);
842         if (l2p != NULL) {
843                 l2 = pmap_load(l2p);
844                 if ((l2 & PTE_RX) == 0) {
845                         l3p = pmap_l2_to_l3(l2p, va);
846                         if (l3p != NULL) {
847                                 l3 = pmap_load(l3p);
848                                 pa = PTE_TO_PHYS(l3);
849                                 pa |= (va & L3_OFFSET);
850                         }
851                 } else {
852                         /* L2 is superpages */
853                         pa = (l2 >> PTE_PPN1_S) << L2_SHIFT;
854                         pa |= (va & L2_OFFSET);
855                 }
856         }
857         PMAP_UNLOCK(pmap);
858         return (pa);
859 }
860
861 /*
862  *      Routine:        pmap_extract_and_hold
863  *      Function:
864  *              Atomically extract and hold the physical page
865  *              with the given pmap and virtual address pair
866  *              if that mapping permits the given protection.
867  */
868 vm_page_t
869 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
870 {
871         pt_entry_t *l3p, l3;
872         vm_paddr_t phys;
873         vm_paddr_t pa;
874         vm_page_t m;
875
876         pa = 0;
877         m = NULL;
878         PMAP_LOCK(pmap);
879 retry:
880         l3p = pmap_l3(pmap, va);
881         if (l3p != NULL && (l3 = pmap_load(l3p)) != 0) {
882                 if ((l3 & PTE_W) != 0 || (prot & VM_PROT_WRITE) == 0) {
883                         phys = PTE_TO_PHYS(l3);
884                         if (vm_page_pa_tryrelock(pmap, phys, &pa))
885                                 goto retry;
886                         m = PHYS_TO_VM_PAGE(phys);
887                         vm_page_hold(m);
888                 }
889         }
890         PA_UNLOCK_COND(pa);
891         PMAP_UNLOCK(pmap);
892         return (m);
893 }
894
895 vm_paddr_t
896 pmap_kextract(vm_offset_t va)
897 {
898         pd_entry_t *l2;
899         pt_entry_t *l3;
900         vm_paddr_t pa;
901
902         if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
903                 pa = DMAP_TO_PHYS(va);
904         } else {
905                 l2 = pmap_l2(kernel_pmap, va);
906                 if (l2 == NULL)
907                         panic("pmap_kextract: No l2");
908                 if ((pmap_load(l2) & PTE_RX) != 0) {
909                         /* superpages */
910                         pa = (pmap_load(l2) >> PTE_PPN1_S) << L2_SHIFT;
911                         pa |= (va & L2_OFFSET);
912                         return (pa);
913                 }
914
915                 l3 = pmap_l2_to_l3(l2, va);
916                 if (l3 == NULL)
917                         panic("pmap_kextract: No l3...");
918                 pa = PTE_TO_PHYS(pmap_load(l3));
919                 pa |= (va & PAGE_MASK);
920         }
921         return (pa);
922 }
923
924 /***************************************************
925  * Low level mapping routines.....
926  ***************************************************/
927
928 void
929 pmap_kenter_device(vm_offset_t sva, vm_size_t size, vm_paddr_t pa)
930 {
931         pt_entry_t entry;
932         pt_entry_t *l3;
933         vm_offset_t va;
934         pn_t pn;
935
936         KASSERT((pa & L3_OFFSET) == 0,
937            ("pmap_kenter_device: Invalid physical address"));
938         KASSERT((sva & L3_OFFSET) == 0,
939            ("pmap_kenter_device: Invalid virtual address"));
940         KASSERT((size & PAGE_MASK) == 0,
941             ("pmap_kenter_device: Mapping is not page-sized"));
942
943         va = sva;
944         while (size != 0) {
945                 l3 = pmap_l3(kernel_pmap, va);
946                 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
947
948                 pn = (pa / PAGE_SIZE);
949                 entry = PTE_KERN;
950                 entry |= (pn << PTE_PPN0_S);
951                 pmap_store(l3, entry);
952
953                 va += PAGE_SIZE;
954                 pa += PAGE_SIZE;
955                 size -= PAGE_SIZE;
956         }
957         pmap_invalidate_range(kernel_pmap, sva, va);
958 }
959
960 /*
961  * Remove a page from the kernel pagetables.
962  * Note: not SMP coherent.
963  */
964 PMAP_INLINE void
965 pmap_kremove(vm_offset_t va)
966 {
967         pt_entry_t *l3;
968
969         l3 = pmap_l3(kernel_pmap, va);
970         KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
971
972         pmap_clear(l3);
973         sfence_vma();
974 }
975
976 void
977 pmap_kremove_device(vm_offset_t sva, vm_size_t size)
978 {
979         pt_entry_t *l3;
980         vm_offset_t va;
981
982         KASSERT((sva & L3_OFFSET) == 0,
983            ("pmap_kremove_device: Invalid virtual address"));
984         KASSERT((size & PAGE_MASK) == 0,
985             ("pmap_kremove_device: Mapping is not page-sized"));
986
987         va = sva;
988         while (size != 0) {
989                 l3 = pmap_l3(kernel_pmap, va);
990                 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
991                 pmap_clear(l3);
992
993                 va += PAGE_SIZE;
994                 size -= PAGE_SIZE;
995         }
996
997         pmap_invalidate_range(kernel_pmap, sva, va);
998 }
999
1000 /*
1001  *      Used to map a range of physical addresses into kernel
1002  *      virtual address space.
1003  *
1004  *      The value passed in '*virt' is a suggested virtual address for
1005  *      the mapping. Architectures which can support a direct-mapped
1006  *      physical to virtual region can return the appropriate address
1007  *      within that region, leaving '*virt' unchanged. Other
1008  *      architectures should map the pages starting at '*virt' and
1009  *      update '*virt' with the first usable address after the mapped
1010  *      region.
1011  */
1012 vm_offset_t
1013 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
1014 {
1015
1016         return PHYS_TO_DMAP(start);
1017 }
1018
1019
1020 /*
1021  * Add a list of wired pages to the kva
1022  * this routine is only used for temporary
1023  * kernel mappings that do not need to have
1024  * page modification or references recorded.
1025  * Note that old mappings are simply written
1026  * over.  The page *must* be wired.
1027  * Note: SMP coherent.  Uses a ranged shootdown IPI.
1028  */
1029 void
1030 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1031 {
1032         pt_entry_t *l3, pa;
1033         vm_offset_t va;
1034         vm_page_t m;
1035         pt_entry_t entry;
1036         pn_t pn;
1037         int i;
1038
1039         va = sva;
1040         for (i = 0; i < count; i++) {
1041                 m = ma[i];
1042                 pa = VM_PAGE_TO_PHYS(m);
1043                 pn = (pa / PAGE_SIZE);
1044                 l3 = pmap_l3(kernel_pmap, va);
1045
1046                 entry = PTE_KERN;
1047                 entry |= (pn << PTE_PPN0_S);
1048                 pmap_store(l3, entry);
1049
1050                 va += L3_SIZE;
1051         }
1052         pmap_invalidate_range(kernel_pmap, sva, va);
1053 }
1054
1055 /*
1056  * This routine tears out page mappings from the
1057  * kernel -- it is meant only for temporary mappings.
1058  * Note: SMP coherent.  Uses a ranged shootdown IPI.
1059  */
1060 void
1061 pmap_qremove(vm_offset_t sva, int count)
1062 {
1063         pt_entry_t *l3;
1064         vm_offset_t va;
1065
1066         KASSERT(sva >= VM_MIN_KERNEL_ADDRESS, ("usermode va %lx", sva));
1067
1068         for (va = sva; count-- > 0; va += PAGE_SIZE) {
1069                 l3 = pmap_l3(kernel_pmap, va);
1070                 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
1071                 pmap_clear(l3);
1072         }
1073         pmap_invalidate_range(kernel_pmap, sva, va);
1074 }
1075
1076 bool
1077 pmap_ps_enabled(pmap_t pmap __unused)
1078 {
1079
1080         return (superpages_enabled);
1081 }
1082
1083 /***************************************************
1084  * Page table page management routines.....
1085  ***************************************************/
1086 /*
1087  * Schedule the specified unused page table page to be freed.  Specifically,
1088  * add the page to the specified list of pages that will be released to the
1089  * physical memory manager after the TLB has been updated.
1090  */
1091 static __inline void
1092 pmap_add_delayed_free_list(vm_page_t m, struct spglist *free,
1093     boolean_t set_PG_ZERO)
1094 {
1095
1096         if (set_PG_ZERO)
1097                 m->flags |= PG_ZERO;
1098         else
1099                 m->flags &= ~PG_ZERO;
1100         SLIST_INSERT_HEAD(free, m, plinks.s.ss);
1101 }
1102
1103 /*
1104  * Inserts the specified page table page into the specified pmap's collection
1105  * of idle page table pages.  Each of a pmap's page table pages is responsible
1106  * for mapping a distinct range of virtual addresses.  The pmap's collection is
1107  * ordered by this virtual address range.
1108  *
1109  * If "promoted" is false, then the page table page "ml3" must be zero filled.
1110  */
1111 static __inline int
1112 pmap_insert_pt_page(pmap_t pmap, vm_page_t ml3, bool promoted)
1113 {
1114
1115         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1116         ml3->valid = promoted ? VM_PAGE_BITS_ALL : 0;
1117         return (vm_radix_insert(&pmap->pm_root, ml3));
1118 }
1119
1120 /*
1121  * Removes the page table page mapping the specified virtual address from the
1122  * specified pmap's collection of idle page table pages, and returns it.
1123  * Otherwise, returns NULL if there is no page table page corresponding to the
1124  * specified virtual address.
1125  */
1126 static __inline vm_page_t
1127 pmap_remove_pt_page(pmap_t pmap, vm_offset_t va)
1128 {
1129
1130         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1131         return (vm_radix_remove(&pmap->pm_root, pmap_l2_pindex(va)));
1132 }
1133         
1134 /*
1135  * Decrements a page table page's wire count, which is used to record the
1136  * number of valid page table entries within the page.  If the wire count
1137  * drops to zero, then the page table page is unmapped.  Returns TRUE if the
1138  * page table page was unmapped and FALSE otherwise.
1139  */
1140 static inline boolean_t
1141 pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1142 {
1143
1144         --m->wire_count;
1145         if (m->wire_count == 0) {
1146                 _pmap_unwire_ptp(pmap, va, m, free);
1147                 return (TRUE);
1148         } else {
1149                 return (FALSE);
1150         }
1151 }
1152
1153 static void
1154 _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1155 {
1156         vm_paddr_t phys;
1157
1158         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1159         if (m->pindex >= NUL1E) {
1160                 pd_entry_t *l1;
1161                 l1 = pmap_l1(pmap, va);
1162                 pmap_clear(l1);
1163                 pmap_distribute_l1(pmap, pmap_l1_index(va), 0);
1164         } else {
1165                 pd_entry_t *l2;
1166                 l2 = pmap_l2(pmap, va);
1167                 pmap_clear(l2);
1168         }
1169         pmap_resident_count_dec(pmap, 1);
1170         if (m->pindex < NUL1E) {
1171                 pd_entry_t *l1;
1172                 vm_page_t pdpg;
1173
1174                 l1 = pmap_l1(pmap, va);
1175                 phys = PTE_TO_PHYS(pmap_load(l1));
1176                 pdpg = PHYS_TO_VM_PAGE(phys);
1177                 pmap_unwire_ptp(pmap, va, pdpg, free);
1178         }
1179         pmap_invalidate_page(pmap, va);
1180
1181         vm_wire_sub(1);
1182
1183         /* 
1184          * Put page on a list so that it is released after
1185          * *ALL* TLB shootdown is done
1186          */
1187         pmap_add_delayed_free_list(m, free, TRUE);
1188 }
1189
1190 /*
1191  * After removing a page table entry, this routine is used to
1192  * conditionally free the page, and manage the hold/wire counts.
1193  */
1194 static int
1195 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, pd_entry_t ptepde,
1196     struct spglist *free)
1197 {
1198         vm_page_t mpte;
1199
1200         if (va >= VM_MAXUSER_ADDRESS)
1201                 return (0);
1202         KASSERT(ptepde != 0, ("pmap_unuse_pt: ptepde != 0"));
1203         mpte = PHYS_TO_VM_PAGE(PTE_TO_PHYS(ptepde));
1204         return (pmap_unwire_ptp(pmap, va, mpte, free));
1205 }
1206
1207 void
1208 pmap_pinit0(pmap_t pmap)
1209 {
1210
1211         PMAP_LOCK_INIT(pmap);
1212         bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1213         pmap->pm_l1 = kernel_pmap->pm_l1;
1214         pmap->pm_satp = SATP_MODE_SV39 | (vtophys(pmap->pm_l1) >> PAGE_SHIFT);
1215         CPU_ZERO(&pmap->pm_active);
1216         pmap_activate_boot(pmap);
1217 }
1218
1219 int
1220 pmap_pinit(pmap_t pmap)
1221 {
1222         vm_paddr_t l1phys;
1223         vm_page_t l1pt;
1224
1225         /*
1226          * allocate the l1 page
1227          */
1228         while ((l1pt = vm_page_alloc(NULL, 0xdeadbeef, VM_ALLOC_NORMAL |
1229             VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL)
1230                 vm_wait(NULL);
1231
1232         l1phys = VM_PAGE_TO_PHYS(l1pt);
1233         pmap->pm_l1 = (pd_entry_t *)PHYS_TO_DMAP(l1phys);
1234         pmap->pm_satp = SATP_MODE_SV39 | (l1phys >> PAGE_SHIFT);
1235
1236         if ((l1pt->flags & PG_ZERO) == 0)
1237                 pagezero(pmap->pm_l1);
1238
1239         bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1240
1241         CPU_ZERO(&pmap->pm_active);
1242
1243         /* Install kernel pagetables */
1244         memcpy(pmap->pm_l1, kernel_pmap->pm_l1, PAGE_SIZE);
1245
1246         /* Add to the list of all user pmaps */
1247         mtx_lock(&allpmaps_lock);
1248         LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1249         mtx_unlock(&allpmaps_lock);
1250
1251         vm_radix_init(&pmap->pm_root);
1252
1253         return (1);
1254 }
1255
1256 /*
1257  * This routine is called if the desired page table page does not exist.
1258  *
1259  * If page table page allocation fails, this routine may sleep before
1260  * returning NULL.  It sleeps only if a lock pointer was given.
1261  *
1262  * Note: If a page allocation fails at page table level two or three,
1263  * one or two pages may be held during the wait, only to be released
1264  * afterwards.  This conservative approach is easily argued to avoid
1265  * race conditions.
1266  */
1267 static vm_page_t
1268 _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp)
1269 {
1270         vm_page_t m, /*pdppg, */pdpg;
1271         pt_entry_t entry;
1272         vm_paddr_t phys;
1273         pn_t pn;
1274
1275         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1276
1277         /*
1278          * Allocate a page table page.
1279          */
1280         if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1281             VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1282                 if (lockp != NULL) {
1283                         RELEASE_PV_LIST_LOCK(lockp);
1284                         PMAP_UNLOCK(pmap);
1285                         rw_runlock(&pvh_global_lock);
1286                         vm_wait(NULL);
1287                         rw_rlock(&pvh_global_lock);
1288                         PMAP_LOCK(pmap);
1289                 }
1290
1291                 /*
1292                  * Indicate the need to retry.  While waiting, the page table
1293                  * page may have been allocated.
1294                  */
1295                 return (NULL);
1296         }
1297
1298         if ((m->flags & PG_ZERO) == 0)
1299                 pmap_zero_page(m);
1300
1301         /*
1302          * Map the pagetable page into the process address space, if
1303          * it isn't already there.
1304          */
1305
1306         if (ptepindex >= NUL1E) {
1307                 pd_entry_t *l1;
1308                 vm_pindex_t l1index;
1309
1310                 l1index = ptepindex - NUL1E;
1311                 l1 = &pmap->pm_l1[l1index];
1312
1313                 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1314                 entry = (PTE_V);
1315                 entry |= (pn << PTE_PPN0_S);
1316                 pmap_store(l1, entry);
1317                 pmap_distribute_l1(pmap, l1index, entry);
1318         } else {
1319                 vm_pindex_t l1index;
1320                 pd_entry_t *l1, *l2;
1321
1322                 l1index = ptepindex >> (L1_SHIFT - L2_SHIFT);
1323                 l1 = &pmap->pm_l1[l1index];
1324                 if (pmap_load(l1) == 0) {
1325                         /* recurse for allocating page dir */
1326                         if (_pmap_alloc_l3(pmap, NUL1E + l1index,
1327                             lockp) == NULL) {
1328                                 vm_page_unwire_noq(m);
1329                                 vm_page_free_zero(m);
1330                                 return (NULL);
1331                         }
1332                 } else {
1333                         phys = PTE_TO_PHYS(pmap_load(l1));
1334                         pdpg = PHYS_TO_VM_PAGE(phys);
1335                         pdpg->wire_count++;
1336                 }
1337
1338                 phys = PTE_TO_PHYS(pmap_load(l1));
1339                 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
1340                 l2 = &l2[ptepindex & Ln_ADDR_MASK];
1341
1342                 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1343                 entry = (PTE_V);
1344                 entry |= (pn << PTE_PPN0_S);
1345                 pmap_store(l2, entry);
1346         }
1347
1348         pmap_resident_count_inc(pmap, 1);
1349
1350         return (m);
1351 }
1352
1353 static vm_page_t
1354 pmap_alloc_l2(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1355 {
1356         pd_entry_t *l1;
1357         vm_page_t l2pg;
1358         vm_pindex_t l2pindex;
1359
1360 retry:
1361         l1 = pmap_l1(pmap, va);
1362         if (l1 != NULL && (pmap_load(l1) & PTE_RWX) == 0) {
1363                 /* Add a reference to the L2 page. */
1364                 l2pg = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l1)));
1365                 l2pg->wire_count++;
1366         } else {
1367                 /* Allocate a L2 page. */
1368                 l2pindex = pmap_l2_pindex(va) >> Ln_ENTRIES_SHIFT;
1369                 l2pg = _pmap_alloc_l3(pmap, NUL2E + l2pindex, lockp);
1370                 if (l2pg == NULL && lockp != NULL)
1371                         goto retry;
1372         }
1373         return (l2pg);
1374 }
1375
1376 static vm_page_t
1377 pmap_alloc_l3(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1378 {
1379         vm_pindex_t ptepindex;
1380         pd_entry_t *l2;
1381         vm_paddr_t phys;
1382         vm_page_t m;
1383
1384         /*
1385          * Calculate pagetable page index
1386          */
1387         ptepindex = pmap_l2_pindex(va);
1388 retry:
1389         /*
1390          * Get the page directory entry
1391          */
1392         l2 = pmap_l2(pmap, va);
1393
1394         /*
1395          * If the page table page is mapped, we just increment the
1396          * hold count, and activate it.
1397          */
1398         if (l2 != NULL && pmap_load(l2) != 0) {
1399                 phys = PTE_TO_PHYS(pmap_load(l2));
1400                 m = PHYS_TO_VM_PAGE(phys);
1401                 m->wire_count++;
1402         } else {
1403                 /*
1404                  * Here if the pte page isn't mapped, or if it has been
1405                  * deallocated.
1406                  */
1407                 m = _pmap_alloc_l3(pmap, ptepindex, lockp);
1408                 if (m == NULL && lockp != NULL)
1409                         goto retry;
1410         }
1411         return (m);
1412 }
1413
1414
1415 /***************************************************
1416  * Pmap allocation/deallocation routines.
1417  ***************************************************/
1418
1419 /*
1420  * Release any resources held by the given physical map.
1421  * Called when a pmap initialized by pmap_pinit is being released.
1422  * Should only be called if the map contains no valid mappings.
1423  */
1424 void
1425 pmap_release(pmap_t pmap)
1426 {
1427         vm_page_t m;
1428
1429         KASSERT(pmap->pm_stats.resident_count == 0,
1430             ("pmap_release: pmap resident count %ld != 0",
1431             pmap->pm_stats.resident_count));
1432         KASSERT(CPU_EMPTY(&pmap->pm_active),
1433             ("releasing active pmap %p", pmap));
1434
1435         mtx_lock(&allpmaps_lock);
1436         LIST_REMOVE(pmap, pm_list);
1437         mtx_unlock(&allpmaps_lock);
1438
1439         m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pmap->pm_l1));
1440         vm_page_unwire_noq(m);
1441         vm_page_free(m);
1442 }
1443
1444 #if 0
1445 static int
1446 kvm_size(SYSCTL_HANDLER_ARGS)
1447 {
1448         unsigned long ksize = VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS;
1449
1450         return sysctl_handle_long(oidp, &ksize, 0, req);
1451 }
1452 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD, 
1453     0, 0, kvm_size, "LU", "Size of KVM");
1454
1455 static int
1456 kvm_free(SYSCTL_HANDLER_ARGS)
1457 {
1458         unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1459
1460         return sysctl_handle_long(oidp, &kfree, 0, req);
1461 }
1462 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD, 
1463     0, 0, kvm_free, "LU", "Amount of KVM free");
1464 #endif /* 0 */
1465
1466 /*
1467  * grow the number of kernel page table entries, if needed
1468  */
1469 void
1470 pmap_growkernel(vm_offset_t addr)
1471 {
1472         vm_paddr_t paddr;
1473         vm_page_t nkpg;
1474         pd_entry_t *l1, *l2;
1475         pt_entry_t entry;
1476         pn_t pn;
1477
1478         mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1479
1480         addr = roundup2(addr, L2_SIZE);
1481         if (addr - 1 >= vm_map_max(kernel_map))
1482                 addr = vm_map_max(kernel_map);
1483         while (kernel_vm_end < addr) {
1484                 l1 = pmap_l1(kernel_pmap, kernel_vm_end);
1485                 if (pmap_load(l1) == 0) {
1486                         /* We need a new PDP entry */
1487                         nkpg = vm_page_alloc(NULL, kernel_vm_end >> L1_SHIFT,
1488                             VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ |
1489                             VM_ALLOC_WIRED | VM_ALLOC_ZERO);
1490                         if (nkpg == NULL)
1491                                 panic("pmap_growkernel: no memory to grow kernel");
1492                         if ((nkpg->flags & PG_ZERO) == 0)
1493                                 pmap_zero_page(nkpg);
1494                         paddr = VM_PAGE_TO_PHYS(nkpg);
1495
1496                         pn = (paddr / PAGE_SIZE);
1497                         entry = (PTE_V);
1498                         entry |= (pn << PTE_PPN0_S);
1499                         pmap_store(l1, entry);
1500                         pmap_distribute_l1(kernel_pmap,
1501                             pmap_l1_index(kernel_vm_end), entry);
1502                         continue; /* try again */
1503                 }
1504                 l2 = pmap_l1_to_l2(l1, kernel_vm_end);
1505                 if ((pmap_load(l2) & PTE_V) != 0 &&
1506                     (pmap_load(l2) & PTE_RWX) == 0) {
1507                         kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1508                         if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1509                                 kernel_vm_end = vm_map_max(kernel_map);
1510                                 break;
1511                         }
1512                         continue;
1513                 }
1514
1515                 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L2_SHIFT,
1516                     VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1517                     VM_ALLOC_ZERO);
1518                 if (nkpg == NULL)
1519                         panic("pmap_growkernel: no memory to grow kernel");
1520                 if ((nkpg->flags & PG_ZERO) == 0) {
1521                         pmap_zero_page(nkpg);
1522                 }
1523                 paddr = VM_PAGE_TO_PHYS(nkpg);
1524
1525                 pn = (paddr / PAGE_SIZE);
1526                 entry = (PTE_V);
1527                 entry |= (pn << PTE_PPN0_S);
1528                 pmap_store(l2, entry);
1529
1530                 pmap_invalidate_page(kernel_pmap, kernel_vm_end);
1531
1532                 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1533                 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1534                         kernel_vm_end = vm_map_max(kernel_map);
1535                         break;                       
1536                 }
1537         }
1538 }
1539
1540
1541 /***************************************************
1542  * page management routines.
1543  ***************************************************/
1544
1545 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1546 CTASSERT(_NPCM == 3);
1547 CTASSERT(_NPCPV == 168);
1548
1549 static __inline struct pv_chunk *
1550 pv_to_chunk(pv_entry_t pv)
1551 {
1552
1553         return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
1554 }
1555
1556 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1557
1558 #define PC_FREE0        0xfffffffffffffffful
1559 #define PC_FREE1        0xfffffffffffffffful
1560 #define PC_FREE2        0x000000fffffffffful
1561
1562 static const uint64_t pc_freemask[_NPCM] = { PC_FREE0, PC_FREE1, PC_FREE2 };
1563
1564 #if 0
1565 #ifdef PV_STATS
1566 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1567
1568 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1569         "Current number of pv entry chunks");
1570 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1571         "Current number of pv entry chunks allocated");
1572 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1573         "Current number of pv entry chunks frees");
1574 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1575         "Number of times tried to get a chunk page but failed.");
1576
1577 static long pv_entry_frees, pv_entry_allocs, pv_entry_count;
1578 static int pv_entry_spare;
1579
1580 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1581         "Current number of pv entry frees");
1582 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1583         "Current number of pv entry allocs");
1584 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1585         "Current number of pv entries");
1586 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1587         "Current number of spare pv entries");
1588 #endif
1589 #endif /* 0 */
1590
1591 /*
1592  * We are in a serious low memory condition.  Resort to
1593  * drastic measures to free some pages so we can allocate
1594  * another pv entry chunk.
1595  *
1596  * Returns NULL if PV entries were reclaimed from the specified pmap.
1597  *
1598  * We do not, however, unmap 2mpages because subsequent accesses will
1599  * allocate per-page pv entries until repromotion occurs, thereby
1600  * exacerbating the shortage of free pv entries.
1601  */
1602 static vm_page_t
1603 reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp)
1604 {
1605
1606         panic("RISCVTODO: reclaim_pv_chunk");
1607 }
1608
1609 /*
1610  * free the pv_entry back to the free list
1611  */
1612 static void
1613 free_pv_entry(pmap_t pmap, pv_entry_t pv)
1614 {
1615         struct pv_chunk *pc;
1616         int idx, field, bit;
1617
1618         rw_assert(&pvh_global_lock, RA_LOCKED);
1619         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1620         PV_STAT(atomic_add_long(&pv_entry_frees, 1));
1621         PV_STAT(atomic_add_int(&pv_entry_spare, 1));
1622         PV_STAT(atomic_subtract_long(&pv_entry_count, 1));
1623         pc = pv_to_chunk(pv);
1624         idx = pv - &pc->pc_pventry[0];
1625         field = idx / 64;
1626         bit = idx % 64;
1627         pc->pc_map[field] |= 1ul << bit;
1628         if (pc->pc_map[0] != PC_FREE0 || pc->pc_map[1] != PC_FREE1 ||
1629             pc->pc_map[2] != PC_FREE2) {
1630                 /* 98% of the time, pc is already at the head of the list. */
1631                 if (__predict_false(pc != TAILQ_FIRST(&pmap->pm_pvchunk))) {
1632                         TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1633                         TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1634                 }
1635                 return;
1636         }
1637         TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1638         free_pv_chunk(pc);
1639 }
1640
1641 static void
1642 free_pv_chunk(struct pv_chunk *pc)
1643 {
1644         vm_page_t m;
1645
1646         mtx_lock(&pv_chunks_mutex);
1647         TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
1648         mtx_unlock(&pv_chunks_mutex);
1649         PV_STAT(atomic_subtract_int(&pv_entry_spare, _NPCPV));
1650         PV_STAT(atomic_subtract_int(&pc_chunk_count, 1));
1651         PV_STAT(atomic_add_int(&pc_chunk_frees, 1));
1652         /* entire chunk is free, return it */
1653         m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
1654         dump_drop_page(m->phys_addr);
1655         vm_page_unwire_noq(m);
1656         vm_page_free(m);
1657 }
1658
1659 /*
1660  * Returns a new PV entry, allocating a new PV chunk from the system when
1661  * needed.  If this PV chunk allocation fails and a PV list lock pointer was
1662  * given, a PV chunk is reclaimed from an arbitrary pmap.  Otherwise, NULL is
1663  * returned.
1664  *
1665  * The given PV list lock may be released.
1666  */
1667 static pv_entry_t
1668 get_pv_entry(pmap_t pmap, struct rwlock **lockp)
1669 {
1670         int bit, field;
1671         pv_entry_t pv;
1672         struct pv_chunk *pc;
1673         vm_page_t m;
1674
1675         rw_assert(&pvh_global_lock, RA_LOCKED);
1676         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1677         PV_STAT(atomic_add_long(&pv_entry_allocs, 1));
1678 retry:
1679         pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1680         if (pc != NULL) {
1681                 for (field = 0; field < _NPCM; field++) {
1682                         if (pc->pc_map[field]) {
1683                                 bit = ffsl(pc->pc_map[field]) - 1;
1684                                 break;
1685                         }
1686                 }
1687                 if (field < _NPCM) {
1688                         pv = &pc->pc_pventry[field * 64 + bit];
1689                         pc->pc_map[field] &= ~(1ul << bit);
1690                         /* If this was the last item, move it to tail */
1691                         if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 &&
1692                             pc->pc_map[2] == 0) {
1693                                 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1694                                 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc,
1695                                     pc_list);
1696                         }
1697                         PV_STAT(atomic_add_long(&pv_entry_count, 1));
1698                         PV_STAT(atomic_subtract_int(&pv_entry_spare, 1));
1699                         return (pv);
1700                 }
1701         }
1702         /* No free items, allocate another chunk */
1703         m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1704             VM_ALLOC_WIRED);
1705         if (m == NULL) {
1706                 if (lockp == NULL) {
1707                         PV_STAT(pc_chunk_tryfail++);
1708                         return (NULL);
1709                 }
1710                 m = reclaim_pv_chunk(pmap, lockp);
1711                 if (m == NULL)
1712                         goto retry;
1713         }
1714         PV_STAT(atomic_add_int(&pc_chunk_count, 1));
1715         PV_STAT(atomic_add_int(&pc_chunk_allocs, 1));
1716         dump_add_page(m->phys_addr);
1717         pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1718         pc->pc_pmap = pmap;
1719         pc->pc_map[0] = PC_FREE0 & ~1ul;        /* preallocated bit 0 */
1720         pc->pc_map[1] = PC_FREE1;
1721         pc->pc_map[2] = PC_FREE2;
1722         mtx_lock(&pv_chunks_mutex);
1723         TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru);
1724         mtx_unlock(&pv_chunks_mutex);
1725         pv = &pc->pc_pventry[0];
1726         TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1727         PV_STAT(atomic_add_long(&pv_entry_count, 1));
1728         PV_STAT(atomic_add_int(&pv_entry_spare, _NPCPV - 1));
1729         return (pv);
1730 }
1731
1732 /*
1733  * Ensure that the number of spare PV entries in the specified pmap meets or
1734  * exceeds the given count, "needed".
1735  *
1736  * The given PV list lock may be released.
1737  */
1738 static void
1739 reserve_pv_entries(pmap_t pmap, int needed, struct rwlock **lockp)
1740 {
1741         struct pch new_tail;
1742         struct pv_chunk *pc;
1743         vm_page_t m;
1744         int avail, free;
1745         bool reclaimed;
1746
1747         rw_assert(&pvh_global_lock, RA_LOCKED);
1748         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1749         KASSERT(lockp != NULL, ("reserve_pv_entries: lockp is NULL"));
1750
1751         /*
1752          * Newly allocated PV chunks must be stored in a private list until
1753          * the required number of PV chunks have been allocated.  Otherwise,
1754          * reclaim_pv_chunk() could recycle one of these chunks.  In
1755          * contrast, these chunks must be added to the pmap upon allocation.
1756          */
1757         TAILQ_INIT(&new_tail);
1758 retry:
1759         avail = 0;
1760         TAILQ_FOREACH(pc, &pmap->pm_pvchunk, pc_list) {
1761                 bit_count((bitstr_t *)pc->pc_map, 0,
1762                     sizeof(pc->pc_map) * NBBY, &free);
1763                 if (free == 0)
1764                         break;
1765                 avail += free;
1766                 if (avail >= needed)
1767                         break;
1768         }
1769         for (reclaimed = false; avail < needed; avail += _NPCPV) {
1770                 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1771                     VM_ALLOC_WIRED);
1772                 if (m == NULL) {
1773                         m = reclaim_pv_chunk(pmap, lockp);
1774                         if (m == NULL)
1775                                 goto retry;
1776                         reclaimed = true;
1777                 }
1778                 /* XXX PV STATS */
1779 #if 0
1780                 dump_add_page(m->phys_addr);
1781 #endif
1782                 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1783                 pc->pc_pmap = pmap;
1784                 pc->pc_map[0] = PC_FREE0;
1785                 pc->pc_map[1] = PC_FREE1;
1786                 pc->pc_map[2] = PC_FREE2;
1787                 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1788                 TAILQ_INSERT_TAIL(&new_tail, pc, pc_lru);
1789
1790                 /*
1791                  * The reclaim might have freed a chunk from the current pmap.
1792                  * If that chunk contained available entries, we need to
1793                  * re-count the number of available entries.
1794                  */
1795                 if (reclaimed)
1796                         goto retry;
1797         }
1798         if (!TAILQ_EMPTY(&new_tail)) {
1799                 mtx_lock(&pv_chunks_mutex);
1800                 TAILQ_CONCAT(&pv_chunks, &new_tail, pc_lru);
1801                 mtx_unlock(&pv_chunks_mutex);
1802         }
1803 }
1804
1805 /*
1806  * First find and then remove the pv entry for the specified pmap and virtual
1807  * address from the specified pv list.  Returns the pv entry if found and NULL
1808  * otherwise.  This operation can be performed on pv lists for either 4KB or
1809  * 2MB page mappings.
1810  */
1811 static __inline pv_entry_t
1812 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1813 {
1814         pv_entry_t pv;
1815
1816         rw_assert(&pvh_global_lock, RA_LOCKED);
1817         TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
1818                 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
1819                         TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
1820                         pvh->pv_gen++;
1821                         break;
1822                 }
1823         }
1824         return (pv);
1825 }
1826
1827 /*
1828  * First find and then destroy the pv entry for the specified pmap and virtual
1829  * address.  This operation can be performed on pv lists for either 4KB or 2MB
1830  * page mappings.
1831  */
1832 static void
1833 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1834 {
1835         pv_entry_t pv;
1836
1837         pv = pmap_pvh_remove(pvh, pmap, va);
1838
1839         KASSERT(pv != NULL, ("pmap_pvh_free: pv not found for %#lx", va));
1840         free_pv_entry(pmap, pv);
1841 }
1842
1843 /*
1844  * Conditionally create the PV entry for a 4KB page mapping if the required
1845  * memory can be allocated without resorting to reclamation.
1846  */
1847 static boolean_t
1848 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m,
1849     struct rwlock **lockp)
1850 {
1851         pv_entry_t pv;
1852
1853         rw_assert(&pvh_global_lock, RA_LOCKED);
1854         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1855         /* Pass NULL instead of the lock pointer to disable reclamation. */
1856         if ((pv = get_pv_entry(pmap, NULL)) != NULL) {
1857                 pv->pv_va = va;
1858                 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1859                 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1860                 m->md.pv_gen++;
1861                 return (TRUE);
1862         } else
1863                 return (FALSE);
1864 }
1865
1866 /*
1867  * After demotion from a 2MB page mapping to 512 4KB page mappings,
1868  * destroy the pv entry for the 2MB page mapping and reinstantiate the pv
1869  * entries for each of the 4KB page mappings.
1870  */
1871 static void __unused
1872 pmap_pv_demote_l2(pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
1873     struct rwlock **lockp)
1874 {
1875         struct md_page *pvh;
1876         struct pv_chunk *pc;
1877         pv_entry_t pv;
1878         vm_page_t m;
1879         vm_offset_t va_last;
1880         int bit, field;
1881
1882         rw_assert(&pvh_global_lock, RA_LOCKED);
1883         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1884         CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1885
1886         /*
1887          * Transfer the 2mpage's pv entry for this mapping to the first
1888          * page's pv list.  Once this transfer begins, the pv list lock
1889          * must not be released until the last pv entry is reinstantiated.
1890          */
1891         pvh = pa_to_pvh(pa);
1892         va &= ~L2_OFFSET;
1893         pv = pmap_pvh_remove(pvh, pmap, va);
1894         KASSERT(pv != NULL, ("pmap_pv_demote_l2: pv not found"));
1895         m = PHYS_TO_VM_PAGE(pa);
1896         TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1897         m->md.pv_gen++;
1898         /* Instantiate the remaining 511 pv entries. */
1899         va_last = va + L2_SIZE - PAGE_SIZE;
1900         for (;;) {
1901                 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1902                 KASSERT(pc->pc_map[0] != 0 || pc->pc_map[1] != 0 ||
1903                     pc->pc_map[2] != 0, ("pmap_pv_demote_l2: missing spare"));
1904                 for (field = 0; field < _NPCM; field++) {
1905                         while (pc->pc_map[field] != 0) {
1906                                 bit = ffsl(pc->pc_map[field]) - 1;
1907                                 pc->pc_map[field] &= ~(1ul << bit);
1908                                 pv = &pc->pc_pventry[field * 64 + bit];
1909                                 va += PAGE_SIZE;
1910                                 pv->pv_va = va;
1911                                 m++;
1912                                 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
1913                             ("pmap_pv_demote_l2: page %p is not managed", m));
1914                                 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1915                                 m->md.pv_gen++;
1916                                 if (va == va_last)
1917                                         goto out;
1918                         }
1919                 }
1920                 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1921                 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1922         }
1923 out:
1924         if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 && pc->pc_map[2] == 0) {
1925                 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1926                 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1927         }
1928         /* XXX PV stats */
1929 }
1930
1931 #if VM_NRESERVLEVEL > 0
1932 static void
1933 pmap_pv_promote_l2(pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
1934     struct rwlock **lockp)
1935 {
1936         struct md_page *pvh;
1937         pv_entry_t pv;
1938         vm_page_t m;
1939         vm_offset_t va_last;
1940
1941         rw_assert(&pvh_global_lock, RA_LOCKED);
1942         KASSERT((va & L2_OFFSET) == 0,
1943             ("pmap_pv_promote_l2: misaligned va %#lx", va));
1944
1945         CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1946
1947         m = PHYS_TO_VM_PAGE(pa);
1948         pv = pmap_pvh_remove(&m->md, pmap, va);
1949         KASSERT(pv != NULL, ("pmap_pv_promote_l2: pv for %#lx not found", va));
1950         pvh = pa_to_pvh(pa);
1951         TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
1952         pvh->pv_gen++;
1953
1954         va_last = va + L2_SIZE - PAGE_SIZE;
1955         do {
1956                 m++;
1957                 va += PAGE_SIZE;
1958                 pmap_pvh_free(&m->md, pmap, va);
1959         } while (va < va_last);
1960 }
1961 #endif /* VM_NRESERVLEVEL > 0 */
1962
1963 /*
1964  * Create the PV entry for a 2MB page mapping.  Always returns true unless the
1965  * flag PMAP_ENTER_NORECLAIM is specified.  If that flag is specified, returns
1966  * false if the PV entry cannot be allocated without resorting to reclamation.
1967  */
1968 static bool
1969 pmap_pv_insert_l2(pmap_t pmap, vm_offset_t va, pd_entry_t l2e, u_int flags,
1970     struct rwlock **lockp)
1971 {
1972         struct md_page *pvh;
1973         pv_entry_t pv;
1974         vm_paddr_t pa;
1975
1976         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1977         /* Pass NULL instead of the lock pointer to disable reclamation. */
1978         if ((pv = get_pv_entry(pmap, (flags & PMAP_ENTER_NORECLAIM) != 0 ?
1979             NULL : lockp)) == NULL)
1980                 return (false);
1981         pv->pv_va = va;
1982         pa = PTE_TO_PHYS(l2e);
1983         CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1984         pvh = pa_to_pvh(pa);
1985         TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
1986         pvh->pv_gen++;
1987         return (true);
1988 }
1989
1990 static void
1991 pmap_remove_kernel_l2(pmap_t pmap, pt_entry_t *l2, vm_offset_t va)
1992 {
1993         pt_entry_t newl2, oldl2;
1994         vm_page_t ml3;
1995         vm_paddr_t ml3pa;
1996
1997         KASSERT(!VIRT_IN_DMAP(va), ("removing direct mapping of %#lx", va));
1998         KASSERT(pmap == kernel_pmap, ("pmap %p is not kernel_pmap", pmap));
1999         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2000
2001         ml3 = pmap_remove_pt_page(pmap, va);
2002         if (ml3 == NULL)
2003                 panic("pmap_remove_kernel_l2: Missing pt page");
2004
2005         ml3pa = VM_PAGE_TO_PHYS(ml3);
2006         newl2 = ml3pa | PTE_V;
2007
2008         /*
2009          * If this page table page was unmapped by a promotion, then it
2010          * contains valid mappings.  Zero it to invalidate those mappings.
2011          */
2012         if (ml3->valid != 0)
2013                 pagezero((void *)PHYS_TO_DMAP(ml3pa));
2014
2015         /*
2016          * Demote the mapping.
2017          */
2018         oldl2 = pmap_load_store(l2, newl2);
2019         KASSERT(oldl2 == 0, ("%s: found existing mapping at %p: %#lx",
2020             __func__, l2, oldl2));
2021 }
2022
2023 /*
2024  * pmap_remove_l2: Do the things to unmap a level 2 superpage.
2025  */
2026 static int
2027 pmap_remove_l2(pmap_t pmap, pt_entry_t *l2, vm_offset_t sva,
2028     pd_entry_t l1e, struct spglist *free, struct rwlock **lockp)
2029 {
2030         struct md_page *pvh;
2031         pt_entry_t oldl2;
2032         vm_offset_t eva, va;
2033         vm_page_t m, ml3;
2034
2035         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2036         KASSERT((sva & L2_OFFSET) == 0, ("pmap_remove_l2: sva is not aligned"));
2037         oldl2 = pmap_load_clear(l2);
2038         KASSERT((oldl2 & PTE_RWX) != 0,
2039             ("pmap_remove_l2: L2e %lx is not a superpage mapping", oldl2));
2040
2041         /*
2042          * The sfence.vma documentation states that it is sufficient to specify
2043          * a single address within a superpage mapping.  However, since we do
2044          * not perform any invalidation upon promotion, TLBs may still be
2045          * caching 4KB mappings within the superpage, so we must invalidate the
2046          * entire range.
2047          */
2048         pmap_invalidate_range(pmap, sva, sva + L2_SIZE);
2049         if ((oldl2 & PTE_SW_WIRED) != 0)
2050                 pmap->pm_stats.wired_count -= L2_SIZE / PAGE_SIZE;
2051         pmap_resident_count_dec(pmap, L2_SIZE / PAGE_SIZE);
2052         if ((oldl2 & PTE_SW_MANAGED) != 0) {
2053                 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, PTE_TO_PHYS(oldl2));
2054                 pvh = pa_to_pvh(PTE_TO_PHYS(oldl2));
2055                 pmap_pvh_free(pvh, pmap, sva);
2056                 eva = sva + L2_SIZE;
2057                 for (va = sva, m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(oldl2));
2058                     va < eva; va += PAGE_SIZE, m++) {
2059                         if ((oldl2 & PTE_D) != 0)
2060                                 vm_page_dirty(m);
2061                         if ((oldl2 & PTE_A) != 0)
2062                                 vm_page_aflag_set(m, PGA_REFERENCED);
2063                         if (TAILQ_EMPTY(&m->md.pv_list) &&
2064                             TAILQ_EMPTY(&pvh->pv_list))
2065                                 vm_page_aflag_clear(m, PGA_WRITEABLE);
2066                 }
2067         }
2068         if (pmap == kernel_pmap) {
2069                 pmap_remove_kernel_l2(pmap, l2, sva);
2070         } else {
2071                 ml3 = pmap_remove_pt_page(pmap, sva);
2072                 if (ml3 != NULL) {
2073                         KASSERT(ml3->valid == VM_PAGE_BITS_ALL,
2074                             ("pmap_remove_l2: l3 page not promoted"));
2075                         pmap_resident_count_dec(pmap, 1);
2076                         KASSERT(ml3->wire_count == Ln_ENTRIES,
2077                             ("pmap_remove_l2: l3 page wire count error"));
2078                         ml3->wire_count = 1;
2079                         vm_page_unwire_noq(ml3);
2080                         pmap_add_delayed_free_list(ml3, free, FALSE);
2081                 }
2082         }
2083         return (pmap_unuse_pt(pmap, sva, l1e, free));
2084 }
2085
2086 /*
2087  * pmap_remove_l3: do the things to unmap a page in a process
2088  */
2089 static int
2090 pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t va, 
2091     pd_entry_t l2e, struct spglist *free, struct rwlock **lockp)
2092 {
2093         pt_entry_t old_l3;
2094         vm_paddr_t phys;
2095         vm_page_t m;
2096
2097         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2098         old_l3 = pmap_load_clear(l3);
2099         pmap_invalidate_page(pmap, va);
2100         if (old_l3 & PTE_SW_WIRED)
2101                 pmap->pm_stats.wired_count -= 1;
2102         pmap_resident_count_dec(pmap, 1);
2103         if (old_l3 & PTE_SW_MANAGED) {
2104                 phys = PTE_TO_PHYS(old_l3);
2105                 m = PHYS_TO_VM_PAGE(phys);
2106                 if ((old_l3 & PTE_D) != 0)
2107                         vm_page_dirty(m);
2108                 if (old_l3 & PTE_A)
2109                         vm_page_aflag_set(m, PGA_REFERENCED);
2110                 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
2111                 pmap_pvh_free(&m->md, pmap, va);
2112         }
2113
2114         return (pmap_unuse_pt(pmap, va, l2e, free));
2115 }
2116
2117 /*
2118  *      Remove the given range of addresses from the specified map.
2119  *
2120  *      It is assumed that the start and end are properly
2121  *      rounded to the page size.
2122  */
2123 void
2124 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2125 {
2126         struct spglist free;
2127         struct rwlock *lock;
2128         vm_offset_t va, va_next;
2129         pd_entry_t *l1, *l2, l2e;
2130         pt_entry_t *l3;
2131
2132         /*
2133          * Perform an unsynchronized read.  This is, however, safe.
2134          */
2135         if (pmap->pm_stats.resident_count == 0)
2136                 return;
2137
2138         SLIST_INIT(&free);
2139
2140         rw_rlock(&pvh_global_lock);
2141         PMAP_LOCK(pmap);
2142
2143         lock = NULL;
2144         for (; sva < eva; sva = va_next) {
2145                 if (pmap->pm_stats.resident_count == 0)
2146                         break;
2147
2148                 l1 = pmap_l1(pmap, sva);
2149                 if (pmap_load(l1) == 0) {
2150                         va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2151                         if (va_next < sva)
2152                                 va_next = eva;
2153                         continue;
2154                 }
2155
2156                 /*
2157                  * Calculate index for next page table.
2158                  */
2159                 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2160                 if (va_next < sva)
2161                         va_next = eva;
2162
2163                 l2 = pmap_l1_to_l2(l1, sva);
2164                 if (l2 == NULL)
2165                         continue;
2166                 if ((l2e = pmap_load(l2)) == 0)
2167                         continue;
2168                 if ((l2e & PTE_RWX) != 0) {
2169                         if (sva + L2_SIZE == va_next && eva >= va_next) {
2170                                 (void)pmap_remove_l2(pmap, l2, sva,
2171                                     pmap_load(l1), &free, &lock);
2172                                 continue;
2173                         } else if (!pmap_demote_l2_locked(pmap, l2, sva,
2174                             &lock)) {
2175                                 /*
2176                                  * The large page mapping was destroyed.
2177                                  */
2178                                 continue;
2179                         }
2180                         l2e = pmap_load(l2);
2181                 }
2182
2183                 /*
2184                  * Limit our scan to either the end of the va represented
2185                  * by the current page table page, or to the end of the
2186                  * range being removed.
2187                  */
2188                 if (va_next > eva)
2189                         va_next = eva;
2190
2191                 va = va_next;
2192                 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2193                     sva += L3_SIZE) {
2194                         if (pmap_load(l3) == 0) {
2195                                 if (va != va_next) {
2196                                         pmap_invalidate_range(pmap, va, sva);
2197                                         va = va_next;
2198                                 }
2199                                 continue;
2200                         }
2201                         if (va == va_next)
2202                                 va = sva;
2203                         if (pmap_remove_l3(pmap, l3, sva, l2e, &free, &lock)) {
2204                                 sva += L3_SIZE;
2205                                 break;
2206                         }
2207                 }
2208                 if (va != va_next)
2209                         pmap_invalidate_range(pmap, va, sva);
2210         }
2211         if (lock != NULL)
2212                 rw_wunlock(lock);
2213         rw_runlock(&pvh_global_lock);
2214         PMAP_UNLOCK(pmap);
2215         vm_page_free_pages_toq(&free, false);
2216 }
2217
2218 /*
2219  *      Routine:        pmap_remove_all
2220  *      Function:
2221  *              Removes this physical page from
2222  *              all physical maps in which it resides.
2223  *              Reflects back modify bits to the pager.
2224  *
2225  *      Notes:
2226  *              Original versions of this routine were very
2227  *              inefficient because they iteratively called
2228  *              pmap_remove (slow...)
2229  */
2230
2231 void
2232 pmap_remove_all(vm_page_t m)
2233 {
2234         struct spglist free;
2235         struct md_page *pvh;
2236         pmap_t pmap;
2237         pt_entry_t *l3, l3e;
2238         pd_entry_t *l2, l2e;
2239         pv_entry_t pv;
2240         vm_offset_t va;
2241
2242         KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2243             ("pmap_remove_all: page %p is not managed", m));
2244         SLIST_INIT(&free);
2245         pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
2246             pa_to_pvh(VM_PAGE_TO_PHYS(m));
2247
2248         rw_wlock(&pvh_global_lock);
2249         while ((pv = TAILQ_FIRST(&pvh->pv_list)) != NULL) {
2250                 pmap = PV_PMAP(pv);
2251                 PMAP_LOCK(pmap);
2252                 va = pv->pv_va;
2253                 l2 = pmap_l2(pmap, va);
2254                 (void)pmap_demote_l2(pmap, l2, va);
2255                 PMAP_UNLOCK(pmap);
2256         }
2257         while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2258                 pmap = PV_PMAP(pv);
2259                 PMAP_LOCK(pmap);
2260                 pmap_resident_count_dec(pmap, 1);
2261                 l2 = pmap_l2(pmap, pv->pv_va);
2262                 KASSERT(l2 != NULL, ("pmap_remove_all: no l2 table found"));
2263                 l2e = pmap_load(l2);
2264
2265                 KASSERT((l2e & PTE_RX) == 0,
2266                     ("pmap_remove_all: found a superpage in %p's pv list", m));
2267
2268                 l3 = pmap_l2_to_l3(l2, pv->pv_va);
2269                 l3e = pmap_load_clear(l3);
2270                 pmap_invalidate_page(pmap, pv->pv_va);
2271                 if (l3e & PTE_SW_WIRED)
2272                         pmap->pm_stats.wired_count--;
2273                 if ((l3e & PTE_A) != 0)
2274                         vm_page_aflag_set(m, PGA_REFERENCED);
2275
2276                 /*
2277                  * Update the vm_page_t clean and reference bits.
2278                  */
2279                 if ((l3e & PTE_D) != 0)
2280                         vm_page_dirty(m);
2281                 pmap_unuse_pt(pmap, pv->pv_va, pmap_load(l2), &free);
2282                 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
2283                 m->md.pv_gen++;
2284                 free_pv_entry(pmap, pv);
2285                 PMAP_UNLOCK(pmap);
2286         }
2287         vm_page_aflag_clear(m, PGA_WRITEABLE);
2288         rw_wunlock(&pvh_global_lock);
2289         vm_page_free_pages_toq(&free, false);
2290 }
2291
2292 /*
2293  *      Set the physical protection on the
2294  *      specified range of this map as requested.
2295  */
2296 void
2297 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2298 {
2299         pd_entry_t *l1, *l2, l2e;
2300         pt_entry_t *l3, l3e, mask;
2301         vm_page_t m;
2302         vm_paddr_t pa;
2303         vm_offset_t va, va_next;
2304         bool anychanged, pv_lists_locked;
2305
2306         if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2307                 pmap_remove(pmap, sva, eva);
2308                 return;
2309         }
2310
2311         if ((prot & (VM_PROT_WRITE | VM_PROT_EXECUTE)) ==
2312             (VM_PROT_WRITE | VM_PROT_EXECUTE))
2313                 return;
2314
2315         anychanged = false;
2316         pv_lists_locked = false;
2317         mask = 0;
2318         if ((prot & VM_PROT_WRITE) == 0)
2319                 mask |= PTE_W | PTE_D;
2320         if ((prot & VM_PROT_EXECUTE) == 0)
2321                 mask |= PTE_X;
2322 resume:
2323         PMAP_LOCK(pmap);
2324         for (; sva < eva; sva = va_next) {
2325                 l1 = pmap_l1(pmap, sva);
2326                 if (pmap_load(l1) == 0) {
2327                         va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2328                         if (va_next < sva)
2329                                 va_next = eva;
2330                         continue;
2331                 }
2332
2333                 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2334                 if (va_next < sva)
2335                         va_next = eva;
2336
2337                 l2 = pmap_l1_to_l2(l1, sva);
2338                 if (l2 == NULL || (l2e = pmap_load(l2)) == 0)
2339                         continue;
2340                 if ((l2e & PTE_RWX) != 0) {
2341                         if (sva + L2_SIZE == va_next && eva >= va_next) {
2342 retryl2:
2343                                 if ((l2e & (PTE_SW_MANAGED | PTE_D)) ==
2344                                     (PTE_SW_MANAGED | PTE_D)) {
2345                                         pa = PTE_TO_PHYS(l2e);
2346                                         for (va = sva, m = PHYS_TO_VM_PAGE(pa);
2347                                             va < va_next; m++, va += PAGE_SIZE)
2348                                                 vm_page_dirty(m);
2349                                 }
2350                                 if (!atomic_fcmpset_long(l2, &l2e, l2e & ~mask))
2351                                         goto retryl2;
2352                                 anychanged = true;
2353                         } else {
2354                                 if (!pv_lists_locked) {
2355                                         pv_lists_locked = true;
2356                                         if (!rw_try_rlock(&pvh_global_lock)) {
2357                                                 if (anychanged)
2358                                                         pmap_invalidate_all(
2359                                                             pmap);
2360                                                 PMAP_UNLOCK(pmap);
2361                                                 rw_rlock(&pvh_global_lock);
2362                                                 goto resume;
2363                                         }
2364                                 }
2365                                 if (!pmap_demote_l2(pmap, l2, sva)) {
2366                                         /*
2367                                          * The large page mapping was destroyed.
2368                                          */
2369                                         continue;
2370                                 }
2371                         }
2372                 }
2373
2374                 if (va_next > eva)
2375                         va_next = eva;
2376
2377                 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2378                     sva += L3_SIZE) {
2379                         l3e = pmap_load(l3);
2380 retryl3:
2381                         if ((l3e & PTE_V) == 0)
2382                                 continue;
2383                         if ((prot & VM_PROT_WRITE) == 0 &&
2384                             (l3e & (PTE_SW_MANAGED | PTE_D)) ==
2385                             (PTE_SW_MANAGED | PTE_D)) {
2386                                 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(l3e));
2387                                 vm_page_dirty(m);
2388                         }
2389                         if (!atomic_fcmpset_long(l3, &l3e, l3e & ~mask))
2390                                 goto retryl3;
2391                         anychanged = true;
2392                 }
2393         }
2394         if (anychanged)
2395                 pmap_invalidate_all(pmap);
2396         if (pv_lists_locked)
2397                 rw_runlock(&pvh_global_lock);
2398         PMAP_UNLOCK(pmap);
2399 }
2400
2401 int
2402 pmap_fault_fixup(pmap_t pmap, vm_offset_t va, vm_prot_t ftype)
2403 {
2404         pd_entry_t *l2, l2e;
2405         pt_entry_t bits, *pte, oldpte;
2406         int rv;
2407
2408         rv = 0;
2409         PMAP_LOCK(pmap);
2410         l2 = pmap_l2(pmap, va);
2411         if (l2 == NULL || ((l2e = pmap_load(l2)) & PTE_V) == 0)
2412                 goto done;
2413         if ((l2e & PTE_RWX) == 0) {
2414                 pte = pmap_l2_to_l3(l2, va);
2415                 if (pte == NULL || ((oldpte = pmap_load(pte) & PTE_V)) == 0)
2416                         goto done;
2417         } else {
2418                 pte = l2;
2419                 oldpte = l2e;
2420         }
2421
2422         if ((pmap != kernel_pmap && (oldpte & PTE_U) == 0) ||
2423             (ftype == VM_PROT_WRITE && (oldpte & PTE_W) == 0) ||
2424             (ftype == VM_PROT_EXECUTE && (oldpte & PTE_X) == 0) ||
2425             (ftype == VM_PROT_READ && (oldpte & PTE_R) == 0))
2426                 goto done;
2427
2428         bits = PTE_A;
2429         if (ftype == VM_PROT_WRITE)
2430                 bits |= PTE_D;
2431
2432         /*
2433          * Spurious faults can occur if the implementation caches invalid
2434          * entries in the TLB, or if simultaneous accesses on multiple CPUs
2435          * race with each other.
2436          */
2437         if ((oldpte & bits) != bits)
2438                 pmap_store_bits(pte, bits);
2439         sfence_vma();
2440         rv = 1;
2441 done:
2442         PMAP_UNLOCK(pmap);
2443         return (rv);
2444 }
2445
2446 static bool
2447 pmap_demote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va)
2448 {
2449         struct rwlock *lock;
2450         bool rv;
2451
2452         lock = NULL;
2453         rv = pmap_demote_l2_locked(pmap, l2, va, &lock);
2454         if (lock != NULL)
2455                 rw_wunlock(lock);
2456         return (rv);
2457 }
2458
2459 /*
2460  * Tries to demote a 2MB page mapping.  If demotion fails, the 2MB page
2461  * mapping is invalidated.
2462  */
2463 static bool
2464 pmap_demote_l2_locked(pmap_t pmap, pd_entry_t *l2, vm_offset_t va,
2465     struct rwlock **lockp)
2466 {
2467         struct spglist free;
2468         vm_page_t mpte;
2469         pd_entry_t newl2, oldl2;
2470         pt_entry_t *firstl3, newl3;
2471         vm_paddr_t mptepa;
2472         int i;
2473
2474         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2475
2476         oldl2 = pmap_load(l2);
2477         KASSERT((oldl2 & PTE_RWX) != 0,
2478             ("pmap_demote_l2_locked: oldl2 is not a leaf entry"));
2479         if ((oldl2 & PTE_A) == 0 || (mpte = pmap_remove_pt_page(pmap, va)) ==
2480             NULL) {
2481                 if ((oldl2 & PTE_A) == 0 || (mpte = vm_page_alloc(NULL,
2482                     pmap_l2_pindex(va), (VIRT_IN_DMAP(va) ? VM_ALLOC_INTERRUPT :
2483                     VM_ALLOC_NORMAL) | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) ==
2484                     NULL) {
2485                         SLIST_INIT(&free);
2486                         (void)pmap_remove_l2(pmap, l2, va & ~L2_OFFSET,
2487                             pmap_load(pmap_l1(pmap, va)), &free, lockp);
2488                         vm_page_free_pages_toq(&free, true);
2489                         CTR2(KTR_PMAP, "pmap_demote_l2_locked: "
2490                             "failure for va %#lx in pmap %p", va, pmap);
2491                         return (false);
2492                 }
2493                 if (va < VM_MAXUSER_ADDRESS) {
2494                         mpte->wire_count = Ln_ENTRIES;
2495                         pmap_resident_count_inc(pmap, 1);
2496                 }
2497         }
2498         mptepa = VM_PAGE_TO_PHYS(mpte);
2499         firstl3 = (pt_entry_t *)PHYS_TO_DMAP(mptepa);
2500         newl2 = ((mptepa / PAGE_SIZE) << PTE_PPN0_S) | PTE_V;
2501         KASSERT((oldl2 & PTE_A) != 0,
2502             ("pmap_demote_l2_locked: oldl2 is missing PTE_A"));
2503         KASSERT((oldl2 & (PTE_D | PTE_W)) != PTE_W,
2504             ("pmap_demote_l2_locked: oldl2 is missing PTE_D"));
2505         newl3 = oldl2;
2506
2507         /*
2508          * If the page table page is not leftover from an earlier promotion,
2509          * initialize it.
2510          */
2511         if (mpte->valid == 0) {
2512                 for (i = 0; i < Ln_ENTRIES; i++)
2513                         pmap_store(firstl3 + i, newl3 + (i << PTE_PPN0_S));
2514         }
2515         KASSERT(PTE_TO_PHYS(pmap_load(firstl3)) == PTE_TO_PHYS(newl3),
2516             ("pmap_demote_l2_locked: firstl3 and newl3 map different physical "
2517             "addresses"));
2518
2519         /*
2520          * If the mapping has changed attributes, update the page table
2521          * entries.
2522          */
2523         if ((pmap_load(firstl3) & PTE_PROMOTE) != (newl3 & PTE_PROMOTE))
2524                 for (i = 0; i < Ln_ENTRIES; i++)
2525                         pmap_store(firstl3 + i, newl3 + (i << PTE_PPN0_S));
2526
2527         /*
2528          * The spare PV entries must be reserved prior to demoting the
2529          * mapping, that is, prior to changing the L2 entry.  Otherwise, the
2530          * state of the L2 entry and the PV lists will be inconsistent, which
2531          * can result in reclaim_pv_chunk() attempting to remove a PV entry from
2532          * the wrong PV list and pmap_pv_demote_l2() failing to find the
2533          * expected PV entry for the 2MB page mapping that is being demoted.
2534          */
2535         if ((oldl2 & PTE_SW_MANAGED) != 0)
2536                 reserve_pv_entries(pmap, Ln_ENTRIES - 1, lockp);
2537
2538         /*
2539          * Demote the mapping.
2540          */
2541         pmap_store(l2, newl2);
2542
2543         /*
2544          * Demote the PV entry.
2545          */
2546         if ((oldl2 & PTE_SW_MANAGED) != 0)
2547                 pmap_pv_demote_l2(pmap, va, PTE_TO_PHYS(oldl2), lockp);
2548
2549         atomic_add_long(&pmap_l2_demotions, 1);
2550         CTR2(KTR_PMAP, "pmap_demote_l2_locked: success for va %#lx in pmap %p",
2551             va, pmap);
2552         return (true);
2553 }
2554
2555 #if VM_NRESERVLEVEL > 0
2556 static void
2557 pmap_promote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va,
2558     struct rwlock **lockp)
2559 {
2560         pt_entry_t *firstl3, *l3;
2561         vm_paddr_t pa;
2562         vm_page_t ml3;
2563
2564         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2565
2566         va &= ~L2_OFFSET;
2567         KASSERT((pmap_load(l2) & PTE_RWX) == 0,
2568             ("pmap_promote_l2: invalid l2 entry %p", l2));
2569
2570         firstl3 = (pt_entry_t *)PHYS_TO_DMAP(PTE_TO_PHYS(pmap_load(l2)));
2571         pa = PTE_TO_PHYS(pmap_load(firstl3));
2572         if ((pa & L2_OFFSET) != 0) {
2573                 CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx pmap %p",
2574                     va, pmap);
2575                 atomic_add_long(&pmap_l2_p_failures, 1);
2576                 return;
2577         }
2578
2579         pa += PAGE_SIZE;
2580         for (l3 = firstl3 + 1; l3 < firstl3 + Ln_ENTRIES; l3++) {
2581                 if (PTE_TO_PHYS(pmap_load(l3)) != pa) {
2582                         CTR2(KTR_PMAP,
2583                             "pmap_promote_l2: failure for va %#lx pmap %p",
2584                             va, pmap);
2585                         atomic_add_long(&pmap_l2_p_failures, 1);
2586                         return;
2587                 }
2588                 if ((pmap_load(l3) & PTE_PROMOTE) !=
2589                     (pmap_load(firstl3) & PTE_PROMOTE)) {
2590                         CTR2(KTR_PMAP,
2591                             "pmap_promote_l2: failure for va %#lx pmap %p",
2592                             va, pmap);
2593                         atomic_add_long(&pmap_l2_p_failures, 1);
2594                         return;
2595                 }
2596                 pa += PAGE_SIZE;
2597         }
2598
2599         ml3 = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2600         KASSERT(ml3->pindex == pmap_l2_pindex(va),
2601             ("pmap_promote_l2: page table page's pindex is wrong"));
2602         if (pmap_insert_pt_page(pmap, ml3, true)) {
2603                 CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx pmap %p",
2604                     va, pmap);
2605                 atomic_add_long(&pmap_l2_p_failures, 1);
2606                 return;
2607         }
2608
2609         if ((pmap_load(firstl3) & PTE_SW_MANAGED) != 0)
2610                 pmap_pv_promote_l2(pmap, va, PTE_TO_PHYS(pmap_load(firstl3)),
2611                     lockp);
2612
2613         pmap_store(l2, pmap_load(firstl3));
2614
2615         atomic_add_long(&pmap_l2_promotions, 1);
2616         CTR2(KTR_PMAP, "pmap_promote_l2: success for va %#lx in pmap %p", va,
2617             pmap);
2618 }
2619 #endif
2620
2621 /*
2622  *      Insert the given physical page (p) at
2623  *      the specified virtual address (v) in the
2624  *      target physical map with the protection requested.
2625  *
2626  *      If specified, the page will be wired down, meaning
2627  *      that the related pte can not be reclaimed.
2628  *
2629  *      NB:  This is the only routine which MAY NOT lazy-evaluate
2630  *      or lose information.  That is, this routine must actually
2631  *      insert this page into the given map NOW.
2632  */
2633 int
2634 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2635     u_int flags, int8_t psind)
2636 {
2637         struct rwlock *lock;
2638         pd_entry_t *l1, *l2, l2e;
2639         pt_entry_t new_l3, orig_l3;
2640         pt_entry_t *l3;
2641         pv_entry_t pv;
2642         vm_paddr_t opa, pa, l2_pa, l3_pa;
2643         vm_page_t mpte, om, l2_m, l3_m;
2644         pt_entry_t entry;
2645         pn_t l2_pn, l3_pn, pn;
2646         int rv;
2647         bool nosleep;
2648
2649         va = trunc_page(va);
2650         if ((m->oflags & VPO_UNMANAGED) == 0 && !vm_page_xbusied(m))
2651                 VM_OBJECT_ASSERT_LOCKED(m->object);
2652         pa = VM_PAGE_TO_PHYS(m);
2653         pn = (pa / PAGE_SIZE);
2654
2655         new_l3 = PTE_V | PTE_R | PTE_A;
2656         if (prot & VM_PROT_EXECUTE)
2657                 new_l3 |= PTE_X;
2658         if (flags & VM_PROT_WRITE)
2659                 new_l3 |= PTE_D;
2660         if (prot & VM_PROT_WRITE)
2661                 new_l3 |= PTE_W;
2662         if (va < VM_MAX_USER_ADDRESS)
2663                 new_l3 |= PTE_U;
2664
2665         new_l3 |= (pn << PTE_PPN0_S);
2666         if ((flags & PMAP_ENTER_WIRED) != 0)
2667                 new_l3 |= PTE_SW_WIRED;
2668
2669         /*
2670          * Set modified bit gratuitously for writeable mappings if
2671          * the page is unmanaged. We do not want to take a fault
2672          * to do the dirty bit accounting for these mappings.
2673          */
2674         if ((m->oflags & VPO_UNMANAGED) != 0) {
2675                 if (prot & VM_PROT_WRITE)
2676                         new_l3 |= PTE_D;
2677         } else
2678                 new_l3 |= PTE_SW_MANAGED;
2679
2680         CTR2(KTR_PMAP, "pmap_enter: %.16lx -> %.16lx", va, pa);
2681
2682         lock = NULL;
2683         mpte = NULL;
2684         rw_rlock(&pvh_global_lock);
2685         PMAP_LOCK(pmap);
2686         if (psind == 1) {
2687                 /* Assert the required virtual and physical alignment. */
2688                 KASSERT((va & L2_OFFSET) == 0,
2689                     ("pmap_enter: va %#lx unaligned", va));
2690                 KASSERT(m->psind > 0, ("pmap_enter: m->psind < psind"));
2691                 rv = pmap_enter_l2(pmap, va, new_l3, flags, m, &lock);
2692                 goto out;
2693         }
2694
2695         l2 = pmap_l2(pmap, va);
2696         if (l2 != NULL && ((l2e = pmap_load(l2)) & PTE_V) != 0 &&
2697             ((l2e & PTE_RWX) == 0 || pmap_demote_l2_locked(pmap, l2,
2698             va, &lock))) {
2699                 l3 = pmap_l2_to_l3(l2, va);
2700                 if (va < VM_MAXUSER_ADDRESS) {
2701                         mpte = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2702                         mpte->wire_count++;
2703                 }
2704         } else if (va < VM_MAXUSER_ADDRESS) {
2705                 nosleep = (flags & PMAP_ENTER_NOSLEEP) != 0;
2706                 mpte = pmap_alloc_l3(pmap, va, nosleep ? NULL : &lock);
2707                 if (mpte == NULL && nosleep) {
2708                         CTR0(KTR_PMAP, "pmap_enter: mpte == NULL");
2709                         if (lock != NULL)
2710                                 rw_wunlock(lock);
2711                         rw_runlock(&pvh_global_lock);
2712                         PMAP_UNLOCK(pmap);
2713                         return (KERN_RESOURCE_SHORTAGE);
2714                 }
2715                 l3 = pmap_l3(pmap, va);
2716         } else {
2717                 l3 = pmap_l3(pmap, va);
2718                 /* TODO: This is not optimal, but should mostly work */
2719                 if (l3 == NULL) {
2720                         if (l2 == NULL) {
2721                                 l2_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2722                                     VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
2723                                     VM_ALLOC_ZERO);
2724                                 if (l2_m == NULL)
2725                                         panic("pmap_enter: l2 pte_m == NULL");
2726                                 if ((l2_m->flags & PG_ZERO) == 0)
2727                                         pmap_zero_page(l2_m);
2728
2729                                 l2_pa = VM_PAGE_TO_PHYS(l2_m);
2730                                 l2_pn = (l2_pa / PAGE_SIZE);
2731
2732                                 l1 = pmap_l1(pmap, va);
2733                                 entry = (PTE_V);
2734                                 entry |= (l2_pn << PTE_PPN0_S);
2735                                 pmap_store(l1, entry);
2736                                 pmap_distribute_l1(pmap, pmap_l1_index(va), entry);
2737                                 l2 = pmap_l1_to_l2(l1, va);
2738                         }
2739
2740                         l3_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2741                             VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO);
2742                         if (l3_m == NULL)
2743                                 panic("pmap_enter: l3 pte_m == NULL");
2744                         if ((l3_m->flags & PG_ZERO) == 0)
2745                                 pmap_zero_page(l3_m);
2746
2747                         l3_pa = VM_PAGE_TO_PHYS(l3_m);
2748                         l3_pn = (l3_pa / PAGE_SIZE);
2749                         entry = (PTE_V);
2750                         entry |= (l3_pn << PTE_PPN0_S);
2751                         pmap_store(l2, entry);
2752                         l3 = pmap_l2_to_l3(l2, va);
2753                 }
2754                 pmap_invalidate_page(pmap, va);
2755         }
2756
2757         orig_l3 = pmap_load(l3);
2758         opa = PTE_TO_PHYS(orig_l3);
2759         pv = NULL;
2760
2761         /*
2762          * Is the specified virtual address already mapped?
2763          */
2764         if ((orig_l3 & PTE_V) != 0) {
2765                 /*
2766                  * Wiring change, just update stats. We don't worry about
2767                  * wiring PT pages as they remain resident as long as there
2768                  * are valid mappings in them. Hence, if a user page is wired,
2769                  * the PT page will be also.
2770                  */
2771                 if ((flags & PMAP_ENTER_WIRED) != 0 &&
2772                     (orig_l3 & PTE_SW_WIRED) == 0)
2773                         pmap->pm_stats.wired_count++;
2774                 else if ((flags & PMAP_ENTER_WIRED) == 0 &&
2775                     (orig_l3 & PTE_SW_WIRED) != 0)
2776                         pmap->pm_stats.wired_count--;
2777
2778                 /*
2779                  * Remove the extra PT page reference.
2780                  */
2781                 if (mpte != NULL) {
2782                         mpte->wire_count--;
2783                         KASSERT(mpte->wire_count > 0,
2784                             ("pmap_enter: missing reference to page table page,"
2785                              " va: 0x%lx", va));
2786                 }
2787
2788                 /*
2789                  * Has the physical page changed?
2790                  */
2791                 if (opa == pa) {
2792                         /*
2793                          * No, might be a protection or wiring change.
2794                          */
2795                         if ((orig_l3 & PTE_SW_MANAGED) != 0 &&
2796                             (new_l3 & PTE_W) != 0)
2797                                 vm_page_aflag_set(m, PGA_WRITEABLE);
2798                         goto validate;
2799                 }
2800
2801                 /*
2802                  * The physical page has changed.  Temporarily invalidate
2803                  * the mapping.  This ensures that all threads sharing the
2804                  * pmap keep a consistent view of the mapping, which is
2805                  * necessary for the correct handling of COW faults.  It
2806                  * also permits reuse of the old mapping's PV entry,
2807                  * avoiding an allocation.
2808                  *
2809                  * For consistency, handle unmanaged mappings the same way.
2810                  */
2811                 orig_l3 = pmap_load_clear(l3);
2812                 KASSERT(PTE_TO_PHYS(orig_l3) == opa,
2813                     ("pmap_enter: unexpected pa update for %#lx", va));
2814                 if ((orig_l3 & PTE_SW_MANAGED) != 0) {
2815                         om = PHYS_TO_VM_PAGE(opa);
2816
2817                         /*
2818                          * The pmap lock is sufficient to synchronize with
2819                          * concurrent calls to pmap_page_test_mappings() and
2820                          * pmap_ts_referenced().
2821                          */
2822                         if ((orig_l3 & PTE_D) != 0)
2823                                 vm_page_dirty(om);
2824                         if ((orig_l3 & PTE_A) != 0)
2825                                 vm_page_aflag_set(om, PGA_REFERENCED);
2826                         CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, opa);
2827                         pv = pmap_pvh_remove(&om->md, pmap, va);
2828                         KASSERT(pv != NULL,
2829                             ("pmap_enter: no PV entry for %#lx", va));
2830                         if ((new_l3 & PTE_SW_MANAGED) == 0)
2831                                 free_pv_entry(pmap, pv);
2832                         if ((om->aflags & PGA_WRITEABLE) != 0 &&
2833                             TAILQ_EMPTY(&om->md.pv_list))
2834                                 vm_page_aflag_clear(om, PGA_WRITEABLE);
2835                 }
2836                 pmap_invalidate_page(pmap, va);
2837                 orig_l3 = 0;
2838         } else {
2839                 /*
2840                  * Increment the counters.
2841                  */
2842                 if ((new_l3 & PTE_SW_WIRED) != 0)
2843                         pmap->pm_stats.wired_count++;
2844                 pmap_resident_count_inc(pmap, 1);
2845         }
2846         /*
2847          * Enter on the PV list if part of our managed memory.
2848          */
2849         if ((new_l3 & PTE_SW_MANAGED) != 0) {
2850                 if (pv == NULL) {
2851                         pv = get_pv_entry(pmap, &lock);
2852                         pv->pv_va = va;
2853                 }
2854                 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, pa);
2855                 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
2856                 m->md.pv_gen++;
2857                 if ((new_l3 & PTE_W) != 0)
2858                         vm_page_aflag_set(m, PGA_WRITEABLE);
2859         }
2860
2861 validate:
2862         /*
2863          * Sync the i-cache on all harts before updating the PTE
2864          * if the new PTE is executable.
2865          */
2866         if (prot & VM_PROT_EXECUTE)
2867                 pmap_sync_icache(pmap, va, PAGE_SIZE);
2868
2869         /*
2870          * Update the L3 entry.
2871          */
2872         if (orig_l3 != 0) {
2873                 orig_l3 = pmap_load_store(l3, new_l3);
2874                 pmap_invalidate_page(pmap, va);
2875                 KASSERT(PTE_TO_PHYS(orig_l3) == pa,
2876                     ("pmap_enter: invalid update"));
2877                 if ((orig_l3 & (PTE_D | PTE_SW_MANAGED)) ==
2878                     (PTE_D | PTE_SW_MANAGED))
2879                         vm_page_dirty(m);
2880         } else {
2881                 pmap_store(l3, new_l3);
2882         }
2883
2884 #if VM_NRESERVLEVEL > 0
2885         if (mpte != NULL && mpte->wire_count == Ln_ENTRIES &&
2886             pmap_ps_enabled(pmap) &&
2887             (m->flags & PG_FICTITIOUS) == 0 &&
2888             vm_reserv_level_iffullpop(m) == 0)
2889                 pmap_promote_l2(pmap, l2, va, &lock);
2890 #endif
2891
2892         rv = KERN_SUCCESS;
2893 out:
2894         if (lock != NULL)
2895                 rw_wunlock(lock);
2896         rw_runlock(&pvh_global_lock);
2897         PMAP_UNLOCK(pmap);
2898         return (rv);
2899 }
2900
2901 /*
2902  * Tries to create a read- and/or execute-only 2MB page mapping.  Returns true
2903  * if successful.  Returns false if (1) a page table page cannot be allocated
2904  * without sleeping, (2) a mapping already exists at the specified virtual
2905  * address, or (3) a PV entry cannot be allocated without reclaiming another
2906  * PV entry.
2907  */
2908 static bool
2909 pmap_enter_2mpage(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2910     struct rwlock **lockp)
2911 {
2912         pd_entry_t new_l2;
2913         pn_t pn;
2914
2915         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2916
2917         pn = VM_PAGE_TO_PHYS(m) / PAGE_SIZE;
2918         new_l2 = (pd_entry_t)((pn << PTE_PPN0_S) | PTE_R | PTE_V);
2919         if ((m->oflags & VPO_UNMANAGED) == 0)
2920                 new_l2 |= PTE_SW_MANAGED;
2921         if ((prot & VM_PROT_EXECUTE) != 0)
2922                 new_l2 |= PTE_X;
2923         if (va < VM_MAXUSER_ADDRESS)
2924                 new_l2 |= PTE_U;
2925         return (pmap_enter_l2(pmap, va, new_l2, PMAP_ENTER_NOSLEEP |
2926             PMAP_ENTER_NOREPLACE | PMAP_ENTER_NORECLAIM, NULL, lockp) ==
2927             KERN_SUCCESS);
2928 }
2929
2930 /*
2931  * Tries to create the specified 2MB page mapping.  Returns KERN_SUCCESS if
2932  * the mapping was created, and either KERN_FAILURE or KERN_RESOURCE_SHORTAGE
2933  * otherwise.  Returns KERN_FAILURE if PMAP_ENTER_NOREPLACE was specified and
2934  * a mapping already exists at the specified virtual address.  Returns
2935  * KERN_RESOURCE_SHORTAGE if PMAP_ENTER_NOSLEEP was specified and a page table
2936  * page allocation failed.  Returns KERN_RESOURCE_SHORTAGE if
2937  * PMAP_ENTER_NORECLAIM was specified and a PV entry allocation failed.
2938  *
2939  * The parameter "m" is only used when creating a managed, writeable mapping.
2940  */
2941 static int
2942 pmap_enter_l2(pmap_t pmap, vm_offset_t va, pd_entry_t new_l2, u_int flags,
2943     vm_page_t m, struct rwlock **lockp)
2944 {
2945         struct spglist free;
2946         pd_entry_t *l2, *l3, oldl2;
2947         vm_offset_t sva;
2948         vm_page_t l2pg, mt;
2949
2950         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2951
2952         if ((l2pg = pmap_alloc_l2(pmap, va, (flags & PMAP_ENTER_NOSLEEP) != 0 ?
2953             NULL : lockp)) == NULL) {
2954                 CTR2(KTR_PMAP, "pmap_enter_l2: failure for va %#lx in pmap %p",
2955                     va, pmap);
2956                 return (KERN_RESOURCE_SHORTAGE);
2957         }
2958
2959         l2 = (pd_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(l2pg));
2960         l2 = &l2[pmap_l2_index(va)];
2961         if ((oldl2 = pmap_load(l2)) != 0) {
2962                 KASSERT(l2pg->wire_count > 1,
2963                     ("pmap_enter_l2: l2pg's wire count is too low"));
2964                 if ((flags & PMAP_ENTER_NOREPLACE) != 0) {
2965                         l2pg->wire_count--;
2966                         CTR2(KTR_PMAP,
2967                             "pmap_enter_l2: failure for va %#lx in pmap %p",
2968                             va, pmap);
2969                         return (KERN_FAILURE);
2970                 }
2971                 SLIST_INIT(&free);
2972                 if ((oldl2 & PTE_RWX) != 0)
2973                         (void)pmap_remove_l2(pmap, l2, va,
2974                             pmap_load(pmap_l1(pmap, va)), &free, lockp);
2975                 else
2976                         for (sva = va; sva < va + L2_SIZE; sva += PAGE_SIZE) {
2977                                 l3 = pmap_l2_to_l3(l2, sva);
2978                                 if ((pmap_load(l3) & PTE_V) != 0 &&
2979                                     pmap_remove_l3(pmap, l3, sva, oldl2, &free,
2980                                     lockp) != 0)
2981                                         break;
2982                         }
2983                 vm_page_free_pages_toq(&free, true);
2984                 if (va >= VM_MAXUSER_ADDRESS) {
2985                         /*
2986                          * Both pmap_remove_l2() and pmap_remove_l3() will
2987                          * leave the kernel page table page zero filled.
2988                          */
2989                         mt = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2990                         if (pmap_insert_pt_page(pmap, mt, false))
2991                                 panic("pmap_enter_l2: trie insert failed");
2992                 } else
2993                         KASSERT(pmap_load(l2) == 0,
2994                             ("pmap_enter_l2: non-zero L2 entry %p", l2));
2995         }
2996
2997         if ((new_l2 & PTE_SW_MANAGED) != 0) {
2998                 /*
2999                  * Abort this mapping if its PV entry could not be created.
3000                  */
3001                 if (!pmap_pv_insert_l2(pmap, va, new_l2, flags, lockp)) {
3002                         SLIST_INIT(&free);
3003                         if (pmap_unwire_ptp(pmap, va, l2pg, &free)) {
3004                                 /*
3005                                  * Although "va" is not mapped, paging-structure
3006                                  * caches could nonetheless have entries that
3007                                  * refer to the freed page table pages.
3008                                  * Invalidate those entries.
3009                                  */
3010                                 pmap_invalidate_page(pmap, va);
3011                                 vm_page_free_pages_toq(&free, true);
3012                         }
3013                         CTR2(KTR_PMAP,
3014                             "pmap_enter_l2: failure for va %#lx in pmap %p",
3015                             va, pmap);
3016                         return (KERN_RESOURCE_SHORTAGE);
3017                 }
3018                 if ((new_l2 & PTE_W) != 0)
3019                         for (mt = m; mt < &m[L2_SIZE / PAGE_SIZE]; mt++)
3020                                 vm_page_aflag_set(mt, PGA_WRITEABLE);
3021         }
3022
3023         /*
3024          * Increment counters.
3025          */
3026         if ((new_l2 & PTE_SW_WIRED) != 0)
3027                 pmap->pm_stats.wired_count += L2_SIZE / PAGE_SIZE;
3028         pmap->pm_stats.resident_count += L2_SIZE / PAGE_SIZE;
3029
3030         /*
3031          * Map the superpage.
3032          */
3033         pmap_store(l2, new_l2);
3034
3035         atomic_add_long(&pmap_l2_mappings, 1);
3036         CTR2(KTR_PMAP, "pmap_enter_l2: success for va %#lx in pmap %p",
3037             va, pmap);
3038
3039         return (KERN_SUCCESS);
3040 }
3041
3042 /*
3043  * Maps a sequence of resident pages belonging to the same object.
3044  * The sequence begins with the given page m_start.  This page is
3045  * mapped at the given virtual address start.  Each subsequent page is
3046  * mapped at a virtual address that is offset from start by the same
3047  * amount as the page is offset from m_start within the object.  The
3048  * last page in the sequence is the page with the largest offset from
3049  * m_start that can be mapped at a virtual address less than the given
3050  * virtual address end.  Not every virtual page between start and end
3051  * is mapped; only those for which a resident page exists with the
3052  * corresponding offset from m_start are mapped.
3053  */
3054 void
3055 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
3056     vm_page_t m_start, vm_prot_t prot)
3057 {
3058         struct rwlock *lock;
3059         vm_offset_t va;
3060         vm_page_t m, mpte;
3061         vm_pindex_t diff, psize;
3062
3063         VM_OBJECT_ASSERT_LOCKED(m_start->object);
3064
3065         psize = atop(end - start);
3066         mpte = NULL;
3067         m = m_start;
3068         lock = NULL;
3069         rw_rlock(&pvh_global_lock);
3070         PMAP_LOCK(pmap);
3071         while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
3072                 va = start + ptoa(diff);
3073                 if ((va & L2_OFFSET) == 0 && va + L2_SIZE <= end &&
3074                     m->psind == 1 && pmap_ps_enabled(pmap) &&
3075                     pmap_enter_2mpage(pmap, va, m, prot, &lock))
3076                         m = &m[L2_SIZE / PAGE_SIZE - 1];
3077                 else
3078                         mpte = pmap_enter_quick_locked(pmap, va, m, prot, mpte,
3079                             &lock);
3080                 m = TAILQ_NEXT(m, listq);
3081         }
3082         if (lock != NULL)
3083                 rw_wunlock(lock);
3084         rw_runlock(&pvh_global_lock);
3085         PMAP_UNLOCK(pmap);
3086 }
3087
3088 /*
3089  * this code makes some *MAJOR* assumptions:
3090  * 1. Current pmap & pmap exists.
3091  * 2. Not wired.
3092  * 3. Read access.
3093  * 4. No page table pages.
3094  * but is *MUCH* faster than pmap_enter...
3095  */
3096
3097 void
3098 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3099 {
3100         struct rwlock *lock;
3101
3102         lock = NULL;
3103         rw_rlock(&pvh_global_lock);
3104         PMAP_LOCK(pmap);
3105         (void)pmap_enter_quick_locked(pmap, va, m, prot, NULL, &lock);
3106         if (lock != NULL)
3107                 rw_wunlock(lock);
3108         rw_runlock(&pvh_global_lock);
3109         PMAP_UNLOCK(pmap);
3110 }
3111
3112 static vm_page_t
3113 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
3114     vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp)
3115 {
3116         struct spglist free;
3117         vm_paddr_t phys;
3118         pd_entry_t *l2;
3119         pt_entry_t *l3, newl3;
3120
3121         KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
3122             (m->oflags & VPO_UNMANAGED) != 0,
3123             ("pmap_enter_quick_locked: managed mapping within the clean submap"));
3124         rw_assert(&pvh_global_lock, RA_LOCKED);
3125         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
3126
3127         CTR2(KTR_PMAP, "pmap_enter_quick_locked: %p %lx", pmap, va);
3128         /*
3129          * In the case that a page table page is not
3130          * resident, we are creating it here.
3131          */
3132         if (va < VM_MAXUSER_ADDRESS) {
3133                 vm_pindex_t l2pindex;
3134
3135                 /*
3136                  * Calculate pagetable page index
3137                  */
3138                 l2pindex = pmap_l2_pindex(va);
3139                 if (mpte && (mpte->pindex == l2pindex)) {
3140                         mpte->wire_count++;
3141                 } else {
3142                         /*
3143                          * Get the l2 entry
3144                          */
3145                         l2 = pmap_l2(pmap, va);
3146
3147                         /*
3148                          * If the page table page is mapped, we just increment
3149                          * the hold count, and activate it.  Otherwise, we
3150                          * attempt to allocate a page table page.  If this
3151                          * attempt fails, we don't retry.  Instead, we give up.
3152                          */
3153                         if (l2 != NULL && pmap_load(l2) != 0) {
3154                                 phys = PTE_TO_PHYS(pmap_load(l2));
3155                                 mpte = PHYS_TO_VM_PAGE(phys);
3156                                 mpte->wire_count++;
3157                         } else {
3158                                 /*
3159                                  * Pass NULL instead of the PV list lock
3160                                  * pointer, because we don't intend to sleep.
3161                                  */
3162                                 mpte = _pmap_alloc_l3(pmap, l2pindex, NULL);
3163                                 if (mpte == NULL)
3164                                         return (mpte);
3165                         }
3166                 }
3167                 l3 = (pt_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mpte));
3168                 l3 = &l3[pmap_l3_index(va)];
3169         } else {
3170                 mpte = NULL;
3171                 l3 = pmap_l3(kernel_pmap, va);
3172         }
3173         if (l3 == NULL)
3174                 panic("pmap_enter_quick_locked: No l3");
3175         if (pmap_load(l3) != 0) {
3176                 if (mpte != NULL) {
3177                         mpte->wire_count--;
3178                         mpte = NULL;
3179                 }
3180                 return (mpte);
3181         }
3182
3183         /*
3184          * Enter on the PV list if part of our managed memory.
3185          */
3186         if ((m->oflags & VPO_UNMANAGED) == 0 &&
3187             !pmap_try_insert_pv_entry(pmap, va, m, lockp)) {
3188                 if (mpte != NULL) {
3189                         SLIST_INIT(&free);
3190                         if (pmap_unwire_ptp(pmap, va, mpte, &free)) {
3191                                 pmap_invalidate_page(pmap, va);
3192                                 vm_page_free_pages_toq(&free, false);
3193                         }
3194                         mpte = NULL;
3195                 }
3196                 return (mpte);
3197         }
3198
3199         /*
3200          * Increment counters
3201          */
3202         pmap_resident_count_inc(pmap, 1);
3203
3204         newl3 = ((VM_PAGE_TO_PHYS(m) / PAGE_SIZE) << PTE_PPN0_S) |
3205             PTE_V | PTE_R;
3206         if ((prot & VM_PROT_EXECUTE) != 0)
3207                 newl3 |= PTE_X;
3208         if ((m->oflags & VPO_UNMANAGED) == 0)
3209                 newl3 |= PTE_SW_MANAGED;
3210         if (va < VM_MAX_USER_ADDRESS)
3211                 newl3 |= PTE_U;
3212
3213         /*
3214          * Sync the i-cache on all harts before updating the PTE
3215          * if the new PTE is executable.
3216          */
3217         if (prot & VM_PROT_EXECUTE)
3218                 pmap_sync_icache(pmap, va, PAGE_SIZE);
3219
3220         pmap_store(l3, newl3);
3221
3222         pmap_invalidate_page(pmap, va);
3223         return (mpte);
3224 }
3225
3226 /*
3227  * This code maps large physical mmap regions into the
3228  * processor address space.  Note that some shortcuts
3229  * are taken, but the code works.
3230  */
3231 void
3232 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
3233     vm_pindex_t pindex, vm_size_t size)
3234 {
3235
3236         VM_OBJECT_ASSERT_WLOCKED(object);
3237         KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
3238             ("pmap_object_init_pt: non-device object"));
3239 }
3240
3241 /*
3242  *      Clear the wired attribute from the mappings for the specified range of
3243  *      addresses in the given pmap.  Every valid mapping within that range
3244  *      must have the wired attribute set.  In contrast, invalid mappings
3245  *      cannot have the wired attribute set, so they are ignored.
3246  *
3247  *      The wired attribute of the page table entry is not a hardware feature,
3248  *      so there is no need to invalidate any TLB entries.
3249  */
3250 void
3251 pmap_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
3252 {
3253         vm_offset_t va_next;
3254         pd_entry_t *l1, *l2, l2e;
3255         pt_entry_t *l3, l3e;
3256         bool pv_lists_locked;
3257
3258         pv_lists_locked = false;
3259 retry:
3260         PMAP_LOCK(pmap);
3261         for (; sva < eva; sva = va_next) {
3262                 l1 = pmap_l1(pmap, sva);
3263                 if (pmap_load(l1) == 0) {
3264                         va_next = (sva + L1_SIZE) & ~L1_OFFSET;
3265                         if (va_next < sva)
3266                                 va_next = eva;
3267                         continue;
3268                 }
3269
3270                 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
3271                 if (va_next < sva)
3272                         va_next = eva;
3273
3274                 l2 = pmap_l1_to_l2(l1, sva);
3275                 if ((l2e = pmap_load(l2)) == 0)
3276                         continue;
3277                 if ((l2e & PTE_RWX) != 0) {
3278                         if (sva + L2_SIZE == va_next && eva >= va_next) {
3279                                 if ((l2e & PTE_SW_WIRED) == 0)
3280                                         panic("pmap_unwire: l2 %#jx is missing "
3281                                             "PTE_SW_WIRED", (uintmax_t)l2e);
3282                                 pmap_clear_bits(l2, PTE_SW_WIRED);
3283                                 continue;
3284                         } else {
3285                                 if (!pv_lists_locked) {
3286                                         pv_lists_locked = true;
3287                                         if (!rw_try_rlock(&pvh_global_lock)) {
3288                                                 PMAP_UNLOCK(pmap);
3289                                                 rw_rlock(&pvh_global_lock);
3290                                                 /* Repeat sva. */
3291                                                 goto retry;
3292                                         }
3293                                 }
3294                                 if (!pmap_demote_l2(pmap, l2, sva))
3295                                         panic("pmap_unwire: demotion failed");
3296                         }
3297                 }
3298
3299                 if (va_next > eva)
3300                         va_next = eva;
3301                 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
3302                     sva += L3_SIZE) {
3303                         if ((l3e = pmap_load(l3)) == 0)
3304                                 continue;
3305                         if ((l3e & PTE_SW_WIRED) == 0)
3306                                 panic("pmap_unwire: l3 %#jx is missing "
3307                                     "PTE_SW_WIRED", (uintmax_t)l3e);
3308
3309                         /*
3310                          * PG_W must be cleared atomically.  Although the pmap
3311                          * lock synchronizes access to PG_W, another processor
3312                          * could be setting PG_M and/or PG_A concurrently.
3313                          */
3314                         pmap_clear_bits(l3, PTE_SW_WIRED);
3315                         pmap->pm_stats.wired_count--;
3316                 }
3317         }
3318         if (pv_lists_locked)
3319                 rw_runlock(&pvh_global_lock);
3320         PMAP_UNLOCK(pmap);
3321 }
3322
3323 /*
3324  *      Copy the range specified by src_addr/len
3325  *      from the source map to the range dst_addr/len
3326  *      in the destination map.
3327  *
3328  *      This routine is only advisory and need not do anything.
3329  */
3330
3331 void
3332 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
3333     vm_offset_t src_addr)
3334 {
3335
3336 }
3337
3338 /*
3339  *      pmap_zero_page zeros the specified hardware page by mapping
3340  *      the page into KVM and using bzero to clear its contents.
3341  */
3342 void
3343 pmap_zero_page(vm_page_t m)
3344 {
3345         vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
3346
3347         pagezero((void *)va);
3348 }
3349
3350 /*
3351  *      pmap_zero_page_area zeros the specified hardware page by mapping 
3352  *      the page into KVM and using bzero to clear its contents.
3353  *
3354  *      off and size may not cover an area beyond a single hardware page.
3355  */
3356 void
3357 pmap_zero_page_area(vm_page_t m, int off, int size)
3358 {
3359         vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
3360
3361         if (off == 0 && size == PAGE_SIZE)
3362                 pagezero((void *)va);
3363         else
3364                 bzero((char *)va + off, size);
3365 }
3366
3367 /*
3368  *      pmap_copy_page copies the specified (machine independent)
3369  *      page by mapping the page into virtual memory and using
3370  *      bcopy to copy the page, one machine dependent page at a
3371  *      time.
3372  */
3373 void
3374 pmap_copy_page(vm_page_t msrc, vm_page_t mdst)
3375 {
3376         vm_offset_t src = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(msrc));
3377         vm_offset_t dst = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mdst));
3378
3379         pagecopy((void *)src, (void *)dst);
3380 }
3381
3382 int unmapped_buf_allowed = 1;
3383
3384 void
3385 pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[],
3386     vm_offset_t b_offset, int xfersize)
3387 {
3388         void *a_cp, *b_cp;
3389         vm_page_t m_a, m_b;
3390         vm_paddr_t p_a, p_b;
3391         vm_offset_t a_pg_offset, b_pg_offset;
3392         int cnt;
3393
3394         while (xfersize > 0) {
3395                 a_pg_offset = a_offset & PAGE_MASK;
3396                 m_a = ma[a_offset >> PAGE_SHIFT];
3397                 p_a = m_a->phys_addr;
3398                 b_pg_offset = b_offset & PAGE_MASK;
3399                 m_b = mb[b_offset >> PAGE_SHIFT];
3400                 p_b = m_b->phys_addr;
3401                 cnt = min(xfersize, PAGE_SIZE - a_pg_offset);
3402                 cnt = min(cnt, PAGE_SIZE - b_pg_offset);
3403                 if (__predict_false(!PHYS_IN_DMAP(p_a))) {
3404                         panic("!DMAP a %lx", p_a);
3405                 } else {
3406                         a_cp = (char *)PHYS_TO_DMAP(p_a) + a_pg_offset;
3407                 }
3408                 if (__predict_false(!PHYS_IN_DMAP(p_b))) {
3409                         panic("!DMAP b %lx", p_b);
3410                 } else {
3411                         b_cp = (char *)PHYS_TO_DMAP(p_b) + b_pg_offset;
3412                 }
3413                 bcopy(a_cp, b_cp, cnt);
3414                 a_offset += cnt;
3415                 b_offset += cnt;
3416                 xfersize -= cnt;
3417         }
3418 }
3419
3420 vm_offset_t
3421 pmap_quick_enter_page(vm_page_t m)
3422 {
3423
3424         return (PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)));
3425 }
3426
3427 void
3428 pmap_quick_remove_page(vm_offset_t addr)
3429 {
3430 }
3431
3432 /*
3433  * Returns true if the pmap's pv is one of the first
3434  * 16 pvs linked to from this page.  This count may
3435  * be changed upwards or downwards in the future; it
3436  * is only necessary that true be returned for a small
3437  * subset of pmaps for proper page aging.
3438  */
3439 boolean_t
3440 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
3441 {
3442         struct md_page *pvh;
3443         struct rwlock *lock;
3444         pv_entry_t pv;
3445         int loops = 0;
3446         boolean_t rv;
3447
3448         KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3449             ("pmap_page_exists_quick: page %p is not managed", m));
3450         rv = FALSE;
3451         rw_rlock(&pvh_global_lock);
3452         lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3453         rw_rlock(lock);
3454         TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3455                 if (PV_PMAP(pv) == pmap) {
3456                         rv = TRUE;
3457                         break;
3458                 }
3459                 loops++;
3460                 if (loops >= 16)
3461                         break;
3462         }
3463         if (!rv && loops < 16 && (m->flags & PG_FICTITIOUS) == 0) {
3464                 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3465                 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3466                         if (PV_PMAP(pv) == pmap) {
3467                                 rv = TRUE;
3468                                 break;
3469                         }
3470                         loops++;
3471                         if (loops >= 16)
3472                                 break;
3473                 }
3474         }
3475         rw_runlock(lock);
3476         rw_runlock(&pvh_global_lock);
3477         return (rv);
3478 }
3479
3480 /*
3481  *      pmap_page_wired_mappings:
3482  *
3483  *      Return the number of managed mappings to the given physical page
3484  *      that are wired.
3485  */
3486 int
3487 pmap_page_wired_mappings(vm_page_t m)
3488 {
3489         struct md_page *pvh;
3490         struct rwlock *lock;
3491         pmap_t pmap;
3492         pd_entry_t *l2;
3493         pt_entry_t *l3;
3494         pv_entry_t pv;
3495         int count, md_gen, pvh_gen;
3496
3497         if ((m->oflags & VPO_UNMANAGED) != 0)
3498                 return (0);
3499         rw_rlock(&pvh_global_lock);
3500         lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3501         rw_rlock(lock);
3502 restart:
3503         count = 0;
3504         TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3505                 pmap = PV_PMAP(pv);
3506                 if (!PMAP_TRYLOCK(pmap)) {
3507                         md_gen = m->md.pv_gen;
3508                         rw_runlock(lock);
3509                         PMAP_LOCK(pmap);
3510                         rw_rlock(lock);
3511                         if (md_gen != m->md.pv_gen) {
3512                                 PMAP_UNLOCK(pmap);
3513                                 goto restart;
3514                         }
3515                 }
3516                 l3 = pmap_l3(pmap, pv->pv_va);
3517                 if ((pmap_load(l3) & PTE_SW_WIRED) != 0)
3518                         count++;
3519                 PMAP_UNLOCK(pmap);
3520         }
3521         if ((m->flags & PG_FICTITIOUS) == 0) {
3522                 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3523                 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3524                         pmap = PV_PMAP(pv);
3525                         if (!PMAP_TRYLOCK(pmap)) {
3526                                 md_gen = m->md.pv_gen;
3527                                 pvh_gen = pvh->pv_gen;
3528                                 rw_runlock(lock);
3529                                 PMAP_LOCK(pmap);
3530                                 rw_rlock(lock);
3531                                 if (md_gen != m->md.pv_gen ||
3532                                     pvh_gen != pvh->pv_gen) {
3533                                         PMAP_UNLOCK(pmap);
3534                                         goto restart;
3535                                 }
3536                         }
3537                         l2 = pmap_l2(pmap, pv->pv_va);
3538                         if ((pmap_load(l2) & PTE_SW_WIRED) != 0)
3539                                 count++;
3540                         PMAP_UNLOCK(pmap);
3541                 }
3542         }
3543         rw_runlock(lock);
3544         rw_runlock(&pvh_global_lock);
3545         return (count);
3546 }
3547
3548 /*
3549  * Returns true if the given page is mapped individually or as part of
3550  * a 2mpage.  Otherwise, returns false.
3551  */
3552 bool
3553 pmap_page_is_mapped(vm_page_t m)
3554 {
3555         struct rwlock *lock;
3556         bool rv;
3557
3558         if ((m->oflags & VPO_UNMANAGED) != 0)
3559                 return (false);
3560         lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3561         rw_rlock(lock);
3562         rv = !TAILQ_EMPTY(&m->md.pv_list) ||
3563             ((m->flags & PG_FICTITIOUS) == 0 &&
3564             !TAILQ_EMPTY(&pa_to_pvh(VM_PAGE_TO_PHYS(m))->pv_list));
3565         rw_runlock(lock);
3566         return (rv);
3567 }
3568
3569 static void
3570 pmap_remove_pages_pv(pmap_t pmap, vm_page_t m, pv_entry_t pv,
3571     struct spglist *free, bool superpage)
3572 {
3573         struct md_page *pvh;
3574         vm_page_t mpte, mt;
3575
3576         if (superpage) {
3577                 pmap_resident_count_dec(pmap, Ln_ENTRIES);
3578                 pvh = pa_to_pvh(m->phys_addr);
3579                 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
3580                 pvh->pv_gen++;
3581                 if (TAILQ_EMPTY(&pvh->pv_list)) {
3582                         for (mt = m; mt < &m[Ln_ENTRIES]; mt++)
3583                                 if (TAILQ_EMPTY(&mt->md.pv_list) &&
3584                                     (mt->aflags & PGA_WRITEABLE) != 0)
3585                                         vm_page_aflag_clear(mt, PGA_WRITEABLE);
3586                 }
3587                 mpte = pmap_remove_pt_page(pmap, pv->pv_va);
3588                 if (mpte != NULL) {
3589                         KASSERT(ml3->valid == VM_PAGE_BITS_ALL,
3590                             ("pmap_remove_pages: l3 page not promoted"));
3591                         pmap_resident_count_dec(pmap, 1);
3592                         KASSERT(mpte->wire_count == Ln_ENTRIES,
3593                             ("pmap_remove_pages: pte page wire count error"));
3594                         mpte->wire_count = 0;
3595                         pmap_add_delayed_free_list(mpte, free, FALSE);
3596                 }
3597         } else {
3598                 pmap_resident_count_dec(pmap, 1);
3599                 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
3600                 m->md.pv_gen++;
3601                 if (TAILQ_EMPTY(&m->md.pv_list) &&
3602                     (m->aflags & PGA_WRITEABLE) != 0) {
3603                         pvh = pa_to_pvh(m->phys_addr);
3604                         if (TAILQ_EMPTY(&pvh->pv_list))
3605                                 vm_page_aflag_clear(m, PGA_WRITEABLE);
3606                 }
3607         }
3608 }
3609
3610 /*
3611  * Destroy all managed, non-wired mappings in the given user-space
3612  * pmap.  This pmap cannot be active on any processor besides the
3613  * caller.
3614  *
3615  * This function cannot be applied to the kernel pmap.  Moreover, it
3616  * is not intended for general use.  It is only to be used during
3617  * process termination.  Consequently, it can be implemented in ways
3618  * that make it faster than pmap_remove().  First, it can more quickly
3619  * destroy mappings by iterating over the pmap's collection of PV
3620  * entries, rather than searching the page table.  Second, it doesn't
3621  * have to test and clear the page table entries atomically, because
3622  * no processor is currently accessing the user address space.  In
3623  * particular, a page table entry's dirty bit won't change state once
3624  * this function starts.
3625  */
3626 void
3627 pmap_remove_pages(pmap_t pmap)
3628 {
3629         struct spglist free;
3630         pd_entry_t ptepde;
3631         pt_entry_t *pte, tpte;
3632         vm_page_t m, mt;
3633         pv_entry_t pv;
3634         struct pv_chunk *pc, *npc;
3635         struct rwlock *lock;
3636         int64_t bit;
3637         uint64_t inuse, bitmask;
3638         int allfree, field, freed, idx;
3639         bool superpage;
3640
3641         lock = NULL;
3642
3643         SLIST_INIT(&free);
3644         rw_rlock(&pvh_global_lock);
3645         PMAP_LOCK(pmap);
3646         TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
3647                 allfree = 1;
3648                 freed = 0;
3649                 for (field = 0; field < _NPCM; field++) {
3650                         inuse = ~pc->pc_map[field] & pc_freemask[field];
3651                         while (inuse != 0) {
3652                                 bit = ffsl(inuse) - 1;
3653                                 bitmask = 1UL << bit;
3654                                 idx = field * 64 + bit;
3655                                 pv = &pc->pc_pventry[idx];
3656                                 inuse &= ~bitmask;
3657
3658                                 pte = pmap_l1(pmap, pv->pv_va);
3659                                 ptepde = pmap_load(pte);
3660                                 pte = pmap_l1_to_l2(pte, pv->pv_va);
3661                                 tpte = pmap_load(pte);
3662                                 if ((tpte & PTE_RWX) != 0) {
3663                                         superpage = true;
3664                                 } else {
3665                                         ptepde = tpte;
3666                                         pte = pmap_l2_to_l3(pte, pv->pv_va);
3667                                         tpte = pmap_load(pte);
3668                                         superpage = false;
3669                                 }
3670
3671                                 /*
3672                                  * We cannot remove wired pages from a
3673                                  * process' mapping at this time.
3674                                  */
3675                                 if (tpte & PTE_SW_WIRED) {
3676                                         allfree = 0;
3677                                         continue;
3678                                 }
3679
3680                                 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(tpte));
3681                                 KASSERT((m->flags & PG_FICTITIOUS) != 0 ||
3682                                     m < &vm_page_array[vm_page_array_size],
3683                                     ("pmap_remove_pages: bad pte %#jx",
3684                                     (uintmax_t)tpte));
3685
3686                                 pmap_clear(pte);
3687
3688                                 /*
3689                                  * Update the vm_page_t clean/reference bits.
3690                                  */
3691                                 if ((tpte & (PTE_D | PTE_W)) ==
3692                                     (PTE_D | PTE_W)) {
3693                                         if (superpage)
3694                                                 for (mt = m;
3695                                                     mt < &m[Ln_ENTRIES]; mt++)
3696                                                         vm_page_dirty(mt);
3697                                         else
3698                                                 vm_page_dirty(m);
3699                                 }
3700
3701                                 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(&lock, m);
3702
3703                                 /* Mark free */
3704                                 pc->pc_map[field] |= bitmask;
3705
3706                                 pmap_remove_pages_pv(pmap, m, pv, &free,
3707                                     superpage);
3708                                 pmap_unuse_pt(pmap, pv->pv_va, ptepde, &free);
3709                                 freed++;
3710                         }
3711                 }
3712                 PV_STAT(atomic_add_long(&pv_entry_frees, freed));
3713                 PV_STAT(atomic_add_int(&pv_entry_spare, freed));
3714                 PV_STAT(atomic_subtract_long(&pv_entry_count, freed));
3715                 if (allfree) {
3716                         TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
3717                         free_pv_chunk(pc);
3718                 }
3719         }
3720         if (lock != NULL)
3721                 rw_wunlock(lock);
3722         pmap_invalidate_all(pmap);
3723         rw_runlock(&pvh_global_lock);
3724         PMAP_UNLOCK(pmap);
3725         vm_page_free_pages_toq(&free, false);
3726 }
3727
3728 static bool
3729 pmap_page_test_mappings(vm_page_t m, boolean_t accessed, boolean_t modified)
3730 {
3731         struct md_page *pvh;
3732         struct rwlock *lock;
3733         pd_entry_t *l2;
3734         pt_entry_t *l3, mask;
3735         pv_entry_t pv;
3736         pmap_t pmap;
3737         int md_gen, pvh_gen;
3738         bool rv;
3739
3740         mask = 0;
3741         if (modified)
3742                 mask |= PTE_D;
3743         if (accessed)
3744                 mask |= PTE_A;
3745
3746         rv = FALSE;
3747         rw_rlock(&pvh_global_lock);
3748         lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3749         rw_rlock(lock);
3750 restart:
3751         TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3752                 pmap = PV_PMAP(pv);
3753                 if (!PMAP_TRYLOCK(pmap)) {
3754                         md_gen = m->md.pv_gen;
3755                         rw_runlock(lock);
3756                         PMAP_LOCK(pmap);
3757                         rw_rlock(lock);
3758                         if (md_gen != m->md.pv_gen) {
3759                                 PMAP_UNLOCK(pmap);
3760                                 goto restart;
3761                         }
3762                 }
3763                 l3 = pmap_l3(pmap, pv->pv_va);
3764                 rv = (pmap_load(l3) & mask) == mask;
3765                 PMAP_UNLOCK(pmap);
3766                 if (rv)
3767                         goto out;
3768         }
3769         if ((m->flags & PG_FICTITIOUS) == 0) {
3770                 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3771                 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3772                         pmap = PV_PMAP(pv);
3773                         if (!PMAP_TRYLOCK(pmap)) {
3774                                 md_gen = m->md.pv_gen;
3775                                 pvh_gen = pvh->pv_gen;
3776                                 rw_runlock(lock);
3777                                 PMAP_LOCK(pmap);
3778                                 rw_rlock(lock);
3779                                 if (md_gen != m->md.pv_gen ||
3780                                     pvh_gen != pvh->pv_gen) {
3781                                         PMAP_UNLOCK(pmap);
3782                                         goto restart;
3783                                 }
3784                         }
3785                         l2 = pmap_l2(pmap, pv->pv_va);
3786                         rv = (pmap_load(l2) & mask) == mask;
3787                         PMAP_UNLOCK(pmap);
3788                         if (rv)
3789                                 goto out;
3790                 }
3791         }
3792 out:
3793         rw_runlock(lock);
3794         rw_runlock(&pvh_global_lock);
3795         return (rv);
3796 }
3797
3798 /*
3799  *      pmap_is_modified:
3800  *
3801  *      Return whether or not the specified physical page was modified
3802  *      in any physical maps.
3803  */
3804 boolean_t
3805 pmap_is_modified(vm_page_t m)
3806 {
3807
3808         KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3809             ("pmap_is_modified: page %p is not managed", m));
3810
3811         /*
3812          * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
3813          * concurrently set while the object is locked.  Thus, if PGA_WRITEABLE
3814          * is clear, no PTEs can have PG_M set.
3815          */
3816         VM_OBJECT_ASSERT_WLOCKED(m->object);
3817         if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
3818                 return (FALSE);
3819         return (pmap_page_test_mappings(m, FALSE, TRUE));
3820 }
3821
3822 /*
3823  *      pmap_is_prefaultable:
3824  *
3825  *      Return whether or not the specified virtual address is eligible
3826  *      for prefault.
3827  */
3828 boolean_t
3829 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
3830 {
3831         pt_entry_t *l3;
3832         boolean_t rv;
3833
3834         rv = FALSE;
3835         PMAP_LOCK(pmap);
3836         l3 = pmap_l3(pmap, addr);
3837         if (l3 != NULL && pmap_load(l3) != 0) {
3838                 rv = TRUE;
3839         }
3840         PMAP_UNLOCK(pmap);
3841         return (rv);
3842 }
3843
3844 /*
3845  *      pmap_is_referenced:
3846  *
3847  *      Return whether or not the specified physical page was referenced
3848  *      in any physical maps.
3849  */
3850 boolean_t
3851 pmap_is_referenced(vm_page_t m)
3852 {
3853
3854         KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3855             ("pmap_is_referenced: page %p is not managed", m));
3856         return (pmap_page_test_mappings(m, TRUE, FALSE));
3857 }
3858
3859 /*
3860  * Clear the write and modified bits in each of the given page's mappings.
3861  */
3862 void
3863 pmap_remove_write(vm_page_t m)
3864 {
3865         struct md_page *pvh;
3866         struct rwlock *lock;
3867         pmap_t pmap;
3868         pd_entry_t *l2;
3869         pt_entry_t *l3, oldl3, newl3;
3870         pv_entry_t next_pv, pv;
3871         vm_offset_t va;
3872         int md_gen, pvh_gen;
3873
3874         KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3875             ("pmap_remove_write: page %p is not managed", m));
3876
3877         /*
3878          * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
3879          * set by another thread while the object is locked.  Thus,
3880          * if PGA_WRITEABLE is clear, no page table entries need updating.
3881          */
3882         VM_OBJECT_ASSERT_WLOCKED(m->object);
3883         if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
3884                 return;
3885         lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3886         pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
3887             pa_to_pvh(VM_PAGE_TO_PHYS(m));
3888         rw_rlock(&pvh_global_lock);
3889 retry_pv_loop:
3890         rw_wlock(lock);
3891         TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_next, next_pv) {
3892                 pmap = PV_PMAP(pv);
3893                 if (!PMAP_TRYLOCK(pmap)) {
3894                         pvh_gen = pvh->pv_gen;
3895                         rw_wunlock(lock);
3896                         PMAP_LOCK(pmap);
3897                         rw_wlock(lock);
3898                         if (pvh_gen != pvh->pv_gen) {
3899                                 PMAP_UNLOCK(pmap);
3900                                 rw_wunlock(lock);
3901                                 goto retry_pv_loop;
3902                         }
3903                 }
3904                 va = pv->pv_va;
3905                 l2 = pmap_l2(pmap, va);
3906                 if ((pmap_load(l2) & PTE_W) != 0)
3907                         (void)pmap_demote_l2_locked(pmap, l2, va, &lock);
3908                 KASSERT(lock == VM_PAGE_TO_PV_LIST_LOCK(m),
3909                     ("inconsistent pv lock %p %p for page %p",
3910                     lock, VM_PAGE_TO_PV_LIST_LOCK(m), m));
3911                 PMAP_UNLOCK(pmap);
3912         }
3913         TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3914                 pmap = PV_PMAP(pv);
3915                 if (!PMAP_TRYLOCK(pmap)) {
3916                         pvh_gen = pvh->pv_gen;
3917                         md_gen = m->md.pv_gen;
3918                         rw_wunlock(lock);
3919                         PMAP_LOCK(pmap);
3920                         rw_wlock(lock);
3921                         if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
3922                                 PMAP_UNLOCK(pmap);
3923                                 rw_wunlock(lock);
3924                                 goto retry_pv_loop;
3925                         }
3926                 }
3927                 l3 = pmap_l3(pmap, pv->pv_va);
3928                 oldl3 = pmap_load(l3);
3929 retry:
3930                 if ((oldl3 & PTE_W) != 0) {
3931                         newl3 = oldl3 & ~(PTE_D | PTE_W);
3932                         if (!atomic_fcmpset_long(l3, &oldl3, newl3))
3933                                 goto retry;
3934                         if ((oldl3 & PTE_D) != 0)
3935                                 vm_page_dirty(m);
3936                         pmap_invalidate_page(pmap, pv->pv_va);
3937                 }
3938                 PMAP_UNLOCK(pmap);
3939         }
3940         rw_wunlock(lock);
3941         vm_page_aflag_clear(m, PGA_WRITEABLE);
3942         rw_runlock(&pvh_global_lock);
3943 }
3944
3945 /*
3946  *      pmap_ts_referenced:
3947  *
3948  *      Return a count of reference bits for a page, clearing those bits.
3949  *      It is not necessary for every reference bit to be cleared, but it
3950  *      is necessary that 0 only be returned when there are truly no
3951  *      reference bits set.
3952  *
3953  *      As an optimization, update the page's dirty field if a modified bit is
3954  *      found while counting reference bits.  This opportunistic update can be
3955  *      performed at low cost and can eliminate the need for some future calls
3956  *      to pmap_is_modified().  However, since this function stops after
3957  *      finding PMAP_TS_REFERENCED_MAX reference bits, it may not detect some
3958  *      dirty pages.  Those dirty pages will only be detected by a future call
3959  *      to pmap_is_modified().
3960  */
3961 int
3962 pmap_ts_referenced(vm_page_t m)
3963 {
3964         struct spglist free;
3965         struct md_page *pvh;
3966         struct rwlock *lock;
3967         pv_entry_t pv, pvf;
3968         pmap_t pmap;
3969         pd_entry_t *l2, l2e;
3970         pt_entry_t *l3, l3e;
3971         vm_paddr_t pa;
3972         vm_offset_t va;
3973         int cleared, md_gen, not_cleared, pvh_gen;
3974
3975         KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3976             ("pmap_ts_referenced: page %p is not managed", m));
3977         SLIST_INIT(&free);
3978         cleared = 0;
3979         pa = VM_PAGE_TO_PHYS(m);
3980         pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy : pa_to_pvh(pa);
3981
3982         lock = PHYS_TO_PV_LIST_LOCK(pa);
3983         rw_rlock(&pvh_global_lock);
3984         rw_wlock(lock);
3985 retry:
3986         not_cleared = 0;
3987         if ((pvf = TAILQ_FIRST(&pvh->pv_list)) == NULL)
3988                 goto small_mappings;
3989         pv = pvf;
3990         do {
3991                 pmap = PV_PMAP(pv);
3992                 if (!PMAP_TRYLOCK(pmap)) {
3993                         pvh_gen = pvh->pv_gen;
3994                         rw_wunlock(lock);
3995                         PMAP_LOCK(pmap);
3996                         rw_wlock(lock);
3997                         if (pvh_gen != pvh->pv_gen) {
3998                                 PMAP_UNLOCK(pmap);
3999                                 goto retry;
4000                         }
4001                 }
4002                 va = pv->pv_va;
4003                 l2 = pmap_l2(pmap, va);
4004                 l2e = pmap_load(l2);
4005                 if ((l2e & (PTE_W | PTE_D)) == (PTE_W | PTE_D)) {
4006                         /*
4007                          * Although l2e is mapping a 2MB page, because
4008                          * this function is called at a 4KB page granularity,
4009                          * we only update the 4KB page under test.
4010                          */
4011                         vm_page_dirty(m);
4012                 }
4013                 if ((l2e & PTE_A) != 0) {
4014                         /*
4015                          * Since this reference bit is shared by 512 4KB
4016                          * pages, it should not be cleared every time it is
4017                          * tested.  Apply a simple "hash" function on the
4018                          * physical page number, the virtual superpage number,
4019                          * and the pmap address to select one 4KB page out of
4020                          * the 512 on which testing the reference bit will
4021                          * result in clearing that reference bit.  This
4022                          * function is designed to avoid the selection of the
4023                          * same 4KB page for every 2MB page mapping.
4024                          *
4025                          * On demotion, a mapping that hasn't been referenced
4026                          * is simply destroyed.  To avoid the possibility of a
4027                          * subsequent page fault on a demoted wired mapping,
4028                          * always leave its reference bit set.  Moreover,
4029                          * since the superpage is wired, the current state of
4030                          * its reference bit won't affect page replacement.
4031                          */
4032                         if ((((pa >> PAGE_SHIFT) ^ (pv->pv_va >> L2_SHIFT) ^
4033                             (uintptr_t)pmap) & (Ln_ENTRIES - 1)) == 0 &&
4034                             (l2e & PTE_SW_WIRED) == 0) {
4035                                 pmap_clear_bits(l2, PTE_A);
4036                                 pmap_invalidate_page(pmap, va);
4037                                 cleared++;
4038                         } else
4039                                 not_cleared++;
4040                 }
4041                 PMAP_UNLOCK(pmap);
4042                 /* Rotate the PV list if it has more than one entry. */
4043                 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
4044                         TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
4045                         TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
4046                         pvh->pv_gen++;
4047                 }
4048                 if (cleared + not_cleared >= PMAP_TS_REFERENCED_MAX)
4049                         goto out;
4050         } while ((pv = TAILQ_FIRST(&pvh->pv_list)) != pvf);
4051 small_mappings:
4052         if ((pvf = TAILQ_FIRST(&m->md.pv_list)) == NULL)
4053                 goto out;
4054         pv = pvf;
4055         do {
4056                 pmap = PV_PMAP(pv);
4057                 if (!PMAP_TRYLOCK(pmap)) {
4058                         pvh_gen = pvh->pv_gen;
4059                         md_gen = m->md.pv_gen;
4060                         rw_wunlock(lock);
4061                         PMAP_LOCK(pmap);
4062                         rw_wlock(lock);
4063                         if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
4064                                 PMAP_UNLOCK(pmap);
4065                                 goto retry;
4066                         }
4067                 }
4068                 l2 = pmap_l2(pmap, pv->pv_va);
4069
4070                 KASSERT((pmap_load(l2) & PTE_RX) == 0,
4071                     ("pmap_ts_referenced: found an invalid l2 table"));
4072
4073                 l3 = pmap_l2_to_l3(l2, pv->pv_va);
4074                 l3e = pmap_load(l3);
4075                 if ((l3e & PTE_D) != 0)
4076                         vm_page_dirty(m);
4077                 if ((l3e & PTE_A) != 0) {
4078                         if ((l3e & PTE_SW_WIRED) == 0) {
4079                                 /*
4080                                  * Wired pages cannot be paged out so
4081                                  * doing accessed bit emulation for
4082                                  * them is wasted effort. We do the
4083                                  * hard work for unwired pages only.
4084                                  */
4085                                 pmap_clear_bits(l3, PTE_A);
4086                                 pmap_invalidate_page(pmap, pv->pv_va);
4087                                 cleared++;
4088                         } else
4089                                 not_cleared++;
4090                 }
4091                 PMAP_UNLOCK(pmap);
4092                 /* Rotate the PV list if it has more than one entry. */
4093                 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
4094                         TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
4095                         TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
4096                         m->md.pv_gen++;
4097                 }
4098         } while ((pv = TAILQ_FIRST(&m->md.pv_list)) != pvf && cleared +
4099             not_cleared < PMAP_TS_REFERENCED_MAX);
4100 out:
4101         rw_wunlock(lock);
4102         rw_runlock(&pvh_global_lock);
4103         vm_page_free_pages_toq(&free, false);
4104         return (cleared + not_cleared);
4105 }
4106
4107 /*
4108  *      Apply the given advice to the specified range of addresses within the
4109  *      given pmap.  Depending on the advice, clear the referenced and/or
4110  *      modified flags in each mapping and set the mapped page's dirty field.
4111  */
4112 void
4113 pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice)
4114 {
4115 }
4116
4117 /*
4118  *      Clear the modify bits on the specified physical page.
4119  */
4120 void
4121 pmap_clear_modify(vm_page_t m)
4122 {
4123         struct md_page *pvh;
4124         struct rwlock *lock;
4125         pmap_t pmap;
4126         pv_entry_t next_pv, pv;
4127         pd_entry_t *l2, oldl2;
4128         pt_entry_t *l3, oldl3;
4129         vm_offset_t va;
4130         int md_gen, pvh_gen;
4131
4132         KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4133             ("pmap_clear_modify: page %p is not managed", m));
4134         VM_OBJECT_ASSERT_WLOCKED(m->object);
4135         KASSERT(!vm_page_xbusied(m),
4136             ("pmap_clear_modify: page %p is exclusive busied", m));
4137
4138         /*
4139          * If the page is not PGA_WRITEABLE, then no PTEs can have PG_M set.
4140          * If the object containing the page is locked and the page is not
4141          * exclusive busied, then PGA_WRITEABLE cannot be concurrently set.
4142          */
4143         if ((m->aflags & PGA_WRITEABLE) == 0)
4144                 return;
4145         pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
4146             pa_to_pvh(VM_PAGE_TO_PHYS(m));
4147         lock = VM_PAGE_TO_PV_LIST_LOCK(m);
4148         rw_rlock(&pvh_global_lock);
4149         rw_wlock(lock);
4150 restart:
4151         TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_next, next_pv) {
4152                 pmap = PV_PMAP(pv);
4153                 if (!PMAP_TRYLOCK(pmap)) {
4154                         pvh_gen = pvh->pv_gen;
4155                         rw_wunlock(lock);
4156                         PMAP_LOCK(pmap);
4157                         rw_wlock(lock);
4158                         if (pvh_gen != pvh->pv_gen) {
4159                                 PMAP_UNLOCK(pmap);
4160                                 goto restart;
4161                         }
4162                 }
4163                 va = pv->pv_va;
4164                 l2 = pmap_l2(pmap, va);
4165                 oldl2 = pmap_load(l2);
4166                 if ((oldl2 & PTE_W) != 0) {
4167                         if (pmap_demote_l2_locked(pmap, l2, va, &lock)) {
4168                                 if ((oldl2 & PTE_SW_WIRED) == 0) {
4169                                         /*
4170                                          * Write protect the mapping to a
4171                                          * single page so that a subsequent
4172                                          * write access may repromote.
4173                                          */
4174                                         va += VM_PAGE_TO_PHYS(m) -
4175                                             PTE_TO_PHYS(oldl2);
4176                                         l3 = pmap_l2_to_l3(l2, va);
4177                                         oldl3 = pmap_load(l3);
4178                                         if ((oldl3 & PTE_V) != 0) {
4179                                                 while (!atomic_fcmpset_long(l3,
4180                                                     &oldl3, oldl3 & ~(PTE_D |
4181                                                     PTE_W)))
4182                                                         cpu_spinwait();
4183                                                 vm_page_dirty(m);
4184                                                 pmap_invalidate_page(pmap, va);
4185                                         }
4186                                 }
4187                         }
4188                 }
4189                 PMAP_UNLOCK(pmap);
4190         }
4191         TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
4192                 pmap = PV_PMAP(pv);
4193                 if (!PMAP_TRYLOCK(pmap)) {
4194                         md_gen = m->md.pv_gen;
4195                         pvh_gen = pvh->pv_gen;
4196                         rw_wunlock(lock);
4197                         PMAP_LOCK(pmap);
4198                         rw_wlock(lock);
4199                         if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
4200                                 PMAP_UNLOCK(pmap);
4201                                 goto restart;
4202                         }
4203                 }
4204                 l2 = pmap_l2(pmap, pv->pv_va);
4205                 KASSERT((pmap_load(l2) & PTE_RWX) == 0,
4206                     ("pmap_clear_modify: found a 2mpage in page %p's pv list",
4207                     m));
4208                 l3 = pmap_l2_to_l3(l2, pv->pv_va);
4209                 if ((pmap_load(l3) & (PTE_D | PTE_W)) == (PTE_D | PTE_W)) {
4210                         pmap_clear_bits(l3, PTE_D | PTE_W);
4211                         pmap_invalidate_page(pmap, pv->pv_va);
4212                 }
4213                 PMAP_UNLOCK(pmap);
4214         }
4215         rw_wunlock(lock);
4216         rw_runlock(&pvh_global_lock);
4217 }
4218
4219 void *
4220 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
4221 {
4222
4223         return ((void *)PHYS_TO_DMAP(pa));
4224 }
4225
4226 void
4227 pmap_unmapbios(vm_paddr_t pa, vm_size_t size)
4228 {
4229 }
4230
4231 /*
4232  * Sets the memory attribute for the specified page.
4233  */
4234 void
4235 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
4236 {
4237
4238         m->md.pv_memattr = ma;
4239 }
4240
4241 /*
4242  * perform the pmap work for mincore
4243  */
4244 int
4245 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa)
4246 {
4247         pt_entry_t *l2, *l3, tpte;
4248         vm_paddr_t pa;
4249         int val;
4250         bool managed;
4251
4252         PMAP_LOCK(pmap);
4253 retry:
4254         managed = false;
4255         val = 0;
4256
4257         l2 = pmap_l2(pmap, addr);
4258         if (l2 != NULL && ((tpte = pmap_load(l2)) & PTE_V) != 0) {
4259                 if ((tpte & PTE_RWX) != 0) {
4260                         pa = PTE_TO_PHYS(tpte) | (addr & L2_OFFSET);
4261                         val = MINCORE_INCORE | MINCORE_SUPER;
4262                 } else {
4263                         l3 = pmap_l2_to_l3(l2, addr);
4264                         tpte = pmap_load(l3);
4265                         if ((tpte & PTE_V) == 0)
4266                                 goto done;
4267                         pa = PTE_TO_PHYS(tpte) | (addr & L3_OFFSET);
4268                         val = MINCORE_INCORE;
4269                 }
4270
4271                 if ((tpte & PTE_D) != 0)
4272                         val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
4273                 if ((tpte & PTE_A) != 0)
4274                         val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
4275                 managed = (tpte & PTE_SW_MANAGED) == PTE_SW_MANAGED;
4276         }
4277
4278 done:
4279         if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
4280             (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) && managed) {
4281                 /* Ensure that "PHYS_TO_VM_PAGE(pa)->object" doesn't change. */
4282                 if (vm_page_pa_tryrelock(pmap, pa, locked_pa))
4283                         goto retry;
4284         } else
4285                 PA_UNLOCK_COND(*locked_pa);
4286         PMAP_UNLOCK(pmap);
4287         return (val);
4288 }
4289
4290 void
4291 pmap_activate_sw(struct thread *td)
4292 {
4293         pmap_t oldpmap, pmap;
4294         u_int hart;
4295
4296         oldpmap = PCPU_GET(curpmap);
4297         pmap = vmspace_pmap(td->td_proc->p_vmspace);
4298         if (pmap == oldpmap)
4299                 return;
4300         load_satp(pmap->pm_satp);
4301
4302         hart = PCPU_GET(hart);
4303 #ifdef SMP
4304         CPU_SET_ATOMIC(hart, &pmap->pm_active);
4305         CPU_CLR_ATOMIC(hart, &oldpmap->pm_active);
4306 #else
4307         CPU_SET(hart, &pmap->pm_active);
4308         CPU_CLR(hart, &oldpmap->pm_active);
4309 #endif
4310         PCPU_SET(curpmap, pmap);
4311
4312         sfence_vma();
4313 }
4314
4315 void
4316 pmap_activate(struct thread *td)
4317 {
4318
4319         critical_enter();
4320         pmap_activate_sw(td);
4321         critical_exit();
4322 }
4323
4324 void
4325 pmap_activate_boot(pmap_t pmap)
4326 {
4327         u_int hart;
4328
4329         hart = PCPU_GET(hart);
4330 #ifdef SMP
4331         CPU_SET_ATOMIC(hart, &pmap->pm_active);
4332 #else
4333         CPU_SET(hart, &pmap->pm_active);
4334 #endif
4335         PCPU_SET(curpmap, pmap);
4336 }
4337
4338 void
4339 pmap_sync_icache(pmap_t pmap, vm_offset_t va, vm_size_t sz)
4340 {
4341         cpuset_t mask;
4342
4343         /*
4344          * From the RISC-V User-Level ISA V2.2:
4345          *
4346          * "To make a store to instruction memory visible to all
4347          * RISC-V harts, the writing hart has to execute a data FENCE
4348          * before requesting that all remote RISC-V harts execute a
4349          * FENCE.I."
4350          */
4351         sched_pin();
4352         mask = all_harts;
4353         CPU_CLR(PCPU_GET(hart), &mask);
4354         fence();
4355         if (!CPU_EMPTY(&mask) && smp_started)
4356                 sbi_remote_fence_i(mask.__bits);
4357         sched_unpin();
4358 }
4359
4360 /*
4361  *      Increase the starting virtual address of the given mapping if a
4362  *      different alignment might result in more superpage mappings.
4363  */
4364 void
4365 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
4366     vm_offset_t *addr, vm_size_t size)
4367 {
4368         vm_offset_t superpage_offset;
4369
4370         if (size < L2_SIZE)
4371                 return;
4372         if (object != NULL && (object->flags & OBJ_COLORED) != 0)
4373                 offset += ptoa(object->pg_color);
4374         superpage_offset = offset & L2_OFFSET;
4375         if (size - ((L2_SIZE - superpage_offset) & L2_OFFSET) < L2_SIZE ||
4376             (*addr & L2_OFFSET) == superpage_offset)
4377                 return;
4378         if ((*addr & L2_OFFSET) < superpage_offset)
4379                 *addr = (*addr & ~L2_OFFSET) + superpage_offset;
4380         else
4381                 *addr = ((*addr + L2_OFFSET) & ~L2_OFFSET) + superpage_offset;
4382 }
4383
4384 /**
4385  * Get the kernel virtual address of a set of physical pages. If there are
4386  * physical addresses not covered by the DMAP perform a transient mapping
4387  * that will be removed when calling pmap_unmap_io_transient.
4388  *
4389  * \param page        The pages the caller wishes to obtain the virtual
4390  *                    address on the kernel memory map.
4391  * \param vaddr       On return contains the kernel virtual memory address
4392  *                    of the pages passed in the page parameter.
4393  * \param count       Number of pages passed in.
4394  * \param can_fault   TRUE if the thread using the mapped pages can take
4395  *                    page faults, FALSE otherwise.
4396  *
4397  * \returns TRUE if the caller must call pmap_unmap_io_transient when
4398  *          finished or FALSE otherwise.
4399  *
4400  */
4401 boolean_t
4402 pmap_map_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
4403     boolean_t can_fault)
4404 {
4405         vm_paddr_t paddr;
4406         boolean_t needs_mapping;
4407         int error, i;
4408
4409         /*
4410          * Allocate any KVA space that we need, this is done in a separate
4411          * loop to prevent calling vmem_alloc while pinned.
4412          */
4413         needs_mapping = FALSE;
4414         for (i = 0; i < count; i++) {
4415                 paddr = VM_PAGE_TO_PHYS(page[i]);
4416                 if (__predict_false(paddr >= DMAP_MAX_PHYSADDR)) {
4417                         error = vmem_alloc(kernel_arena, PAGE_SIZE,
4418                             M_BESTFIT | M_WAITOK, &vaddr[i]);
4419                         KASSERT(error == 0, ("vmem_alloc failed: %d", error));
4420                         needs_mapping = TRUE;
4421                 } else {
4422                         vaddr[i] = PHYS_TO_DMAP(paddr);
4423                 }
4424         }
4425
4426         /* Exit early if everything is covered by the DMAP */
4427         if (!needs_mapping)
4428                 return (FALSE);
4429
4430         if (!can_fault)
4431                 sched_pin();
4432         for (i = 0; i < count; i++) {
4433                 paddr = VM_PAGE_TO_PHYS(page[i]);
4434                 if (paddr >= DMAP_MAX_PHYSADDR) {
4435                         panic(
4436                            "pmap_map_io_transient: TODO: Map out of DMAP data");
4437                 }
4438         }
4439
4440         return (needs_mapping);
4441 }
4442
4443 void
4444 pmap_unmap_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
4445     boolean_t can_fault)
4446 {
4447         vm_paddr_t paddr;
4448         int i;
4449
4450         if (!can_fault)
4451                 sched_unpin();
4452         for (i = 0; i < count; i++) {
4453                 paddr = VM_PAGE_TO_PHYS(page[i]);
4454                 if (paddr >= DMAP_MAX_PHYSADDR) {
4455                         panic("RISCVTODO: pmap_unmap_io_transient: Unmap data");
4456                 }
4457         }
4458 }
4459
4460 boolean_t
4461 pmap_is_valid_memattr(pmap_t pmap __unused, vm_memattr_t mode)
4462 {
4463
4464         return (mode >= VM_MEMATTR_DEVICE && mode <= VM_MEMATTR_WRITE_BACK);
4465 }
4466
4467 bool
4468 pmap_get_tables(pmap_t pmap, vm_offset_t va, pd_entry_t **l1, pd_entry_t **l2,
4469     pt_entry_t **l3)
4470 {
4471         pd_entry_t *l1p, *l2p;
4472
4473         /* Get l1 directory entry. */
4474         l1p = pmap_l1(pmap, va);
4475         *l1 = l1p;
4476
4477         if (l1p == NULL || (pmap_load(l1p) & PTE_V) == 0)
4478                 return (false);
4479
4480         if ((pmap_load(l1p) & PTE_RX) != 0) {
4481                 *l2 = NULL;
4482                 *l3 = NULL;
4483                 return (true);
4484         }
4485
4486         /* Get l2 directory entry. */
4487         l2p = pmap_l1_to_l2(l1p, va);
4488         *l2 = l2p;
4489
4490         if (l2p == NULL || (pmap_load(l2p) & PTE_V) == 0)
4491                 return (false);
4492
4493         if ((pmap_load(l2p) & PTE_RX) != 0) {
4494                 *l3 = NULL;
4495                 return (true);
4496         }
4497
4498         /* Get l3 page table entry. */
4499         *l3 = pmap_l2_to_l3(l2p, va);
4500
4501         return (true);
4502 }