2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (c) 1991 Regents of the University of California.
6 * Copyright (c) 1994 John S. Dyson
8 * Copyright (c) 1994 David Greenman
10 * Copyright (c) 2003 Peter Wemm
11 * All rights reserved.
12 * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
13 * All rights reserved.
14 * Copyright (c) 2014 Andrew Turner
15 * All rights reserved.
16 * Copyright (c) 2014 The FreeBSD Foundation
17 * All rights reserved.
18 * Copyright (c) 2015-2018 Ruslan Bukin <br@bsdpad.com>
19 * All rights reserved.
21 * This code is derived from software contributed to Berkeley by
22 * the Systems Programming Group of the University of Utah Computer
23 * Science Department and William Jolitz of UUNET Technologies Inc.
25 * Portions of this software were developed by Andrew Turner under
26 * sponsorship from The FreeBSD Foundation.
28 * Portions of this software were developed by SRI International and the
29 * University of Cambridge Computer Laboratory under DARPA/AFRL contract
30 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
32 * Portions of this software were developed by the University of Cambridge
33 * Computer Laboratory as part of the CTSRD Project, with support from the
34 * UK Higher Education Innovation Fund (HEIF).
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
44 * 3. All advertising materials mentioning features or use of this software
45 * must display the following acknowledgement:
46 * This product includes software developed by the University of
47 * California, Berkeley and its contributors.
48 * 4. Neither the name of the University nor the names of its contributors
49 * may be used to endorse or promote products derived from this software
50 * without specific prior written permission.
52 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
64 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
67 * Copyright (c) 2003 Networks Associates Technology, Inc.
68 * All rights reserved.
70 * This software was developed for the FreeBSD Project by Jake Burkholder,
71 * Safeport Network Services, and Network Associates Laboratories, the
72 * Security Research Division of Network Associates, Inc. under
73 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
74 * CHATS research program.
76 * Redistribution and use in source and binary forms, with or without
77 * modification, are permitted provided that the following conditions
79 * 1. Redistributions of source code must retain the above copyright
80 * notice, this list of conditions and the following disclaimer.
81 * 2. Redistributions in binary form must reproduce the above copyright
82 * notice, this list of conditions and the following disclaimer in the
83 * documentation and/or other materials provided with the distribution.
85 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
86 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
88 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
89 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
90 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
91 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
92 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
93 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
94 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
98 #include <sys/cdefs.h>
99 __FBSDID("$FreeBSD$");
102 * Manages physical address maps.
104 * Since the information managed by this module is
105 * also stored by the logical address mapping module,
106 * this module may throw away valid virtual-to-physical
107 * mappings at almost any time. However, invalidations
108 * of virtual-to-physical mappings must be done as
111 * In order to cope with hardware architectures which
112 * make virtual-to-physical map invalidates expensive,
113 * this module may delay invalidate or reduced protection
114 * operations until such time as they are actually
115 * necessary. This module is given full information as
116 * to which processors are currently using which maps,
117 * and to when physical maps must be made correct.
120 #include <sys/param.h>
121 #include <sys/systm.h>
122 #include <sys/bitstring.h>
124 #include <sys/cpuset.h>
125 #include <sys/kernel.h>
127 #include <sys/lock.h>
128 #include <sys/malloc.h>
129 #include <sys/mman.h>
130 #include <sys/msgbuf.h>
131 #include <sys/mutex.h>
132 #include <sys/physmem.h>
133 #include <sys/proc.h>
134 #include <sys/rwlock.h>
135 #include <sys/sbuf.h>
137 #include <sys/vmem.h>
138 #include <sys/vmmeter.h>
139 #include <sys/sched.h>
140 #include <sys/sysctl.h>
144 #include <vm/vm_param.h>
145 #include <vm/vm_kern.h>
146 #include <vm/vm_page.h>
147 #include <vm/vm_map.h>
148 #include <vm/vm_object.h>
149 #include <vm/vm_extern.h>
150 #include <vm/vm_pageout.h>
151 #include <vm/vm_pager.h>
152 #include <vm/vm_phys.h>
153 #include <vm/vm_radix.h>
154 #include <vm/vm_reserv.h>
155 #include <vm/vm_dumpset.h>
158 #include <machine/machdep.h>
159 #include <machine/md_var.h>
160 #include <machine/pcb.h>
161 #include <machine/sbi.h>
163 #define NUL1E (Ln_ENTRIES * Ln_ENTRIES)
164 #define NUL2E (Ln_ENTRIES * NUL1E)
166 #if !defined(DIAGNOSTIC)
167 #ifdef __GNUC_GNU_INLINE__
168 #define PMAP_INLINE __attribute__((__gnu_inline__)) inline
170 #define PMAP_INLINE extern inline
177 #define PV_STAT(x) do { x ; } while (0)
179 #define PV_STAT(x) do { } while (0)
182 #define pmap_l2_pindex(v) ((v) >> L2_SHIFT)
183 #define pa_to_pvh(pa) (&pv_table[pa_index(pa)])
185 #define NPV_LIST_LOCKS MAXCPU
187 #define PHYS_TO_PV_LIST_LOCK(pa) \
188 (&pv_list_locks[pmap_l2_pindex(pa) % NPV_LIST_LOCKS])
190 #define CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa) do { \
191 struct rwlock **_lockp = (lockp); \
192 struct rwlock *_new_lock; \
194 _new_lock = PHYS_TO_PV_LIST_LOCK(pa); \
195 if (_new_lock != *_lockp) { \
196 if (*_lockp != NULL) \
197 rw_wunlock(*_lockp); \
198 *_lockp = _new_lock; \
203 #define CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m) \
204 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, VM_PAGE_TO_PHYS(m))
206 #define RELEASE_PV_LIST_LOCK(lockp) do { \
207 struct rwlock **_lockp = (lockp); \
209 if (*_lockp != NULL) { \
210 rw_wunlock(*_lockp); \
215 #define VM_PAGE_TO_PV_LIST_LOCK(m) \
216 PHYS_TO_PV_LIST_LOCK(VM_PAGE_TO_PHYS(m))
218 /* The list of all the user pmaps */
219 LIST_HEAD(pmaplist, pmap);
220 static struct pmaplist allpmaps = LIST_HEAD_INITIALIZER();
222 struct pmap kernel_pmap_store;
224 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
225 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
226 vm_offset_t kernel_vm_end = 0;
228 vm_paddr_t dmap_phys_base; /* The start of the dmap region */
229 vm_paddr_t dmap_phys_max; /* The limit of the dmap region */
230 vm_offset_t dmap_max_addr; /* The virtual address limit of the dmap */
232 /* This code assumes all L1 DMAP entries will be used */
233 CTASSERT((DMAP_MIN_ADDRESS & ~L1_OFFSET) == DMAP_MIN_ADDRESS);
234 CTASSERT((DMAP_MAX_ADDRESS & ~L1_OFFSET) == DMAP_MAX_ADDRESS);
236 static struct rwlock_padalign pvh_global_lock;
237 static struct mtx_padalign allpmaps_lock;
239 static SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
240 "VM/pmap parameters");
242 static int superpages_enabled = 1;
243 SYSCTL_INT(_vm_pmap, OID_AUTO, superpages_enabled,
244 CTLFLAG_RDTUN, &superpages_enabled, 0,
245 "Enable support for transparent superpages");
247 static SYSCTL_NODE(_vm_pmap, OID_AUTO, l2, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
248 "2MB page mapping counters");
250 static u_long pmap_l2_demotions;
251 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, demotions, CTLFLAG_RD,
252 &pmap_l2_demotions, 0,
253 "2MB page demotions");
255 static u_long pmap_l2_mappings;
256 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, mappings, CTLFLAG_RD,
257 &pmap_l2_mappings, 0,
258 "2MB page mappings");
260 static u_long pmap_l2_p_failures;
261 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, p_failures, CTLFLAG_RD,
262 &pmap_l2_p_failures, 0,
263 "2MB page promotion failures");
265 static u_long pmap_l2_promotions;
266 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, promotions, CTLFLAG_RD,
267 &pmap_l2_promotions, 0,
268 "2MB page promotions");
271 * Data for the pv entry allocation mechanism
273 static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
274 static struct mtx pv_chunks_mutex;
275 static struct rwlock pv_list_locks[NPV_LIST_LOCKS];
276 static struct md_page *pv_table;
277 static struct md_page pv_dummy;
279 extern cpuset_t all_harts;
282 * Internal flags for pmap_enter()'s helper functions.
284 #define PMAP_ENTER_NORECLAIM 0x1000000 /* Don't reclaim PV entries. */
285 #define PMAP_ENTER_NOREPLACE 0x2000000 /* Don't replace mappings. */
287 static void free_pv_chunk(struct pv_chunk *pc);
288 static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
289 static pv_entry_t get_pv_entry(pmap_t pmap, struct rwlock **lockp);
290 static vm_page_t reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp);
291 static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
292 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
294 static bool pmap_demote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va);
295 static bool pmap_demote_l2_locked(pmap_t pmap, pd_entry_t *l2,
296 vm_offset_t va, struct rwlock **lockp);
297 static int pmap_enter_l2(pmap_t pmap, vm_offset_t va, pd_entry_t new_l2,
298 u_int flags, vm_page_t m, struct rwlock **lockp);
299 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
300 vm_page_t m, vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp);
301 static int pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t sva,
302 pd_entry_t ptepde, struct spglist *free, struct rwlock **lockp);
303 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
304 vm_page_t m, struct rwlock **lockp);
306 static vm_page_t _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex,
307 struct rwlock **lockp);
309 static void _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m,
310 struct spglist *free);
311 static int pmap_unuse_pt(pmap_t, vm_offset_t, pd_entry_t, struct spglist *);
313 #define pmap_clear(pte) pmap_store(pte, 0)
314 #define pmap_clear_bits(pte, bits) atomic_clear_64(pte, bits)
315 #define pmap_load_store(pte, entry) atomic_swap_64(pte, entry)
316 #define pmap_load_clear(pte) pmap_load_store(pte, 0)
317 #define pmap_load(pte) atomic_load_64(pte)
318 #define pmap_store(pte, entry) atomic_store_64(pte, entry)
319 #define pmap_store_bits(pte, bits) atomic_set_64(pte, bits)
321 /********************/
322 /* Inline functions */
323 /********************/
326 pagecopy(void *s, void *d)
329 memcpy(d, s, PAGE_SIZE);
339 #define pmap_l1_index(va) (((va) >> L1_SHIFT) & Ln_ADDR_MASK)
340 #define pmap_l2_index(va) (((va) >> L2_SHIFT) & Ln_ADDR_MASK)
341 #define pmap_l3_index(va) (((va) >> L3_SHIFT) & Ln_ADDR_MASK)
343 #define PTE_TO_PHYS(pte) \
344 ((((pte) & ~PTE_HI_MASK) >> PTE_PPN0_S) * PAGE_SIZE)
345 #define L2PTE_TO_PHYS(l2) \
346 ((((l2) & ~PTE_HI_MASK) >> PTE_PPN1_S) << L2_SHIFT)
348 static __inline pd_entry_t *
349 pmap_l1(pmap_t pmap, vm_offset_t va)
352 return (&pmap->pm_l1[pmap_l1_index(va)]);
355 static __inline pd_entry_t *
356 pmap_l1_to_l2(pd_entry_t *l1, vm_offset_t va)
361 phys = PTE_TO_PHYS(pmap_load(l1));
362 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
364 return (&l2[pmap_l2_index(va)]);
367 static __inline pd_entry_t *
368 pmap_l2(pmap_t pmap, vm_offset_t va)
372 l1 = pmap_l1(pmap, va);
373 if ((pmap_load(l1) & PTE_V) == 0)
375 if ((pmap_load(l1) & PTE_RX) != 0)
378 return (pmap_l1_to_l2(l1, va));
381 static __inline pt_entry_t *
382 pmap_l2_to_l3(pd_entry_t *l2, vm_offset_t va)
387 phys = PTE_TO_PHYS(pmap_load(l2));
388 l3 = (pd_entry_t *)PHYS_TO_DMAP(phys);
390 return (&l3[pmap_l3_index(va)]);
393 static __inline pt_entry_t *
394 pmap_l3(pmap_t pmap, vm_offset_t va)
398 l2 = pmap_l2(pmap, va);
401 if ((pmap_load(l2) & PTE_V) == 0)
403 if ((pmap_load(l2) & PTE_RX) != 0)
406 return (pmap_l2_to_l3(l2, va));
410 pmap_resident_count_inc(pmap_t pmap, int count)
413 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
414 pmap->pm_stats.resident_count += count;
418 pmap_resident_count_dec(pmap_t pmap, int count)
421 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
422 KASSERT(pmap->pm_stats.resident_count >= count,
423 ("pmap %p resident count underflow %ld %d", pmap,
424 pmap->pm_stats.resident_count, count));
425 pmap->pm_stats.resident_count -= count;
429 pmap_distribute_l1(struct pmap *pmap, vm_pindex_t l1index,
432 struct pmap *user_pmap;
435 /* Distribute new kernel L1 entry to all the user pmaps */
436 if (pmap != kernel_pmap)
439 mtx_lock(&allpmaps_lock);
440 LIST_FOREACH(user_pmap, &allpmaps, pm_list) {
441 l1 = &user_pmap->pm_l1[l1index];
442 pmap_store(l1, entry);
444 mtx_unlock(&allpmaps_lock);
448 pmap_early_page_idx(vm_offset_t l1pt, vm_offset_t va, u_int *l1_slot,
454 l1 = (pd_entry_t *)l1pt;
455 *l1_slot = (va >> L1_SHIFT) & Ln_ADDR_MASK;
457 /* Check locore has used a table L1 map */
458 KASSERT((l1[*l1_slot] & PTE_RX) == 0,
459 ("Invalid bootstrap L1 table"));
461 /* Find the address of the L2 table */
462 l2 = (pt_entry_t *)init_pt_va;
463 *l2_slot = pmap_l2_index(va);
469 pmap_early_vtophys(vm_offset_t l1pt, vm_offset_t va)
471 u_int l1_slot, l2_slot;
475 l2 = pmap_early_page_idx(l1pt, va, &l1_slot, &l2_slot);
477 /* Check locore has used L2 superpages */
478 KASSERT((l2[l2_slot] & PTE_RX) != 0,
479 ("Invalid bootstrap L2 table"));
481 /* L2 is superpages */
482 ret = L2PTE_TO_PHYS(l2[l2_slot]);
483 ret += (va & L2_OFFSET);
489 pmap_bootstrap_dmap(vm_offset_t kern_l1, vm_paddr_t min_pa, vm_paddr_t max_pa)
498 pa = dmap_phys_base = min_pa & ~L1_OFFSET;
499 va = DMAP_MIN_ADDRESS;
500 l1 = (pd_entry_t *)kern_l1;
501 l1_slot = pmap_l1_index(DMAP_MIN_ADDRESS);
503 for (; va < DMAP_MAX_ADDRESS && pa < max_pa;
504 pa += L1_SIZE, va += L1_SIZE, l1_slot++) {
505 KASSERT(l1_slot < Ln_ENTRIES, ("Invalid L1 index"));
508 pn = (pa / PAGE_SIZE);
510 entry |= (pn << PTE_PPN0_S);
511 pmap_store(&l1[l1_slot], entry);
514 /* Set the upper limit of the DMAP region */
522 pmap_bootstrap_l3(vm_offset_t l1pt, vm_offset_t va, vm_offset_t l3_start)
531 KASSERT((va & L2_OFFSET) == 0, ("Invalid virtual address"));
533 l2 = pmap_l2(kernel_pmap, va);
534 l2 = (pd_entry_t *)((uintptr_t)l2 & ~(PAGE_SIZE - 1));
535 l2_slot = pmap_l2_index(va);
538 for (; va < VM_MAX_KERNEL_ADDRESS; l2_slot++, va += L2_SIZE) {
539 KASSERT(l2_slot < Ln_ENTRIES, ("Invalid L2 index"));
541 pa = pmap_early_vtophys(l1pt, l3pt);
542 pn = (pa / PAGE_SIZE);
544 entry |= (pn << PTE_PPN0_S);
545 pmap_store(&l2[l2_slot], entry);
549 /* Clean the L2 page table */
550 memset((void *)l3_start, 0, l3pt - l3_start);
556 * Bootstrap the system enough to run with virtual memory.
559 pmap_bootstrap(vm_offset_t l1pt, vm_paddr_t kernstart, vm_size_t kernlen)
561 u_int l1_slot, l2_slot;
562 vm_offset_t freemempos;
563 vm_offset_t dpcpu, msgbufpv;
564 vm_paddr_t max_pa, min_pa, pa;
568 printf("pmap_bootstrap %lx %lx %lx\n", l1pt, kernstart, kernlen);
570 /* Set this early so we can use the pagetable walking functions */
571 kernel_pmap_store.pm_l1 = (pd_entry_t *)l1pt;
572 PMAP_LOCK_INIT(kernel_pmap);
574 rw_init(&pvh_global_lock, "pmap pv global");
576 CPU_FILL(&kernel_pmap->pm_active);
578 /* Assume the address we were loaded to is a valid physical address. */
579 min_pa = max_pa = kernstart;
581 physmap_idx = physmem_avail(physmap, nitems(physmap));
585 * Find the minimum physical address. physmap is sorted,
586 * but may contain empty ranges.
588 for (i = 0; i < physmap_idx * 2; i += 2) {
589 if (physmap[i] == physmap[i + 1])
591 if (physmap[i] <= min_pa)
593 if (physmap[i + 1] > max_pa)
594 max_pa = physmap[i + 1];
596 printf("physmap_idx %u\n", physmap_idx);
597 printf("min_pa %lx\n", min_pa);
598 printf("max_pa %lx\n", max_pa);
600 /* Create a direct map region early so we can use it for pa -> va */
601 pmap_bootstrap_dmap(l1pt, min_pa, max_pa);
604 * Read the page table to find out what is already mapped.
605 * This assumes we have mapped a block of memory from KERNBASE
606 * using a single L1 entry.
608 (void)pmap_early_page_idx(l1pt, KERNBASE, &l1_slot, &l2_slot);
610 /* Sanity check the index, KERNBASE should be the first VA */
611 KASSERT(l2_slot == 0, ("The L2 index is non-zero"));
613 freemempos = roundup2(KERNBASE + kernlen, PAGE_SIZE);
615 /* Create the l3 tables for the early devmap */
616 freemempos = pmap_bootstrap_l3(l1pt,
617 VM_MAX_KERNEL_ADDRESS - L2_SIZE, freemempos);
620 * Invalidate the mapping we created for the DTB. At this point a copy
621 * has been created, and we no longer need it. We want to avoid the
622 * possibility of an aliased mapping in the future.
624 l2p = pmap_l2(kernel_pmap, VM_EARLY_DTB_ADDRESS);
625 if ((pmap_load(l2p) & PTE_V) != 0)
630 #define alloc_pages(var, np) \
631 (var) = freemempos; \
632 freemempos += (np * PAGE_SIZE); \
633 memset((char *)(var), 0, ((np) * PAGE_SIZE));
635 /* Allocate dynamic per-cpu area. */
636 alloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
637 dpcpu_init((void *)dpcpu, 0);
639 /* Allocate memory for the msgbuf, e.g. for /sbin/dmesg */
640 alloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
641 msgbufp = (void *)msgbufpv;
643 virtual_avail = roundup2(freemempos, L2_SIZE);
644 virtual_end = VM_MAX_KERNEL_ADDRESS - L2_SIZE;
645 kernel_vm_end = virtual_avail;
647 pa = pmap_early_vtophys(l1pt, freemempos);
649 physmem_exclude_region(kernstart, pa - kernstart, EXFLAG_NOALLOC);
653 * Initialize a vm_page's machine-dependent fields.
656 pmap_page_init(vm_page_t m)
659 TAILQ_INIT(&m->md.pv_list);
660 m->md.pv_memattr = VM_MEMATTR_WRITE_BACK;
664 * Initialize the pmap module.
665 * Called by vm_init, to initialize any structures that the pmap
666 * system needs to map virtual memory.
675 * Initialize the pv chunk and pmap list mutexes.
677 mtx_init(&pv_chunks_mutex, "pmap pv chunk list", NULL, MTX_DEF);
678 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_DEF);
681 * Initialize the pool of pv list locks.
683 for (i = 0; i < NPV_LIST_LOCKS; i++)
684 rw_init(&pv_list_locks[i], "pmap pv list");
687 * Calculate the size of the pv head table for superpages.
689 pv_npg = howmany(vm_phys_segs[vm_phys_nsegs - 1].end, L2_SIZE);
692 * Allocate memory for the pv head table for superpages.
694 s = (vm_size_t)(pv_npg * sizeof(struct md_page));
696 pv_table = (struct md_page *)kmem_malloc(s, M_WAITOK | M_ZERO);
697 for (i = 0; i < pv_npg; i++)
698 TAILQ_INIT(&pv_table[i].pv_list);
699 TAILQ_INIT(&pv_dummy.pv_list);
701 if (superpages_enabled)
702 pagesizes[1] = L2_SIZE;
707 * For SMP, these functions have to use IPIs for coherence.
709 * In general, the calling thread uses a plain fence to order the
710 * writes to the page tables before invoking an SBI callback to invoke
711 * sfence_vma() on remote CPUs.
714 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
719 mask = pmap->pm_active;
720 CPU_CLR(PCPU_GET(hart), &mask);
722 if (!CPU_EMPTY(&mask) && smp_started)
723 sbi_remote_sfence_vma(mask.__bits, va, 1);
729 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
734 mask = pmap->pm_active;
735 CPU_CLR(PCPU_GET(hart), &mask);
737 if (!CPU_EMPTY(&mask) && smp_started)
738 sbi_remote_sfence_vma(mask.__bits, sva, eva - sva + 1);
741 * Might consider a loop of sfence_vma_page() for a small
742 * number of pages in the future.
749 pmap_invalidate_all(pmap_t pmap)
754 mask = pmap->pm_active;
755 CPU_CLR(PCPU_GET(hart), &mask);
758 * XXX: The SBI doc doesn't detail how to specify x0 as the
759 * address to perform a global fence. BBL currently treats
760 * all sfence_vma requests as global however.
763 if (!CPU_EMPTY(&mask) && smp_started)
764 sbi_remote_sfence_vma(mask.__bits, 0, 0);
770 * Normal, non-SMP, invalidation functions.
771 * We inline these within pmap.c for speed.
774 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
781 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
785 * Might consider a loop of sfence_vma_page() for a small
786 * number of pages in the future.
792 pmap_invalidate_all(pmap_t pmap)
800 * Routine: pmap_extract
802 * Extract the physical page address associated
803 * with the given map/virtual_address pair.
806 pmap_extract(pmap_t pmap, vm_offset_t va)
815 * Start with the l2 tabel. We are unable to allocate
816 * pages in the l1 table.
818 l2p = pmap_l2(pmap, va);
821 if ((l2 & PTE_RX) == 0) {
822 l3p = pmap_l2_to_l3(l2p, va);
825 pa = PTE_TO_PHYS(l3);
826 pa |= (va & L3_OFFSET);
829 /* L2 is superpages */
830 pa = L2PTE_TO_PHYS(l2);
831 pa |= (va & L2_OFFSET);
839 * Routine: pmap_extract_and_hold
841 * Atomically extract and hold the physical page
842 * with the given pmap and virtual address pair
843 * if that mapping permits the given protection.
846 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
854 l3p = pmap_l3(pmap, va);
855 if (l3p != NULL && (l3 = pmap_load(l3p)) != 0) {
856 if ((l3 & PTE_W) != 0 || (prot & VM_PROT_WRITE) == 0) {
857 phys = PTE_TO_PHYS(l3);
858 m = PHYS_TO_VM_PAGE(phys);
859 if (!vm_page_wire_mapped(m))
868 pmap_kextract(vm_offset_t va)
874 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
875 pa = DMAP_TO_PHYS(va);
877 l2 = pmap_l2(kernel_pmap, va);
879 panic("pmap_kextract: No l2");
880 if ((pmap_load(l2) & PTE_RX) != 0) {
882 pa = L2PTE_TO_PHYS(pmap_load(l2));
883 pa |= (va & L2_OFFSET);
887 l3 = pmap_l2_to_l3(l2, va);
889 panic("pmap_kextract: No l3...");
890 pa = PTE_TO_PHYS(pmap_load(l3));
891 pa |= (va & PAGE_MASK);
896 /***************************************************
897 * Low level mapping routines.....
898 ***************************************************/
901 pmap_kenter_device(vm_offset_t sva, vm_size_t size, vm_paddr_t pa)
908 KASSERT((pa & L3_OFFSET) == 0,
909 ("pmap_kenter_device: Invalid physical address"));
910 KASSERT((sva & L3_OFFSET) == 0,
911 ("pmap_kenter_device: Invalid virtual address"));
912 KASSERT((size & PAGE_MASK) == 0,
913 ("pmap_kenter_device: Mapping is not page-sized"));
917 l3 = pmap_l3(kernel_pmap, va);
918 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
920 pn = (pa / PAGE_SIZE);
922 entry |= (pn << PTE_PPN0_S);
923 pmap_store(l3, entry);
929 pmap_invalidate_range(kernel_pmap, sva, va);
933 * Remove a page from the kernel pagetables.
934 * Note: not SMP coherent.
937 pmap_kremove(vm_offset_t va)
941 l3 = pmap_l3(kernel_pmap, va);
942 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
949 pmap_kremove_device(vm_offset_t sva, vm_size_t size)
954 KASSERT((sva & L3_OFFSET) == 0,
955 ("pmap_kremove_device: Invalid virtual address"));
956 KASSERT((size & PAGE_MASK) == 0,
957 ("pmap_kremove_device: Mapping is not page-sized"));
961 l3 = pmap_l3(kernel_pmap, va);
962 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
969 pmap_invalidate_range(kernel_pmap, sva, va);
973 * Used to map a range of physical addresses into kernel
974 * virtual address space.
976 * The value passed in '*virt' is a suggested virtual address for
977 * the mapping. Architectures which can support a direct-mapped
978 * physical to virtual region can return the appropriate address
979 * within that region, leaving '*virt' unchanged. Other
980 * architectures should map the pages starting at '*virt' and
981 * update '*virt' with the first usable address after the mapped
985 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
988 return PHYS_TO_DMAP(start);
992 * Add a list of wired pages to the kva
993 * this routine is only used for temporary
994 * kernel mappings that do not need to have
995 * page modification or references recorded.
996 * Note that old mappings are simply written
997 * over. The page *must* be wired.
998 * Note: SMP coherent. Uses a ranged shootdown IPI.
1001 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1011 for (i = 0; i < count; i++) {
1013 pa = VM_PAGE_TO_PHYS(m);
1014 pn = (pa / PAGE_SIZE);
1015 l3 = pmap_l3(kernel_pmap, va);
1018 entry |= (pn << PTE_PPN0_S);
1019 pmap_store(l3, entry);
1023 pmap_invalidate_range(kernel_pmap, sva, va);
1027 * This routine tears out page mappings from the
1028 * kernel -- it is meant only for temporary mappings.
1029 * Note: SMP coherent. Uses a ranged shootdown IPI.
1032 pmap_qremove(vm_offset_t sva, int count)
1037 KASSERT(sva >= VM_MIN_KERNEL_ADDRESS, ("usermode va %lx", sva));
1039 for (va = sva; count-- > 0; va += PAGE_SIZE) {
1040 l3 = pmap_l3(kernel_pmap, va);
1041 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
1044 pmap_invalidate_range(kernel_pmap, sva, va);
1048 pmap_ps_enabled(pmap_t pmap __unused)
1051 return (superpages_enabled);
1054 /***************************************************
1055 * Page table page management routines.....
1056 ***************************************************/
1058 * Schedule the specified unused page table page to be freed. Specifically,
1059 * add the page to the specified list of pages that will be released to the
1060 * physical memory manager after the TLB has been updated.
1062 static __inline void
1063 pmap_add_delayed_free_list(vm_page_t m, struct spglist *free,
1064 boolean_t set_PG_ZERO)
1068 m->flags |= PG_ZERO;
1070 m->flags &= ~PG_ZERO;
1071 SLIST_INSERT_HEAD(free, m, plinks.s.ss);
1075 * Inserts the specified page table page into the specified pmap's collection
1076 * of idle page table pages. Each of a pmap's page table pages is responsible
1077 * for mapping a distinct range of virtual addresses. The pmap's collection is
1078 * ordered by this virtual address range.
1080 * If "promoted" is false, then the page table page "ml3" must be zero filled.
1083 pmap_insert_pt_page(pmap_t pmap, vm_page_t ml3, bool promoted)
1086 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1087 ml3->valid = promoted ? VM_PAGE_BITS_ALL : 0;
1088 return (vm_radix_insert(&pmap->pm_root, ml3));
1092 * Removes the page table page mapping the specified virtual address from the
1093 * specified pmap's collection of idle page table pages, and returns it.
1094 * Otherwise, returns NULL if there is no page table page corresponding to the
1095 * specified virtual address.
1097 static __inline vm_page_t
1098 pmap_remove_pt_page(pmap_t pmap, vm_offset_t va)
1101 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1102 return (vm_radix_remove(&pmap->pm_root, pmap_l2_pindex(va)));
1106 * Decrements a page table page's reference count, which is used to record the
1107 * number of valid page table entries within the page. If the reference count
1108 * drops to zero, then the page table page is unmapped. Returns TRUE if the
1109 * page table page was unmapped and FALSE otherwise.
1111 static inline boolean_t
1112 pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1116 if (m->ref_count == 0) {
1117 _pmap_unwire_ptp(pmap, va, m, free);
1125 _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1129 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1130 if (m->pindex >= NUL1E) {
1132 l1 = pmap_l1(pmap, va);
1134 pmap_distribute_l1(pmap, pmap_l1_index(va), 0);
1137 l2 = pmap_l2(pmap, va);
1140 pmap_resident_count_dec(pmap, 1);
1141 if (m->pindex < NUL1E) {
1145 l1 = pmap_l1(pmap, va);
1146 phys = PTE_TO_PHYS(pmap_load(l1));
1147 pdpg = PHYS_TO_VM_PAGE(phys);
1148 pmap_unwire_ptp(pmap, va, pdpg, free);
1150 pmap_invalidate_page(pmap, va);
1155 * Put page on a list so that it is released after
1156 * *ALL* TLB shootdown is done
1158 pmap_add_delayed_free_list(m, free, TRUE);
1162 * After removing a page table entry, this routine is used to
1163 * conditionally free the page, and manage the reference count.
1166 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, pd_entry_t ptepde,
1167 struct spglist *free)
1171 if (va >= VM_MAXUSER_ADDRESS)
1173 KASSERT(ptepde != 0, ("pmap_unuse_pt: ptepde != 0"));
1174 mpte = PHYS_TO_VM_PAGE(PTE_TO_PHYS(ptepde));
1175 return (pmap_unwire_ptp(pmap, va, mpte, free));
1179 pmap_pinit0(pmap_t pmap)
1182 PMAP_LOCK_INIT(pmap);
1183 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1184 pmap->pm_l1 = kernel_pmap->pm_l1;
1185 pmap->pm_satp = SATP_MODE_SV39 | (vtophys(pmap->pm_l1) >> PAGE_SHIFT);
1186 CPU_ZERO(&pmap->pm_active);
1187 pmap_activate_boot(pmap);
1191 pmap_pinit(pmap_t pmap)
1197 * allocate the l1 page
1199 while ((l1pt = vm_page_alloc(NULL, 0xdeadbeef, VM_ALLOC_NORMAL |
1200 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL)
1203 l1phys = VM_PAGE_TO_PHYS(l1pt);
1204 pmap->pm_l1 = (pd_entry_t *)PHYS_TO_DMAP(l1phys);
1205 pmap->pm_satp = SATP_MODE_SV39 | (l1phys >> PAGE_SHIFT);
1207 if ((l1pt->flags & PG_ZERO) == 0)
1208 pagezero(pmap->pm_l1);
1210 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1212 CPU_ZERO(&pmap->pm_active);
1214 /* Install kernel pagetables */
1215 memcpy(pmap->pm_l1, kernel_pmap->pm_l1, PAGE_SIZE);
1217 /* Add to the list of all user pmaps */
1218 mtx_lock(&allpmaps_lock);
1219 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1220 mtx_unlock(&allpmaps_lock);
1222 vm_radix_init(&pmap->pm_root);
1228 * This routine is called if the desired page table page does not exist.
1230 * If page table page allocation fails, this routine may sleep before
1231 * returning NULL. It sleeps only if a lock pointer was given.
1233 * Note: If a page allocation fails at page table level two or three,
1234 * one or two pages may be held during the wait, only to be released
1235 * afterwards. This conservative approach is easily argued to avoid
1239 _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp)
1241 vm_page_t m, /*pdppg, */pdpg;
1246 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1249 * Allocate a page table page.
1251 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1252 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1253 if (lockp != NULL) {
1254 RELEASE_PV_LIST_LOCK(lockp);
1256 rw_runlock(&pvh_global_lock);
1258 rw_rlock(&pvh_global_lock);
1263 * Indicate the need to retry. While waiting, the page table
1264 * page may have been allocated.
1269 if ((m->flags & PG_ZERO) == 0)
1273 * Map the pagetable page into the process address space, if
1274 * it isn't already there.
1277 if (ptepindex >= NUL1E) {
1279 vm_pindex_t l1index;
1281 l1index = ptepindex - NUL1E;
1282 l1 = &pmap->pm_l1[l1index];
1284 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1286 entry |= (pn << PTE_PPN0_S);
1287 pmap_store(l1, entry);
1288 pmap_distribute_l1(pmap, l1index, entry);
1290 vm_pindex_t l1index;
1291 pd_entry_t *l1, *l2;
1293 l1index = ptepindex >> (L1_SHIFT - L2_SHIFT);
1294 l1 = &pmap->pm_l1[l1index];
1295 if (pmap_load(l1) == 0) {
1296 /* recurse for allocating page dir */
1297 if (_pmap_alloc_l3(pmap, NUL1E + l1index,
1299 vm_page_unwire_noq(m);
1300 vm_page_free_zero(m);
1304 phys = PTE_TO_PHYS(pmap_load(l1));
1305 pdpg = PHYS_TO_VM_PAGE(phys);
1309 phys = PTE_TO_PHYS(pmap_load(l1));
1310 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
1311 l2 = &l2[ptepindex & Ln_ADDR_MASK];
1313 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1315 entry |= (pn << PTE_PPN0_S);
1316 pmap_store(l2, entry);
1319 pmap_resident_count_inc(pmap, 1);
1325 pmap_alloc_l2(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1329 vm_pindex_t l2pindex;
1332 l1 = pmap_l1(pmap, va);
1333 if (l1 != NULL && (pmap_load(l1) & PTE_RWX) == 0) {
1334 /* Add a reference to the L2 page. */
1335 l2pg = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l1)));
1338 /* Allocate a L2 page. */
1339 l2pindex = pmap_l2_pindex(va) >> Ln_ENTRIES_SHIFT;
1340 l2pg = _pmap_alloc_l3(pmap, NUL2E + l2pindex, lockp);
1341 if (l2pg == NULL && lockp != NULL)
1348 pmap_alloc_l3(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1350 vm_pindex_t ptepindex;
1356 * Calculate pagetable page index
1358 ptepindex = pmap_l2_pindex(va);
1361 * Get the page directory entry
1363 l2 = pmap_l2(pmap, va);
1366 * If the page table page is mapped, we just increment the
1367 * hold count, and activate it.
1369 if (l2 != NULL && pmap_load(l2) != 0) {
1370 phys = PTE_TO_PHYS(pmap_load(l2));
1371 m = PHYS_TO_VM_PAGE(phys);
1375 * Here if the pte page isn't mapped, or if it has been
1378 m = _pmap_alloc_l3(pmap, ptepindex, lockp);
1379 if (m == NULL && lockp != NULL)
1385 /***************************************************
1386 * Pmap allocation/deallocation routines.
1387 ***************************************************/
1390 * Release any resources held by the given physical map.
1391 * Called when a pmap initialized by pmap_pinit is being released.
1392 * Should only be called if the map contains no valid mappings.
1395 pmap_release(pmap_t pmap)
1399 KASSERT(pmap->pm_stats.resident_count == 0,
1400 ("pmap_release: pmap resident count %ld != 0",
1401 pmap->pm_stats.resident_count));
1402 KASSERT(CPU_EMPTY(&pmap->pm_active),
1403 ("releasing active pmap %p", pmap));
1405 mtx_lock(&allpmaps_lock);
1406 LIST_REMOVE(pmap, pm_list);
1407 mtx_unlock(&allpmaps_lock);
1409 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pmap->pm_l1));
1410 vm_page_unwire_noq(m);
1415 kvm_size(SYSCTL_HANDLER_ARGS)
1417 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS;
1419 return sysctl_handle_long(oidp, &ksize, 0, req);
1421 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG | CTLFLAG_RD | CTLFLAG_MPSAFE,
1422 0, 0, kvm_size, "LU",
1426 kvm_free(SYSCTL_HANDLER_ARGS)
1428 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1430 return sysctl_handle_long(oidp, &kfree, 0, req);
1432 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG | CTLFLAG_RD | CTLFLAG_MPSAFE,
1433 0, 0, kvm_free, "LU",
1434 "Amount of KVM free");
1437 * grow the number of kernel page table entries, if needed
1440 pmap_growkernel(vm_offset_t addr)
1444 pd_entry_t *l1, *l2;
1448 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1450 addr = roundup2(addr, L2_SIZE);
1451 if (addr - 1 >= vm_map_max(kernel_map))
1452 addr = vm_map_max(kernel_map);
1453 while (kernel_vm_end < addr) {
1454 l1 = pmap_l1(kernel_pmap, kernel_vm_end);
1455 if (pmap_load(l1) == 0) {
1456 /* We need a new PDP entry */
1457 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L1_SHIFT,
1458 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ |
1459 VM_ALLOC_WIRED | VM_ALLOC_ZERO);
1461 panic("pmap_growkernel: no memory to grow kernel");
1462 if ((nkpg->flags & PG_ZERO) == 0)
1463 pmap_zero_page(nkpg);
1464 paddr = VM_PAGE_TO_PHYS(nkpg);
1466 pn = (paddr / PAGE_SIZE);
1468 entry |= (pn << PTE_PPN0_S);
1469 pmap_store(l1, entry);
1470 pmap_distribute_l1(kernel_pmap,
1471 pmap_l1_index(kernel_vm_end), entry);
1472 continue; /* try again */
1474 l2 = pmap_l1_to_l2(l1, kernel_vm_end);
1475 if ((pmap_load(l2) & PTE_V) != 0 &&
1476 (pmap_load(l2) & PTE_RWX) == 0) {
1477 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1478 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1479 kernel_vm_end = vm_map_max(kernel_map);
1485 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L2_SHIFT,
1486 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1489 panic("pmap_growkernel: no memory to grow kernel");
1490 if ((nkpg->flags & PG_ZERO) == 0) {
1491 pmap_zero_page(nkpg);
1493 paddr = VM_PAGE_TO_PHYS(nkpg);
1495 pn = (paddr / PAGE_SIZE);
1497 entry |= (pn << PTE_PPN0_S);
1498 pmap_store(l2, entry);
1500 pmap_invalidate_page(kernel_pmap, kernel_vm_end);
1502 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1503 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1504 kernel_vm_end = vm_map_max(kernel_map);
1510 /***************************************************
1511 * page management routines.
1512 ***************************************************/
1514 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1515 CTASSERT(_NPCM == 3);
1516 CTASSERT(_NPCPV == 168);
1518 static __inline struct pv_chunk *
1519 pv_to_chunk(pv_entry_t pv)
1522 return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
1525 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1527 #define PC_FREE0 0xfffffffffffffffful
1528 #define PC_FREE1 0xfffffffffffffffful
1529 #define PC_FREE2 0x000000fffffffffful
1531 static const uint64_t pc_freemask[_NPCM] = { PC_FREE0, PC_FREE1, PC_FREE2 };
1535 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1537 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1538 "Current number of pv entry chunks");
1539 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1540 "Current number of pv entry chunks allocated");
1541 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1542 "Current number of pv entry chunks frees");
1543 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1544 "Number of times tried to get a chunk page but failed.");
1546 static long pv_entry_frees, pv_entry_allocs, pv_entry_count;
1547 static int pv_entry_spare;
1549 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1550 "Current number of pv entry frees");
1551 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1552 "Current number of pv entry allocs");
1553 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1554 "Current number of pv entries");
1555 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1556 "Current number of spare pv entries");
1561 * We are in a serious low memory condition. Resort to
1562 * drastic measures to free some pages so we can allocate
1563 * another pv entry chunk.
1565 * Returns NULL if PV entries were reclaimed from the specified pmap.
1567 * We do not, however, unmap 2mpages because subsequent accesses will
1568 * allocate per-page pv entries until repromotion occurs, thereby
1569 * exacerbating the shortage of free pv entries.
1572 reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp)
1575 panic("RISCVTODO: reclaim_pv_chunk");
1579 * free the pv_entry back to the free list
1582 free_pv_entry(pmap_t pmap, pv_entry_t pv)
1584 struct pv_chunk *pc;
1585 int idx, field, bit;
1587 rw_assert(&pvh_global_lock, RA_LOCKED);
1588 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1589 PV_STAT(atomic_add_long(&pv_entry_frees, 1));
1590 PV_STAT(atomic_add_int(&pv_entry_spare, 1));
1591 PV_STAT(atomic_subtract_long(&pv_entry_count, 1));
1592 pc = pv_to_chunk(pv);
1593 idx = pv - &pc->pc_pventry[0];
1596 pc->pc_map[field] |= 1ul << bit;
1597 if (pc->pc_map[0] != PC_FREE0 || pc->pc_map[1] != PC_FREE1 ||
1598 pc->pc_map[2] != PC_FREE2) {
1599 /* 98% of the time, pc is already at the head of the list. */
1600 if (__predict_false(pc != TAILQ_FIRST(&pmap->pm_pvchunk))) {
1601 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1602 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1606 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1611 free_pv_chunk(struct pv_chunk *pc)
1615 mtx_lock(&pv_chunks_mutex);
1616 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
1617 mtx_unlock(&pv_chunks_mutex);
1618 PV_STAT(atomic_subtract_int(&pv_entry_spare, _NPCPV));
1619 PV_STAT(atomic_subtract_int(&pc_chunk_count, 1));
1620 PV_STAT(atomic_add_int(&pc_chunk_frees, 1));
1621 /* entire chunk is free, return it */
1622 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
1623 dump_drop_page(m->phys_addr);
1624 vm_page_unwire_noq(m);
1629 * Returns a new PV entry, allocating a new PV chunk from the system when
1630 * needed. If this PV chunk allocation fails and a PV list lock pointer was
1631 * given, a PV chunk is reclaimed from an arbitrary pmap. Otherwise, NULL is
1634 * The given PV list lock may be released.
1637 get_pv_entry(pmap_t pmap, struct rwlock **lockp)
1641 struct pv_chunk *pc;
1644 rw_assert(&pvh_global_lock, RA_LOCKED);
1645 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1646 PV_STAT(atomic_add_long(&pv_entry_allocs, 1));
1648 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1650 for (field = 0; field < _NPCM; field++) {
1651 if (pc->pc_map[field]) {
1652 bit = ffsl(pc->pc_map[field]) - 1;
1656 if (field < _NPCM) {
1657 pv = &pc->pc_pventry[field * 64 + bit];
1658 pc->pc_map[field] &= ~(1ul << bit);
1659 /* If this was the last item, move it to tail */
1660 if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 &&
1661 pc->pc_map[2] == 0) {
1662 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1663 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc,
1666 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1667 PV_STAT(atomic_subtract_int(&pv_entry_spare, 1));
1671 /* No free items, allocate another chunk */
1672 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1675 if (lockp == NULL) {
1676 PV_STAT(pc_chunk_tryfail++);
1679 m = reclaim_pv_chunk(pmap, lockp);
1683 PV_STAT(atomic_add_int(&pc_chunk_count, 1));
1684 PV_STAT(atomic_add_int(&pc_chunk_allocs, 1));
1685 dump_add_page(m->phys_addr);
1686 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1688 pc->pc_map[0] = PC_FREE0 & ~1ul; /* preallocated bit 0 */
1689 pc->pc_map[1] = PC_FREE1;
1690 pc->pc_map[2] = PC_FREE2;
1691 mtx_lock(&pv_chunks_mutex);
1692 TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru);
1693 mtx_unlock(&pv_chunks_mutex);
1694 pv = &pc->pc_pventry[0];
1695 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1696 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1697 PV_STAT(atomic_add_int(&pv_entry_spare, _NPCPV - 1));
1702 * Ensure that the number of spare PV entries in the specified pmap meets or
1703 * exceeds the given count, "needed".
1705 * The given PV list lock may be released.
1708 reserve_pv_entries(pmap_t pmap, int needed, struct rwlock **lockp)
1710 struct pch new_tail;
1711 struct pv_chunk *pc;
1716 rw_assert(&pvh_global_lock, RA_LOCKED);
1717 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1718 KASSERT(lockp != NULL, ("reserve_pv_entries: lockp is NULL"));
1721 * Newly allocated PV chunks must be stored in a private list until
1722 * the required number of PV chunks have been allocated. Otherwise,
1723 * reclaim_pv_chunk() could recycle one of these chunks. In
1724 * contrast, these chunks must be added to the pmap upon allocation.
1726 TAILQ_INIT(&new_tail);
1729 TAILQ_FOREACH(pc, &pmap->pm_pvchunk, pc_list) {
1730 bit_count((bitstr_t *)pc->pc_map, 0,
1731 sizeof(pc->pc_map) * NBBY, &free);
1735 if (avail >= needed)
1738 for (reclaimed = false; avail < needed; avail += _NPCPV) {
1739 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1742 m = reclaim_pv_chunk(pmap, lockp);
1749 dump_add_page(m->phys_addr);
1751 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1753 pc->pc_map[0] = PC_FREE0;
1754 pc->pc_map[1] = PC_FREE1;
1755 pc->pc_map[2] = PC_FREE2;
1756 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1757 TAILQ_INSERT_TAIL(&new_tail, pc, pc_lru);
1760 * The reclaim might have freed a chunk from the current pmap.
1761 * If that chunk contained available entries, we need to
1762 * re-count the number of available entries.
1767 if (!TAILQ_EMPTY(&new_tail)) {
1768 mtx_lock(&pv_chunks_mutex);
1769 TAILQ_CONCAT(&pv_chunks, &new_tail, pc_lru);
1770 mtx_unlock(&pv_chunks_mutex);
1775 * First find and then remove the pv entry for the specified pmap and virtual
1776 * address from the specified pv list. Returns the pv entry if found and NULL
1777 * otherwise. This operation can be performed on pv lists for either 4KB or
1778 * 2MB page mappings.
1780 static __inline pv_entry_t
1781 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1785 rw_assert(&pvh_global_lock, RA_LOCKED);
1786 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
1787 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
1788 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
1797 * First find and then destroy the pv entry for the specified pmap and virtual
1798 * address. This operation can be performed on pv lists for either 4KB or 2MB
1802 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1806 pv = pmap_pvh_remove(pvh, pmap, va);
1808 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found for %#lx", va));
1809 free_pv_entry(pmap, pv);
1813 * Conditionally create the PV entry for a 4KB page mapping if the required
1814 * memory can be allocated without resorting to reclamation.
1817 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m,
1818 struct rwlock **lockp)
1822 rw_assert(&pvh_global_lock, RA_LOCKED);
1823 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1824 /* Pass NULL instead of the lock pointer to disable reclamation. */
1825 if ((pv = get_pv_entry(pmap, NULL)) != NULL) {
1827 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1828 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1836 * After demotion from a 2MB page mapping to 512 4KB page mappings,
1837 * destroy the pv entry for the 2MB page mapping and reinstantiate the pv
1838 * entries for each of the 4KB page mappings.
1840 static void __unused
1841 pmap_pv_demote_l2(pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
1842 struct rwlock **lockp)
1844 struct md_page *pvh;
1845 struct pv_chunk *pc;
1848 vm_offset_t va_last;
1851 rw_assert(&pvh_global_lock, RA_LOCKED);
1852 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1853 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1856 * Transfer the 2mpage's pv entry for this mapping to the first
1857 * page's pv list. Once this transfer begins, the pv list lock
1858 * must not be released until the last pv entry is reinstantiated.
1860 pvh = pa_to_pvh(pa);
1862 pv = pmap_pvh_remove(pvh, pmap, va);
1863 KASSERT(pv != NULL, ("pmap_pv_demote_l2: pv not found"));
1864 m = PHYS_TO_VM_PAGE(pa);
1865 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1867 /* Instantiate the remaining 511 pv entries. */
1868 va_last = va + L2_SIZE - PAGE_SIZE;
1870 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1871 KASSERT(pc->pc_map[0] != 0 || pc->pc_map[1] != 0 ||
1872 pc->pc_map[2] != 0, ("pmap_pv_demote_l2: missing spare"));
1873 for (field = 0; field < _NPCM; field++) {
1874 while (pc->pc_map[field] != 0) {
1875 bit = ffsl(pc->pc_map[field]) - 1;
1876 pc->pc_map[field] &= ~(1ul << bit);
1877 pv = &pc->pc_pventry[field * 64 + bit];
1881 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
1882 ("pmap_pv_demote_l2: page %p is not managed", m));
1883 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1889 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1890 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1893 if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 && pc->pc_map[2] == 0) {
1894 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1895 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1900 #if VM_NRESERVLEVEL > 0
1902 pmap_pv_promote_l2(pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
1903 struct rwlock **lockp)
1905 struct md_page *pvh;
1908 vm_offset_t va_last;
1910 rw_assert(&pvh_global_lock, RA_LOCKED);
1911 KASSERT((va & L2_OFFSET) == 0,
1912 ("pmap_pv_promote_l2: misaligned va %#lx", va));
1914 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1916 m = PHYS_TO_VM_PAGE(pa);
1917 pv = pmap_pvh_remove(&m->md, pmap, va);
1918 KASSERT(pv != NULL, ("pmap_pv_promote_l2: pv for %#lx not found", va));
1919 pvh = pa_to_pvh(pa);
1920 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
1923 va_last = va + L2_SIZE - PAGE_SIZE;
1927 pmap_pvh_free(&m->md, pmap, va);
1928 } while (va < va_last);
1930 #endif /* VM_NRESERVLEVEL > 0 */
1933 * Create the PV entry for a 2MB page mapping. Always returns true unless the
1934 * flag PMAP_ENTER_NORECLAIM is specified. If that flag is specified, returns
1935 * false if the PV entry cannot be allocated without resorting to reclamation.
1938 pmap_pv_insert_l2(pmap_t pmap, vm_offset_t va, pd_entry_t l2e, u_int flags,
1939 struct rwlock **lockp)
1941 struct md_page *pvh;
1945 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1946 /* Pass NULL instead of the lock pointer to disable reclamation. */
1947 if ((pv = get_pv_entry(pmap, (flags & PMAP_ENTER_NORECLAIM) != 0 ?
1948 NULL : lockp)) == NULL)
1951 pa = PTE_TO_PHYS(l2e);
1952 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1953 pvh = pa_to_pvh(pa);
1954 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
1960 pmap_remove_kernel_l2(pmap_t pmap, pt_entry_t *l2, vm_offset_t va)
1962 pt_entry_t newl2, oldl2;
1966 KASSERT(!VIRT_IN_DMAP(va), ("removing direct mapping of %#lx", va));
1967 KASSERT(pmap == kernel_pmap, ("pmap %p is not kernel_pmap", pmap));
1968 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1970 ml3 = pmap_remove_pt_page(pmap, va);
1972 panic("pmap_remove_kernel_l2: Missing pt page");
1974 ml3pa = VM_PAGE_TO_PHYS(ml3);
1975 newl2 = ml3pa | PTE_V;
1978 * If this page table page was unmapped by a promotion, then it
1979 * contains valid mappings. Zero it to invalidate those mappings.
1981 if (ml3->valid != 0)
1982 pagezero((void *)PHYS_TO_DMAP(ml3pa));
1985 * Demote the mapping.
1987 oldl2 = pmap_load_store(l2, newl2);
1988 KASSERT(oldl2 == 0, ("%s: found existing mapping at %p: %#lx",
1989 __func__, l2, oldl2));
1993 * pmap_remove_l2: Do the things to unmap a level 2 superpage.
1996 pmap_remove_l2(pmap_t pmap, pt_entry_t *l2, vm_offset_t sva,
1997 pd_entry_t l1e, struct spglist *free, struct rwlock **lockp)
1999 struct md_page *pvh;
2001 vm_offset_t eva, va;
2004 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2005 KASSERT((sva & L2_OFFSET) == 0, ("pmap_remove_l2: sva is not aligned"));
2006 oldl2 = pmap_load_clear(l2);
2007 KASSERT((oldl2 & PTE_RWX) != 0,
2008 ("pmap_remove_l2: L2e %lx is not a superpage mapping", oldl2));
2011 * The sfence.vma documentation states that it is sufficient to specify
2012 * a single address within a superpage mapping. However, since we do
2013 * not perform any invalidation upon promotion, TLBs may still be
2014 * caching 4KB mappings within the superpage, so we must invalidate the
2017 pmap_invalidate_range(pmap, sva, sva + L2_SIZE);
2018 if ((oldl2 & PTE_SW_WIRED) != 0)
2019 pmap->pm_stats.wired_count -= L2_SIZE / PAGE_SIZE;
2020 pmap_resident_count_dec(pmap, L2_SIZE / PAGE_SIZE);
2021 if ((oldl2 & PTE_SW_MANAGED) != 0) {
2022 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, PTE_TO_PHYS(oldl2));
2023 pvh = pa_to_pvh(PTE_TO_PHYS(oldl2));
2024 pmap_pvh_free(pvh, pmap, sva);
2025 eva = sva + L2_SIZE;
2026 for (va = sva, m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(oldl2));
2027 va < eva; va += PAGE_SIZE, m++) {
2028 if ((oldl2 & PTE_D) != 0)
2030 if ((oldl2 & PTE_A) != 0)
2031 vm_page_aflag_set(m, PGA_REFERENCED);
2032 if (TAILQ_EMPTY(&m->md.pv_list) &&
2033 TAILQ_EMPTY(&pvh->pv_list))
2034 vm_page_aflag_clear(m, PGA_WRITEABLE);
2037 if (pmap == kernel_pmap) {
2038 pmap_remove_kernel_l2(pmap, l2, sva);
2040 ml3 = pmap_remove_pt_page(pmap, sva);
2042 KASSERT(ml3->valid == VM_PAGE_BITS_ALL,
2043 ("pmap_remove_l2: l3 page not promoted"));
2044 pmap_resident_count_dec(pmap, 1);
2045 KASSERT(ml3->ref_count == Ln_ENTRIES,
2046 ("pmap_remove_l2: l3 page ref count error"));
2048 vm_page_unwire_noq(ml3);
2049 pmap_add_delayed_free_list(ml3, free, FALSE);
2052 return (pmap_unuse_pt(pmap, sva, l1e, free));
2056 * pmap_remove_l3: do the things to unmap a page in a process
2059 pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t va,
2060 pd_entry_t l2e, struct spglist *free, struct rwlock **lockp)
2062 struct md_page *pvh;
2067 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2068 old_l3 = pmap_load_clear(l3);
2069 pmap_invalidate_page(pmap, va);
2070 if (old_l3 & PTE_SW_WIRED)
2071 pmap->pm_stats.wired_count -= 1;
2072 pmap_resident_count_dec(pmap, 1);
2073 if (old_l3 & PTE_SW_MANAGED) {
2074 phys = PTE_TO_PHYS(old_l3);
2075 m = PHYS_TO_VM_PAGE(phys);
2076 if ((old_l3 & PTE_D) != 0)
2079 vm_page_aflag_set(m, PGA_REFERENCED);
2080 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
2081 pmap_pvh_free(&m->md, pmap, va);
2082 if (TAILQ_EMPTY(&m->md.pv_list) &&
2083 (m->flags & PG_FICTITIOUS) == 0) {
2084 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
2085 if (TAILQ_EMPTY(&pvh->pv_list))
2086 vm_page_aflag_clear(m, PGA_WRITEABLE);
2090 return (pmap_unuse_pt(pmap, va, l2e, free));
2094 * Remove the given range of addresses from the specified map.
2096 * It is assumed that the start and end are properly
2097 * rounded to the page size.
2100 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2102 struct spglist free;
2103 struct rwlock *lock;
2104 vm_offset_t va, va_next;
2105 pd_entry_t *l1, *l2, l2e;
2109 * Perform an unsynchronized read. This is, however, safe.
2111 if (pmap->pm_stats.resident_count == 0)
2116 rw_rlock(&pvh_global_lock);
2120 for (; sva < eva; sva = va_next) {
2121 if (pmap->pm_stats.resident_count == 0)
2124 l1 = pmap_l1(pmap, sva);
2125 if (pmap_load(l1) == 0) {
2126 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2133 * Calculate index for next page table.
2135 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2139 l2 = pmap_l1_to_l2(l1, sva);
2142 if ((l2e = pmap_load(l2)) == 0)
2144 if ((l2e & PTE_RWX) != 0) {
2145 if (sva + L2_SIZE == va_next && eva >= va_next) {
2146 (void)pmap_remove_l2(pmap, l2, sva,
2147 pmap_load(l1), &free, &lock);
2149 } else if (!pmap_demote_l2_locked(pmap, l2, sva,
2152 * The large page mapping was destroyed.
2156 l2e = pmap_load(l2);
2160 * Limit our scan to either the end of the va represented
2161 * by the current page table page, or to the end of the
2162 * range being removed.
2168 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2170 if (pmap_load(l3) == 0) {
2171 if (va != va_next) {
2172 pmap_invalidate_range(pmap, va, sva);
2179 if (pmap_remove_l3(pmap, l3, sva, l2e, &free, &lock)) {
2185 pmap_invalidate_range(pmap, va, sva);
2189 rw_runlock(&pvh_global_lock);
2191 vm_page_free_pages_toq(&free, false);
2195 * Routine: pmap_remove_all
2197 * Removes this physical page from
2198 * all physical maps in which it resides.
2199 * Reflects back modify bits to the pager.
2202 * Original versions of this routine were very
2203 * inefficient because they iteratively called
2204 * pmap_remove (slow...)
2208 pmap_remove_all(vm_page_t m)
2210 struct spglist free;
2211 struct md_page *pvh;
2213 pt_entry_t *l3, l3e;
2214 pd_entry_t *l2, l2e;
2218 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2219 ("pmap_remove_all: page %p is not managed", m));
2221 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
2222 pa_to_pvh(VM_PAGE_TO_PHYS(m));
2224 rw_wlock(&pvh_global_lock);
2225 while ((pv = TAILQ_FIRST(&pvh->pv_list)) != NULL) {
2229 l2 = pmap_l2(pmap, va);
2230 (void)pmap_demote_l2(pmap, l2, va);
2233 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2236 pmap_resident_count_dec(pmap, 1);
2237 l2 = pmap_l2(pmap, pv->pv_va);
2238 KASSERT(l2 != NULL, ("pmap_remove_all: no l2 table found"));
2239 l2e = pmap_load(l2);
2241 KASSERT((l2e & PTE_RX) == 0,
2242 ("pmap_remove_all: found a superpage in %p's pv list", m));
2244 l3 = pmap_l2_to_l3(l2, pv->pv_va);
2245 l3e = pmap_load_clear(l3);
2246 pmap_invalidate_page(pmap, pv->pv_va);
2247 if (l3e & PTE_SW_WIRED)
2248 pmap->pm_stats.wired_count--;
2249 if ((l3e & PTE_A) != 0)
2250 vm_page_aflag_set(m, PGA_REFERENCED);
2253 * Update the vm_page_t clean and reference bits.
2255 if ((l3e & PTE_D) != 0)
2257 pmap_unuse_pt(pmap, pv->pv_va, pmap_load(l2), &free);
2258 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
2260 free_pv_entry(pmap, pv);
2263 vm_page_aflag_clear(m, PGA_WRITEABLE);
2264 rw_wunlock(&pvh_global_lock);
2265 vm_page_free_pages_toq(&free, false);
2269 * Set the physical protection on the
2270 * specified range of this map as requested.
2273 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2275 pd_entry_t *l1, *l2, l2e;
2276 pt_entry_t *l3, l3e, mask;
2279 vm_offset_t va_next;
2280 bool anychanged, pv_lists_locked;
2282 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2283 pmap_remove(pmap, sva, eva);
2287 if ((prot & (VM_PROT_WRITE | VM_PROT_EXECUTE)) ==
2288 (VM_PROT_WRITE | VM_PROT_EXECUTE))
2292 pv_lists_locked = false;
2294 if ((prot & VM_PROT_WRITE) == 0)
2295 mask |= PTE_W | PTE_D;
2296 if ((prot & VM_PROT_EXECUTE) == 0)
2300 for (; sva < eva; sva = va_next) {
2301 l1 = pmap_l1(pmap, sva);
2302 if (pmap_load(l1) == 0) {
2303 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2309 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2313 l2 = pmap_l1_to_l2(l1, sva);
2314 if (l2 == NULL || (l2e = pmap_load(l2)) == 0)
2316 if ((l2e & PTE_RWX) != 0) {
2317 if (sva + L2_SIZE == va_next && eva >= va_next) {
2319 if ((prot & VM_PROT_WRITE) == 0 &&
2320 (l2e & (PTE_SW_MANAGED | PTE_D)) ==
2321 (PTE_SW_MANAGED | PTE_D)) {
2322 pa = PTE_TO_PHYS(l2e);
2323 m = PHYS_TO_VM_PAGE(pa);
2324 for (mt = m; mt < &m[Ln_ENTRIES]; mt++)
2327 if (!atomic_fcmpset_long(l2, &l2e, l2e & ~mask))
2332 if (!pv_lists_locked) {
2333 pv_lists_locked = true;
2334 if (!rw_try_rlock(&pvh_global_lock)) {
2336 pmap_invalidate_all(
2339 rw_rlock(&pvh_global_lock);
2343 if (!pmap_demote_l2(pmap, l2, sva)) {
2345 * The large page mapping was destroyed.
2355 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2357 l3e = pmap_load(l3);
2359 if ((l3e & PTE_V) == 0)
2361 if ((prot & VM_PROT_WRITE) == 0 &&
2362 (l3e & (PTE_SW_MANAGED | PTE_D)) ==
2363 (PTE_SW_MANAGED | PTE_D)) {
2364 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(l3e));
2367 if (!atomic_fcmpset_long(l3, &l3e, l3e & ~mask))
2373 pmap_invalidate_all(pmap);
2374 if (pv_lists_locked)
2375 rw_runlock(&pvh_global_lock);
2380 pmap_fault_fixup(pmap_t pmap, vm_offset_t va, vm_prot_t ftype)
2382 pd_entry_t *l2, l2e;
2383 pt_entry_t bits, *pte, oldpte;
2388 l2 = pmap_l2(pmap, va);
2389 if (l2 == NULL || ((l2e = pmap_load(l2)) & PTE_V) == 0)
2391 if ((l2e & PTE_RWX) == 0) {
2392 pte = pmap_l2_to_l3(l2, va);
2393 if (pte == NULL || ((oldpte = pmap_load(pte)) & PTE_V) == 0)
2400 if ((pmap != kernel_pmap && (oldpte & PTE_U) == 0) ||
2401 (ftype == VM_PROT_WRITE && (oldpte & PTE_W) == 0) ||
2402 (ftype == VM_PROT_EXECUTE && (oldpte & PTE_X) == 0) ||
2403 (ftype == VM_PROT_READ && (oldpte & PTE_R) == 0))
2407 if (ftype == VM_PROT_WRITE)
2411 * Spurious faults can occur if the implementation caches invalid
2412 * entries in the TLB, or if simultaneous accesses on multiple CPUs
2413 * race with each other.
2415 if ((oldpte & bits) != bits)
2416 pmap_store_bits(pte, bits);
2425 pmap_demote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va)
2427 struct rwlock *lock;
2431 rv = pmap_demote_l2_locked(pmap, l2, va, &lock);
2438 * Tries to demote a 2MB page mapping. If demotion fails, the 2MB page
2439 * mapping is invalidated.
2442 pmap_demote_l2_locked(pmap_t pmap, pd_entry_t *l2, vm_offset_t va,
2443 struct rwlock **lockp)
2445 struct spglist free;
2447 pd_entry_t newl2, oldl2;
2448 pt_entry_t *firstl3, newl3;
2452 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2454 oldl2 = pmap_load(l2);
2455 KASSERT((oldl2 & PTE_RWX) != 0,
2456 ("pmap_demote_l2_locked: oldl2 is not a leaf entry"));
2457 if ((oldl2 & PTE_A) == 0 || (mpte = pmap_remove_pt_page(pmap, va)) ==
2459 if ((oldl2 & PTE_A) == 0 || (mpte = vm_page_alloc(NULL,
2460 pmap_l2_pindex(va), (VIRT_IN_DMAP(va) ? VM_ALLOC_INTERRUPT :
2461 VM_ALLOC_NORMAL) | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) ==
2464 (void)pmap_remove_l2(pmap, l2, va & ~L2_OFFSET,
2465 pmap_load(pmap_l1(pmap, va)), &free, lockp);
2466 vm_page_free_pages_toq(&free, true);
2467 CTR2(KTR_PMAP, "pmap_demote_l2_locked: "
2468 "failure for va %#lx in pmap %p", va, pmap);
2471 if (va < VM_MAXUSER_ADDRESS) {
2472 mpte->ref_count = Ln_ENTRIES;
2473 pmap_resident_count_inc(pmap, 1);
2476 mptepa = VM_PAGE_TO_PHYS(mpte);
2477 firstl3 = (pt_entry_t *)PHYS_TO_DMAP(mptepa);
2478 newl2 = ((mptepa / PAGE_SIZE) << PTE_PPN0_S) | PTE_V;
2479 KASSERT((oldl2 & PTE_A) != 0,
2480 ("pmap_demote_l2_locked: oldl2 is missing PTE_A"));
2481 KASSERT((oldl2 & (PTE_D | PTE_W)) != PTE_W,
2482 ("pmap_demote_l2_locked: oldl2 is missing PTE_D"));
2486 * If the page table page is not leftover from an earlier promotion,
2489 if (mpte->valid == 0) {
2490 for (i = 0; i < Ln_ENTRIES; i++)
2491 pmap_store(firstl3 + i, newl3 + (i << PTE_PPN0_S));
2493 KASSERT(PTE_TO_PHYS(pmap_load(firstl3)) == PTE_TO_PHYS(newl3),
2494 ("pmap_demote_l2_locked: firstl3 and newl3 map different physical "
2498 * If the mapping has changed attributes, update the page table
2501 if ((pmap_load(firstl3) & PTE_PROMOTE) != (newl3 & PTE_PROMOTE))
2502 for (i = 0; i < Ln_ENTRIES; i++)
2503 pmap_store(firstl3 + i, newl3 + (i << PTE_PPN0_S));
2506 * The spare PV entries must be reserved prior to demoting the
2507 * mapping, that is, prior to changing the L2 entry. Otherwise, the
2508 * state of the L2 entry and the PV lists will be inconsistent, which
2509 * can result in reclaim_pv_chunk() attempting to remove a PV entry from
2510 * the wrong PV list and pmap_pv_demote_l2() failing to find the
2511 * expected PV entry for the 2MB page mapping that is being demoted.
2513 if ((oldl2 & PTE_SW_MANAGED) != 0)
2514 reserve_pv_entries(pmap, Ln_ENTRIES - 1, lockp);
2517 * Demote the mapping.
2519 pmap_store(l2, newl2);
2522 * Demote the PV entry.
2524 if ((oldl2 & PTE_SW_MANAGED) != 0)
2525 pmap_pv_demote_l2(pmap, va, PTE_TO_PHYS(oldl2), lockp);
2527 atomic_add_long(&pmap_l2_demotions, 1);
2528 CTR2(KTR_PMAP, "pmap_demote_l2_locked: success for va %#lx in pmap %p",
2533 #if VM_NRESERVLEVEL > 0
2535 pmap_promote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va,
2536 struct rwlock **lockp)
2538 pt_entry_t *firstl3, *l3;
2542 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2545 KASSERT((pmap_load(l2) & PTE_RWX) == 0,
2546 ("pmap_promote_l2: invalid l2 entry %p", l2));
2548 firstl3 = (pt_entry_t *)PHYS_TO_DMAP(PTE_TO_PHYS(pmap_load(l2)));
2549 pa = PTE_TO_PHYS(pmap_load(firstl3));
2550 if ((pa & L2_OFFSET) != 0) {
2551 CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx pmap %p",
2553 atomic_add_long(&pmap_l2_p_failures, 1);
2558 for (l3 = firstl3 + 1; l3 < firstl3 + Ln_ENTRIES; l3++) {
2559 if (PTE_TO_PHYS(pmap_load(l3)) != pa) {
2561 "pmap_promote_l2: failure for va %#lx pmap %p",
2563 atomic_add_long(&pmap_l2_p_failures, 1);
2566 if ((pmap_load(l3) & PTE_PROMOTE) !=
2567 (pmap_load(firstl3) & PTE_PROMOTE)) {
2569 "pmap_promote_l2: failure for va %#lx pmap %p",
2571 atomic_add_long(&pmap_l2_p_failures, 1);
2577 ml3 = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2578 KASSERT(ml3->pindex == pmap_l2_pindex(va),
2579 ("pmap_promote_l2: page table page's pindex is wrong"));
2580 if (pmap_insert_pt_page(pmap, ml3, true)) {
2581 CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx pmap %p",
2583 atomic_add_long(&pmap_l2_p_failures, 1);
2587 if ((pmap_load(firstl3) & PTE_SW_MANAGED) != 0)
2588 pmap_pv_promote_l2(pmap, va, PTE_TO_PHYS(pmap_load(firstl3)),
2591 pmap_store(l2, pmap_load(firstl3));
2593 atomic_add_long(&pmap_l2_promotions, 1);
2594 CTR2(KTR_PMAP, "pmap_promote_l2: success for va %#lx in pmap %p", va,
2600 * Insert the given physical page (p) at
2601 * the specified virtual address (v) in the
2602 * target physical map with the protection requested.
2604 * If specified, the page will be wired down, meaning
2605 * that the related pte can not be reclaimed.
2607 * NB: This is the only routine which MAY NOT lazy-evaluate
2608 * or lose information. That is, this routine must actually
2609 * insert this page into the given map NOW.
2612 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2613 u_int flags, int8_t psind)
2615 struct rwlock *lock;
2616 pd_entry_t *l1, *l2, l2e;
2617 pt_entry_t new_l3, orig_l3;
2620 vm_paddr_t opa, pa, l2_pa, l3_pa;
2621 vm_page_t mpte, om, l2_m, l3_m;
2623 pn_t l2_pn, l3_pn, pn;
2627 va = trunc_page(va);
2628 if ((m->oflags & VPO_UNMANAGED) == 0)
2629 VM_PAGE_OBJECT_BUSY_ASSERT(m);
2630 pa = VM_PAGE_TO_PHYS(m);
2631 pn = (pa / PAGE_SIZE);
2633 new_l3 = PTE_V | PTE_R | PTE_A;
2634 if (prot & VM_PROT_EXECUTE)
2636 if (flags & VM_PROT_WRITE)
2638 if (prot & VM_PROT_WRITE)
2640 if (va < VM_MAX_USER_ADDRESS)
2643 new_l3 |= (pn << PTE_PPN0_S);
2644 if ((flags & PMAP_ENTER_WIRED) != 0)
2645 new_l3 |= PTE_SW_WIRED;
2648 * Set modified bit gratuitously for writeable mappings if
2649 * the page is unmanaged. We do not want to take a fault
2650 * to do the dirty bit accounting for these mappings.
2652 if ((m->oflags & VPO_UNMANAGED) != 0) {
2653 if (prot & VM_PROT_WRITE)
2656 new_l3 |= PTE_SW_MANAGED;
2658 CTR2(KTR_PMAP, "pmap_enter: %.16lx -> %.16lx", va, pa);
2662 rw_rlock(&pvh_global_lock);
2665 /* Assert the required virtual and physical alignment. */
2666 KASSERT((va & L2_OFFSET) == 0,
2667 ("pmap_enter: va %#lx unaligned", va));
2668 KASSERT(m->psind > 0, ("pmap_enter: m->psind < psind"));
2669 rv = pmap_enter_l2(pmap, va, new_l3, flags, m, &lock);
2673 l2 = pmap_l2(pmap, va);
2674 if (l2 != NULL && ((l2e = pmap_load(l2)) & PTE_V) != 0 &&
2675 ((l2e & PTE_RWX) == 0 || pmap_demote_l2_locked(pmap, l2,
2677 l3 = pmap_l2_to_l3(l2, va);
2678 if (va < VM_MAXUSER_ADDRESS) {
2679 mpte = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2682 } else if (va < VM_MAXUSER_ADDRESS) {
2683 nosleep = (flags & PMAP_ENTER_NOSLEEP) != 0;
2684 mpte = pmap_alloc_l3(pmap, va, nosleep ? NULL : &lock);
2685 if (mpte == NULL && nosleep) {
2686 CTR0(KTR_PMAP, "pmap_enter: mpte == NULL");
2689 rw_runlock(&pvh_global_lock);
2691 return (KERN_RESOURCE_SHORTAGE);
2693 l3 = pmap_l3(pmap, va);
2695 l3 = pmap_l3(pmap, va);
2696 /* TODO: This is not optimal, but should mostly work */
2699 l2_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2700 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
2703 panic("pmap_enter: l2 pte_m == NULL");
2704 if ((l2_m->flags & PG_ZERO) == 0)
2705 pmap_zero_page(l2_m);
2707 l2_pa = VM_PAGE_TO_PHYS(l2_m);
2708 l2_pn = (l2_pa / PAGE_SIZE);
2710 l1 = pmap_l1(pmap, va);
2712 entry |= (l2_pn << PTE_PPN0_S);
2713 pmap_store(l1, entry);
2714 pmap_distribute_l1(pmap, pmap_l1_index(va), entry);
2715 l2 = pmap_l1_to_l2(l1, va);
2718 l3_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2719 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO);
2721 panic("pmap_enter: l3 pte_m == NULL");
2722 if ((l3_m->flags & PG_ZERO) == 0)
2723 pmap_zero_page(l3_m);
2725 l3_pa = VM_PAGE_TO_PHYS(l3_m);
2726 l3_pn = (l3_pa / PAGE_SIZE);
2728 entry |= (l3_pn << PTE_PPN0_S);
2729 pmap_store(l2, entry);
2730 l3 = pmap_l2_to_l3(l2, va);
2732 pmap_invalidate_page(pmap, va);
2735 orig_l3 = pmap_load(l3);
2736 opa = PTE_TO_PHYS(orig_l3);
2740 * Is the specified virtual address already mapped?
2742 if ((orig_l3 & PTE_V) != 0) {
2744 * Wiring change, just update stats. We don't worry about
2745 * wiring PT pages as they remain resident as long as there
2746 * are valid mappings in them. Hence, if a user page is wired,
2747 * the PT page will be also.
2749 if ((flags & PMAP_ENTER_WIRED) != 0 &&
2750 (orig_l3 & PTE_SW_WIRED) == 0)
2751 pmap->pm_stats.wired_count++;
2752 else if ((flags & PMAP_ENTER_WIRED) == 0 &&
2753 (orig_l3 & PTE_SW_WIRED) != 0)
2754 pmap->pm_stats.wired_count--;
2757 * Remove the extra PT page reference.
2761 KASSERT(mpte->ref_count > 0,
2762 ("pmap_enter: missing reference to page table page,"
2767 * Has the physical page changed?
2771 * No, might be a protection or wiring change.
2773 if ((orig_l3 & PTE_SW_MANAGED) != 0 &&
2774 (new_l3 & PTE_W) != 0)
2775 vm_page_aflag_set(m, PGA_WRITEABLE);
2780 * The physical page has changed. Temporarily invalidate
2781 * the mapping. This ensures that all threads sharing the
2782 * pmap keep a consistent view of the mapping, which is
2783 * necessary for the correct handling of COW faults. It
2784 * also permits reuse of the old mapping's PV entry,
2785 * avoiding an allocation.
2787 * For consistency, handle unmanaged mappings the same way.
2789 orig_l3 = pmap_load_clear(l3);
2790 KASSERT(PTE_TO_PHYS(orig_l3) == opa,
2791 ("pmap_enter: unexpected pa update for %#lx", va));
2792 if ((orig_l3 & PTE_SW_MANAGED) != 0) {
2793 om = PHYS_TO_VM_PAGE(opa);
2796 * The pmap lock is sufficient to synchronize with
2797 * concurrent calls to pmap_page_test_mappings() and
2798 * pmap_ts_referenced().
2800 if ((orig_l3 & PTE_D) != 0)
2802 if ((orig_l3 & PTE_A) != 0)
2803 vm_page_aflag_set(om, PGA_REFERENCED);
2804 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, opa);
2805 pv = pmap_pvh_remove(&om->md, pmap, va);
2807 ("pmap_enter: no PV entry for %#lx", va));
2808 if ((new_l3 & PTE_SW_MANAGED) == 0)
2809 free_pv_entry(pmap, pv);
2810 if ((om->a.flags & PGA_WRITEABLE) != 0 &&
2811 TAILQ_EMPTY(&om->md.pv_list) &&
2812 ((om->flags & PG_FICTITIOUS) != 0 ||
2813 TAILQ_EMPTY(&pa_to_pvh(opa)->pv_list)))
2814 vm_page_aflag_clear(om, PGA_WRITEABLE);
2816 pmap_invalidate_page(pmap, va);
2820 * Increment the counters.
2822 if ((new_l3 & PTE_SW_WIRED) != 0)
2823 pmap->pm_stats.wired_count++;
2824 pmap_resident_count_inc(pmap, 1);
2827 * Enter on the PV list if part of our managed memory.
2829 if ((new_l3 & PTE_SW_MANAGED) != 0) {
2831 pv = get_pv_entry(pmap, &lock);
2834 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, pa);
2835 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
2837 if ((new_l3 & PTE_W) != 0)
2838 vm_page_aflag_set(m, PGA_WRITEABLE);
2843 * Sync the i-cache on all harts before updating the PTE
2844 * if the new PTE is executable.
2846 if (prot & VM_PROT_EXECUTE)
2847 pmap_sync_icache(pmap, va, PAGE_SIZE);
2850 * Update the L3 entry.
2853 orig_l3 = pmap_load_store(l3, new_l3);
2854 pmap_invalidate_page(pmap, va);
2855 KASSERT(PTE_TO_PHYS(orig_l3) == pa,
2856 ("pmap_enter: invalid update"));
2857 if ((orig_l3 & (PTE_D | PTE_SW_MANAGED)) ==
2858 (PTE_D | PTE_SW_MANAGED))
2861 pmap_store(l3, new_l3);
2864 #if VM_NRESERVLEVEL > 0
2865 if (mpte != NULL && mpte->ref_count == Ln_ENTRIES &&
2866 pmap_ps_enabled(pmap) &&
2867 (m->flags & PG_FICTITIOUS) == 0 &&
2868 vm_reserv_level_iffullpop(m) == 0)
2869 pmap_promote_l2(pmap, l2, va, &lock);
2876 rw_runlock(&pvh_global_lock);
2882 * Tries to create a read- and/or execute-only 2MB page mapping. Returns true
2883 * if successful. Returns false if (1) a page table page cannot be allocated
2884 * without sleeping, (2) a mapping already exists at the specified virtual
2885 * address, or (3) a PV entry cannot be allocated without reclaiming another
2889 pmap_enter_2mpage(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2890 struct rwlock **lockp)
2895 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2897 pn = VM_PAGE_TO_PHYS(m) / PAGE_SIZE;
2898 new_l2 = (pd_entry_t)((pn << PTE_PPN0_S) | PTE_R | PTE_V);
2899 if ((m->oflags & VPO_UNMANAGED) == 0)
2900 new_l2 |= PTE_SW_MANAGED;
2901 if ((prot & VM_PROT_EXECUTE) != 0)
2903 if (va < VM_MAXUSER_ADDRESS)
2905 return (pmap_enter_l2(pmap, va, new_l2, PMAP_ENTER_NOSLEEP |
2906 PMAP_ENTER_NOREPLACE | PMAP_ENTER_NORECLAIM, NULL, lockp) ==
2911 * Tries to create the specified 2MB page mapping. Returns KERN_SUCCESS if
2912 * the mapping was created, and either KERN_FAILURE or KERN_RESOURCE_SHORTAGE
2913 * otherwise. Returns KERN_FAILURE if PMAP_ENTER_NOREPLACE was specified and
2914 * a mapping already exists at the specified virtual address. Returns
2915 * KERN_RESOURCE_SHORTAGE if PMAP_ENTER_NOSLEEP was specified and a page table
2916 * page allocation failed. Returns KERN_RESOURCE_SHORTAGE if
2917 * PMAP_ENTER_NORECLAIM was specified and a PV entry allocation failed.
2919 * The parameter "m" is only used when creating a managed, writeable mapping.
2922 pmap_enter_l2(pmap_t pmap, vm_offset_t va, pd_entry_t new_l2, u_int flags,
2923 vm_page_t m, struct rwlock **lockp)
2925 struct spglist free;
2926 pd_entry_t *l2, *l3, oldl2;
2930 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2932 if ((l2pg = pmap_alloc_l2(pmap, va, (flags & PMAP_ENTER_NOSLEEP) != 0 ?
2933 NULL : lockp)) == NULL) {
2934 CTR2(KTR_PMAP, "pmap_enter_l2: failure for va %#lx in pmap %p",
2936 return (KERN_RESOURCE_SHORTAGE);
2939 l2 = (pd_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(l2pg));
2940 l2 = &l2[pmap_l2_index(va)];
2941 if ((oldl2 = pmap_load(l2)) != 0) {
2942 KASSERT(l2pg->ref_count > 1,
2943 ("pmap_enter_l2: l2pg's ref count is too low"));
2944 if ((flags & PMAP_ENTER_NOREPLACE) != 0) {
2947 "pmap_enter_l2: failure for va %#lx in pmap %p",
2949 return (KERN_FAILURE);
2952 if ((oldl2 & PTE_RWX) != 0)
2953 (void)pmap_remove_l2(pmap, l2, va,
2954 pmap_load(pmap_l1(pmap, va)), &free, lockp);
2956 for (sva = va; sva < va + L2_SIZE; sva += PAGE_SIZE) {
2957 l3 = pmap_l2_to_l3(l2, sva);
2958 if ((pmap_load(l3) & PTE_V) != 0 &&
2959 pmap_remove_l3(pmap, l3, sva, oldl2, &free,
2963 vm_page_free_pages_toq(&free, true);
2964 if (va >= VM_MAXUSER_ADDRESS) {
2966 * Both pmap_remove_l2() and pmap_remove_l3() will
2967 * leave the kernel page table page zero filled.
2969 mt = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2970 if (pmap_insert_pt_page(pmap, mt, false))
2971 panic("pmap_enter_l2: trie insert failed");
2973 KASSERT(pmap_load(l2) == 0,
2974 ("pmap_enter_l2: non-zero L2 entry %p", l2));
2977 if ((new_l2 & PTE_SW_MANAGED) != 0) {
2979 * Abort this mapping if its PV entry could not be created.
2981 if (!pmap_pv_insert_l2(pmap, va, new_l2, flags, lockp)) {
2983 if (pmap_unwire_ptp(pmap, va, l2pg, &free)) {
2985 * Although "va" is not mapped, paging-structure
2986 * caches could nonetheless have entries that
2987 * refer to the freed page table pages.
2988 * Invalidate those entries.
2990 pmap_invalidate_page(pmap, va);
2991 vm_page_free_pages_toq(&free, true);
2994 "pmap_enter_l2: failure for va %#lx in pmap %p",
2996 return (KERN_RESOURCE_SHORTAGE);
2998 if ((new_l2 & PTE_W) != 0)
2999 for (mt = m; mt < &m[L2_SIZE / PAGE_SIZE]; mt++)
3000 vm_page_aflag_set(mt, PGA_WRITEABLE);
3004 * Increment counters.
3006 if ((new_l2 & PTE_SW_WIRED) != 0)
3007 pmap->pm_stats.wired_count += L2_SIZE / PAGE_SIZE;
3008 pmap->pm_stats.resident_count += L2_SIZE / PAGE_SIZE;
3011 * Map the superpage.
3013 pmap_store(l2, new_l2);
3015 atomic_add_long(&pmap_l2_mappings, 1);
3016 CTR2(KTR_PMAP, "pmap_enter_l2: success for va %#lx in pmap %p",
3019 return (KERN_SUCCESS);
3023 * Maps a sequence of resident pages belonging to the same object.
3024 * The sequence begins with the given page m_start. This page is
3025 * mapped at the given virtual address start. Each subsequent page is
3026 * mapped at a virtual address that is offset from start by the same
3027 * amount as the page is offset from m_start within the object. The
3028 * last page in the sequence is the page with the largest offset from
3029 * m_start that can be mapped at a virtual address less than the given
3030 * virtual address end. Not every virtual page between start and end
3031 * is mapped; only those for which a resident page exists with the
3032 * corresponding offset from m_start are mapped.
3035 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
3036 vm_page_t m_start, vm_prot_t prot)
3038 struct rwlock *lock;
3041 vm_pindex_t diff, psize;
3043 VM_OBJECT_ASSERT_LOCKED(m_start->object);
3045 psize = atop(end - start);
3049 rw_rlock(&pvh_global_lock);
3051 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
3052 va = start + ptoa(diff);
3053 if ((va & L2_OFFSET) == 0 && va + L2_SIZE <= end &&
3054 m->psind == 1 && pmap_ps_enabled(pmap) &&
3055 pmap_enter_2mpage(pmap, va, m, prot, &lock))
3056 m = &m[L2_SIZE / PAGE_SIZE - 1];
3058 mpte = pmap_enter_quick_locked(pmap, va, m, prot, mpte,
3060 m = TAILQ_NEXT(m, listq);
3064 rw_runlock(&pvh_global_lock);
3069 * this code makes some *MAJOR* assumptions:
3070 * 1. Current pmap & pmap exists.
3073 * 4. No page table pages.
3074 * but is *MUCH* faster than pmap_enter...
3078 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3080 struct rwlock *lock;
3083 rw_rlock(&pvh_global_lock);
3085 (void)pmap_enter_quick_locked(pmap, va, m, prot, NULL, &lock);
3088 rw_runlock(&pvh_global_lock);
3093 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
3094 vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp)
3096 struct spglist free;
3099 pt_entry_t *l3, newl3;
3101 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
3102 (m->oflags & VPO_UNMANAGED) != 0,
3103 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
3104 rw_assert(&pvh_global_lock, RA_LOCKED);
3105 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
3107 CTR2(KTR_PMAP, "pmap_enter_quick_locked: %p %lx", pmap, va);
3109 * In the case that a page table page is not
3110 * resident, we are creating it here.
3112 if (va < VM_MAXUSER_ADDRESS) {
3113 vm_pindex_t l2pindex;
3116 * Calculate pagetable page index
3118 l2pindex = pmap_l2_pindex(va);
3119 if (mpte && (mpte->pindex == l2pindex)) {
3125 l2 = pmap_l2(pmap, va);
3128 * If the page table page is mapped, we just increment
3129 * the hold count, and activate it. Otherwise, we
3130 * attempt to allocate a page table page. If this
3131 * attempt fails, we don't retry. Instead, we give up.
3133 if (l2 != NULL && pmap_load(l2) != 0) {
3134 phys = PTE_TO_PHYS(pmap_load(l2));
3135 mpte = PHYS_TO_VM_PAGE(phys);
3139 * Pass NULL instead of the PV list lock
3140 * pointer, because we don't intend to sleep.
3142 mpte = _pmap_alloc_l3(pmap, l2pindex, NULL);
3147 l3 = (pt_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mpte));
3148 l3 = &l3[pmap_l3_index(va)];
3151 l3 = pmap_l3(kernel_pmap, va);
3154 panic("pmap_enter_quick_locked: No l3");
3155 if (pmap_load(l3) != 0) {
3164 * Enter on the PV list if part of our managed memory.
3166 if ((m->oflags & VPO_UNMANAGED) == 0 &&
3167 !pmap_try_insert_pv_entry(pmap, va, m, lockp)) {
3170 if (pmap_unwire_ptp(pmap, va, mpte, &free)) {
3171 pmap_invalidate_page(pmap, va);
3172 vm_page_free_pages_toq(&free, false);
3180 * Increment counters
3182 pmap_resident_count_inc(pmap, 1);
3184 newl3 = ((VM_PAGE_TO_PHYS(m) / PAGE_SIZE) << PTE_PPN0_S) |
3186 if ((prot & VM_PROT_EXECUTE) != 0)
3188 if ((m->oflags & VPO_UNMANAGED) == 0)
3189 newl3 |= PTE_SW_MANAGED;
3190 if (va < VM_MAX_USER_ADDRESS)
3194 * Sync the i-cache on all harts before updating the PTE
3195 * if the new PTE is executable.
3197 if (prot & VM_PROT_EXECUTE)
3198 pmap_sync_icache(pmap, va, PAGE_SIZE);
3200 pmap_store(l3, newl3);
3202 pmap_invalidate_page(pmap, va);
3207 * This code maps large physical mmap regions into the
3208 * processor address space. Note that some shortcuts
3209 * are taken, but the code works.
3212 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
3213 vm_pindex_t pindex, vm_size_t size)
3216 VM_OBJECT_ASSERT_WLOCKED(object);
3217 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
3218 ("pmap_object_init_pt: non-device object"));
3222 * Clear the wired attribute from the mappings for the specified range of
3223 * addresses in the given pmap. Every valid mapping within that range
3224 * must have the wired attribute set. In contrast, invalid mappings
3225 * cannot have the wired attribute set, so they are ignored.
3227 * The wired attribute of the page table entry is not a hardware feature,
3228 * so there is no need to invalidate any TLB entries.
3231 pmap_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
3233 vm_offset_t va_next;
3234 pd_entry_t *l1, *l2, l2e;
3235 pt_entry_t *l3, l3e;
3236 bool pv_lists_locked;
3238 pv_lists_locked = false;
3241 for (; sva < eva; sva = va_next) {
3242 l1 = pmap_l1(pmap, sva);
3243 if (pmap_load(l1) == 0) {
3244 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
3250 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
3254 l2 = pmap_l1_to_l2(l1, sva);
3255 if ((l2e = pmap_load(l2)) == 0)
3257 if ((l2e & PTE_RWX) != 0) {
3258 if (sva + L2_SIZE == va_next && eva >= va_next) {
3259 if ((l2e & PTE_SW_WIRED) == 0)
3260 panic("pmap_unwire: l2 %#jx is missing "
3261 "PTE_SW_WIRED", (uintmax_t)l2e);
3262 pmap_clear_bits(l2, PTE_SW_WIRED);
3265 if (!pv_lists_locked) {
3266 pv_lists_locked = true;
3267 if (!rw_try_rlock(&pvh_global_lock)) {
3269 rw_rlock(&pvh_global_lock);
3274 if (!pmap_demote_l2(pmap, l2, sva))
3275 panic("pmap_unwire: demotion failed");
3281 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
3283 if ((l3e = pmap_load(l3)) == 0)
3285 if ((l3e & PTE_SW_WIRED) == 0)
3286 panic("pmap_unwire: l3 %#jx is missing "
3287 "PTE_SW_WIRED", (uintmax_t)l3e);
3290 * PG_W must be cleared atomically. Although the pmap
3291 * lock synchronizes access to PG_W, another processor
3292 * could be setting PG_M and/or PG_A concurrently.
3294 pmap_clear_bits(l3, PTE_SW_WIRED);
3295 pmap->pm_stats.wired_count--;
3298 if (pv_lists_locked)
3299 rw_runlock(&pvh_global_lock);
3304 * Copy the range specified by src_addr/len
3305 * from the source map to the range dst_addr/len
3306 * in the destination map.
3308 * This routine is only advisory and need not do anything.
3312 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
3313 vm_offset_t src_addr)
3319 * pmap_zero_page zeros the specified hardware page by mapping
3320 * the page into KVM and using bzero to clear its contents.
3323 pmap_zero_page(vm_page_t m)
3325 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
3327 pagezero((void *)va);
3331 * pmap_zero_page_area zeros the specified hardware page by mapping
3332 * the page into KVM and using bzero to clear its contents.
3334 * off and size may not cover an area beyond a single hardware page.
3337 pmap_zero_page_area(vm_page_t m, int off, int size)
3339 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
3341 if (off == 0 && size == PAGE_SIZE)
3342 pagezero((void *)va);
3344 bzero((char *)va + off, size);
3348 * pmap_copy_page copies the specified (machine independent)
3349 * page by mapping the page into virtual memory and using
3350 * bcopy to copy the page, one machine dependent page at a
3354 pmap_copy_page(vm_page_t msrc, vm_page_t mdst)
3356 vm_offset_t src = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(msrc));
3357 vm_offset_t dst = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mdst));
3359 pagecopy((void *)src, (void *)dst);
3362 int unmapped_buf_allowed = 1;
3365 pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[],
3366 vm_offset_t b_offset, int xfersize)
3370 vm_paddr_t p_a, p_b;
3371 vm_offset_t a_pg_offset, b_pg_offset;
3374 while (xfersize > 0) {
3375 a_pg_offset = a_offset & PAGE_MASK;
3376 m_a = ma[a_offset >> PAGE_SHIFT];
3377 p_a = m_a->phys_addr;
3378 b_pg_offset = b_offset & PAGE_MASK;
3379 m_b = mb[b_offset >> PAGE_SHIFT];
3380 p_b = m_b->phys_addr;
3381 cnt = min(xfersize, PAGE_SIZE - a_pg_offset);
3382 cnt = min(cnt, PAGE_SIZE - b_pg_offset);
3383 if (__predict_false(!PHYS_IN_DMAP(p_a))) {
3384 panic("!DMAP a %lx", p_a);
3386 a_cp = (char *)PHYS_TO_DMAP(p_a) + a_pg_offset;
3388 if (__predict_false(!PHYS_IN_DMAP(p_b))) {
3389 panic("!DMAP b %lx", p_b);
3391 b_cp = (char *)PHYS_TO_DMAP(p_b) + b_pg_offset;
3393 bcopy(a_cp, b_cp, cnt);
3401 pmap_quick_enter_page(vm_page_t m)
3404 return (PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)));
3408 pmap_quick_remove_page(vm_offset_t addr)
3413 * Returns true if the pmap's pv is one of the first
3414 * 16 pvs linked to from this page. This count may
3415 * be changed upwards or downwards in the future; it
3416 * is only necessary that true be returned for a small
3417 * subset of pmaps for proper page aging.
3420 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
3422 struct md_page *pvh;
3423 struct rwlock *lock;
3428 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3429 ("pmap_page_exists_quick: page %p is not managed", m));
3431 rw_rlock(&pvh_global_lock);
3432 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3434 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3435 if (PV_PMAP(pv) == pmap) {
3443 if (!rv && loops < 16 && (m->flags & PG_FICTITIOUS) == 0) {
3444 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3445 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3446 if (PV_PMAP(pv) == pmap) {
3456 rw_runlock(&pvh_global_lock);
3461 * pmap_page_wired_mappings:
3463 * Return the number of managed mappings to the given physical page
3467 pmap_page_wired_mappings(vm_page_t m)
3469 struct md_page *pvh;
3470 struct rwlock *lock;
3475 int count, md_gen, pvh_gen;
3477 if ((m->oflags & VPO_UNMANAGED) != 0)
3479 rw_rlock(&pvh_global_lock);
3480 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3484 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3486 if (!PMAP_TRYLOCK(pmap)) {
3487 md_gen = m->md.pv_gen;
3491 if (md_gen != m->md.pv_gen) {
3496 l3 = pmap_l3(pmap, pv->pv_va);
3497 if ((pmap_load(l3) & PTE_SW_WIRED) != 0)
3501 if ((m->flags & PG_FICTITIOUS) == 0) {
3502 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3503 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3505 if (!PMAP_TRYLOCK(pmap)) {
3506 md_gen = m->md.pv_gen;
3507 pvh_gen = pvh->pv_gen;
3511 if (md_gen != m->md.pv_gen ||
3512 pvh_gen != pvh->pv_gen) {
3517 l2 = pmap_l2(pmap, pv->pv_va);
3518 if ((pmap_load(l2) & PTE_SW_WIRED) != 0)
3524 rw_runlock(&pvh_global_lock);
3529 * Returns true if the given page is mapped individually or as part of
3530 * a 2mpage. Otherwise, returns false.
3533 pmap_page_is_mapped(vm_page_t m)
3535 struct rwlock *lock;
3538 if ((m->oflags & VPO_UNMANAGED) != 0)
3540 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3542 rv = !TAILQ_EMPTY(&m->md.pv_list) ||
3543 ((m->flags & PG_FICTITIOUS) == 0 &&
3544 !TAILQ_EMPTY(&pa_to_pvh(VM_PAGE_TO_PHYS(m))->pv_list));
3550 pmap_remove_pages_pv(pmap_t pmap, vm_page_t m, pv_entry_t pv,
3551 struct spglist *free, bool superpage)
3553 struct md_page *pvh;
3557 pmap_resident_count_dec(pmap, Ln_ENTRIES);
3558 pvh = pa_to_pvh(m->phys_addr);
3559 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
3561 if (TAILQ_EMPTY(&pvh->pv_list)) {
3562 for (mt = m; mt < &m[Ln_ENTRIES]; mt++)
3563 if (TAILQ_EMPTY(&mt->md.pv_list) &&
3564 (mt->a.flags & PGA_WRITEABLE) != 0)
3565 vm_page_aflag_clear(mt, PGA_WRITEABLE);
3567 mpte = pmap_remove_pt_page(pmap, pv->pv_va);
3569 KASSERT(mpte->valid == VM_PAGE_BITS_ALL,
3570 ("pmap_remove_pages: pte page not promoted"));
3571 pmap_resident_count_dec(pmap, 1);
3572 KASSERT(mpte->ref_count == Ln_ENTRIES,
3573 ("pmap_remove_pages: pte page ref count error"));
3574 mpte->ref_count = 0;
3575 pmap_add_delayed_free_list(mpte, free, FALSE);
3578 pmap_resident_count_dec(pmap, 1);
3579 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
3581 if (TAILQ_EMPTY(&m->md.pv_list) &&
3582 (m->a.flags & PGA_WRITEABLE) != 0) {
3583 pvh = pa_to_pvh(m->phys_addr);
3584 if (TAILQ_EMPTY(&pvh->pv_list))
3585 vm_page_aflag_clear(m, PGA_WRITEABLE);
3591 * Destroy all managed, non-wired mappings in the given user-space
3592 * pmap. This pmap cannot be active on any processor besides the
3595 * This function cannot be applied to the kernel pmap. Moreover, it
3596 * is not intended for general use. It is only to be used during
3597 * process termination. Consequently, it can be implemented in ways
3598 * that make it faster than pmap_remove(). First, it can more quickly
3599 * destroy mappings by iterating over the pmap's collection of PV
3600 * entries, rather than searching the page table. Second, it doesn't
3601 * have to test and clear the page table entries atomically, because
3602 * no processor is currently accessing the user address space. In
3603 * particular, a page table entry's dirty bit won't change state once
3604 * this function starts.
3607 pmap_remove_pages(pmap_t pmap)
3609 struct spglist free;
3611 pt_entry_t *pte, tpte;
3614 struct pv_chunk *pc, *npc;
3615 struct rwlock *lock;
3617 uint64_t inuse, bitmask;
3618 int allfree, field, freed, idx;
3624 rw_rlock(&pvh_global_lock);
3626 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
3629 for (field = 0; field < _NPCM; field++) {
3630 inuse = ~pc->pc_map[field] & pc_freemask[field];
3631 while (inuse != 0) {
3632 bit = ffsl(inuse) - 1;
3633 bitmask = 1UL << bit;
3634 idx = field * 64 + bit;
3635 pv = &pc->pc_pventry[idx];
3638 pte = pmap_l1(pmap, pv->pv_va);
3639 ptepde = pmap_load(pte);
3640 pte = pmap_l1_to_l2(pte, pv->pv_va);
3641 tpte = pmap_load(pte);
3642 if ((tpte & PTE_RWX) != 0) {
3646 pte = pmap_l2_to_l3(pte, pv->pv_va);
3647 tpte = pmap_load(pte);
3652 * We cannot remove wired pages from a
3653 * process' mapping at this time.
3655 if (tpte & PTE_SW_WIRED) {
3660 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(tpte));
3661 KASSERT((m->flags & PG_FICTITIOUS) != 0 ||
3662 m < &vm_page_array[vm_page_array_size],
3663 ("pmap_remove_pages: bad pte %#jx",
3669 * Update the vm_page_t clean/reference bits.
3671 if ((tpte & (PTE_D | PTE_W)) ==
3675 mt < &m[Ln_ENTRIES]; mt++)
3681 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(&lock, m);
3684 pc->pc_map[field] |= bitmask;
3686 pmap_remove_pages_pv(pmap, m, pv, &free,
3688 pmap_unuse_pt(pmap, pv->pv_va, ptepde, &free);
3692 PV_STAT(atomic_add_long(&pv_entry_frees, freed));
3693 PV_STAT(atomic_add_int(&pv_entry_spare, freed));
3694 PV_STAT(atomic_subtract_long(&pv_entry_count, freed));
3696 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
3702 pmap_invalidate_all(pmap);
3703 rw_runlock(&pvh_global_lock);
3705 vm_page_free_pages_toq(&free, false);
3709 pmap_page_test_mappings(vm_page_t m, boolean_t accessed, boolean_t modified)
3711 struct md_page *pvh;
3712 struct rwlock *lock;
3714 pt_entry_t *l3, mask;
3717 int md_gen, pvh_gen;
3727 rw_rlock(&pvh_global_lock);
3728 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3731 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3733 if (!PMAP_TRYLOCK(pmap)) {
3734 md_gen = m->md.pv_gen;
3738 if (md_gen != m->md.pv_gen) {
3743 l3 = pmap_l3(pmap, pv->pv_va);
3744 rv = (pmap_load(l3) & mask) == mask;
3749 if ((m->flags & PG_FICTITIOUS) == 0) {
3750 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3751 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3753 if (!PMAP_TRYLOCK(pmap)) {
3754 md_gen = m->md.pv_gen;
3755 pvh_gen = pvh->pv_gen;
3759 if (md_gen != m->md.pv_gen ||
3760 pvh_gen != pvh->pv_gen) {
3765 l2 = pmap_l2(pmap, pv->pv_va);
3766 rv = (pmap_load(l2) & mask) == mask;
3774 rw_runlock(&pvh_global_lock);
3781 * Return whether or not the specified physical page was modified
3782 * in any physical maps.
3785 pmap_is_modified(vm_page_t m)
3788 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3789 ("pmap_is_modified: page %p is not managed", m));
3792 * If the page is not busied then this check is racy.
3794 if (!pmap_page_is_write_mapped(m))
3796 return (pmap_page_test_mappings(m, FALSE, TRUE));
3800 * pmap_is_prefaultable:
3802 * Return whether or not the specified virtual address is eligible
3806 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
3813 l3 = pmap_l3(pmap, addr);
3814 if (l3 != NULL && pmap_load(l3) != 0) {
3822 * pmap_is_referenced:
3824 * Return whether or not the specified physical page was referenced
3825 * in any physical maps.
3828 pmap_is_referenced(vm_page_t m)
3831 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3832 ("pmap_is_referenced: page %p is not managed", m));
3833 return (pmap_page_test_mappings(m, TRUE, FALSE));
3837 * Clear the write and modified bits in each of the given page's mappings.
3840 pmap_remove_write(vm_page_t m)
3842 struct md_page *pvh;
3843 struct rwlock *lock;
3846 pt_entry_t *l3, oldl3, newl3;
3847 pv_entry_t next_pv, pv;
3849 int md_gen, pvh_gen;
3851 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3852 ("pmap_remove_write: page %p is not managed", m));
3853 vm_page_assert_busied(m);
3855 if (!pmap_page_is_write_mapped(m))
3857 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3858 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
3859 pa_to_pvh(VM_PAGE_TO_PHYS(m));
3860 rw_rlock(&pvh_global_lock);
3863 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_next, next_pv) {
3865 if (!PMAP_TRYLOCK(pmap)) {
3866 pvh_gen = pvh->pv_gen;
3870 if (pvh_gen != pvh->pv_gen) {
3877 l2 = pmap_l2(pmap, va);
3878 if ((pmap_load(l2) & PTE_W) != 0)
3879 (void)pmap_demote_l2_locked(pmap, l2, va, &lock);
3880 KASSERT(lock == VM_PAGE_TO_PV_LIST_LOCK(m),
3881 ("inconsistent pv lock %p %p for page %p",
3882 lock, VM_PAGE_TO_PV_LIST_LOCK(m), m));
3885 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3887 if (!PMAP_TRYLOCK(pmap)) {
3888 pvh_gen = pvh->pv_gen;
3889 md_gen = m->md.pv_gen;
3893 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
3899 l3 = pmap_l3(pmap, pv->pv_va);
3900 oldl3 = pmap_load(l3);
3902 if ((oldl3 & PTE_W) != 0) {
3903 newl3 = oldl3 & ~(PTE_D | PTE_W);
3904 if (!atomic_fcmpset_long(l3, &oldl3, newl3))
3906 if ((oldl3 & PTE_D) != 0)
3908 pmap_invalidate_page(pmap, pv->pv_va);
3913 vm_page_aflag_clear(m, PGA_WRITEABLE);
3914 rw_runlock(&pvh_global_lock);
3918 * pmap_ts_referenced:
3920 * Return a count of reference bits for a page, clearing those bits.
3921 * It is not necessary for every reference bit to be cleared, but it
3922 * is necessary that 0 only be returned when there are truly no
3923 * reference bits set.
3925 * As an optimization, update the page's dirty field if a modified bit is
3926 * found while counting reference bits. This opportunistic update can be
3927 * performed at low cost and can eliminate the need for some future calls
3928 * to pmap_is_modified(). However, since this function stops after
3929 * finding PMAP_TS_REFERENCED_MAX reference bits, it may not detect some
3930 * dirty pages. Those dirty pages will only be detected by a future call
3931 * to pmap_is_modified().
3934 pmap_ts_referenced(vm_page_t m)
3936 struct spglist free;
3937 struct md_page *pvh;
3938 struct rwlock *lock;
3941 pd_entry_t *l2, l2e;
3942 pt_entry_t *l3, l3e;
3945 int cleared, md_gen, not_cleared, pvh_gen;
3947 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3948 ("pmap_ts_referenced: page %p is not managed", m));
3951 pa = VM_PAGE_TO_PHYS(m);
3952 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy : pa_to_pvh(pa);
3954 lock = PHYS_TO_PV_LIST_LOCK(pa);
3955 rw_rlock(&pvh_global_lock);
3959 if ((pvf = TAILQ_FIRST(&pvh->pv_list)) == NULL)
3960 goto small_mappings;
3964 if (!PMAP_TRYLOCK(pmap)) {
3965 pvh_gen = pvh->pv_gen;
3969 if (pvh_gen != pvh->pv_gen) {
3975 l2 = pmap_l2(pmap, va);
3976 l2e = pmap_load(l2);
3977 if ((l2e & (PTE_W | PTE_D)) == (PTE_W | PTE_D)) {
3979 * Although l2e is mapping a 2MB page, because
3980 * this function is called at a 4KB page granularity,
3981 * we only update the 4KB page under test.
3985 if ((l2e & PTE_A) != 0) {
3987 * Since this reference bit is shared by 512 4KB
3988 * pages, it should not be cleared every time it is
3989 * tested. Apply a simple "hash" function on the
3990 * physical page number, the virtual superpage number,
3991 * and the pmap address to select one 4KB page out of
3992 * the 512 on which testing the reference bit will
3993 * result in clearing that reference bit. This
3994 * function is designed to avoid the selection of the
3995 * same 4KB page for every 2MB page mapping.
3997 * On demotion, a mapping that hasn't been referenced
3998 * is simply destroyed. To avoid the possibility of a
3999 * subsequent page fault on a demoted wired mapping,
4000 * always leave its reference bit set. Moreover,
4001 * since the superpage is wired, the current state of
4002 * its reference bit won't affect page replacement.
4004 if ((((pa >> PAGE_SHIFT) ^ (pv->pv_va >> L2_SHIFT) ^
4005 (uintptr_t)pmap) & (Ln_ENTRIES - 1)) == 0 &&
4006 (l2e & PTE_SW_WIRED) == 0) {
4007 pmap_clear_bits(l2, PTE_A);
4008 pmap_invalidate_page(pmap, va);
4014 /* Rotate the PV list if it has more than one entry. */
4015 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
4016 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
4017 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
4020 if (cleared + not_cleared >= PMAP_TS_REFERENCED_MAX)
4022 } while ((pv = TAILQ_FIRST(&pvh->pv_list)) != pvf);
4024 if ((pvf = TAILQ_FIRST(&m->md.pv_list)) == NULL)
4029 if (!PMAP_TRYLOCK(pmap)) {
4030 pvh_gen = pvh->pv_gen;
4031 md_gen = m->md.pv_gen;
4035 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
4040 l2 = pmap_l2(pmap, pv->pv_va);
4042 KASSERT((pmap_load(l2) & PTE_RX) == 0,
4043 ("pmap_ts_referenced: found an invalid l2 table"));
4045 l3 = pmap_l2_to_l3(l2, pv->pv_va);
4046 l3e = pmap_load(l3);
4047 if ((l3e & PTE_D) != 0)
4049 if ((l3e & PTE_A) != 0) {
4050 if ((l3e & PTE_SW_WIRED) == 0) {
4052 * Wired pages cannot be paged out so
4053 * doing accessed bit emulation for
4054 * them is wasted effort. We do the
4055 * hard work for unwired pages only.
4057 pmap_clear_bits(l3, PTE_A);
4058 pmap_invalidate_page(pmap, pv->pv_va);
4064 /* Rotate the PV list if it has more than one entry. */
4065 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
4066 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
4067 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
4070 } while ((pv = TAILQ_FIRST(&m->md.pv_list)) != pvf && cleared +
4071 not_cleared < PMAP_TS_REFERENCED_MAX);
4074 rw_runlock(&pvh_global_lock);
4075 vm_page_free_pages_toq(&free, false);
4076 return (cleared + not_cleared);
4080 * Apply the given advice to the specified range of addresses within the
4081 * given pmap. Depending on the advice, clear the referenced and/or
4082 * modified flags in each mapping and set the mapped page's dirty field.
4085 pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice)
4090 * Clear the modify bits on the specified physical page.
4093 pmap_clear_modify(vm_page_t m)
4095 struct md_page *pvh;
4096 struct rwlock *lock;
4098 pv_entry_t next_pv, pv;
4099 pd_entry_t *l2, oldl2;
4102 int md_gen, pvh_gen;
4104 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4105 ("pmap_clear_modify: page %p is not managed", m));
4106 vm_page_assert_busied(m);
4108 if (!pmap_page_is_write_mapped(m))
4112 * If the page is not PGA_WRITEABLE, then no PTEs can have PG_M set.
4113 * If the object containing the page is locked and the page is not
4114 * exclusive busied, then PGA_WRITEABLE cannot be concurrently set.
4116 if ((m->a.flags & PGA_WRITEABLE) == 0)
4118 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
4119 pa_to_pvh(VM_PAGE_TO_PHYS(m));
4120 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
4121 rw_rlock(&pvh_global_lock);
4124 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_next, next_pv) {
4126 if (!PMAP_TRYLOCK(pmap)) {
4127 pvh_gen = pvh->pv_gen;
4131 if (pvh_gen != pvh->pv_gen) {
4137 l2 = pmap_l2(pmap, va);
4138 oldl2 = pmap_load(l2);
4139 /* If oldl2 has PTE_W set, then it also has PTE_D set. */
4140 if ((oldl2 & PTE_W) != 0 &&
4141 pmap_demote_l2_locked(pmap, l2, va, &lock) &&
4142 (oldl2 & PTE_SW_WIRED) == 0) {
4144 * Write protect the mapping to a single page so that
4145 * a subsequent write access may repromote.
4147 va += VM_PAGE_TO_PHYS(m) - PTE_TO_PHYS(oldl2);
4148 l3 = pmap_l2_to_l3(l2, va);
4149 pmap_clear_bits(l3, PTE_D | PTE_W);
4151 pmap_invalidate_page(pmap, va);
4155 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
4157 if (!PMAP_TRYLOCK(pmap)) {
4158 md_gen = m->md.pv_gen;
4159 pvh_gen = pvh->pv_gen;
4163 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
4168 l2 = pmap_l2(pmap, pv->pv_va);
4169 KASSERT((pmap_load(l2) & PTE_RWX) == 0,
4170 ("pmap_clear_modify: found a 2mpage in page %p's pv list",
4172 l3 = pmap_l2_to_l3(l2, pv->pv_va);
4173 if ((pmap_load(l3) & (PTE_D | PTE_W)) == (PTE_D | PTE_W)) {
4174 pmap_clear_bits(l3, PTE_D | PTE_W);
4175 pmap_invalidate_page(pmap, pv->pv_va);
4180 rw_runlock(&pvh_global_lock);
4184 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
4187 return ((void *)PHYS_TO_DMAP(pa));
4191 pmap_unmapbios(vm_paddr_t pa, vm_size_t size)
4196 * Sets the memory attribute for the specified page.
4199 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
4202 m->md.pv_memattr = ma;
4206 * Perform the pmap work for mincore(2). If the page is not both referenced and
4207 * modified by this pmap, returns its physical address so that the caller can
4208 * find other mappings.
4211 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *pap)
4213 pt_entry_t *l2, *l3, tpte;
4219 l2 = pmap_l2(pmap, addr);
4220 if (l2 != NULL && ((tpte = pmap_load(l2)) & PTE_V) != 0) {
4221 if ((tpte & PTE_RWX) != 0) {
4222 pa = PTE_TO_PHYS(tpte) | (addr & L2_OFFSET);
4223 val = MINCORE_INCORE | MINCORE_PSIND(1);
4225 l3 = pmap_l2_to_l3(l2, addr);
4226 tpte = pmap_load(l3);
4227 if ((tpte & PTE_V) == 0) {
4231 pa = PTE_TO_PHYS(tpte) | (addr & L3_OFFSET);
4232 val = MINCORE_INCORE;
4235 if ((tpte & PTE_D) != 0)
4236 val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
4237 if ((tpte & PTE_A) != 0)
4238 val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
4239 managed = (tpte & PTE_SW_MANAGED) == PTE_SW_MANAGED;
4244 if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
4245 (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) && managed) {
4253 pmap_activate_sw(struct thread *td)
4255 pmap_t oldpmap, pmap;
4258 oldpmap = PCPU_GET(curpmap);
4259 pmap = vmspace_pmap(td->td_proc->p_vmspace);
4260 if (pmap == oldpmap)
4262 load_satp(pmap->pm_satp);
4264 hart = PCPU_GET(hart);
4266 CPU_SET_ATOMIC(hart, &pmap->pm_active);
4267 CPU_CLR_ATOMIC(hart, &oldpmap->pm_active);
4269 CPU_SET(hart, &pmap->pm_active);
4270 CPU_CLR(hart, &oldpmap->pm_active);
4272 PCPU_SET(curpmap, pmap);
4278 pmap_activate(struct thread *td)
4282 pmap_activate_sw(td);
4287 pmap_activate_boot(pmap_t pmap)
4291 hart = PCPU_GET(hart);
4293 CPU_SET_ATOMIC(hart, &pmap->pm_active);
4295 CPU_SET(hart, &pmap->pm_active);
4297 PCPU_SET(curpmap, pmap);
4301 pmap_sync_icache(pmap_t pmap, vm_offset_t va, vm_size_t sz)
4306 * From the RISC-V User-Level ISA V2.2:
4308 * "To make a store to instruction memory visible to all
4309 * RISC-V harts, the writing hart has to execute a data FENCE
4310 * before requesting that all remote RISC-V harts execute a
4313 * However, this is slightly misleading; we still need to
4314 * perform a FENCE.I for the local hart, as FENCE does nothing
4315 * for its icache. FENCE.I alone is also sufficient for the
4320 CPU_CLR(PCPU_GET(hart), &mask);
4322 if (!CPU_EMPTY(&mask) && smp_started) {
4324 sbi_remote_fence_i(mask.__bits);
4330 * Increase the starting virtual address of the given mapping if a
4331 * different alignment might result in more superpage mappings.
4334 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
4335 vm_offset_t *addr, vm_size_t size)
4337 vm_offset_t superpage_offset;
4341 if (object != NULL && (object->flags & OBJ_COLORED) != 0)
4342 offset += ptoa(object->pg_color);
4343 superpage_offset = offset & L2_OFFSET;
4344 if (size - ((L2_SIZE - superpage_offset) & L2_OFFSET) < L2_SIZE ||
4345 (*addr & L2_OFFSET) == superpage_offset)
4347 if ((*addr & L2_OFFSET) < superpage_offset)
4348 *addr = (*addr & ~L2_OFFSET) + superpage_offset;
4350 *addr = ((*addr + L2_OFFSET) & ~L2_OFFSET) + superpage_offset;
4354 * Get the kernel virtual address of a set of physical pages. If there are
4355 * physical addresses not covered by the DMAP perform a transient mapping
4356 * that will be removed when calling pmap_unmap_io_transient.
4358 * \param page The pages the caller wishes to obtain the virtual
4359 * address on the kernel memory map.
4360 * \param vaddr On return contains the kernel virtual memory address
4361 * of the pages passed in the page parameter.
4362 * \param count Number of pages passed in.
4363 * \param can_fault TRUE if the thread using the mapped pages can take
4364 * page faults, FALSE otherwise.
4366 * \returns TRUE if the caller must call pmap_unmap_io_transient when
4367 * finished or FALSE otherwise.
4371 pmap_map_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
4372 boolean_t can_fault)
4375 boolean_t needs_mapping;
4379 * Allocate any KVA space that we need, this is done in a separate
4380 * loop to prevent calling vmem_alloc while pinned.
4382 needs_mapping = FALSE;
4383 for (i = 0; i < count; i++) {
4384 paddr = VM_PAGE_TO_PHYS(page[i]);
4385 if (__predict_false(paddr >= DMAP_MAX_PHYSADDR)) {
4386 error = vmem_alloc(kernel_arena, PAGE_SIZE,
4387 M_BESTFIT | M_WAITOK, &vaddr[i]);
4388 KASSERT(error == 0, ("vmem_alloc failed: %d", error));
4389 needs_mapping = TRUE;
4391 vaddr[i] = PHYS_TO_DMAP(paddr);
4395 /* Exit early if everything is covered by the DMAP */
4401 for (i = 0; i < count; i++) {
4402 paddr = VM_PAGE_TO_PHYS(page[i]);
4403 if (paddr >= DMAP_MAX_PHYSADDR) {
4405 "pmap_map_io_transient: TODO: Map out of DMAP data");
4409 return (needs_mapping);
4413 pmap_unmap_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
4414 boolean_t can_fault)
4421 for (i = 0; i < count; i++) {
4422 paddr = VM_PAGE_TO_PHYS(page[i]);
4423 if (paddr >= DMAP_MAX_PHYSADDR) {
4424 panic("RISCVTODO: pmap_unmap_io_transient: Unmap data");
4430 pmap_is_valid_memattr(pmap_t pmap __unused, vm_memattr_t mode)
4433 return (mode >= VM_MEMATTR_DEVICE && mode <= VM_MEMATTR_WRITE_BACK);
4437 pmap_get_tables(pmap_t pmap, vm_offset_t va, pd_entry_t **l1, pd_entry_t **l2,
4440 pd_entry_t *l1p, *l2p;
4442 /* Get l1 directory entry. */
4443 l1p = pmap_l1(pmap, va);
4446 if (l1p == NULL || (pmap_load(l1p) & PTE_V) == 0)
4449 if ((pmap_load(l1p) & PTE_RX) != 0) {
4455 /* Get l2 directory entry. */
4456 l2p = pmap_l1_to_l2(l1p, va);
4459 if (l2p == NULL || (pmap_load(l2p) & PTE_V) == 0)
4462 if ((pmap_load(l2p) & PTE_RX) != 0) {
4467 /* Get l3 page table entry. */
4468 *l3 = pmap_l2_to_l3(l2p, va);
4474 * Track a range of the kernel's virtual address space that is contiguous
4475 * in various mapping attributes.
4477 struct pmap_kernel_map_range {
4486 sysctl_kmaps_dump(struct sbuf *sb, struct pmap_kernel_map_range *range,
4490 if (eva <= range->sva)
4493 sbuf_printf(sb, "0x%016lx-0x%016lx r%c%c%c%c %d %d %d\n",
4495 (range->attrs & PTE_W) == PTE_W ? 'w' : '-',
4496 (range->attrs & PTE_X) == PTE_X ? 'x' : '-',
4497 (range->attrs & PTE_U) == PTE_U ? 'u' : 's',
4498 (range->attrs & PTE_G) == PTE_G ? 'g' : '-',
4499 range->l1pages, range->l2pages, range->l3pages);
4501 /* Reset to sentinel value. */
4502 range->sva = 0xfffffffffffffffful;
4506 * Determine whether the attributes specified by a page table entry match those
4507 * being tracked by the current range.
4510 sysctl_kmaps_match(struct pmap_kernel_map_range *range, pt_entry_t attrs)
4513 return (range->attrs == attrs);
4517 sysctl_kmaps_reinit(struct pmap_kernel_map_range *range, vm_offset_t va,
4521 memset(range, 0, sizeof(*range));
4523 range->attrs = attrs;
4527 * Given a leaf PTE, derive the mapping's attributes. If they do not match
4528 * those of the current run, dump the address range and its attributes, and
4532 sysctl_kmaps_check(struct sbuf *sb, struct pmap_kernel_map_range *range,
4533 vm_offset_t va, pd_entry_t l1e, pd_entry_t l2e, pt_entry_t l3e)
4537 /* The PTE global bit is inherited by lower levels. */
4538 attrs = l1e & PTE_G;
4539 if ((l1e & PTE_RWX) != 0)
4540 attrs |= l1e & (PTE_RWX | PTE_U);
4542 attrs |= l2e & PTE_G;
4543 if ((l2e & PTE_RWX) != 0)
4544 attrs |= l2e & (PTE_RWX | PTE_U);
4546 attrs |= l3e & (PTE_RWX | PTE_U | PTE_G);
4548 if (range->sva > va || !sysctl_kmaps_match(range, attrs)) {
4549 sysctl_kmaps_dump(sb, range, va);
4550 sysctl_kmaps_reinit(range, va, attrs);
4555 sysctl_kmaps(SYSCTL_HANDLER_ARGS)
4557 struct pmap_kernel_map_range range;
4558 struct sbuf sbuf, *sb;
4559 pd_entry_t l1e, *l2, l2e;
4560 pt_entry_t *l3, l3e;
4565 error = sysctl_wire_old_buffer(req, 0);
4569 sbuf_new_for_sysctl(sb, NULL, PAGE_SIZE, req);
4571 /* Sentinel value. */
4572 range.sva = 0xfffffffffffffffful;
4575 * Iterate over the kernel page tables without holding the kernel pmap
4576 * lock. Kernel page table pages are never freed, so at worst we will
4577 * observe inconsistencies in the output.
4579 sva = VM_MIN_KERNEL_ADDRESS;
4580 for (i = pmap_l1_index(sva); i < Ln_ENTRIES; i++) {
4581 if (i == pmap_l1_index(DMAP_MIN_ADDRESS))
4582 sbuf_printf(sb, "\nDirect map:\n");
4583 else if (i == pmap_l1_index(VM_MIN_KERNEL_ADDRESS))
4584 sbuf_printf(sb, "\nKernel map:\n");
4586 l1e = kernel_pmap->pm_l1[i];
4587 if ((l1e & PTE_V) == 0) {
4588 sysctl_kmaps_dump(sb, &range, sva);
4592 if ((l1e & PTE_RWX) != 0) {
4593 sysctl_kmaps_check(sb, &range, sva, l1e, 0, 0);
4598 pa = PTE_TO_PHYS(l1e);
4599 l2 = (pd_entry_t *)PHYS_TO_DMAP(pa);
4601 for (j = pmap_l2_index(sva); j < Ln_ENTRIES; j++) {
4603 if ((l2e & PTE_V) == 0) {
4604 sysctl_kmaps_dump(sb, &range, sva);
4608 if ((l2e & PTE_RWX) != 0) {
4609 sysctl_kmaps_check(sb, &range, sva, l1e, l2e, 0);
4614 pa = PTE_TO_PHYS(l2e);
4615 l3 = (pd_entry_t *)PHYS_TO_DMAP(pa);
4617 for (k = pmap_l3_index(sva); k < Ln_ENTRIES; k++,
4620 if ((l3e & PTE_V) == 0) {
4621 sysctl_kmaps_dump(sb, &range, sva);
4624 sysctl_kmaps_check(sb, &range, sva,
4631 error = sbuf_finish(sb);
4635 SYSCTL_OID(_vm_pmap, OID_AUTO, kernel_maps,
4636 CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE,
4637 NULL, 0, sysctl_kmaps, "A",
4638 "Dump kernel address layout");