2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (c) 1991 Regents of the University of California.
6 * Copyright (c) 1994 John S. Dyson
8 * Copyright (c) 1994 David Greenman
10 * Copyright (c) 2003 Peter Wemm
11 * All rights reserved.
12 * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
13 * All rights reserved.
14 * Copyright (c) 2014 Andrew Turner
15 * All rights reserved.
16 * Copyright (c) 2014 The FreeBSD Foundation
17 * All rights reserved.
18 * Copyright (c) 2015-2018 Ruslan Bukin <br@bsdpad.com>
19 * All rights reserved.
21 * This code is derived from software contributed to Berkeley by
22 * the Systems Programming Group of the University of Utah Computer
23 * Science Department and William Jolitz of UUNET Technologies Inc.
25 * Portions of this software were developed by Andrew Turner under
26 * sponsorship from The FreeBSD Foundation.
28 * Portions of this software were developed by SRI International and the
29 * University of Cambridge Computer Laboratory under DARPA/AFRL contract
30 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
32 * Portions of this software were developed by the University of Cambridge
33 * Computer Laboratory as part of the CTSRD Project, with support from the
34 * UK Higher Education Innovation Fund (HEIF).
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
44 * 3. All advertising materials mentioning features or use of this software
45 * must display the following acknowledgement:
46 * This product includes software developed by the University of
47 * California, Berkeley and its contributors.
48 * 4. Neither the name of the University nor the names of its contributors
49 * may be used to endorse or promote products derived from this software
50 * without specific prior written permission.
52 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
64 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
67 * Copyright (c) 2003 Networks Associates Technology, Inc.
68 * All rights reserved.
70 * This software was developed for the FreeBSD Project by Jake Burkholder,
71 * Safeport Network Services, and Network Associates Laboratories, the
72 * Security Research Division of Network Associates, Inc. under
73 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
74 * CHATS research program.
76 * Redistribution and use in source and binary forms, with or without
77 * modification, are permitted provided that the following conditions
79 * 1. Redistributions of source code must retain the above copyright
80 * notice, this list of conditions and the following disclaimer.
81 * 2. Redistributions in binary form must reproduce the above copyright
82 * notice, this list of conditions and the following disclaimer in the
83 * documentation and/or other materials provided with the distribution.
85 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
86 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
88 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
89 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
90 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
91 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
92 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
93 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
94 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
98 #include <sys/cdefs.h>
99 __FBSDID("$FreeBSD$");
102 * Manages physical address maps.
104 * Since the information managed by this module is
105 * also stored by the logical address mapping module,
106 * this module may throw away valid virtual-to-physical
107 * mappings at almost any time. However, invalidations
108 * of virtual-to-physical mappings must be done as
111 * In order to cope with hardware architectures which
112 * make virtual-to-physical map invalidates expensive,
113 * this module may delay invalidate or reduced protection
114 * operations until such time as they are actually
115 * necessary. This module is given full information as
116 * to which processors are currently using which maps,
117 * and to when physical maps must be made correct.
120 #include <sys/param.h>
121 #include <sys/systm.h>
122 #include <sys/bitstring.h>
124 #include <sys/cpuset.h>
125 #include <sys/kernel.h>
127 #include <sys/lock.h>
128 #include <sys/malloc.h>
129 #include <sys/mman.h>
130 #include <sys/msgbuf.h>
131 #include <sys/mutex.h>
132 #include <sys/physmem.h>
133 #include <sys/proc.h>
134 #include <sys/rwlock.h>
135 #include <sys/sbuf.h>
137 #include <sys/vmem.h>
138 #include <sys/vmmeter.h>
139 #include <sys/sched.h>
140 #include <sys/sysctl.h>
144 #include <vm/vm_param.h>
145 #include <vm/vm_kern.h>
146 #include <vm/vm_page.h>
147 #include <vm/vm_map.h>
148 #include <vm/vm_object.h>
149 #include <vm/vm_extern.h>
150 #include <vm/vm_pageout.h>
151 #include <vm/vm_pager.h>
152 #include <vm/vm_phys.h>
153 #include <vm/vm_radix.h>
154 #include <vm/vm_reserv.h>
157 #include <machine/machdep.h>
158 #include <machine/md_var.h>
159 #include <machine/pcb.h>
160 #include <machine/sbi.h>
162 #define NUL1E (Ln_ENTRIES * Ln_ENTRIES)
163 #define NUL2E (Ln_ENTRIES * NUL1E)
165 #if !defined(DIAGNOSTIC)
166 #ifdef __GNUC_GNU_INLINE__
167 #define PMAP_INLINE __attribute__((__gnu_inline__)) inline
169 #define PMAP_INLINE extern inline
176 #define PV_STAT(x) do { x ; } while (0)
178 #define PV_STAT(x) do { } while (0)
181 #define pmap_l2_pindex(v) ((v) >> L2_SHIFT)
182 #define pa_to_pvh(pa) (&pv_table[pa_index(pa)])
184 #define NPV_LIST_LOCKS MAXCPU
186 #define PHYS_TO_PV_LIST_LOCK(pa) \
187 (&pv_list_locks[pmap_l2_pindex(pa) % NPV_LIST_LOCKS])
189 #define CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa) do { \
190 struct rwlock **_lockp = (lockp); \
191 struct rwlock *_new_lock; \
193 _new_lock = PHYS_TO_PV_LIST_LOCK(pa); \
194 if (_new_lock != *_lockp) { \
195 if (*_lockp != NULL) \
196 rw_wunlock(*_lockp); \
197 *_lockp = _new_lock; \
202 #define CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m) \
203 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, VM_PAGE_TO_PHYS(m))
205 #define RELEASE_PV_LIST_LOCK(lockp) do { \
206 struct rwlock **_lockp = (lockp); \
208 if (*_lockp != NULL) { \
209 rw_wunlock(*_lockp); \
214 #define VM_PAGE_TO_PV_LIST_LOCK(m) \
215 PHYS_TO_PV_LIST_LOCK(VM_PAGE_TO_PHYS(m))
217 /* The list of all the user pmaps */
218 LIST_HEAD(pmaplist, pmap);
219 static struct pmaplist allpmaps = LIST_HEAD_INITIALIZER();
221 struct pmap kernel_pmap_store;
223 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
224 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
225 vm_offset_t kernel_vm_end = 0;
227 vm_paddr_t dmap_phys_base; /* The start of the dmap region */
228 vm_paddr_t dmap_phys_max; /* The limit of the dmap region */
229 vm_offset_t dmap_max_addr; /* The virtual address limit of the dmap */
231 /* This code assumes all L1 DMAP entries will be used */
232 CTASSERT((DMAP_MIN_ADDRESS & ~L1_OFFSET) == DMAP_MIN_ADDRESS);
233 CTASSERT((DMAP_MAX_ADDRESS & ~L1_OFFSET) == DMAP_MAX_ADDRESS);
235 static struct rwlock_padalign pvh_global_lock;
236 static struct mtx_padalign allpmaps_lock;
238 static SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
239 "VM/pmap parameters");
241 static int superpages_enabled = 1;
242 SYSCTL_INT(_vm_pmap, OID_AUTO, superpages_enabled,
243 CTLFLAG_RDTUN, &superpages_enabled, 0,
244 "Enable support for transparent superpages");
246 static SYSCTL_NODE(_vm_pmap, OID_AUTO, l2, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
247 "2MB page mapping counters");
249 static u_long pmap_l2_demotions;
250 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, demotions, CTLFLAG_RD,
251 &pmap_l2_demotions, 0,
252 "2MB page demotions");
254 static u_long pmap_l2_mappings;
255 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, mappings, CTLFLAG_RD,
256 &pmap_l2_mappings, 0,
257 "2MB page mappings");
259 static u_long pmap_l2_p_failures;
260 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, p_failures, CTLFLAG_RD,
261 &pmap_l2_p_failures, 0,
262 "2MB page promotion failures");
264 static u_long pmap_l2_promotions;
265 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, promotions, CTLFLAG_RD,
266 &pmap_l2_promotions, 0,
267 "2MB page promotions");
270 * Data for the pv entry allocation mechanism
272 static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
273 static struct mtx pv_chunks_mutex;
274 static struct rwlock pv_list_locks[NPV_LIST_LOCKS];
275 static struct md_page *pv_table;
276 static struct md_page pv_dummy;
278 extern cpuset_t all_harts;
281 * Internal flags for pmap_enter()'s helper functions.
283 #define PMAP_ENTER_NORECLAIM 0x1000000 /* Don't reclaim PV entries. */
284 #define PMAP_ENTER_NOREPLACE 0x2000000 /* Don't replace mappings. */
286 static void free_pv_chunk(struct pv_chunk *pc);
287 static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
288 static pv_entry_t get_pv_entry(pmap_t pmap, struct rwlock **lockp);
289 static vm_page_t reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp);
290 static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
291 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
293 static bool pmap_demote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va);
294 static bool pmap_demote_l2_locked(pmap_t pmap, pd_entry_t *l2,
295 vm_offset_t va, struct rwlock **lockp);
296 static int pmap_enter_l2(pmap_t pmap, vm_offset_t va, pd_entry_t new_l2,
297 u_int flags, vm_page_t m, struct rwlock **lockp);
298 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
299 vm_page_t m, vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp);
300 static int pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t sva,
301 pd_entry_t ptepde, struct spglist *free, struct rwlock **lockp);
302 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
303 vm_page_t m, struct rwlock **lockp);
305 static vm_page_t _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex,
306 struct rwlock **lockp);
308 static void _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m,
309 struct spglist *free);
310 static int pmap_unuse_pt(pmap_t, vm_offset_t, pd_entry_t, struct spglist *);
312 #define pmap_clear(pte) pmap_store(pte, 0)
313 #define pmap_clear_bits(pte, bits) atomic_clear_64(pte, bits)
314 #define pmap_load_store(pte, entry) atomic_swap_64(pte, entry)
315 #define pmap_load_clear(pte) pmap_load_store(pte, 0)
316 #define pmap_load(pte) atomic_load_64(pte)
317 #define pmap_store(pte, entry) atomic_store_64(pte, entry)
318 #define pmap_store_bits(pte, bits) atomic_set_64(pte, bits)
320 /********************/
321 /* Inline functions */
322 /********************/
325 pagecopy(void *s, void *d)
328 memcpy(d, s, PAGE_SIZE);
338 #define pmap_l1_index(va) (((va) >> L1_SHIFT) & Ln_ADDR_MASK)
339 #define pmap_l2_index(va) (((va) >> L2_SHIFT) & Ln_ADDR_MASK)
340 #define pmap_l3_index(va) (((va) >> L3_SHIFT) & Ln_ADDR_MASK)
342 #define PTE_TO_PHYS(pte) \
343 ((((pte) & ~PTE_HI_MASK) >> PTE_PPN0_S) * PAGE_SIZE)
345 static __inline pd_entry_t *
346 pmap_l1(pmap_t pmap, vm_offset_t va)
349 return (&pmap->pm_l1[pmap_l1_index(va)]);
352 static __inline pd_entry_t *
353 pmap_l1_to_l2(pd_entry_t *l1, vm_offset_t va)
358 phys = PTE_TO_PHYS(pmap_load(l1));
359 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
361 return (&l2[pmap_l2_index(va)]);
364 static __inline pd_entry_t *
365 pmap_l2(pmap_t pmap, vm_offset_t va)
369 l1 = pmap_l1(pmap, va);
370 if ((pmap_load(l1) & PTE_V) == 0)
372 if ((pmap_load(l1) & PTE_RX) != 0)
375 return (pmap_l1_to_l2(l1, va));
378 static __inline pt_entry_t *
379 pmap_l2_to_l3(pd_entry_t *l2, vm_offset_t va)
384 phys = PTE_TO_PHYS(pmap_load(l2));
385 l3 = (pd_entry_t *)PHYS_TO_DMAP(phys);
387 return (&l3[pmap_l3_index(va)]);
390 static __inline pt_entry_t *
391 pmap_l3(pmap_t pmap, vm_offset_t va)
395 l2 = pmap_l2(pmap, va);
398 if ((pmap_load(l2) & PTE_V) == 0)
400 if ((pmap_load(l2) & PTE_RX) != 0)
403 return (pmap_l2_to_l3(l2, va));
407 pmap_resident_count_inc(pmap_t pmap, int count)
410 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
411 pmap->pm_stats.resident_count += count;
415 pmap_resident_count_dec(pmap_t pmap, int count)
418 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
419 KASSERT(pmap->pm_stats.resident_count >= count,
420 ("pmap %p resident count underflow %ld %d", pmap,
421 pmap->pm_stats.resident_count, count));
422 pmap->pm_stats.resident_count -= count;
426 pmap_distribute_l1(struct pmap *pmap, vm_pindex_t l1index,
429 struct pmap *user_pmap;
432 /* Distribute new kernel L1 entry to all the user pmaps */
433 if (pmap != kernel_pmap)
436 mtx_lock(&allpmaps_lock);
437 LIST_FOREACH(user_pmap, &allpmaps, pm_list) {
438 l1 = &user_pmap->pm_l1[l1index];
439 pmap_store(l1, entry);
441 mtx_unlock(&allpmaps_lock);
445 pmap_early_page_idx(vm_offset_t l1pt, vm_offset_t va, u_int *l1_slot,
451 l1 = (pd_entry_t *)l1pt;
452 *l1_slot = (va >> L1_SHIFT) & Ln_ADDR_MASK;
454 /* Check locore has used a table L1 map */
455 KASSERT((l1[*l1_slot] & PTE_RX) == 0,
456 ("Invalid bootstrap L1 table"));
458 /* Find the address of the L2 table */
459 l2 = (pt_entry_t *)init_pt_va;
460 *l2_slot = pmap_l2_index(va);
466 pmap_early_vtophys(vm_offset_t l1pt, vm_offset_t va)
468 u_int l1_slot, l2_slot;
472 l2 = pmap_early_page_idx(l1pt, va, &l1_slot, &l2_slot);
474 /* Check locore has used L2 superpages */
475 KASSERT((l2[l2_slot] & PTE_RX) != 0,
476 ("Invalid bootstrap L2 table"));
478 /* L2 is superpages */
479 ret = (l2[l2_slot] >> PTE_PPN1_S) << L2_SHIFT;
480 ret += (va & L2_OFFSET);
486 pmap_bootstrap_dmap(vm_offset_t kern_l1, vm_paddr_t min_pa, vm_paddr_t max_pa)
495 pa = dmap_phys_base = min_pa & ~L1_OFFSET;
496 va = DMAP_MIN_ADDRESS;
497 l1 = (pd_entry_t *)kern_l1;
498 l1_slot = pmap_l1_index(DMAP_MIN_ADDRESS);
500 for (; va < DMAP_MAX_ADDRESS && pa < max_pa;
501 pa += L1_SIZE, va += L1_SIZE, l1_slot++) {
502 KASSERT(l1_slot < Ln_ENTRIES, ("Invalid L1 index"));
505 pn = (pa / PAGE_SIZE);
507 entry |= (pn << PTE_PPN0_S);
508 pmap_store(&l1[l1_slot], entry);
511 /* Set the upper limit of the DMAP region */
519 pmap_bootstrap_l3(vm_offset_t l1pt, vm_offset_t va, vm_offset_t l3_start)
528 KASSERT((va & L2_OFFSET) == 0, ("Invalid virtual address"));
530 l2 = pmap_l2(kernel_pmap, va);
531 l2 = (pd_entry_t *)((uintptr_t)l2 & ~(PAGE_SIZE - 1));
532 l2_slot = pmap_l2_index(va);
535 for (; va < VM_MAX_KERNEL_ADDRESS; l2_slot++, va += L2_SIZE) {
536 KASSERT(l2_slot < Ln_ENTRIES, ("Invalid L2 index"));
538 pa = pmap_early_vtophys(l1pt, l3pt);
539 pn = (pa / PAGE_SIZE);
541 entry |= (pn << PTE_PPN0_S);
542 pmap_store(&l2[l2_slot], entry);
546 /* Clean the L2 page table */
547 memset((void *)l3_start, 0, l3pt - l3_start);
553 * Bootstrap the system enough to run with virtual memory.
556 pmap_bootstrap(vm_offset_t l1pt, vm_paddr_t kernstart, vm_size_t kernlen)
558 u_int l1_slot, l2_slot;
559 vm_offset_t freemempos;
560 vm_offset_t dpcpu, msgbufpv;
561 vm_paddr_t max_pa, min_pa, pa;
565 printf("pmap_bootstrap %lx %lx %lx\n", l1pt, kernstart, kernlen);
567 /* Set this early so we can use the pagetable walking functions */
568 kernel_pmap_store.pm_l1 = (pd_entry_t *)l1pt;
569 PMAP_LOCK_INIT(kernel_pmap);
571 rw_init(&pvh_global_lock, "pmap pv global");
573 CPU_FILL(&kernel_pmap->pm_active);
575 /* Assume the address we were loaded to is a valid physical address. */
576 min_pa = max_pa = kernstart;
578 physmap_idx = physmem_avail(physmap, nitems(physmap));
582 * Find the minimum physical address. physmap is sorted,
583 * but may contain empty ranges.
585 for (i = 0; i < physmap_idx * 2; i += 2) {
586 if (physmap[i] == physmap[i + 1])
588 if (physmap[i] <= min_pa)
590 if (physmap[i + 1] > max_pa)
591 max_pa = physmap[i + 1];
593 printf("physmap_idx %lx\n", physmap_idx);
594 printf("min_pa %lx\n", min_pa);
595 printf("max_pa %lx\n", max_pa);
597 /* Create a direct map region early so we can use it for pa -> va */
598 pmap_bootstrap_dmap(l1pt, min_pa, max_pa);
601 * Read the page table to find out what is already mapped.
602 * This assumes we have mapped a block of memory from KERNBASE
603 * using a single L1 entry.
605 (void)pmap_early_page_idx(l1pt, KERNBASE, &l1_slot, &l2_slot);
607 /* Sanity check the index, KERNBASE should be the first VA */
608 KASSERT(l2_slot == 0, ("The L2 index is non-zero"));
610 freemempos = roundup2(KERNBASE + kernlen, PAGE_SIZE);
612 /* Create the l3 tables for the early devmap */
613 freemempos = pmap_bootstrap_l3(l1pt,
614 VM_MAX_KERNEL_ADDRESS - L2_SIZE, freemempos);
617 * Invalidate the mapping we created for the DTB. At this point a copy
618 * has been created, and we no longer need it. We want to avoid the
619 * possibility of an aliased mapping in the future.
621 l2p = pmap_l2(kernel_pmap, VM_EARLY_DTB_ADDRESS);
622 if ((pmap_load(l2p) & PTE_V) != 0)
627 #define alloc_pages(var, np) \
628 (var) = freemempos; \
629 freemempos += (np * PAGE_SIZE); \
630 memset((char *)(var), 0, ((np) * PAGE_SIZE));
632 /* Allocate dynamic per-cpu area. */
633 alloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
634 dpcpu_init((void *)dpcpu, 0);
636 /* Allocate memory for the msgbuf, e.g. for /sbin/dmesg */
637 alloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
638 msgbufp = (void *)msgbufpv;
640 virtual_avail = roundup2(freemempos, L2_SIZE);
641 virtual_end = VM_MAX_KERNEL_ADDRESS - L2_SIZE;
642 kernel_vm_end = virtual_avail;
644 pa = pmap_early_vtophys(l1pt, freemempos);
646 physmem_exclude_region(kernstart, pa - kernstart, EXFLAG_NOALLOC);
650 * Initialize a vm_page's machine-dependent fields.
653 pmap_page_init(vm_page_t m)
656 TAILQ_INIT(&m->md.pv_list);
657 m->md.pv_memattr = VM_MEMATTR_WRITE_BACK;
661 * Initialize the pmap module.
662 * Called by vm_init, to initialize any structures that the pmap
663 * system needs to map virtual memory.
672 * Initialize the pv chunk and pmap list mutexes.
674 mtx_init(&pv_chunks_mutex, "pmap pv chunk list", NULL, MTX_DEF);
675 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_DEF);
678 * Initialize the pool of pv list locks.
680 for (i = 0; i < NPV_LIST_LOCKS; i++)
681 rw_init(&pv_list_locks[i], "pmap pv list");
684 * Calculate the size of the pv head table for superpages.
686 pv_npg = howmany(vm_phys_segs[vm_phys_nsegs - 1].end, L2_SIZE);
689 * Allocate memory for the pv head table for superpages.
691 s = (vm_size_t)(pv_npg * sizeof(struct md_page));
693 pv_table = (struct md_page *)kmem_malloc(s, M_WAITOK | M_ZERO);
694 for (i = 0; i < pv_npg; i++)
695 TAILQ_INIT(&pv_table[i].pv_list);
696 TAILQ_INIT(&pv_dummy.pv_list);
698 if (superpages_enabled)
699 pagesizes[1] = L2_SIZE;
704 * For SMP, these functions have to use IPIs for coherence.
706 * In general, the calling thread uses a plain fence to order the
707 * writes to the page tables before invoking an SBI callback to invoke
708 * sfence_vma() on remote CPUs.
711 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
716 mask = pmap->pm_active;
717 CPU_CLR(PCPU_GET(hart), &mask);
719 if (!CPU_EMPTY(&mask) && smp_started)
720 sbi_remote_sfence_vma(mask.__bits, va, 1);
726 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
731 mask = pmap->pm_active;
732 CPU_CLR(PCPU_GET(hart), &mask);
734 if (!CPU_EMPTY(&mask) && smp_started)
735 sbi_remote_sfence_vma(mask.__bits, sva, eva - sva + 1);
738 * Might consider a loop of sfence_vma_page() for a small
739 * number of pages in the future.
746 pmap_invalidate_all(pmap_t pmap)
751 mask = pmap->pm_active;
752 CPU_CLR(PCPU_GET(hart), &mask);
755 * XXX: The SBI doc doesn't detail how to specify x0 as the
756 * address to perform a global fence. BBL currently treats
757 * all sfence_vma requests as global however.
760 if (!CPU_EMPTY(&mask) && smp_started)
761 sbi_remote_sfence_vma(mask.__bits, 0, 0);
767 * Normal, non-SMP, invalidation functions.
768 * We inline these within pmap.c for speed.
771 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
778 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
782 * Might consider a loop of sfence_vma_page() for a small
783 * number of pages in the future.
789 pmap_invalidate_all(pmap_t pmap)
797 * Routine: pmap_extract
799 * Extract the physical page address associated
800 * with the given map/virtual_address pair.
803 pmap_extract(pmap_t pmap, vm_offset_t va)
812 * Start with the l2 tabel. We are unable to allocate
813 * pages in the l1 table.
815 l2p = pmap_l2(pmap, va);
818 if ((l2 & PTE_RX) == 0) {
819 l3p = pmap_l2_to_l3(l2p, va);
822 pa = PTE_TO_PHYS(l3);
823 pa |= (va & L3_OFFSET);
826 /* L2 is superpages */
827 pa = (l2 >> PTE_PPN1_S) << L2_SHIFT;
828 pa |= (va & L2_OFFSET);
836 * Routine: pmap_extract_and_hold
838 * Atomically extract and hold the physical page
839 * with the given pmap and virtual address pair
840 * if that mapping permits the given protection.
843 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
851 l3p = pmap_l3(pmap, va);
852 if (l3p != NULL && (l3 = pmap_load(l3p)) != 0) {
853 if ((l3 & PTE_W) != 0 || (prot & VM_PROT_WRITE) == 0) {
854 phys = PTE_TO_PHYS(l3);
855 m = PHYS_TO_VM_PAGE(phys);
856 if (!vm_page_wire_mapped(m))
865 pmap_kextract(vm_offset_t va)
871 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
872 pa = DMAP_TO_PHYS(va);
874 l2 = pmap_l2(kernel_pmap, va);
876 panic("pmap_kextract: No l2");
877 if ((pmap_load(l2) & PTE_RX) != 0) {
879 pa = (pmap_load(l2) >> PTE_PPN1_S) << L2_SHIFT;
880 pa |= (va & L2_OFFSET);
884 l3 = pmap_l2_to_l3(l2, va);
886 panic("pmap_kextract: No l3...");
887 pa = PTE_TO_PHYS(pmap_load(l3));
888 pa |= (va & PAGE_MASK);
893 /***************************************************
894 * Low level mapping routines.....
895 ***************************************************/
898 pmap_kenter_device(vm_offset_t sva, vm_size_t size, vm_paddr_t pa)
905 KASSERT((pa & L3_OFFSET) == 0,
906 ("pmap_kenter_device: Invalid physical address"));
907 KASSERT((sva & L3_OFFSET) == 0,
908 ("pmap_kenter_device: Invalid virtual address"));
909 KASSERT((size & PAGE_MASK) == 0,
910 ("pmap_kenter_device: Mapping is not page-sized"));
914 l3 = pmap_l3(kernel_pmap, va);
915 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
917 pn = (pa / PAGE_SIZE);
919 entry |= (pn << PTE_PPN0_S);
920 pmap_store(l3, entry);
926 pmap_invalidate_range(kernel_pmap, sva, va);
930 * Remove a page from the kernel pagetables.
931 * Note: not SMP coherent.
934 pmap_kremove(vm_offset_t va)
938 l3 = pmap_l3(kernel_pmap, va);
939 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
946 pmap_kremove_device(vm_offset_t sva, vm_size_t size)
951 KASSERT((sva & L3_OFFSET) == 0,
952 ("pmap_kremove_device: Invalid virtual address"));
953 KASSERT((size & PAGE_MASK) == 0,
954 ("pmap_kremove_device: Mapping is not page-sized"));
958 l3 = pmap_l3(kernel_pmap, va);
959 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
966 pmap_invalidate_range(kernel_pmap, sva, va);
970 * Used to map a range of physical addresses into kernel
971 * virtual address space.
973 * The value passed in '*virt' is a suggested virtual address for
974 * the mapping. Architectures which can support a direct-mapped
975 * physical to virtual region can return the appropriate address
976 * within that region, leaving '*virt' unchanged. Other
977 * architectures should map the pages starting at '*virt' and
978 * update '*virt' with the first usable address after the mapped
982 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
985 return PHYS_TO_DMAP(start);
989 * Add a list of wired pages to the kva
990 * this routine is only used for temporary
991 * kernel mappings that do not need to have
992 * page modification or references recorded.
993 * Note that old mappings are simply written
994 * over. The page *must* be wired.
995 * Note: SMP coherent. Uses a ranged shootdown IPI.
998 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1008 for (i = 0; i < count; i++) {
1010 pa = VM_PAGE_TO_PHYS(m);
1011 pn = (pa / PAGE_SIZE);
1012 l3 = pmap_l3(kernel_pmap, va);
1015 entry |= (pn << PTE_PPN0_S);
1016 pmap_store(l3, entry);
1020 pmap_invalidate_range(kernel_pmap, sva, va);
1024 * This routine tears out page mappings from the
1025 * kernel -- it is meant only for temporary mappings.
1026 * Note: SMP coherent. Uses a ranged shootdown IPI.
1029 pmap_qremove(vm_offset_t sva, int count)
1034 KASSERT(sva >= VM_MIN_KERNEL_ADDRESS, ("usermode va %lx", sva));
1036 for (va = sva; count-- > 0; va += PAGE_SIZE) {
1037 l3 = pmap_l3(kernel_pmap, va);
1038 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
1041 pmap_invalidate_range(kernel_pmap, sva, va);
1045 pmap_ps_enabled(pmap_t pmap __unused)
1048 return (superpages_enabled);
1051 /***************************************************
1052 * Page table page management routines.....
1053 ***************************************************/
1055 * Schedule the specified unused page table page to be freed. Specifically,
1056 * add the page to the specified list of pages that will be released to the
1057 * physical memory manager after the TLB has been updated.
1059 static __inline void
1060 pmap_add_delayed_free_list(vm_page_t m, struct spglist *free,
1061 boolean_t set_PG_ZERO)
1065 m->flags |= PG_ZERO;
1067 m->flags &= ~PG_ZERO;
1068 SLIST_INSERT_HEAD(free, m, plinks.s.ss);
1072 * Inserts the specified page table page into the specified pmap's collection
1073 * of idle page table pages. Each of a pmap's page table pages is responsible
1074 * for mapping a distinct range of virtual addresses. The pmap's collection is
1075 * ordered by this virtual address range.
1077 * If "promoted" is false, then the page table page "ml3" must be zero filled.
1080 pmap_insert_pt_page(pmap_t pmap, vm_page_t ml3, bool promoted)
1083 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1084 ml3->valid = promoted ? VM_PAGE_BITS_ALL : 0;
1085 return (vm_radix_insert(&pmap->pm_root, ml3));
1089 * Removes the page table page mapping the specified virtual address from the
1090 * specified pmap's collection of idle page table pages, and returns it.
1091 * Otherwise, returns NULL if there is no page table page corresponding to the
1092 * specified virtual address.
1094 static __inline vm_page_t
1095 pmap_remove_pt_page(pmap_t pmap, vm_offset_t va)
1098 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1099 return (vm_radix_remove(&pmap->pm_root, pmap_l2_pindex(va)));
1103 * Decrements a page table page's reference count, which is used to record the
1104 * number of valid page table entries within the page. If the reference count
1105 * drops to zero, then the page table page is unmapped. Returns TRUE if the
1106 * page table page was unmapped and FALSE otherwise.
1108 static inline boolean_t
1109 pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1113 if (m->ref_count == 0) {
1114 _pmap_unwire_ptp(pmap, va, m, free);
1122 _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1126 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1127 if (m->pindex >= NUL1E) {
1129 l1 = pmap_l1(pmap, va);
1131 pmap_distribute_l1(pmap, pmap_l1_index(va), 0);
1134 l2 = pmap_l2(pmap, va);
1137 pmap_resident_count_dec(pmap, 1);
1138 if (m->pindex < NUL1E) {
1142 l1 = pmap_l1(pmap, va);
1143 phys = PTE_TO_PHYS(pmap_load(l1));
1144 pdpg = PHYS_TO_VM_PAGE(phys);
1145 pmap_unwire_ptp(pmap, va, pdpg, free);
1147 pmap_invalidate_page(pmap, va);
1152 * Put page on a list so that it is released after
1153 * *ALL* TLB shootdown is done
1155 pmap_add_delayed_free_list(m, free, TRUE);
1159 * After removing a page table entry, this routine is used to
1160 * conditionally free the page, and manage the reference count.
1163 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, pd_entry_t ptepde,
1164 struct spglist *free)
1168 if (va >= VM_MAXUSER_ADDRESS)
1170 KASSERT(ptepde != 0, ("pmap_unuse_pt: ptepde != 0"));
1171 mpte = PHYS_TO_VM_PAGE(PTE_TO_PHYS(ptepde));
1172 return (pmap_unwire_ptp(pmap, va, mpte, free));
1176 pmap_pinit0(pmap_t pmap)
1179 PMAP_LOCK_INIT(pmap);
1180 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1181 pmap->pm_l1 = kernel_pmap->pm_l1;
1182 pmap->pm_satp = SATP_MODE_SV39 | (vtophys(pmap->pm_l1) >> PAGE_SHIFT);
1183 CPU_ZERO(&pmap->pm_active);
1184 pmap_activate_boot(pmap);
1188 pmap_pinit(pmap_t pmap)
1194 * allocate the l1 page
1196 while ((l1pt = vm_page_alloc(NULL, 0xdeadbeef, VM_ALLOC_NORMAL |
1197 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL)
1200 l1phys = VM_PAGE_TO_PHYS(l1pt);
1201 pmap->pm_l1 = (pd_entry_t *)PHYS_TO_DMAP(l1phys);
1202 pmap->pm_satp = SATP_MODE_SV39 | (l1phys >> PAGE_SHIFT);
1204 if ((l1pt->flags & PG_ZERO) == 0)
1205 pagezero(pmap->pm_l1);
1207 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1209 CPU_ZERO(&pmap->pm_active);
1211 /* Install kernel pagetables */
1212 memcpy(pmap->pm_l1, kernel_pmap->pm_l1, PAGE_SIZE);
1214 /* Add to the list of all user pmaps */
1215 mtx_lock(&allpmaps_lock);
1216 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1217 mtx_unlock(&allpmaps_lock);
1219 vm_radix_init(&pmap->pm_root);
1225 * This routine is called if the desired page table page does not exist.
1227 * If page table page allocation fails, this routine may sleep before
1228 * returning NULL. It sleeps only if a lock pointer was given.
1230 * Note: If a page allocation fails at page table level two or three,
1231 * one or two pages may be held during the wait, only to be released
1232 * afterwards. This conservative approach is easily argued to avoid
1236 _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp)
1238 vm_page_t m, /*pdppg, */pdpg;
1243 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1246 * Allocate a page table page.
1248 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1249 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1250 if (lockp != NULL) {
1251 RELEASE_PV_LIST_LOCK(lockp);
1253 rw_runlock(&pvh_global_lock);
1255 rw_rlock(&pvh_global_lock);
1260 * Indicate the need to retry. While waiting, the page table
1261 * page may have been allocated.
1266 if ((m->flags & PG_ZERO) == 0)
1270 * Map the pagetable page into the process address space, if
1271 * it isn't already there.
1274 if (ptepindex >= NUL1E) {
1276 vm_pindex_t l1index;
1278 l1index = ptepindex - NUL1E;
1279 l1 = &pmap->pm_l1[l1index];
1281 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1283 entry |= (pn << PTE_PPN0_S);
1284 pmap_store(l1, entry);
1285 pmap_distribute_l1(pmap, l1index, entry);
1287 vm_pindex_t l1index;
1288 pd_entry_t *l1, *l2;
1290 l1index = ptepindex >> (L1_SHIFT - L2_SHIFT);
1291 l1 = &pmap->pm_l1[l1index];
1292 if (pmap_load(l1) == 0) {
1293 /* recurse for allocating page dir */
1294 if (_pmap_alloc_l3(pmap, NUL1E + l1index,
1296 vm_page_unwire_noq(m);
1297 vm_page_free_zero(m);
1301 phys = PTE_TO_PHYS(pmap_load(l1));
1302 pdpg = PHYS_TO_VM_PAGE(phys);
1306 phys = PTE_TO_PHYS(pmap_load(l1));
1307 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
1308 l2 = &l2[ptepindex & Ln_ADDR_MASK];
1310 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1312 entry |= (pn << PTE_PPN0_S);
1313 pmap_store(l2, entry);
1316 pmap_resident_count_inc(pmap, 1);
1322 pmap_alloc_l2(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1326 vm_pindex_t l2pindex;
1329 l1 = pmap_l1(pmap, va);
1330 if (l1 != NULL && (pmap_load(l1) & PTE_RWX) == 0) {
1331 /* Add a reference to the L2 page. */
1332 l2pg = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l1)));
1335 /* Allocate a L2 page. */
1336 l2pindex = pmap_l2_pindex(va) >> Ln_ENTRIES_SHIFT;
1337 l2pg = _pmap_alloc_l3(pmap, NUL2E + l2pindex, lockp);
1338 if (l2pg == NULL && lockp != NULL)
1345 pmap_alloc_l3(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1347 vm_pindex_t ptepindex;
1353 * Calculate pagetable page index
1355 ptepindex = pmap_l2_pindex(va);
1358 * Get the page directory entry
1360 l2 = pmap_l2(pmap, va);
1363 * If the page table page is mapped, we just increment the
1364 * hold count, and activate it.
1366 if (l2 != NULL && pmap_load(l2) != 0) {
1367 phys = PTE_TO_PHYS(pmap_load(l2));
1368 m = PHYS_TO_VM_PAGE(phys);
1372 * Here if the pte page isn't mapped, or if it has been
1375 m = _pmap_alloc_l3(pmap, ptepindex, lockp);
1376 if (m == NULL && lockp != NULL)
1382 /***************************************************
1383 * Pmap allocation/deallocation routines.
1384 ***************************************************/
1387 * Release any resources held by the given physical map.
1388 * Called when a pmap initialized by pmap_pinit is being released.
1389 * Should only be called if the map contains no valid mappings.
1392 pmap_release(pmap_t pmap)
1396 KASSERT(pmap->pm_stats.resident_count == 0,
1397 ("pmap_release: pmap resident count %ld != 0",
1398 pmap->pm_stats.resident_count));
1399 KASSERT(CPU_EMPTY(&pmap->pm_active),
1400 ("releasing active pmap %p", pmap));
1402 mtx_lock(&allpmaps_lock);
1403 LIST_REMOVE(pmap, pm_list);
1404 mtx_unlock(&allpmaps_lock);
1406 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pmap->pm_l1));
1407 vm_page_unwire_noq(m);
1412 kvm_size(SYSCTL_HANDLER_ARGS)
1414 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS;
1416 return sysctl_handle_long(oidp, &ksize, 0, req);
1418 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG | CTLFLAG_RD | CTLFLAG_MPSAFE,
1419 0, 0, kvm_size, "LU",
1423 kvm_free(SYSCTL_HANDLER_ARGS)
1425 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1427 return sysctl_handle_long(oidp, &kfree, 0, req);
1429 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG | CTLFLAG_RD | CTLFLAG_MPSAFE,
1430 0, 0, kvm_free, "LU",
1431 "Amount of KVM free");
1434 * grow the number of kernel page table entries, if needed
1437 pmap_growkernel(vm_offset_t addr)
1441 pd_entry_t *l1, *l2;
1445 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1447 addr = roundup2(addr, L2_SIZE);
1448 if (addr - 1 >= vm_map_max(kernel_map))
1449 addr = vm_map_max(kernel_map);
1450 while (kernel_vm_end < addr) {
1451 l1 = pmap_l1(kernel_pmap, kernel_vm_end);
1452 if (pmap_load(l1) == 0) {
1453 /* We need a new PDP entry */
1454 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L1_SHIFT,
1455 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ |
1456 VM_ALLOC_WIRED | VM_ALLOC_ZERO);
1458 panic("pmap_growkernel: no memory to grow kernel");
1459 if ((nkpg->flags & PG_ZERO) == 0)
1460 pmap_zero_page(nkpg);
1461 paddr = VM_PAGE_TO_PHYS(nkpg);
1463 pn = (paddr / PAGE_SIZE);
1465 entry |= (pn << PTE_PPN0_S);
1466 pmap_store(l1, entry);
1467 pmap_distribute_l1(kernel_pmap,
1468 pmap_l1_index(kernel_vm_end), entry);
1469 continue; /* try again */
1471 l2 = pmap_l1_to_l2(l1, kernel_vm_end);
1472 if ((pmap_load(l2) & PTE_V) != 0 &&
1473 (pmap_load(l2) & PTE_RWX) == 0) {
1474 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1475 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1476 kernel_vm_end = vm_map_max(kernel_map);
1482 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L2_SHIFT,
1483 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1486 panic("pmap_growkernel: no memory to grow kernel");
1487 if ((nkpg->flags & PG_ZERO) == 0) {
1488 pmap_zero_page(nkpg);
1490 paddr = VM_PAGE_TO_PHYS(nkpg);
1492 pn = (paddr / PAGE_SIZE);
1494 entry |= (pn << PTE_PPN0_S);
1495 pmap_store(l2, entry);
1497 pmap_invalidate_page(kernel_pmap, kernel_vm_end);
1499 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1500 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1501 kernel_vm_end = vm_map_max(kernel_map);
1507 /***************************************************
1508 * page management routines.
1509 ***************************************************/
1511 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1512 CTASSERT(_NPCM == 3);
1513 CTASSERT(_NPCPV == 168);
1515 static __inline struct pv_chunk *
1516 pv_to_chunk(pv_entry_t pv)
1519 return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
1522 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1524 #define PC_FREE0 0xfffffffffffffffful
1525 #define PC_FREE1 0xfffffffffffffffful
1526 #define PC_FREE2 0x000000fffffffffful
1528 static const uint64_t pc_freemask[_NPCM] = { PC_FREE0, PC_FREE1, PC_FREE2 };
1532 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1534 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1535 "Current number of pv entry chunks");
1536 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1537 "Current number of pv entry chunks allocated");
1538 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1539 "Current number of pv entry chunks frees");
1540 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1541 "Number of times tried to get a chunk page but failed.");
1543 static long pv_entry_frees, pv_entry_allocs, pv_entry_count;
1544 static int pv_entry_spare;
1546 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1547 "Current number of pv entry frees");
1548 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1549 "Current number of pv entry allocs");
1550 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1551 "Current number of pv entries");
1552 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1553 "Current number of spare pv entries");
1558 * We are in a serious low memory condition. Resort to
1559 * drastic measures to free some pages so we can allocate
1560 * another pv entry chunk.
1562 * Returns NULL if PV entries were reclaimed from the specified pmap.
1564 * We do not, however, unmap 2mpages because subsequent accesses will
1565 * allocate per-page pv entries until repromotion occurs, thereby
1566 * exacerbating the shortage of free pv entries.
1569 reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp)
1572 panic("RISCVTODO: reclaim_pv_chunk");
1576 * free the pv_entry back to the free list
1579 free_pv_entry(pmap_t pmap, pv_entry_t pv)
1581 struct pv_chunk *pc;
1582 int idx, field, bit;
1584 rw_assert(&pvh_global_lock, RA_LOCKED);
1585 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1586 PV_STAT(atomic_add_long(&pv_entry_frees, 1));
1587 PV_STAT(atomic_add_int(&pv_entry_spare, 1));
1588 PV_STAT(atomic_subtract_long(&pv_entry_count, 1));
1589 pc = pv_to_chunk(pv);
1590 idx = pv - &pc->pc_pventry[0];
1593 pc->pc_map[field] |= 1ul << bit;
1594 if (pc->pc_map[0] != PC_FREE0 || pc->pc_map[1] != PC_FREE1 ||
1595 pc->pc_map[2] != PC_FREE2) {
1596 /* 98% of the time, pc is already at the head of the list. */
1597 if (__predict_false(pc != TAILQ_FIRST(&pmap->pm_pvchunk))) {
1598 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1599 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1603 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1608 free_pv_chunk(struct pv_chunk *pc)
1612 mtx_lock(&pv_chunks_mutex);
1613 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
1614 mtx_unlock(&pv_chunks_mutex);
1615 PV_STAT(atomic_subtract_int(&pv_entry_spare, _NPCPV));
1616 PV_STAT(atomic_subtract_int(&pc_chunk_count, 1));
1617 PV_STAT(atomic_add_int(&pc_chunk_frees, 1));
1618 /* entire chunk is free, return it */
1619 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
1620 dump_drop_page(m->phys_addr);
1621 vm_page_unwire_noq(m);
1626 * Returns a new PV entry, allocating a new PV chunk from the system when
1627 * needed. If this PV chunk allocation fails and a PV list lock pointer was
1628 * given, a PV chunk is reclaimed from an arbitrary pmap. Otherwise, NULL is
1631 * The given PV list lock may be released.
1634 get_pv_entry(pmap_t pmap, struct rwlock **lockp)
1638 struct pv_chunk *pc;
1641 rw_assert(&pvh_global_lock, RA_LOCKED);
1642 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1643 PV_STAT(atomic_add_long(&pv_entry_allocs, 1));
1645 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1647 for (field = 0; field < _NPCM; field++) {
1648 if (pc->pc_map[field]) {
1649 bit = ffsl(pc->pc_map[field]) - 1;
1653 if (field < _NPCM) {
1654 pv = &pc->pc_pventry[field * 64 + bit];
1655 pc->pc_map[field] &= ~(1ul << bit);
1656 /* If this was the last item, move it to tail */
1657 if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 &&
1658 pc->pc_map[2] == 0) {
1659 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1660 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc,
1663 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1664 PV_STAT(atomic_subtract_int(&pv_entry_spare, 1));
1668 /* No free items, allocate another chunk */
1669 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1672 if (lockp == NULL) {
1673 PV_STAT(pc_chunk_tryfail++);
1676 m = reclaim_pv_chunk(pmap, lockp);
1680 PV_STAT(atomic_add_int(&pc_chunk_count, 1));
1681 PV_STAT(atomic_add_int(&pc_chunk_allocs, 1));
1682 dump_add_page(m->phys_addr);
1683 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1685 pc->pc_map[0] = PC_FREE0 & ~1ul; /* preallocated bit 0 */
1686 pc->pc_map[1] = PC_FREE1;
1687 pc->pc_map[2] = PC_FREE2;
1688 mtx_lock(&pv_chunks_mutex);
1689 TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru);
1690 mtx_unlock(&pv_chunks_mutex);
1691 pv = &pc->pc_pventry[0];
1692 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1693 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1694 PV_STAT(atomic_add_int(&pv_entry_spare, _NPCPV - 1));
1699 * Ensure that the number of spare PV entries in the specified pmap meets or
1700 * exceeds the given count, "needed".
1702 * The given PV list lock may be released.
1705 reserve_pv_entries(pmap_t pmap, int needed, struct rwlock **lockp)
1707 struct pch new_tail;
1708 struct pv_chunk *pc;
1713 rw_assert(&pvh_global_lock, RA_LOCKED);
1714 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1715 KASSERT(lockp != NULL, ("reserve_pv_entries: lockp is NULL"));
1718 * Newly allocated PV chunks must be stored in a private list until
1719 * the required number of PV chunks have been allocated. Otherwise,
1720 * reclaim_pv_chunk() could recycle one of these chunks. In
1721 * contrast, these chunks must be added to the pmap upon allocation.
1723 TAILQ_INIT(&new_tail);
1726 TAILQ_FOREACH(pc, &pmap->pm_pvchunk, pc_list) {
1727 bit_count((bitstr_t *)pc->pc_map, 0,
1728 sizeof(pc->pc_map) * NBBY, &free);
1732 if (avail >= needed)
1735 for (reclaimed = false; avail < needed; avail += _NPCPV) {
1736 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1739 m = reclaim_pv_chunk(pmap, lockp);
1746 dump_add_page(m->phys_addr);
1748 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1750 pc->pc_map[0] = PC_FREE0;
1751 pc->pc_map[1] = PC_FREE1;
1752 pc->pc_map[2] = PC_FREE2;
1753 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1754 TAILQ_INSERT_TAIL(&new_tail, pc, pc_lru);
1757 * The reclaim might have freed a chunk from the current pmap.
1758 * If that chunk contained available entries, we need to
1759 * re-count the number of available entries.
1764 if (!TAILQ_EMPTY(&new_tail)) {
1765 mtx_lock(&pv_chunks_mutex);
1766 TAILQ_CONCAT(&pv_chunks, &new_tail, pc_lru);
1767 mtx_unlock(&pv_chunks_mutex);
1772 * First find and then remove the pv entry for the specified pmap and virtual
1773 * address from the specified pv list. Returns the pv entry if found and NULL
1774 * otherwise. This operation can be performed on pv lists for either 4KB or
1775 * 2MB page mappings.
1777 static __inline pv_entry_t
1778 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1782 rw_assert(&pvh_global_lock, RA_LOCKED);
1783 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
1784 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
1785 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
1794 * First find and then destroy the pv entry for the specified pmap and virtual
1795 * address. This operation can be performed on pv lists for either 4KB or 2MB
1799 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1803 pv = pmap_pvh_remove(pvh, pmap, va);
1805 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found for %#lx", va));
1806 free_pv_entry(pmap, pv);
1810 * Conditionally create the PV entry for a 4KB page mapping if the required
1811 * memory can be allocated without resorting to reclamation.
1814 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m,
1815 struct rwlock **lockp)
1819 rw_assert(&pvh_global_lock, RA_LOCKED);
1820 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1821 /* Pass NULL instead of the lock pointer to disable reclamation. */
1822 if ((pv = get_pv_entry(pmap, NULL)) != NULL) {
1824 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1825 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1833 * After demotion from a 2MB page mapping to 512 4KB page mappings,
1834 * destroy the pv entry for the 2MB page mapping and reinstantiate the pv
1835 * entries for each of the 4KB page mappings.
1837 static void __unused
1838 pmap_pv_demote_l2(pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
1839 struct rwlock **lockp)
1841 struct md_page *pvh;
1842 struct pv_chunk *pc;
1845 vm_offset_t va_last;
1848 rw_assert(&pvh_global_lock, RA_LOCKED);
1849 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1850 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1853 * Transfer the 2mpage's pv entry for this mapping to the first
1854 * page's pv list. Once this transfer begins, the pv list lock
1855 * must not be released until the last pv entry is reinstantiated.
1857 pvh = pa_to_pvh(pa);
1859 pv = pmap_pvh_remove(pvh, pmap, va);
1860 KASSERT(pv != NULL, ("pmap_pv_demote_l2: pv not found"));
1861 m = PHYS_TO_VM_PAGE(pa);
1862 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1864 /* Instantiate the remaining 511 pv entries. */
1865 va_last = va + L2_SIZE - PAGE_SIZE;
1867 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1868 KASSERT(pc->pc_map[0] != 0 || pc->pc_map[1] != 0 ||
1869 pc->pc_map[2] != 0, ("pmap_pv_demote_l2: missing spare"));
1870 for (field = 0; field < _NPCM; field++) {
1871 while (pc->pc_map[field] != 0) {
1872 bit = ffsl(pc->pc_map[field]) - 1;
1873 pc->pc_map[field] &= ~(1ul << bit);
1874 pv = &pc->pc_pventry[field * 64 + bit];
1878 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
1879 ("pmap_pv_demote_l2: page %p is not managed", m));
1880 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1886 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1887 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1890 if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 && pc->pc_map[2] == 0) {
1891 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1892 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1897 #if VM_NRESERVLEVEL > 0
1899 pmap_pv_promote_l2(pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
1900 struct rwlock **lockp)
1902 struct md_page *pvh;
1905 vm_offset_t va_last;
1907 rw_assert(&pvh_global_lock, RA_LOCKED);
1908 KASSERT((va & L2_OFFSET) == 0,
1909 ("pmap_pv_promote_l2: misaligned va %#lx", va));
1911 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1913 m = PHYS_TO_VM_PAGE(pa);
1914 pv = pmap_pvh_remove(&m->md, pmap, va);
1915 KASSERT(pv != NULL, ("pmap_pv_promote_l2: pv for %#lx not found", va));
1916 pvh = pa_to_pvh(pa);
1917 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
1920 va_last = va + L2_SIZE - PAGE_SIZE;
1924 pmap_pvh_free(&m->md, pmap, va);
1925 } while (va < va_last);
1927 #endif /* VM_NRESERVLEVEL > 0 */
1930 * Create the PV entry for a 2MB page mapping. Always returns true unless the
1931 * flag PMAP_ENTER_NORECLAIM is specified. If that flag is specified, returns
1932 * false if the PV entry cannot be allocated without resorting to reclamation.
1935 pmap_pv_insert_l2(pmap_t pmap, vm_offset_t va, pd_entry_t l2e, u_int flags,
1936 struct rwlock **lockp)
1938 struct md_page *pvh;
1942 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1943 /* Pass NULL instead of the lock pointer to disable reclamation. */
1944 if ((pv = get_pv_entry(pmap, (flags & PMAP_ENTER_NORECLAIM) != 0 ?
1945 NULL : lockp)) == NULL)
1948 pa = PTE_TO_PHYS(l2e);
1949 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1950 pvh = pa_to_pvh(pa);
1951 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
1957 pmap_remove_kernel_l2(pmap_t pmap, pt_entry_t *l2, vm_offset_t va)
1959 pt_entry_t newl2, oldl2;
1963 KASSERT(!VIRT_IN_DMAP(va), ("removing direct mapping of %#lx", va));
1964 KASSERT(pmap == kernel_pmap, ("pmap %p is not kernel_pmap", pmap));
1965 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1967 ml3 = pmap_remove_pt_page(pmap, va);
1969 panic("pmap_remove_kernel_l2: Missing pt page");
1971 ml3pa = VM_PAGE_TO_PHYS(ml3);
1972 newl2 = ml3pa | PTE_V;
1975 * If this page table page was unmapped by a promotion, then it
1976 * contains valid mappings. Zero it to invalidate those mappings.
1978 if (ml3->valid != 0)
1979 pagezero((void *)PHYS_TO_DMAP(ml3pa));
1982 * Demote the mapping.
1984 oldl2 = pmap_load_store(l2, newl2);
1985 KASSERT(oldl2 == 0, ("%s: found existing mapping at %p: %#lx",
1986 __func__, l2, oldl2));
1990 * pmap_remove_l2: Do the things to unmap a level 2 superpage.
1993 pmap_remove_l2(pmap_t pmap, pt_entry_t *l2, vm_offset_t sva,
1994 pd_entry_t l1e, struct spglist *free, struct rwlock **lockp)
1996 struct md_page *pvh;
1998 vm_offset_t eva, va;
2001 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2002 KASSERT((sva & L2_OFFSET) == 0, ("pmap_remove_l2: sva is not aligned"));
2003 oldl2 = pmap_load_clear(l2);
2004 KASSERT((oldl2 & PTE_RWX) != 0,
2005 ("pmap_remove_l2: L2e %lx is not a superpage mapping", oldl2));
2008 * The sfence.vma documentation states that it is sufficient to specify
2009 * a single address within a superpage mapping. However, since we do
2010 * not perform any invalidation upon promotion, TLBs may still be
2011 * caching 4KB mappings within the superpage, so we must invalidate the
2014 pmap_invalidate_range(pmap, sva, sva + L2_SIZE);
2015 if ((oldl2 & PTE_SW_WIRED) != 0)
2016 pmap->pm_stats.wired_count -= L2_SIZE / PAGE_SIZE;
2017 pmap_resident_count_dec(pmap, L2_SIZE / PAGE_SIZE);
2018 if ((oldl2 & PTE_SW_MANAGED) != 0) {
2019 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, PTE_TO_PHYS(oldl2));
2020 pvh = pa_to_pvh(PTE_TO_PHYS(oldl2));
2021 pmap_pvh_free(pvh, pmap, sva);
2022 eva = sva + L2_SIZE;
2023 for (va = sva, m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(oldl2));
2024 va < eva; va += PAGE_SIZE, m++) {
2025 if ((oldl2 & PTE_D) != 0)
2027 if ((oldl2 & PTE_A) != 0)
2028 vm_page_aflag_set(m, PGA_REFERENCED);
2029 if (TAILQ_EMPTY(&m->md.pv_list) &&
2030 TAILQ_EMPTY(&pvh->pv_list))
2031 vm_page_aflag_clear(m, PGA_WRITEABLE);
2034 if (pmap == kernel_pmap) {
2035 pmap_remove_kernel_l2(pmap, l2, sva);
2037 ml3 = pmap_remove_pt_page(pmap, sva);
2039 KASSERT(ml3->valid == VM_PAGE_BITS_ALL,
2040 ("pmap_remove_l2: l3 page not promoted"));
2041 pmap_resident_count_dec(pmap, 1);
2042 KASSERT(ml3->ref_count == Ln_ENTRIES,
2043 ("pmap_remove_l2: l3 page ref count error"));
2045 vm_page_unwire_noq(ml3);
2046 pmap_add_delayed_free_list(ml3, free, FALSE);
2049 return (pmap_unuse_pt(pmap, sva, l1e, free));
2053 * pmap_remove_l3: do the things to unmap a page in a process
2056 pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t va,
2057 pd_entry_t l2e, struct spglist *free, struct rwlock **lockp)
2059 struct md_page *pvh;
2064 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2065 old_l3 = pmap_load_clear(l3);
2066 pmap_invalidate_page(pmap, va);
2067 if (old_l3 & PTE_SW_WIRED)
2068 pmap->pm_stats.wired_count -= 1;
2069 pmap_resident_count_dec(pmap, 1);
2070 if (old_l3 & PTE_SW_MANAGED) {
2071 phys = PTE_TO_PHYS(old_l3);
2072 m = PHYS_TO_VM_PAGE(phys);
2073 if ((old_l3 & PTE_D) != 0)
2076 vm_page_aflag_set(m, PGA_REFERENCED);
2077 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
2078 pmap_pvh_free(&m->md, pmap, va);
2079 if (TAILQ_EMPTY(&m->md.pv_list) &&
2080 (m->flags & PG_FICTITIOUS) == 0) {
2081 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
2082 if (TAILQ_EMPTY(&pvh->pv_list))
2083 vm_page_aflag_clear(m, PGA_WRITEABLE);
2087 return (pmap_unuse_pt(pmap, va, l2e, free));
2091 * Remove the given range of addresses from the specified map.
2093 * It is assumed that the start and end are properly
2094 * rounded to the page size.
2097 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2099 struct spglist free;
2100 struct rwlock *lock;
2101 vm_offset_t va, va_next;
2102 pd_entry_t *l1, *l2, l2e;
2106 * Perform an unsynchronized read. This is, however, safe.
2108 if (pmap->pm_stats.resident_count == 0)
2113 rw_rlock(&pvh_global_lock);
2117 for (; sva < eva; sva = va_next) {
2118 if (pmap->pm_stats.resident_count == 0)
2121 l1 = pmap_l1(pmap, sva);
2122 if (pmap_load(l1) == 0) {
2123 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2130 * Calculate index for next page table.
2132 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2136 l2 = pmap_l1_to_l2(l1, sva);
2139 if ((l2e = pmap_load(l2)) == 0)
2141 if ((l2e & PTE_RWX) != 0) {
2142 if (sva + L2_SIZE == va_next && eva >= va_next) {
2143 (void)pmap_remove_l2(pmap, l2, sva,
2144 pmap_load(l1), &free, &lock);
2146 } else if (!pmap_demote_l2_locked(pmap, l2, sva,
2149 * The large page mapping was destroyed.
2153 l2e = pmap_load(l2);
2157 * Limit our scan to either the end of the va represented
2158 * by the current page table page, or to the end of the
2159 * range being removed.
2165 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2167 if (pmap_load(l3) == 0) {
2168 if (va != va_next) {
2169 pmap_invalidate_range(pmap, va, sva);
2176 if (pmap_remove_l3(pmap, l3, sva, l2e, &free, &lock)) {
2182 pmap_invalidate_range(pmap, va, sva);
2186 rw_runlock(&pvh_global_lock);
2188 vm_page_free_pages_toq(&free, false);
2192 * Routine: pmap_remove_all
2194 * Removes this physical page from
2195 * all physical maps in which it resides.
2196 * Reflects back modify bits to the pager.
2199 * Original versions of this routine were very
2200 * inefficient because they iteratively called
2201 * pmap_remove (slow...)
2205 pmap_remove_all(vm_page_t m)
2207 struct spglist free;
2208 struct md_page *pvh;
2210 pt_entry_t *l3, l3e;
2211 pd_entry_t *l2, l2e;
2215 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2216 ("pmap_remove_all: page %p is not managed", m));
2218 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
2219 pa_to_pvh(VM_PAGE_TO_PHYS(m));
2221 rw_wlock(&pvh_global_lock);
2222 while ((pv = TAILQ_FIRST(&pvh->pv_list)) != NULL) {
2226 l2 = pmap_l2(pmap, va);
2227 (void)pmap_demote_l2(pmap, l2, va);
2230 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2233 pmap_resident_count_dec(pmap, 1);
2234 l2 = pmap_l2(pmap, pv->pv_va);
2235 KASSERT(l2 != NULL, ("pmap_remove_all: no l2 table found"));
2236 l2e = pmap_load(l2);
2238 KASSERT((l2e & PTE_RX) == 0,
2239 ("pmap_remove_all: found a superpage in %p's pv list", m));
2241 l3 = pmap_l2_to_l3(l2, pv->pv_va);
2242 l3e = pmap_load_clear(l3);
2243 pmap_invalidate_page(pmap, pv->pv_va);
2244 if (l3e & PTE_SW_WIRED)
2245 pmap->pm_stats.wired_count--;
2246 if ((l3e & PTE_A) != 0)
2247 vm_page_aflag_set(m, PGA_REFERENCED);
2250 * Update the vm_page_t clean and reference bits.
2252 if ((l3e & PTE_D) != 0)
2254 pmap_unuse_pt(pmap, pv->pv_va, pmap_load(l2), &free);
2255 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
2257 free_pv_entry(pmap, pv);
2260 vm_page_aflag_clear(m, PGA_WRITEABLE);
2261 rw_wunlock(&pvh_global_lock);
2262 vm_page_free_pages_toq(&free, false);
2266 * Set the physical protection on the
2267 * specified range of this map as requested.
2270 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2272 pd_entry_t *l1, *l2, l2e;
2273 pt_entry_t *l3, l3e, mask;
2276 vm_offset_t va_next;
2277 bool anychanged, pv_lists_locked;
2279 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2280 pmap_remove(pmap, sva, eva);
2284 if ((prot & (VM_PROT_WRITE | VM_PROT_EXECUTE)) ==
2285 (VM_PROT_WRITE | VM_PROT_EXECUTE))
2289 pv_lists_locked = false;
2291 if ((prot & VM_PROT_WRITE) == 0)
2292 mask |= PTE_W | PTE_D;
2293 if ((prot & VM_PROT_EXECUTE) == 0)
2297 for (; sva < eva; sva = va_next) {
2298 l1 = pmap_l1(pmap, sva);
2299 if (pmap_load(l1) == 0) {
2300 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2306 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2310 l2 = pmap_l1_to_l2(l1, sva);
2311 if (l2 == NULL || (l2e = pmap_load(l2)) == 0)
2313 if ((l2e & PTE_RWX) != 0) {
2314 if (sva + L2_SIZE == va_next && eva >= va_next) {
2316 if ((prot & VM_PROT_WRITE) == 0 &&
2317 (l2e & (PTE_SW_MANAGED | PTE_D)) ==
2318 (PTE_SW_MANAGED | PTE_D)) {
2319 pa = PTE_TO_PHYS(l2e);
2320 m = PHYS_TO_VM_PAGE(pa);
2321 for (mt = m; mt < &m[Ln_ENTRIES]; mt++)
2324 if (!atomic_fcmpset_long(l2, &l2e, l2e & ~mask))
2329 if (!pv_lists_locked) {
2330 pv_lists_locked = true;
2331 if (!rw_try_rlock(&pvh_global_lock)) {
2333 pmap_invalidate_all(
2336 rw_rlock(&pvh_global_lock);
2340 if (!pmap_demote_l2(pmap, l2, sva)) {
2342 * The large page mapping was destroyed.
2352 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2354 l3e = pmap_load(l3);
2356 if ((l3e & PTE_V) == 0)
2358 if ((prot & VM_PROT_WRITE) == 0 &&
2359 (l3e & (PTE_SW_MANAGED | PTE_D)) ==
2360 (PTE_SW_MANAGED | PTE_D)) {
2361 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(l3e));
2364 if (!atomic_fcmpset_long(l3, &l3e, l3e & ~mask))
2370 pmap_invalidate_all(pmap);
2371 if (pv_lists_locked)
2372 rw_runlock(&pvh_global_lock);
2377 pmap_fault_fixup(pmap_t pmap, vm_offset_t va, vm_prot_t ftype)
2379 pd_entry_t *l2, l2e;
2380 pt_entry_t bits, *pte, oldpte;
2385 l2 = pmap_l2(pmap, va);
2386 if (l2 == NULL || ((l2e = pmap_load(l2)) & PTE_V) == 0)
2388 if ((l2e & PTE_RWX) == 0) {
2389 pte = pmap_l2_to_l3(l2, va);
2390 if (pte == NULL || ((oldpte = pmap_load(pte)) & PTE_V) == 0)
2397 if ((pmap != kernel_pmap && (oldpte & PTE_U) == 0) ||
2398 (ftype == VM_PROT_WRITE && (oldpte & PTE_W) == 0) ||
2399 (ftype == VM_PROT_EXECUTE && (oldpte & PTE_X) == 0) ||
2400 (ftype == VM_PROT_READ && (oldpte & PTE_R) == 0))
2404 if (ftype == VM_PROT_WRITE)
2408 * Spurious faults can occur if the implementation caches invalid
2409 * entries in the TLB, or if simultaneous accesses on multiple CPUs
2410 * race with each other.
2412 if ((oldpte & bits) != bits)
2413 pmap_store_bits(pte, bits);
2422 pmap_demote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va)
2424 struct rwlock *lock;
2428 rv = pmap_demote_l2_locked(pmap, l2, va, &lock);
2435 * Tries to demote a 2MB page mapping. If demotion fails, the 2MB page
2436 * mapping is invalidated.
2439 pmap_demote_l2_locked(pmap_t pmap, pd_entry_t *l2, vm_offset_t va,
2440 struct rwlock **lockp)
2442 struct spglist free;
2444 pd_entry_t newl2, oldl2;
2445 pt_entry_t *firstl3, newl3;
2449 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2451 oldl2 = pmap_load(l2);
2452 KASSERT((oldl2 & PTE_RWX) != 0,
2453 ("pmap_demote_l2_locked: oldl2 is not a leaf entry"));
2454 if ((oldl2 & PTE_A) == 0 || (mpte = pmap_remove_pt_page(pmap, va)) ==
2456 if ((oldl2 & PTE_A) == 0 || (mpte = vm_page_alloc(NULL,
2457 pmap_l2_pindex(va), (VIRT_IN_DMAP(va) ? VM_ALLOC_INTERRUPT :
2458 VM_ALLOC_NORMAL) | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) ==
2461 (void)pmap_remove_l2(pmap, l2, va & ~L2_OFFSET,
2462 pmap_load(pmap_l1(pmap, va)), &free, lockp);
2463 vm_page_free_pages_toq(&free, true);
2464 CTR2(KTR_PMAP, "pmap_demote_l2_locked: "
2465 "failure for va %#lx in pmap %p", va, pmap);
2468 if (va < VM_MAXUSER_ADDRESS) {
2469 mpte->ref_count = Ln_ENTRIES;
2470 pmap_resident_count_inc(pmap, 1);
2473 mptepa = VM_PAGE_TO_PHYS(mpte);
2474 firstl3 = (pt_entry_t *)PHYS_TO_DMAP(mptepa);
2475 newl2 = ((mptepa / PAGE_SIZE) << PTE_PPN0_S) | PTE_V;
2476 KASSERT((oldl2 & PTE_A) != 0,
2477 ("pmap_demote_l2_locked: oldl2 is missing PTE_A"));
2478 KASSERT((oldl2 & (PTE_D | PTE_W)) != PTE_W,
2479 ("pmap_demote_l2_locked: oldl2 is missing PTE_D"));
2483 * If the page table page is not leftover from an earlier promotion,
2486 if (mpte->valid == 0) {
2487 for (i = 0; i < Ln_ENTRIES; i++)
2488 pmap_store(firstl3 + i, newl3 + (i << PTE_PPN0_S));
2490 KASSERT(PTE_TO_PHYS(pmap_load(firstl3)) == PTE_TO_PHYS(newl3),
2491 ("pmap_demote_l2_locked: firstl3 and newl3 map different physical "
2495 * If the mapping has changed attributes, update the page table
2498 if ((pmap_load(firstl3) & PTE_PROMOTE) != (newl3 & PTE_PROMOTE))
2499 for (i = 0; i < Ln_ENTRIES; i++)
2500 pmap_store(firstl3 + i, newl3 + (i << PTE_PPN0_S));
2503 * The spare PV entries must be reserved prior to demoting the
2504 * mapping, that is, prior to changing the L2 entry. Otherwise, the
2505 * state of the L2 entry and the PV lists will be inconsistent, which
2506 * can result in reclaim_pv_chunk() attempting to remove a PV entry from
2507 * the wrong PV list and pmap_pv_demote_l2() failing to find the
2508 * expected PV entry for the 2MB page mapping that is being demoted.
2510 if ((oldl2 & PTE_SW_MANAGED) != 0)
2511 reserve_pv_entries(pmap, Ln_ENTRIES - 1, lockp);
2514 * Demote the mapping.
2516 pmap_store(l2, newl2);
2519 * Demote the PV entry.
2521 if ((oldl2 & PTE_SW_MANAGED) != 0)
2522 pmap_pv_demote_l2(pmap, va, PTE_TO_PHYS(oldl2), lockp);
2524 atomic_add_long(&pmap_l2_demotions, 1);
2525 CTR2(KTR_PMAP, "pmap_demote_l2_locked: success for va %#lx in pmap %p",
2530 #if VM_NRESERVLEVEL > 0
2532 pmap_promote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va,
2533 struct rwlock **lockp)
2535 pt_entry_t *firstl3, *l3;
2539 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2542 KASSERT((pmap_load(l2) & PTE_RWX) == 0,
2543 ("pmap_promote_l2: invalid l2 entry %p", l2));
2545 firstl3 = (pt_entry_t *)PHYS_TO_DMAP(PTE_TO_PHYS(pmap_load(l2)));
2546 pa = PTE_TO_PHYS(pmap_load(firstl3));
2547 if ((pa & L2_OFFSET) != 0) {
2548 CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx pmap %p",
2550 atomic_add_long(&pmap_l2_p_failures, 1);
2555 for (l3 = firstl3 + 1; l3 < firstl3 + Ln_ENTRIES; l3++) {
2556 if (PTE_TO_PHYS(pmap_load(l3)) != pa) {
2558 "pmap_promote_l2: failure for va %#lx pmap %p",
2560 atomic_add_long(&pmap_l2_p_failures, 1);
2563 if ((pmap_load(l3) & PTE_PROMOTE) !=
2564 (pmap_load(firstl3) & PTE_PROMOTE)) {
2566 "pmap_promote_l2: failure for va %#lx pmap %p",
2568 atomic_add_long(&pmap_l2_p_failures, 1);
2574 ml3 = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2575 KASSERT(ml3->pindex == pmap_l2_pindex(va),
2576 ("pmap_promote_l2: page table page's pindex is wrong"));
2577 if (pmap_insert_pt_page(pmap, ml3, true)) {
2578 CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx pmap %p",
2580 atomic_add_long(&pmap_l2_p_failures, 1);
2584 if ((pmap_load(firstl3) & PTE_SW_MANAGED) != 0)
2585 pmap_pv_promote_l2(pmap, va, PTE_TO_PHYS(pmap_load(firstl3)),
2588 pmap_store(l2, pmap_load(firstl3));
2590 atomic_add_long(&pmap_l2_promotions, 1);
2591 CTR2(KTR_PMAP, "pmap_promote_l2: success for va %#lx in pmap %p", va,
2597 * Insert the given physical page (p) at
2598 * the specified virtual address (v) in the
2599 * target physical map with the protection requested.
2601 * If specified, the page will be wired down, meaning
2602 * that the related pte can not be reclaimed.
2604 * NB: This is the only routine which MAY NOT lazy-evaluate
2605 * or lose information. That is, this routine must actually
2606 * insert this page into the given map NOW.
2609 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2610 u_int flags, int8_t psind)
2612 struct rwlock *lock;
2613 pd_entry_t *l1, *l2, l2e;
2614 pt_entry_t new_l3, orig_l3;
2617 vm_paddr_t opa, pa, l2_pa, l3_pa;
2618 vm_page_t mpte, om, l2_m, l3_m;
2620 pn_t l2_pn, l3_pn, pn;
2624 va = trunc_page(va);
2625 if ((m->oflags & VPO_UNMANAGED) == 0)
2626 VM_PAGE_OBJECT_BUSY_ASSERT(m);
2627 pa = VM_PAGE_TO_PHYS(m);
2628 pn = (pa / PAGE_SIZE);
2630 new_l3 = PTE_V | PTE_R | PTE_A;
2631 if (prot & VM_PROT_EXECUTE)
2633 if (flags & VM_PROT_WRITE)
2635 if (prot & VM_PROT_WRITE)
2637 if (va < VM_MAX_USER_ADDRESS)
2640 new_l3 |= (pn << PTE_PPN0_S);
2641 if ((flags & PMAP_ENTER_WIRED) != 0)
2642 new_l3 |= PTE_SW_WIRED;
2645 * Set modified bit gratuitously for writeable mappings if
2646 * the page is unmanaged. We do not want to take a fault
2647 * to do the dirty bit accounting for these mappings.
2649 if ((m->oflags & VPO_UNMANAGED) != 0) {
2650 if (prot & VM_PROT_WRITE)
2653 new_l3 |= PTE_SW_MANAGED;
2655 CTR2(KTR_PMAP, "pmap_enter: %.16lx -> %.16lx", va, pa);
2659 rw_rlock(&pvh_global_lock);
2662 /* Assert the required virtual and physical alignment. */
2663 KASSERT((va & L2_OFFSET) == 0,
2664 ("pmap_enter: va %#lx unaligned", va));
2665 KASSERT(m->psind > 0, ("pmap_enter: m->psind < psind"));
2666 rv = pmap_enter_l2(pmap, va, new_l3, flags, m, &lock);
2670 l2 = pmap_l2(pmap, va);
2671 if (l2 != NULL && ((l2e = pmap_load(l2)) & PTE_V) != 0 &&
2672 ((l2e & PTE_RWX) == 0 || pmap_demote_l2_locked(pmap, l2,
2674 l3 = pmap_l2_to_l3(l2, va);
2675 if (va < VM_MAXUSER_ADDRESS) {
2676 mpte = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2679 } else if (va < VM_MAXUSER_ADDRESS) {
2680 nosleep = (flags & PMAP_ENTER_NOSLEEP) != 0;
2681 mpte = pmap_alloc_l3(pmap, va, nosleep ? NULL : &lock);
2682 if (mpte == NULL && nosleep) {
2683 CTR0(KTR_PMAP, "pmap_enter: mpte == NULL");
2686 rw_runlock(&pvh_global_lock);
2688 return (KERN_RESOURCE_SHORTAGE);
2690 l3 = pmap_l3(pmap, va);
2692 l3 = pmap_l3(pmap, va);
2693 /* TODO: This is not optimal, but should mostly work */
2696 l2_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2697 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
2700 panic("pmap_enter: l2 pte_m == NULL");
2701 if ((l2_m->flags & PG_ZERO) == 0)
2702 pmap_zero_page(l2_m);
2704 l2_pa = VM_PAGE_TO_PHYS(l2_m);
2705 l2_pn = (l2_pa / PAGE_SIZE);
2707 l1 = pmap_l1(pmap, va);
2709 entry |= (l2_pn << PTE_PPN0_S);
2710 pmap_store(l1, entry);
2711 pmap_distribute_l1(pmap, pmap_l1_index(va), entry);
2712 l2 = pmap_l1_to_l2(l1, va);
2715 l3_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2716 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO);
2718 panic("pmap_enter: l3 pte_m == NULL");
2719 if ((l3_m->flags & PG_ZERO) == 0)
2720 pmap_zero_page(l3_m);
2722 l3_pa = VM_PAGE_TO_PHYS(l3_m);
2723 l3_pn = (l3_pa / PAGE_SIZE);
2725 entry |= (l3_pn << PTE_PPN0_S);
2726 pmap_store(l2, entry);
2727 l3 = pmap_l2_to_l3(l2, va);
2729 pmap_invalidate_page(pmap, va);
2732 orig_l3 = pmap_load(l3);
2733 opa = PTE_TO_PHYS(orig_l3);
2737 * Is the specified virtual address already mapped?
2739 if ((orig_l3 & PTE_V) != 0) {
2741 * Wiring change, just update stats. We don't worry about
2742 * wiring PT pages as they remain resident as long as there
2743 * are valid mappings in them. Hence, if a user page is wired,
2744 * the PT page will be also.
2746 if ((flags & PMAP_ENTER_WIRED) != 0 &&
2747 (orig_l3 & PTE_SW_WIRED) == 0)
2748 pmap->pm_stats.wired_count++;
2749 else if ((flags & PMAP_ENTER_WIRED) == 0 &&
2750 (orig_l3 & PTE_SW_WIRED) != 0)
2751 pmap->pm_stats.wired_count--;
2754 * Remove the extra PT page reference.
2758 KASSERT(mpte->ref_count > 0,
2759 ("pmap_enter: missing reference to page table page,"
2764 * Has the physical page changed?
2768 * No, might be a protection or wiring change.
2770 if ((orig_l3 & PTE_SW_MANAGED) != 0 &&
2771 (new_l3 & PTE_W) != 0)
2772 vm_page_aflag_set(m, PGA_WRITEABLE);
2777 * The physical page has changed. Temporarily invalidate
2778 * the mapping. This ensures that all threads sharing the
2779 * pmap keep a consistent view of the mapping, which is
2780 * necessary for the correct handling of COW faults. It
2781 * also permits reuse of the old mapping's PV entry,
2782 * avoiding an allocation.
2784 * For consistency, handle unmanaged mappings the same way.
2786 orig_l3 = pmap_load_clear(l3);
2787 KASSERT(PTE_TO_PHYS(orig_l3) == opa,
2788 ("pmap_enter: unexpected pa update for %#lx", va));
2789 if ((orig_l3 & PTE_SW_MANAGED) != 0) {
2790 om = PHYS_TO_VM_PAGE(opa);
2793 * The pmap lock is sufficient to synchronize with
2794 * concurrent calls to pmap_page_test_mappings() and
2795 * pmap_ts_referenced().
2797 if ((orig_l3 & PTE_D) != 0)
2799 if ((orig_l3 & PTE_A) != 0)
2800 vm_page_aflag_set(om, PGA_REFERENCED);
2801 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, opa);
2802 pv = pmap_pvh_remove(&om->md, pmap, va);
2804 ("pmap_enter: no PV entry for %#lx", va));
2805 if ((new_l3 & PTE_SW_MANAGED) == 0)
2806 free_pv_entry(pmap, pv);
2807 if ((om->a.flags & PGA_WRITEABLE) != 0 &&
2808 TAILQ_EMPTY(&om->md.pv_list) &&
2809 ((om->flags & PG_FICTITIOUS) != 0 ||
2810 TAILQ_EMPTY(&pa_to_pvh(opa)->pv_list)))
2811 vm_page_aflag_clear(om, PGA_WRITEABLE);
2813 pmap_invalidate_page(pmap, va);
2817 * Increment the counters.
2819 if ((new_l3 & PTE_SW_WIRED) != 0)
2820 pmap->pm_stats.wired_count++;
2821 pmap_resident_count_inc(pmap, 1);
2824 * Enter on the PV list if part of our managed memory.
2826 if ((new_l3 & PTE_SW_MANAGED) != 0) {
2828 pv = get_pv_entry(pmap, &lock);
2831 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, pa);
2832 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
2834 if ((new_l3 & PTE_W) != 0)
2835 vm_page_aflag_set(m, PGA_WRITEABLE);
2840 * Sync the i-cache on all harts before updating the PTE
2841 * if the new PTE is executable.
2843 if (prot & VM_PROT_EXECUTE)
2844 pmap_sync_icache(pmap, va, PAGE_SIZE);
2847 * Update the L3 entry.
2850 orig_l3 = pmap_load_store(l3, new_l3);
2851 pmap_invalidate_page(pmap, va);
2852 KASSERT(PTE_TO_PHYS(orig_l3) == pa,
2853 ("pmap_enter: invalid update"));
2854 if ((orig_l3 & (PTE_D | PTE_SW_MANAGED)) ==
2855 (PTE_D | PTE_SW_MANAGED))
2858 pmap_store(l3, new_l3);
2861 #if VM_NRESERVLEVEL > 0
2862 if (mpte != NULL && mpte->ref_count == Ln_ENTRIES &&
2863 pmap_ps_enabled(pmap) &&
2864 (m->flags & PG_FICTITIOUS) == 0 &&
2865 vm_reserv_level_iffullpop(m) == 0)
2866 pmap_promote_l2(pmap, l2, va, &lock);
2873 rw_runlock(&pvh_global_lock);
2879 * Tries to create a read- and/or execute-only 2MB page mapping. Returns true
2880 * if successful. Returns false if (1) a page table page cannot be allocated
2881 * without sleeping, (2) a mapping already exists at the specified virtual
2882 * address, or (3) a PV entry cannot be allocated without reclaiming another
2886 pmap_enter_2mpage(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2887 struct rwlock **lockp)
2892 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2894 pn = VM_PAGE_TO_PHYS(m) / PAGE_SIZE;
2895 new_l2 = (pd_entry_t)((pn << PTE_PPN0_S) | PTE_R | PTE_V);
2896 if ((m->oflags & VPO_UNMANAGED) == 0)
2897 new_l2 |= PTE_SW_MANAGED;
2898 if ((prot & VM_PROT_EXECUTE) != 0)
2900 if (va < VM_MAXUSER_ADDRESS)
2902 return (pmap_enter_l2(pmap, va, new_l2, PMAP_ENTER_NOSLEEP |
2903 PMAP_ENTER_NOREPLACE | PMAP_ENTER_NORECLAIM, NULL, lockp) ==
2908 * Tries to create the specified 2MB page mapping. Returns KERN_SUCCESS if
2909 * the mapping was created, and either KERN_FAILURE or KERN_RESOURCE_SHORTAGE
2910 * otherwise. Returns KERN_FAILURE if PMAP_ENTER_NOREPLACE was specified and
2911 * a mapping already exists at the specified virtual address. Returns
2912 * KERN_RESOURCE_SHORTAGE if PMAP_ENTER_NOSLEEP was specified and a page table
2913 * page allocation failed. Returns KERN_RESOURCE_SHORTAGE if
2914 * PMAP_ENTER_NORECLAIM was specified and a PV entry allocation failed.
2916 * The parameter "m" is only used when creating a managed, writeable mapping.
2919 pmap_enter_l2(pmap_t pmap, vm_offset_t va, pd_entry_t new_l2, u_int flags,
2920 vm_page_t m, struct rwlock **lockp)
2922 struct spglist free;
2923 pd_entry_t *l2, *l3, oldl2;
2927 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2929 if ((l2pg = pmap_alloc_l2(pmap, va, (flags & PMAP_ENTER_NOSLEEP) != 0 ?
2930 NULL : lockp)) == NULL) {
2931 CTR2(KTR_PMAP, "pmap_enter_l2: failure for va %#lx in pmap %p",
2933 return (KERN_RESOURCE_SHORTAGE);
2936 l2 = (pd_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(l2pg));
2937 l2 = &l2[pmap_l2_index(va)];
2938 if ((oldl2 = pmap_load(l2)) != 0) {
2939 KASSERT(l2pg->ref_count > 1,
2940 ("pmap_enter_l2: l2pg's ref count is too low"));
2941 if ((flags & PMAP_ENTER_NOREPLACE) != 0) {
2944 "pmap_enter_l2: failure for va %#lx in pmap %p",
2946 return (KERN_FAILURE);
2949 if ((oldl2 & PTE_RWX) != 0)
2950 (void)pmap_remove_l2(pmap, l2, va,
2951 pmap_load(pmap_l1(pmap, va)), &free, lockp);
2953 for (sva = va; sva < va + L2_SIZE; sva += PAGE_SIZE) {
2954 l3 = pmap_l2_to_l3(l2, sva);
2955 if ((pmap_load(l3) & PTE_V) != 0 &&
2956 pmap_remove_l3(pmap, l3, sva, oldl2, &free,
2960 vm_page_free_pages_toq(&free, true);
2961 if (va >= VM_MAXUSER_ADDRESS) {
2963 * Both pmap_remove_l2() and pmap_remove_l3() will
2964 * leave the kernel page table page zero filled.
2966 mt = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2967 if (pmap_insert_pt_page(pmap, mt, false))
2968 panic("pmap_enter_l2: trie insert failed");
2970 KASSERT(pmap_load(l2) == 0,
2971 ("pmap_enter_l2: non-zero L2 entry %p", l2));
2974 if ((new_l2 & PTE_SW_MANAGED) != 0) {
2976 * Abort this mapping if its PV entry could not be created.
2978 if (!pmap_pv_insert_l2(pmap, va, new_l2, flags, lockp)) {
2980 if (pmap_unwire_ptp(pmap, va, l2pg, &free)) {
2982 * Although "va" is not mapped, paging-structure
2983 * caches could nonetheless have entries that
2984 * refer to the freed page table pages.
2985 * Invalidate those entries.
2987 pmap_invalidate_page(pmap, va);
2988 vm_page_free_pages_toq(&free, true);
2991 "pmap_enter_l2: failure for va %#lx in pmap %p",
2993 return (KERN_RESOURCE_SHORTAGE);
2995 if ((new_l2 & PTE_W) != 0)
2996 for (mt = m; mt < &m[L2_SIZE / PAGE_SIZE]; mt++)
2997 vm_page_aflag_set(mt, PGA_WRITEABLE);
3001 * Increment counters.
3003 if ((new_l2 & PTE_SW_WIRED) != 0)
3004 pmap->pm_stats.wired_count += L2_SIZE / PAGE_SIZE;
3005 pmap->pm_stats.resident_count += L2_SIZE / PAGE_SIZE;
3008 * Map the superpage.
3010 pmap_store(l2, new_l2);
3012 atomic_add_long(&pmap_l2_mappings, 1);
3013 CTR2(KTR_PMAP, "pmap_enter_l2: success for va %#lx in pmap %p",
3016 return (KERN_SUCCESS);
3020 * Maps a sequence of resident pages belonging to the same object.
3021 * The sequence begins with the given page m_start. This page is
3022 * mapped at the given virtual address start. Each subsequent page is
3023 * mapped at a virtual address that is offset from start by the same
3024 * amount as the page is offset from m_start within the object. The
3025 * last page in the sequence is the page with the largest offset from
3026 * m_start that can be mapped at a virtual address less than the given
3027 * virtual address end. Not every virtual page between start and end
3028 * is mapped; only those for which a resident page exists with the
3029 * corresponding offset from m_start are mapped.
3032 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
3033 vm_page_t m_start, vm_prot_t prot)
3035 struct rwlock *lock;
3038 vm_pindex_t diff, psize;
3040 VM_OBJECT_ASSERT_LOCKED(m_start->object);
3042 psize = atop(end - start);
3046 rw_rlock(&pvh_global_lock);
3048 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
3049 va = start + ptoa(diff);
3050 if ((va & L2_OFFSET) == 0 && va + L2_SIZE <= end &&
3051 m->psind == 1 && pmap_ps_enabled(pmap) &&
3052 pmap_enter_2mpage(pmap, va, m, prot, &lock))
3053 m = &m[L2_SIZE / PAGE_SIZE - 1];
3055 mpte = pmap_enter_quick_locked(pmap, va, m, prot, mpte,
3057 m = TAILQ_NEXT(m, listq);
3061 rw_runlock(&pvh_global_lock);
3066 * this code makes some *MAJOR* assumptions:
3067 * 1. Current pmap & pmap exists.
3070 * 4. No page table pages.
3071 * but is *MUCH* faster than pmap_enter...
3075 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3077 struct rwlock *lock;
3080 rw_rlock(&pvh_global_lock);
3082 (void)pmap_enter_quick_locked(pmap, va, m, prot, NULL, &lock);
3085 rw_runlock(&pvh_global_lock);
3090 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
3091 vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp)
3093 struct spglist free;
3096 pt_entry_t *l3, newl3;
3098 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
3099 (m->oflags & VPO_UNMANAGED) != 0,
3100 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
3101 rw_assert(&pvh_global_lock, RA_LOCKED);
3102 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
3104 CTR2(KTR_PMAP, "pmap_enter_quick_locked: %p %lx", pmap, va);
3106 * In the case that a page table page is not
3107 * resident, we are creating it here.
3109 if (va < VM_MAXUSER_ADDRESS) {
3110 vm_pindex_t l2pindex;
3113 * Calculate pagetable page index
3115 l2pindex = pmap_l2_pindex(va);
3116 if (mpte && (mpte->pindex == l2pindex)) {
3122 l2 = pmap_l2(pmap, va);
3125 * If the page table page is mapped, we just increment
3126 * the hold count, and activate it. Otherwise, we
3127 * attempt to allocate a page table page. If this
3128 * attempt fails, we don't retry. Instead, we give up.
3130 if (l2 != NULL && pmap_load(l2) != 0) {
3131 phys = PTE_TO_PHYS(pmap_load(l2));
3132 mpte = PHYS_TO_VM_PAGE(phys);
3136 * Pass NULL instead of the PV list lock
3137 * pointer, because we don't intend to sleep.
3139 mpte = _pmap_alloc_l3(pmap, l2pindex, NULL);
3144 l3 = (pt_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mpte));
3145 l3 = &l3[pmap_l3_index(va)];
3148 l3 = pmap_l3(kernel_pmap, va);
3151 panic("pmap_enter_quick_locked: No l3");
3152 if (pmap_load(l3) != 0) {
3161 * Enter on the PV list if part of our managed memory.
3163 if ((m->oflags & VPO_UNMANAGED) == 0 &&
3164 !pmap_try_insert_pv_entry(pmap, va, m, lockp)) {
3167 if (pmap_unwire_ptp(pmap, va, mpte, &free)) {
3168 pmap_invalidate_page(pmap, va);
3169 vm_page_free_pages_toq(&free, false);
3177 * Increment counters
3179 pmap_resident_count_inc(pmap, 1);
3181 newl3 = ((VM_PAGE_TO_PHYS(m) / PAGE_SIZE) << PTE_PPN0_S) |
3183 if ((prot & VM_PROT_EXECUTE) != 0)
3185 if ((m->oflags & VPO_UNMANAGED) == 0)
3186 newl3 |= PTE_SW_MANAGED;
3187 if (va < VM_MAX_USER_ADDRESS)
3191 * Sync the i-cache on all harts before updating the PTE
3192 * if the new PTE is executable.
3194 if (prot & VM_PROT_EXECUTE)
3195 pmap_sync_icache(pmap, va, PAGE_SIZE);
3197 pmap_store(l3, newl3);
3199 pmap_invalidate_page(pmap, va);
3204 * This code maps large physical mmap regions into the
3205 * processor address space. Note that some shortcuts
3206 * are taken, but the code works.
3209 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
3210 vm_pindex_t pindex, vm_size_t size)
3213 VM_OBJECT_ASSERT_WLOCKED(object);
3214 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
3215 ("pmap_object_init_pt: non-device object"));
3219 * Clear the wired attribute from the mappings for the specified range of
3220 * addresses in the given pmap. Every valid mapping within that range
3221 * must have the wired attribute set. In contrast, invalid mappings
3222 * cannot have the wired attribute set, so they are ignored.
3224 * The wired attribute of the page table entry is not a hardware feature,
3225 * so there is no need to invalidate any TLB entries.
3228 pmap_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
3230 vm_offset_t va_next;
3231 pd_entry_t *l1, *l2, l2e;
3232 pt_entry_t *l3, l3e;
3233 bool pv_lists_locked;
3235 pv_lists_locked = false;
3238 for (; sva < eva; sva = va_next) {
3239 l1 = pmap_l1(pmap, sva);
3240 if (pmap_load(l1) == 0) {
3241 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
3247 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
3251 l2 = pmap_l1_to_l2(l1, sva);
3252 if ((l2e = pmap_load(l2)) == 0)
3254 if ((l2e & PTE_RWX) != 0) {
3255 if (sva + L2_SIZE == va_next && eva >= va_next) {
3256 if ((l2e & PTE_SW_WIRED) == 0)
3257 panic("pmap_unwire: l2 %#jx is missing "
3258 "PTE_SW_WIRED", (uintmax_t)l2e);
3259 pmap_clear_bits(l2, PTE_SW_WIRED);
3262 if (!pv_lists_locked) {
3263 pv_lists_locked = true;
3264 if (!rw_try_rlock(&pvh_global_lock)) {
3266 rw_rlock(&pvh_global_lock);
3271 if (!pmap_demote_l2(pmap, l2, sva))
3272 panic("pmap_unwire: demotion failed");
3278 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
3280 if ((l3e = pmap_load(l3)) == 0)
3282 if ((l3e & PTE_SW_WIRED) == 0)
3283 panic("pmap_unwire: l3 %#jx is missing "
3284 "PTE_SW_WIRED", (uintmax_t)l3e);
3287 * PG_W must be cleared atomically. Although the pmap
3288 * lock synchronizes access to PG_W, another processor
3289 * could be setting PG_M and/or PG_A concurrently.
3291 pmap_clear_bits(l3, PTE_SW_WIRED);
3292 pmap->pm_stats.wired_count--;
3295 if (pv_lists_locked)
3296 rw_runlock(&pvh_global_lock);
3301 * Copy the range specified by src_addr/len
3302 * from the source map to the range dst_addr/len
3303 * in the destination map.
3305 * This routine is only advisory and need not do anything.
3309 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
3310 vm_offset_t src_addr)
3316 * pmap_zero_page zeros the specified hardware page by mapping
3317 * the page into KVM and using bzero to clear its contents.
3320 pmap_zero_page(vm_page_t m)
3322 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
3324 pagezero((void *)va);
3328 * pmap_zero_page_area zeros the specified hardware page by mapping
3329 * the page into KVM and using bzero to clear its contents.
3331 * off and size may not cover an area beyond a single hardware page.
3334 pmap_zero_page_area(vm_page_t m, int off, int size)
3336 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
3338 if (off == 0 && size == PAGE_SIZE)
3339 pagezero((void *)va);
3341 bzero((char *)va + off, size);
3345 * pmap_copy_page copies the specified (machine independent)
3346 * page by mapping the page into virtual memory and using
3347 * bcopy to copy the page, one machine dependent page at a
3351 pmap_copy_page(vm_page_t msrc, vm_page_t mdst)
3353 vm_offset_t src = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(msrc));
3354 vm_offset_t dst = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mdst));
3356 pagecopy((void *)src, (void *)dst);
3359 int unmapped_buf_allowed = 1;
3362 pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[],
3363 vm_offset_t b_offset, int xfersize)
3367 vm_paddr_t p_a, p_b;
3368 vm_offset_t a_pg_offset, b_pg_offset;
3371 while (xfersize > 0) {
3372 a_pg_offset = a_offset & PAGE_MASK;
3373 m_a = ma[a_offset >> PAGE_SHIFT];
3374 p_a = m_a->phys_addr;
3375 b_pg_offset = b_offset & PAGE_MASK;
3376 m_b = mb[b_offset >> PAGE_SHIFT];
3377 p_b = m_b->phys_addr;
3378 cnt = min(xfersize, PAGE_SIZE - a_pg_offset);
3379 cnt = min(cnt, PAGE_SIZE - b_pg_offset);
3380 if (__predict_false(!PHYS_IN_DMAP(p_a))) {
3381 panic("!DMAP a %lx", p_a);
3383 a_cp = (char *)PHYS_TO_DMAP(p_a) + a_pg_offset;
3385 if (__predict_false(!PHYS_IN_DMAP(p_b))) {
3386 panic("!DMAP b %lx", p_b);
3388 b_cp = (char *)PHYS_TO_DMAP(p_b) + b_pg_offset;
3390 bcopy(a_cp, b_cp, cnt);
3398 pmap_quick_enter_page(vm_page_t m)
3401 return (PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)));
3405 pmap_quick_remove_page(vm_offset_t addr)
3410 * Returns true if the pmap's pv is one of the first
3411 * 16 pvs linked to from this page. This count may
3412 * be changed upwards or downwards in the future; it
3413 * is only necessary that true be returned for a small
3414 * subset of pmaps for proper page aging.
3417 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
3419 struct md_page *pvh;
3420 struct rwlock *lock;
3425 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3426 ("pmap_page_exists_quick: page %p is not managed", m));
3428 rw_rlock(&pvh_global_lock);
3429 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3431 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3432 if (PV_PMAP(pv) == pmap) {
3440 if (!rv && loops < 16 && (m->flags & PG_FICTITIOUS) == 0) {
3441 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3442 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3443 if (PV_PMAP(pv) == pmap) {
3453 rw_runlock(&pvh_global_lock);
3458 * pmap_page_wired_mappings:
3460 * Return the number of managed mappings to the given physical page
3464 pmap_page_wired_mappings(vm_page_t m)
3466 struct md_page *pvh;
3467 struct rwlock *lock;
3472 int count, md_gen, pvh_gen;
3474 if ((m->oflags & VPO_UNMANAGED) != 0)
3476 rw_rlock(&pvh_global_lock);
3477 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3481 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3483 if (!PMAP_TRYLOCK(pmap)) {
3484 md_gen = m->md.pv_gen;
3488 if (md_gen != m->md.pv_gen) {
3493 l3 = pmap_l3(pmap, pv->pv_va);
3494 if ((pmap_load(l3) & PTE_SW_WIRED) != 0)
3498 if ((m->flags & PG_FICTITIOUS) == 0) {
3499 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3500 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3502 if (!PMAP_TRYLOCK(pmap)) {
3503 md_gen = m->md.pv_gen;
3504 pvh_gen = pvh->pv_gen;
3508 if (md_gen != m->md.pv_gen ||
3509 pvh_gen != pvh->pv_gen) {
3514 l2 = pmap_l2(pmap, pv->pv_va);
3515 if ((pmap_load(l2) & PTE_SW_WIRED) != 0)
3521 rw_runlock(&pvh_global_lock);
3526 * Returns true if the given page is mapped individually or as part of
3527 * a 2mpage. Otherwise, returns false.
3530 pmap_page_is_mapped(vm_page_t m)
3532 struct rwlock *lock;
3535 if ((m->oflags & VPO_UNMANAGED) != 0)
3537 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3539 rv = !TAILQ_EMPTY(&m->md.pv_list) ||
3540 ((m->flags & PG_FICTITIOUS) == 0 &&
3541 !TAILQ_EMPTY(&pa_to_pvh(VM_PAGE_TO_PHYS(m))->pv_list));
3547 pmap_remove_pages_pv(pmap_t pmap, vm_page_t m, pv_entry_t pv,
3548 struct spglist *free, bool superpage)
3550 struct md_page *pvh;
3554 pmap_resident_count_dec(pmap, Ln_ENTRIES);
3555 pvh = pa_to_pvh(m->phys_addr);
3556 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
3558 if (TAILQ_EMPTY(&pvh->pv_list)) {
3559 for (mt = m; mt < &m[Ln_ENTRIES]; mt++)
3560 if (TAILQ_EMPTY(&mt->md.pv_list) &&
3561 (mt->a.flags & PGA_WRITEABLE) != 0)
3562 vm_page_aflag_clear(mt, PGA_WRITEABLE);
3564 mpte = pmap_remove_pt_page(pmap, pv->pv_va);
3566 KASSERT(mpte->valid == VM_PAGE_BITS_ALL,
3567 ("pmap_remove_pages: pte page not promoted"));
3568 pmap_resident_count_dec(pmap, 1);
3569 KASSERT(mpte->ref_count == Ln_ENTRIES,
3570 ("pmap_remove_pages: pte page ref count error"));
3571 mpte->ref_count = 0;
3572 pmap_add_delayed_free_list(mpte, free, FALSE);
3575 pmap_resident_count_dec(pmap, 1);
3576 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
3578 if (TAILQ_EMPTY(&m->md.pv_list) &&
3579 (m->a.flags & PGA_WRITEABLE) != 0) {
3580 pvh = pa_to_pvh(m->phys_addr);
3581 if (TAILQ_EMPTY(&pvh->pv_list))
3582 vm_page_aflag_clear(m, PGA_WRITEABLE);
3588 * Destroy all managed, non-wired mappings in the given user-space
3589 * pmap. This pmap cannot be active on any processor besides the
3592 * This function cannot be applied to the kernel pmap. Moreover, it
3593 * is not intended for general use. It is only to be used during
3594 * process termination. Consequently, it can be implemented in ways
3595 * that make it faster than pmap_remove(). First, it can more quickly
3596 * destroy mappings by iterating over the pmap's collection of PV
3597 * entries, rather than searching the page table. Second, it doesn't
3598 * have to test and clear the page table entries atomically, because
3599 * no processor is currently accessing the user address space. In
3600 * particular, a page table entry's dirty bit won't change state once
3601 * this function starts.
3604 pmap_remove_pages(pmap_t pmap)
3606 struct spglist free;
3608 pt_entry_t *pte, tpte;
3611 struct pv_chunk *pc, *npc;
3612 struct rwlock *lock;
3614 uint64_t inuse, bitmask;
3615 int allfree, field, freed, idx;
3621 rw_rlock(&pvh_global_lock);
3623 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
3626 for (field = 0; field < _NPCM; field++) {
3627 inuse = ~pc->pc_map[field] & pc_freemask[field];
3628 while (inuse != 0) {
3629 bit = ffsl(inuse) - 1;
3630 bitmask = 1UL << bit;
3631 idx = field * 64 + bit;
3632 pv = &pc->pc_pventry[idx];
3635 pte = pmap_l1(pmap, pv->pv_va);
3636 ptepde = pmap_load(pte);
3637 pte = pmap_l1_to_l2(pte, pv->pv_va);
3638 tpte = pmap_load(pte);
3639 if ((tpte & PTE_RWX) != 0) {
3643 pte = pmap_l2_to_l3(pte, pv->pv_va);
3644 tpte = pmap_load(pte);
3649 * We cannot remove wired pages from a
3650 * process' mapping at this time.
3652 if (tpte & PTE_SW_WIRED) {
3657 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(tpte));
3658 KASSERT((m->flags & PG_FICTITIOUS) != 0 ||
3659 m < &vm_page_array[vm_page_array_size],
3660 ("pmap_remove_pages: bad pte %#jx",
3666 * Update the vm_page_t clean/reference bits.
3668 if ((tpte & (PTE_D | PTE_W)) ==
3672 mt < &m[Ln_ENTRIES]; mt++)
3678 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(&lock, m);
3681 pc->pc_map[field] |= bitmask;
3683 pmap_remove_pages_pv(pmap, m, pv, &free,
3685 pmap_unuse_pt(pmap, pv->pv_va, ptepde, &free);
3689 PV_STAT(atomic_add_long(&pv_entry_frees, freed));
3690 PV_STAT(atomic_add_int(&pv_entry_spare, freed));
3691 PV_STAT(atomic_subtract_long(&pv_entry_count, freed));
3693 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
3699 pmap_invalidate_all(pmap);
3700 rw_runlock(&pvh_global_lock);
3702 vm_page_free_pages_toq(&free, false);
3706 pmap_page_test_mappings(vm_page_t m, boolean_t accessed, boolean_t modified)
3708 struct md_page *pvh;
3709 struct rwlock *lock;
3711 pt_entry_t *l3, mask;
3714 int md_gen, pvh_gen;
3724 rw_rlock(&pvh_global_lock);
3725 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3728 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3730 if (!PMAP_TRYLOCK(pmap)) {
3731 md_gen = m->md.pv_gen;
3735 if (md_gen != m->md.pv_gen) {
3740 l3 = pmap_l3(pmap, pv->pv_va);
3741 rv = (pmap_load(l3) & mask) == mask;
3746 if ((m->flags & PG_FICTITIOUS) == 0) {
3747 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3748 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3750 if (!PMAP_TRYLOCK(pmap)) {
3751 md_gen = m->md.pv_gen;
3752 pvh_gen = pvh->pv_gen;
3756 if (md_gen != m->md.pv_gen ||
3757 pvh_gen != pvh->pv_gen) {
3762 l2 = pmap_l2(pmap, pv->pv_va);
3763 rv = (pmap_load(l2) & mask) == mask;
3771 rw_runlock(&pvh_global_lock);
3778 * Return whether or not the specified physical page was modified
3779 * in any physical maps.
3782 pmap_is_modified(vm_page_t m)
3785 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3786 ("pmap_is_modified: page %p is not managed", m));
3789 * If the page is not busied then this check is racy.
3791 if (!pmap_page_is_write_mapped(m))
3793 return (pmap_page_test_mappings(m, FALSE, TRUE));
3797 * pmap_is_prefaultable:
3799 * Return whether or not the specified virtual address is eligible
3803 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
3810 l3 = pmap_l3(pmap, addr);
3811 if (l3 != NULL && pmap_load(l3) != 0) {
3819 * pmap_is_referenced:
3821 * Return whether or not the specified physical page was referenced
3822 * in any physical maps.
3825 pmap_is_referenced(vm_page_t m)
3828 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3829 ("pmap_is_referenced: page %p is not managed", m));
3830 return (pmap_page_test_mappings(m, TRUE, FALSE));
3834 * Clear the write and modified bits in each of the given page's mappings.
3837 pmap_remove_write(vm_page_t m)
3839 struct md_page *pvh;
3840 struct rwlock *lock;
3843 pt_entry_t *l3, oldl3, newl3;
3844 pv_entry_t next_pv, pv;
3846 int md_gen, pvh_gen;
3848 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3849 ("pmap_remove_write: page %p is not managed", m));
3850 vm_page_assert_busied(m);
3852 if (!pmap_page_is_write_mapped(m))
3854 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3855 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
3856 pa_to_pvh(VM_PAGE_TO_PHYS(m));
3857 rw_rlock(&pvh_global_lock);
3860 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_next, next_pv) {
3862 if (!PMAP_TRYLOCK(pmap)) {
3863 pvh_gen = pvh->pv_gen;
3867 if (pvh_gen != pvh->pv_gen) {
3874 l2 = pmap_l2(pmap, va);
3875 if ((pmap_load(l2) & PTE_W) != 0)
3876 (void)pmap_demote_l2_locked(pmap, l2, va, &lock);
3877 KASSERT(lock == VM_PAGE_TO_PV_LIST_LOCK(m),
3878 ("inconsistent pv lock %p %p for page %p",
3879 lock, VM_PAGE_TO_PV_LIST_LOCK(m), m));
3882 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3884 if (!PMAP_TRYLOCK(pmap)) {
3885 pvh_gen = pvh->pv_gen;
3886 md_gen = m->md.pv_gen;
3890 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
3896 l3 = pmap_l3(pmap, pv->pv_va);
3897 oldl3 = pmap_load(l3);
3899 if ((oldl3 & PTE_W) != 0) {
3900 newl3 = oldl3 & ~(PTE_D | PTE_W);
3901 if (!atomic_fcmpset_long(l3, &oldl3, newl3))
3903 if ((oldl3 & PTE_D) != 0)
3905 pmap_invalidate_page(pmap, pv->pv_va);
3910 vm_page_aflag_clear(m, PGA_WRITEABLE);
3911 rw_runlock(&pvh_global_lock);
3915 * pmap_ts_referenced:
3917 * Return a count of reference bits for a page, clearing those bits.
3918 * It is not necessary for every reference bit to be cleared, but it
3919 * is necessary that 0 only be returned when there are truly no
3920 * reference bits set.
3922 * As an optimization, update the page's dirty field if a modified bit is
3923 * found while counting reference bits. This opportunistic update can be
3924 * performed at low cost and can eliminate the need for some future calls
3925 * to pmap_is_modified(). However, since this function stops after
3926 * finding PMAP_TS_REFERENCED_MAX reference bits, it may not detect some
3927 * dirty pages. Those dirty pages will only be detected by a future call
3928 * to pmap_is_modified().
3931 pmap_ts_referenced(vm_page_t m)
3933 struct spglist free;
3934 struct md_page *pvh;
3935 struct rwlock *lock;
3938 pd_entry_t *l2, l2e;
3939 pt_entry_t *l3, l3e;
3942 int cleared, md_gen, not_cleared, pvh_gen;
3944 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3945 ("pmap_ts_referenced: page %p is not managed", m));
3948 pa = VM_PAGE_TO_PHYS(m);
3949 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy : pa_to_pvh(pa);
3951 lock = PHYS_TO_PV_LIST_LOCK(pa);
3952 rw_rlock(&pvh_global_lock);
3956 if ((pvf = TAILQ_FIRST(&pvh->pv_list)) == NULL)
3957 goto small_mappings;
3961 if (!PMAP_TRYLOCK(pmap)) {
3962 pvh_gen = pvh->pv_gen;
3966 if (pvh_gen != pvh->pv_gen) {
3972 l2 = pmap_l2(pmap, va);
3973 l2e = pmap_load(l2);
3974 if ((l2e & (PTE_W | PTE_D)) == (PTE_W | PTE_D)) {
3976 * Although l2e is mapping a 2MB page, because
3977 * this function is called at a 4KB page granularity,
3978 * we only update the 4KB page under test.
3982 if ((l2e & PTE_A) != 0) {
3984 * Since this reference bit is shared by 512 4KB
3985 * pages, it should not be cleared every time it is
3986 * tested. Apply a simple "hash" function on the
3987 * physical page number, the virtual superpage number,
3988 * and the pmap address to select one 4KB page out of
3989 * the 512 on which testing the reference bit will
3990 * result in clearing that reference bit. This
3991 * function is designed to avoid the selection of the
3992 * same 4KB page for every 2MB page mapping.
3994 * On demotion, a mapping that hasn't been referenced
3995 * is simply destroyed. To avoid the possibility of a
3996 * subsequent page fault on a demoted wired mapping,
3997 * always leave its reference bit set. Moreover,
3998 * since the superpage is wired, the current state of
3999 * its reference bit won't affect page replacement.
4001 if ((((pa >> PAGE_SHIFT) ^ (pv->pv_va >> L2_SHIFT) ^
4002 (uintptr_t)pmap) & (Ln_ENTRIES - 1)) == 0 &&
4003 (l2e & PTE_SW_WIRED) == 0) {
4004 pmap_clear_bits(l2, PTE_A);
4005 pmap_invalidate_page(pmap, va);
4011 /* Rotate the PV list if it has more than one entry. */
4012 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
4013 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
4014 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
4017 if (cleared + not_cleared >= PMAP_TS_REFERENCED_MAX)
4019 } while ((pv = TAILQ_FIRST(&pvh->pv_list)) != pvf);
4021 if ((pvf = TAILQ_FIRST(&m->md.pv_list)) == NULL)
4026 if (!PMAP_TRYLOCK(pmap)) {
4027 pvh_gen = pvh->pv_gen;
4028 md_gen = m->md.pv_gen;
4032 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
4037 l2 = pmap_l2(pmap, pv->pv_va);
4039 KASSERT((pmap_load(l2) & PTE_RX) == 0,
4040 ("pmap_ts_referenced: found an invalid l2 table"));
4042 l3 = pmap_l2_to_l3(l2, pv->pv_va);
4043 l3e = pmap_load(l3);
4044 if ((l3e & PTE_D) != 0)
4046 if ((l3e & PTE_A) != 0) {
4047 if ((l3e & PTE_SW_WIRED) == 0) {
4049 * Wired pages cannot be paged out so
4050 * doing accessed bit emulation for
4051 * them is wasted effort. We do the
4052 * hard work for unwired pages only.
4054 pmap_clear_bits(l3, PTE_A);
4055 pmap_invalidate_page(pmap, pv->pv_va);
4061 /* Rotate the PV list if it has more than one entry. */
4062 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
4063 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
4064 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
4067 } while ((pv = TAILQ_FIRST(&m->md.pv_list)) != pvf && cleared +
4068 not_cleared < PMAP_TS_REFERENCED_MAX);
4071 rw_runlock(&pvh_global_lock);
4072 vm_page_free_pages_toq(&free, false);
4073 return (cleared + not_cleared);
4077 * Apply the given advice to the specified range of addresses within the
4078 * given pmap. Depending on the advice, clear the referenced and/or
4079 * modified flags in each mapping and set the mapped page's dirty field.
4082 pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice)
4087 * Clear the modify bits on the specified physical page.
4090 pmap_clear_modify(vm_page_t m)
4092 struct md_page *pvh;
4093 struct rwlock *lock;
4095 pv_entry_t next_pv, pv;
4096 pd_entry_t *l2, oldl2;
4099 int md_gen, pvh_gen;
4101 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4102 ("pmap_clear_modify: page %p is not managed", m));
4103 vm_page_assert_busied(m);
4105 if (!pmap_page_is_write_mapped(m))
4109 * If the page is not PGA_WRITEABLE, then no PTEs can have PG_M set.
4110 * If the object containing the page is locked and the page is not
4111 * exclusive busied, then PGA_WRITEABLE cannot be concurrently set.
4113 if ((m->a.flags & PGA_WRITEABLE) == 0)
4115 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
4116 pa_to_pvh(VM_PAGE_TO_PHYS(m));
4117 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
4118 rw_rlock(&pvh_global_lock);
4121 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_next, next_pv) {
4123 if (!PMAP_TRYLOCK(pmap)) {
4124 pvh_gen = pvh->pv_gen;
4128 if (pvh_gen != pvh->pv_gen) {
4134 l2 = pmap_l2(pmap, va);
4135 oldl2 = pmap_load(l2);
4136 /* If oldl2 has PTE_W set, then it also has PTE_D set. */
4137 if ((oldl2 & PTE_W) != 0 &&
4138 pmap_demote_l2_locked(pmap, l2, va, &lock) &&
4139 (oldl2 & PTE_SW_WIRED) == 0) {
4141 * Write protect the mapping to a single page so that
4142 * a subsequent write access may repromote.
4144 va += VM_PAGE_TO_PHYS(m) - PTE_TO_PHYS(oldl2);
4145 l3 = pmap_l2_to_l3(l2, va);
4146 pmap_clear_bits(l3, PTE_D | PTE_W);
4148 pmap_invalidate_page(pmap, va);
4152 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
4154 if (!PMAP_TRYLOCK(pmap)) {
4155 md_gen = m->md.pv_gen;
4156 pvh_gen = pvh->pv_gen;
4160 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
4165 l2 = pmap_l2(pmap, pv->pv_va);
4166 KASSERT((pmap_load(l2) & PTE_RWX) == 0,
4167 ("pmap_clear_modify: found a 2mpage in page %p's pv list",
4169 l3 = pmap_l2_to_l3(l2, pv->pv_va);
4170 if ((pmap_load(l3) & (PTE_D | PTE_W)) == (PTE_D | PTE_W)) {
4171 pmap_clear_bits(l3, PTE_D | PTE_W);
4172 pmap_invalidate_page(pmap, pv->pv_va);
4177 rw_runlock(&pvh_global_lock);
4181 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
4184 return ((void *)PHYS_TO_DMAP(pa));
4188 pmap_unmapbios(vm_paddr_t pa, vm_size_t size)
4193 * Sets the memory attribute for the specified page.
4196 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
4199 m->md.pv_memattr = ma;
4203 * Perform the pmap work for mincore(2). If the page is not both referenced and
4204 * modified by this pmap, returns its physical address so that the caller can
4205 * find other mappings.
4208 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *pap)
4210 pt_entry_t *l2, *l3, tpte;
4216 l2 = pmap_l2(pmap, addr);
4217 if (l2 != NULL && ((tpte = pmap_load(l2)) & PTE_V) != 0) {
4218 if ((tpte & PTE_RWX) != 0) {
4219 pa = PTE_TO_PHYS(tpte) | (addr & L2_OFFSET);
4220 val = MINCORE_INCORE | MINCORE_PSIND(1);
4222 l3 = pmap_l2_to_l3(l2, addr);
4223 tpte = pmap_load(l3);
4224 if ((tpte & PTE_V) == 0) {
4228 pa = PTE_TO_PHYS(tpte) | (addr & L3_OFFSET);
4229 val = MINCORE_INCORE;
4232 if ((tpte & PTE_D) != 0)
4233 val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
4234 if ((tpte & PTE_A) != 0)
4235 val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
4236 managed = (tpte & PTE_SW_MANAGED) == PTE_SW_MANAGED;
4241 if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
4242 (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) && managed) {
4250 pmap_activate_sw(struct thread *td)
4252 pmap_t oldpmap, pmap;
4255 oldpmap = PCPU_GET(curpmap);
4256 pmap = vmspace_pmap(td->td_proc->p_vmspace);
4257 if (pmap == oldpmap)
4259 load_satp(pmap->pm_satp);
4261 hart = PCPU_GET(hart);
4263 CPU_SET_ATOMIC(hart, &pmap->pm_active);
4264 CPU_CLR_ATOMIC(hart, &oldpmap->pm_active);
4266 CPU_SET(hart, &pmap->pm_active);
4267 CPU_CLR(hart, &oldpmap->pm_active);
4269 PCPU_SET(curpmap, pmap);
4275 pmap_activate(struct thread *td)
4279 pmap_activate_sw(td);
4284 pmap_activate_boot(pmap_t pmap)
4288 hart = PCPU_GET(hart);
4290 CPU_SET_ATOMIC(hart, &pmap->pm_active);
4292 CPU_SET(hart, &pmap->pm_active);
4294 PCPU_SET(curpmap, pmap);
4298 pmap_sync_icache(pmap_t pmap, vm_offset_t va, vm_size_t sz)
4303 * From the RISC-V User-Level ISA V2.2:
4305 * "To make a store to instruction memory visible to all
4306 * RISC-V harts, the writing hart has to execute a data FENCE
4307 * before requesting that all remote RISC-V harts execute a
4310 * However, this is slightly misleading; we still need to
4311 * perform a FENCE.I for the local hart, as FENCE does nothing
4312 * for its icache. FENCE.I alone is also sufficient for the
4317 CPU_CLR(PCPU_GET(hart), &mask);
4319 if (!CPU_EMPTY(&mask) && smp_started) {
4321 sbi_remote_fence_i(mask.__bits);
4327 * Increase the starting virtual address of the given mapping if a
4328 * different alignment might result in more superpage mappings.
4331 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
4332 vm_offset_t *addr, vm_size_t size)
4334 vm_offset_t superpage_offset;
4338 if (object != NULL && (object->flags & OBJ_COLORED) != 0)
4339 offset += ptoa(object->pg_color);
4340 superpage_offset = offset & L2_OFFSET;
4341 if (size - ((L2_SIZE - superpage_offset) & L2_OFFSET) < L2_SIZE ||
4342 (*addr & L2_OFFSET) == superpage_offset)
4344 if ((*addr & L2_OFFSET) < superpage_offset)
4345 *addr = (*addr & ~L2_OFFSET) + superpage_offset;
4347 *addr = ((*addr + L2_OFFSET) & ~L2_OFFSET) + superpage_offset;
4351 * Get the kernel virtual address of a set of physical pages. If there are
4352 * physical addresses not covered by the DMAP perform a transient mapping
4353 * that will be removed when calling pmap_unmap_io_transient.
4355 * \param page The pages the caller wishes to obtain the virtual
4356 * address on the kernel memory map.
4357 * \param vaddr On return contains the kernel virtual memory address
4358 * of the pages passed in the page parameter.
4359 * \param count Number of pages passed in.
4360 * \param can_fault TRUE if the thread using the mapped pages can take
4361 * page faults, FALSE otherwise.
4363 * \returns TRUE if the caller must call pmap_unmap_io_transient when
4364 * finished or FALSE otherwise.
4368 pmap_map_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
4369 boolean_t can_fault)
4372 boolean_t needs_mapping;
4376 * Allocate any KVA space that we need, this is done in a separate
4377 * loop to prevent calling vmem_alloc while pinned.
4379 needs_mapping = FALSE;
4380 for (i = 0; i < count; i++) {
4381 paddr = VM_PAGE_TO_PHYS(page[i]);
4382 if (__predict_false(paddr >= DMAP_MAX_PHYSADDR)) {
4383 error = vmem_alloc(kernel_arena, PAGE_SIZE,
4384 M_BESTFIT | M_WAITOK, &vaddr[i]);
4385 KASSERT(error == 0, ("vmem_alloc failed: %d", error));
4386 needs_mapping = TRUE;
4388 vaddr[i] = PHYS_TO_DMAP(paddr);
4392 /* Exit early if everything is covered by the DMAP */
4398 for (i = 0; i < count; i++) {
4399 paddr = VM_PAGE_TO_PHYS(page[i]);
4400 if (paddr >= DMAP_MAX_PHYSADDR) {
4402 "pmap_map_io_transient: TODO: Map out of DMAP data");
4406 return (needs_mapping);
4410 pmap_unmap_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
4411 boolean_t can_fault)
4418 for (i = 0; i < count; i++) {
4419 paddr = VM_PAGE_TO_PHYS(page[i]);
4420 if (paddr >= DMAP_MAX_PHYSADDR) {
4421 panic("RISCVTODO: pmap_unmap_io_transient: Unmap data");
4427 pmap_is_valid_memattr(pmap_t pmap __unused, vm_memattr_t mode)
4430 return (mode >= VM_MEMATTR_DEVICE && mode <= VM_MEMATTR_WRITE_BACK);
4434 pmap_get_tables(pmap_t pmap, vm_offset_t va, pd_entry_t **l1, pd_entry_t **l2,
4437 pd_entry_t *l1p, *l2p;
4439 /* Get l1 directory entry. */
4440 l1p = pmap_l1(pmap, va);
4443 if (l1p == NULL || (pmap_load(l1p) & PTE_V) == 0)
4446 if ((pmap_load(l1p) & PTE_RX) != 0) {
4452 /* Get l2 directory entry. */
4453 l2p = pmap_l1_to_l2(l1p, va);
4456 if (l2p == NULL || (pmap_load(l2p) & PTE_V) == 0)
4459 if ((pmap_load(l2p) & PTE_RX) != 0) {
4464 /* Get l3 page table entry. */
4465 *l3 = pmap_l2_to_l3(l2p, va);
4471 * Track a range of the kernel's virtual address space that is contiguous
4472 * in various mapping attributes.
4474 struct pmap_kernel_map_range {
4483 sysctl_kmaps_dump(struct sbuf *sb, struct pmap_kernel_map_range *range,
4487 if (eva <= range->sva)
4490 sbuf_printf(sb, "0x%016lx-0x%016lx r%c%c%c%c %d %d %d\n",
4492 (range->attrs & PTE_W) == PTE_W ? 'w' : '-',
4493 (range->attrs & PTE_X) == PTE_X ? 'x' : '-',
4494 (range->attrs & PTE_U) == PTE_U ? 'u' : 's',
4495 (range->attrs & PTE_G) == PTE_G ? 'g' : '-',
4496 range->l1pages, range->l2pages, range->l3pages);
4498 /* Reset to sentinel value. */
4499 range->sva = 0xfffffffffffffffful;
4503 * Determine whether the attributes specified by a page table entry match those
4504 * being tracked by the current range.
4507 sysctl_kmaps_match(struct pmap_kernel_map_range *range, pt_entry_t attrs)
4510 return (range->attrs == attrs);
4514 sysctl_kmaps_reinit(struct pmap_kernel_map_range *range, vm_offset_t va,
4518 memset(range, 0, sizeof(*range));
4520 range->attrs = attrs;
4524 * Given a leaf PTE, derive the mapping's attributes. If they do not match
4525 * those of the current run, dump the address range and its attributes, and
4529 sysctl_kmaps_check(struct sbuf *sb, struct pmap_kernel_map_range *range,
4530 vm_offset_t va, pd_entry_t l1e, pd_entry_t l2e, pt_entry_t l3e)
4534 /* The PTE global bit is inherited by lower levels. */
4535 attrs = l1e & PTE_G;
4536 if ((l1e & PTE_RWX) != 0)
4537 attrs |= l1e & (PTE_RWX | PTE_U);
4539 attrs |= l2e & PTE_G;
4540 if ((l2e & PTE_RWX) != 0)
4541 attrs |= l2e & (PTE_RWX | PTE_U);
4543 attrs |= l3e & (PTE_RWX | PTE_U | PTE_G);
4545 if (range->sva > va || !sysctl_kmaps_match(range, attrs)) {
4546 sysctl_kmaps_dump(sb, range, va);
4547 sysctl_kmaps_reinit(range, va, attrs);
4552 sysctl_kmaps(SYSCTL_HANDLER_ARGS)
4554 struct pmap_kernel_map_range range;
4555 struct sbuf sbuf, *sb;
4556 pd_entry_t l1e, *l2, l2e;
4557 pt_entry_t *l3, l3e;
4562 error = sysctl_wire_old_buffer(req, 0);
4566 sbuf_new_for_sysctl(sb, NULL, PAGE_SIZE, req);
4568 /* Sentinel value. */
4569 range.sva = 0xfffffffffffffffful;
4572 * Iterate over the kernel page tables without holding the kernel pmap
4573 * lock. Kernel page table pages are never freed, so at worst we will
4574 * observe inconsistencies in the output.
4576 sva = VM_MIN_KERNEL_ADDRESS;
4577 for (i = pmap_l1_index(sva); i < Ln_ENTRIES; i++) {
4578 if (i == pmap_l1_index(DMAP_MIN_ADDRESS))
4579 sbuf_printf(sb, "\nDirect map:\n");
4580 else if (i == pmap_l1_index(VM_MIN_KERNEL_ADDRESS))
4581 sbuf_printf(sb, "\nKernel map:\n");
4583 l1e = kernel_pmap->pm_l1[i];
4584 if ((l1e & PTE_V) == 0) {
4585 sysctl_kmaps_dump(sb, &range, sva);
4589 if ((l1e & PTE_RWX) != 0) {
4590 sysctl_kmaps_check(sb, &range, sva, l1e, 0, 0);
4595 pa = PTE_TO_PHYS(l1e);
4596 l2 = (pd_entry_t *)PHYS_TO_DMAP(pa);
4598 for (j = pmap_l2_index(sva); j < Ln_ENTRIES; j++) {
4600 if ((l2e & PTE_V) == 0) {
4601 sysctl_kmaps_dump(sb, &range, sva);
4605 if ((l2e & PTE_RWX) != 0) {
4606 sysctl_kmaps_check(sb, &range, sva, l1e, l2e, 0);
4611 pa = PTE_TO_PHYS(l2e);
4612 l3 = (pd_entry_t *)PHYS_TO_DMAP(pa);
4614 for (k = pmap_l3_index(sva); k < Ln_ENTRIES; k++,
4617 if ((l3e & PTE_V) == 0) {
4618 sysctl_kmaps_dump(sb, &range, sva);
4621 sysctl_kmaps_check(sb, &range, sva,
4628 error = sbuf_finish(sb);
4632 SYSCTL_OID(_vm_pmap, OID_AUTO, kernel_maps,
4633 CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE,
4634 NULL, 0, sysctl_kmaps, "A",
4635 "Dump kernel address layout");