2 * Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@gmail.com>
3 * Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@freebsd.org>
4 * Copyright (c) 2012 Luiz Otavio O Souza.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
33 #include <sys/systm.h>
36 #include <sys/kernel.h>
37 #include <sys/module.h>
40 #include <sys/mutex.h>
43 #include <machine/bus.h>
44 #include <machine/cpu.h>
45 #include <machine/cpufunc.h>
46 #include <machine/resource.h>
47 #include <machine/fdt.h>
48 #include <machine/frame.h>
49 #include <machine/intr.h>
51 #include <dev/fdt/fdt_common.h>
52 #include <dev/ofw/ofw_bus.h>
53 #include <dev/ofw/ofw_bus_subr.h>
58 * A10 have 9 banks of gpio.
60 * PA0 - PA17 | PB0 - PB23 | PC0 - PC24
61 * PD0 - PD27 | PE0 - PE31 | PF0 - PF5
62 * PG0 - PG9 | PH0 - PH27 | PI0 - PI12
65 #define A10_GPIO_PINS 288
66 #define A10_GPIO_DEFAULT_CAPS (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | \
67 GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN)
69 #define A10_GPIO_NONE 0
70 #define A10_GPIO_PULLUP 1
71 #define A10_GPIO_PULLDOWN 2
73 #define A10_GPIO_INPUT 0
74 #define A10_GPIO_OUTPUT 1
76 struct a10_gpio_softc {
79 struct resource * sc_mem_res;
80 struct resource * sc_irq_res;
81 bus_space_tag_t sc_bst;
82 bus_space_handle_t sc_bsh;
85 struct gpio_pin sc_gpio_pins[A10_GPIO_PINS];
88 #define A10_GPIO_LOCK(_sc) mtx_lock(&_sc->sc_mtx)
89 #define A10_GPIO_UNLOCK(_sc) mtx_unlock(&_sc->sc_mtx)
90 #define A10_GPIO_LOCK_ASSERT(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED)
92 #define A10_GPIO_GP_CFG(_bank, _pin) 0x00 + ((_bank) * 0x24) + ((_pin)<<2)
93 #define A10_GPIO_GP_DAT(_bank) 0x10 + ((_bank) * 0x24)
94 #define A10_GPIO_GP_DRV(_bank, _pin) 0x14 + ((_bank) * 0x24) + ((_pin)<<2)
95 #define A10_GPIO_GP_PUL(_bank, _pin) 0x1c + ((_bank) * 0x24) + ((_pin)<<2)
97 #define A10_GPIO_GP_INT_CFG0 0x200
98 #define A10_GPIO_GP_INT_CFG1 0x204
99 #define A10_GPIO_GP_INT_CFG2 0x208
100 #define A10_GPIO_GP_INT_CFG3 0x20c
102 #define A10_GPIO_GP_INT_CTL 0x210
103 #define A10_GPIO_GP_INT_STA 0x214
104 #define A10_GPIO_GP_INT_DEB 0x218
106 #define A10_GPIO_WRITE(_sc, _off, _val) \
107 bus_space_write_4(_sc->sc_bst, _sc->sc_bsh, _off, _val)
108 #define A10_GPIO_READ(_sc, _off) \
109 bus_space_read_4(_sc->sc_bst, _sc->sc_bsh, _off)
112 a10_gpio_get_function(struct a10_gpio_softc *sc, uint32_t pin)
114 uint32_t bank, func, offset;
117 pin = pin - 32 * bank;
119 offset = ((pin & 0x07) << 2);
122 func = (A10_GPIO_READ(sc, A10_GPIO_GP_CFG(bank, func)) >> offset) & 7;
129 a10_gpio_func_flag(uint32_t nfunc)
134 return (GPIO_PIN_INPUT);
135 case A10_GPIO_OUTPUT:
136 return (GPIO_PIN_OUTPUT);
142 a10_gpio_set_function(struct a10_gpio_softc *sc, uint32_t pin, uint32_t f)
144 uint32_t bank, func, data, offset;
146 /* Must be called with lock held. */
147 A10_GPIO_LOCK_ASSERT(sc);
150 pin = pin - 32 * bank;
152 offset = ((pin & 0x07) << 2);
154 data = A10_GPIO_READ(sc, A10_GPIO_GP_CFG(bank, func));
155 data &= ~(7 << offset);
156 data |= (f << offset);
157 A10_GPIO_WRITE(sc, A10_GPIO_GP_CFG(bank, func), data);
161 a10_gpio_set_pud(struct a10_gpio_softc *sc, uint32_t pin, uint32_t state)
163 uint32_t bank, offset, pull, val;
165 /* Must be called with lock held. */
166 A10_GPIO_LOCK_ASSERT(sc);
169 pin = pin - 32 * bank;
171 offset = ((pin & 0x0f) << 1);
173 val = A10_GPIO_READ(sc, A10_GPIO_GP_PUL(bank, pull));
174 val &= ~(0x03 << offset);
175 val |= (state << offset);
176 A10_GPIO_WRITE(sc, A10_GPIO_GP_PUL(bank, pull), val);
180 a10_gpio_pin_configure(struct a10_gpio_softc *sc, struct gpio_pin *pin,
187 * Manage input/output.
189 if (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) {
190 pin->gp_flags &= ~(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT);
191 if (flags & GPIO_PIN_OUTPUT) {
192 pin->gp_flags |= GPIO_PIN_OUTPUT;
193 a10_gpio_set_function(sc, pin->gp_pin,
196 pin->gp_flags |= GPIO_PIN_INPUT;
197 a10_gpio_set_function(sc, pin->gp_pin,
202 /* Manage Pull-up/pull-down. */
203 pin->gp_flags &= ~(GPIO_PIN_PULLUP|GPIO_PIN_PULLDOWN);
204 if (flags & (GPIO_PIN_PULLUP|GPIO_PIN_PULLDOWN)) {
205 if (flags & GPIO_PIN_PULLUP) {
206 pin->gp_flags |= GPIO_PIN_PULLUP;
207 a10_gpio_set_pud(sc, pin->gp_pin, A10_GPIO_PULLUP);
209 pin->gp_flags |= GPIO_PIN_PULLDOWN;
210 a10_gpio_set_pud(sc, pin->gp_pin, A10_GPIO_PULLDOWN);
213 a10_gpio_set_pud(sc, pin->gp_pin, A10_GPIO_NONE);
219 a10_gpio_pin_max(device_t dev, int *maxpin)
222 *maxpin = A10_GPIO_PINS - 1;
227 a10_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
229 struct a10_gpio_softc *sc = device_get_softc(dev);
232 for (i = 0; i < sc->sc_gpio_npins; i++) {
233 if (sc->sc_gpio_pins[i].gp_pin == pin)
237 if (i >= sc->sc_gpio_npins)
241 *caps = sc->sc_gpio_pins[i].gp_caps;
248 a10_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
250 struct a10_gpio_softc *sc = device_get_softc(dev);
253 for (i = 0; i < sc->sc_gpio_npins; i++) {
254 if (sc->sc_gpio_pins[i].gp_pin == pin)
258 if (i >= sc->sc_gpio_npins)
262 *flags = sc->sc_gpio_pins[i].gp_flags;
269 a10_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
271 struct a10_gpio_softc *sc = device_get_softc(dev);
274 for (i = 0; i < sc->sc_gpio_npins; i++) {
275 if (sc->sc_gpio_pins[i].gp_pin == pin)
279 if (i >= sc->sc_gpio_npins)
283 memcpy(name, sc->sc_gpio_pins[i].gp_name, GPIOMAXNAME);
290 a10_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
292 struct a10_gpio_softc *sc = device_get_softc(dev);
295 for (i = 0; i < sc->sc_gpio_npins; i++) {
296 if (sc->sc_gpio_pins[i].gp_pin == pin)
300 if (i >= sc->sc_gpio_npins)
303 /* Check for unwanted flags. */
304 if ((flags & sc->sc_gpio_pins[i].gp_caps) != flags)
307 /* Can't mix input/output together. */
308 if ((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) ==
309 (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT))
312 /* Can't mix pull-up/pull-down together. */
313 if ((flags & (GPIO_PIN_PULLUP|GPIO_PIN_PULLDOWN)) ==
314 (GPIO_PIN_PULLUP|GPIO_PIN_PULLDOWN))
317 a10_gpio_pin_configure(sc, &sc->sc_gpio_pins[i], flags);
323 a10_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
325 struct a10_gpio_softc *sc = device_get_softc(dev);
326 uint32_t bank, offset, data;
329 for (i = 0; i < sc->sc_gpio_npins; i++) {
330 if (sc->sc_gpio_pins[i].gp_pin == pin)
334 if (i >= sc->sc_gpio_npins)
338 pin = pin - 32 * bank;
342 data = A10_GPIO_READ(sc, A10_GPIO_GP_DAT(bank));
344 data |= (1 << offset);
346 data &= ~(1 << offset);
347 A10_GPIO_WRITE(sc, A10_GPIO_GP_DAT(bank), data);
354 a10_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
356 struct a10_gpio_softc *sc = device_get_softc(dev);
357 uint32_t bank, offset, reg_data;
360 for (i = 0; i < sc->sc_gpio_npins; i++) {
361 if (sc->sc_gpio_pins[i].gp_pin == pin)
365 if (i >= sc->sc_gpio_npins)
369 pin = pin - 32 * bank;
373 reg_data = A10_GPIO_READ(sc, A10_GPIO_GP_DAT(bank));
375 *val = (reg_data & (1 << offset)) ? 1 : 0;
381 a10_gpio_pin_toggle(device_t dev, uint32_t pin)
383 struct a10_gpio_softc *sc = device_get_softc(dev);
384 uint32_t bank, data, offset;
387 for (i = 0; i < sc->sc_gpio_npins; i++) {
388 if (sc->sc_gpio_pins[i].gp_pin == pin)
392 if (i >= sc->sc_gpio_npins)
396 pin = pin - 32 * bank;
400 data = A10_GPIO_READ(sc, A10_GPIO_GP_DAT(bank));
401 if (data & (1 << offset))
402 data &= ~(1 << offset);
404 data |= (1 << offset);
405 A10_GPIO_WRITE(sc, A10_GPIO_GP_DAT(bank), data);
412 a10_gpio_probe(device_t dev)
414 if (!ofw_bus_is_compatible(dev, "allwinner,sun4i-gpio"))
417 device_set_desc(dev, "Allwinner GPIO controller");
418 return (BUS_PROBE_DEFAULT);
422 a10_gpio_attach(device_t dev)
424 struct a10_gpio_softc *sc = device_get_softc(dev);
431 mtx_init(&sc->sc_mtx, "a10 gpio", "gpio", MTX_DEF);
434 sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
436 if (!sc->sc_mem_res) {
437 device_printf(dev, "cannot allocate memory window\n");
441 sc->sc_bst = rman_get_bustag(sc->sc_mem_res);
442 sc->sc_bsh = rman_get_bushandle(sc->sc_mem_res);
445 sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
447 if (!sc->sc_irq_res) {
448 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
449 device_printf(dev, "cannot allocate interrupt\n");
454 gpio = ofw_bus_get_node(sc->sc_dev);
456 if (!OF_hasprop(gpio, "gpio-controller"))
457 /* Node is not a GPIO controller. */
460 /* Initialize the software controlled pins. */
461 for (i = 0; i < A10_GPIO_PINS; i++) {
462 snprintf(sc->sc_gpio_pins[i].gp_name, GPIOMAXNAME,
464 func = a10_gpio_get_function(sc, i);
465 sc->sc_gpio_pins[i].gp_pin = i;
466 sc->sc_gpio_pins[i].gp_caps = A10_GPIO_DEFAULT_CAPS;
467 sc->sc_gpio_pins[i].gp_flags = a10_gpio_func_flag(func);
469 sc->sc_gpio_npins = i;
471 device_add_child(dev, "gpioc", device_get_unit(dev));
472 device_add_child(dev, "gpiobus", device_get_unit(dev));
473 return (bus_generic_attach(dev));
477 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res);
479 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
484 a10_gpio_detach(device_t dev)
490 static device_method_t a10_gpio_methods[] = {
491 /* Device interface */
492 DEVMETHOD(device_probe, a10_gpio_probe),
493 DEVMETHOD(device_attach, a10_gpio_attach),
494 DEVMETHOD(device_detach, a10_gpio_detach),
497 DEVMETHOD(gpio_pin_max, a10_gpio_pin_max),
498 DEVMETHOD(gpio_pin_getname, a10_gpio_pin_getname),
499 DEVMETHOD(gpio_pin_getflags, a10_gpio_pin_getflags),
500 DEVMETHOD(gpio_pin_getcaps, a10_gpio_pin_getcaps),
501 DEVMETHOD(gpio_pin_setflags, a10_gpio_pin_setflags),
502 DEVMETHOD(gpio_pin_get, a10_gpio_pin_get),
503 DEVMETHOD(gpio_pin_set, a10_gpio_pin_set),
504 DEVMETHOD(gpio_pin_toggle, a10_gpio_pin_toggle),
509 static devclass_t a10_gpio_devclass;
511 static driver_t a10_gpio_driver = {
514 sizeof(struct a10_gpio_softc),
517 DRIVER_MODULE(a10_gpio, simplebus, a10_gpio_driver, a10_gpio_devclass, 0, 0);