1 /* From: $NetBSD: pmap.c,v 1.148 2004/04/03 04:35:48 bsh Exp $ */
3 * Copyright 2011 Semihalf
4 * Copyright 2004 Olivier Houchard.
5 * Copyright 2003 Wasabi Systems, Inc.
8 * Written by Steve C. Woodford for Wasabi Systems, Inc.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed for the NetBSD Project by
21 * Wasabi Systems, Inc.
22 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
23 * or promote products derived from this software without specific prior
26 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
38 * From: FreeBSD: src/sys/arm/arm/pmap.c,v 1.113 2009/07/24 13:50:29
42 * Copyright (c) 2002-2003 Wasabi Systems, Inc.
43 * Copyright (c) 2001 Richard Earnshaw
44 * Copyright (c) 2001-2002 Christopher Gilbert
45 * All rights reserved.
47 * 1. Redistributions of source code must retain the above copyright
48 * notice, this list of conditions and the following disclaimer.
49 * 2. Redistributions in binary form must reproduce the above copyright
50 * notice, this list of conditions and the following disclaimer in the
51 * documentation and/or other materials provided with the distribution.
52 * 3. The name of the company nor the name of the author may be used to
53 * endorse or promote products derived from this software without specific
54 * prior written permission.
56 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
57 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
58 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
59 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
60 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
61 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
62 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
63 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
64 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
65 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69 * Copyright (c) 1999 The NetBSD Foundation, Inc.
70 * All rights reserved.
72 * This code is derived from software contributed to The NetBSD Foundation
73 * by Charles M. Hannum.
75 * Redistribution and use in source and binary forms, with or without
76 * modification, are permitted provided that the following conditions
78 * 1. Redistributions of source code must retain the above copyright
79 * notice, this list of conditions and the following disclaimer.
80 * 2. Redistributions in binary form must reproduce the above copyright
81 * notice, this list of conditions and the following disclaimer in the
82 * documentation and/or other materials provided with the distribution.
84 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
85 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
86 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
87 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
88 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
89 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
90 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
91 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
92 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
93 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
94 * POSSIBILITY OF SUCH DAMAGE.
98 * Copyright (c) 1994-1998 Mark Brinicombe.
99 * Copyright (c) 1994 Brini.
100 * All rights reserved.
102 * This code is derived from software written for Brini by Mark Brinicombe
104 * Redistribution and use in source and binary forms, with or without
105 * modification, are permitted provided that the following conditions
107 * 1. Redistributions of source code must retain the above copyright
108 * notice, this list of conditions and the following disclaimer.
109 * 2. Redistributions in binary form must reproduce the above copyright
110 * notice, this list of conditions and the following disclaimer in the
111 * documentation and/or other materials provided with the distribution.
112 * 3. All advertising materials mentioning features or use of this software
113 * must display the following acknowledgement:
114 * This product includes software developed by Mark Brinicombe.
115 * 4. The name of the author may not be used to endorse or promote products
116 * derived from this software without specific prior written permission.
118 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
119 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
120 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
121 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
122 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
123 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
124 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
125 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
126 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
128 * RiscBSD kernel project
132 * Machine dependant vm stuff
138 * Special compilation symbols
139 * PMAP_DEBUG - Build in pmap_debug_level code
141 /* Include header files */
144 #include "opt_pmap.h"
146 #include <sys/cdefs.h>
147 __FBSDID("$FreeBSD$");
148 #include <sys/param.h>
149 #include <sys/systm.h>
150 #include <sys/kernel.h>
152 #include <sys/lock.h>
153 #include <sys/proc.h>
154 #include <sys/malloc.h>
155 #include <sys/msgbuf.h>
156 #include <sys/mutex.h>
157 #include <sys/vmmeter.h>
158 #include <sys/mman.h>
159 #include <sys/rwlock.h>
161 #include <sys/sched.h>
162 #include <sys/sysctl.h>
165 #include <vm/vm_param.h>
168 #include <vm/vm_kern.h>
169 #include <vm/vm_object.h>
170 #include <vm/vm_map.h>
171 #include <vm/vm_page.h>
172 #include <vm/vm_pageout.h>
173 #include <vm/vm_extern.h>
174 #include <vm/vm_reserv.h>
176 #include <machine/md_var.h>
177 #include <machine/cpu.h>
178 #include <machine/cpufunc.h>
179 #include <machine/pcb.h>
182 extern int last_fault_code;
186 #define PDEBUG(_lev_,_stat_) \
187 if (pmap_debug_level >= (_lev_)) \
189 #define dprintf printf
191 int pmap_debug_level = 0;
193 #else /* PMAP_DEBUG */
194 #define PDEBUG(_lev_,_stat_) /* Nothing */
195 #define dprintf(x, arg...)
196 #define PMAP_INLINE __inline
197 #endif /* PMAP_DEBUG */
200 #define PV_STAT(x) do { x ; } while (0)
202 #define PV_STAT(x) do { } while (0)
205 #define pa_to_pvh(pa) (&pv_table[pa_index(pa)])
208 #define pmap_l2cache_wbinv_range(va, pa, size) cpu_l2cache_wbinv_range((pa), (size))
209 #define pmap_l2cache_inv_range(va, pa, size) cpu_l2cache_inv_range((pa), (size))
211 #define pmap_l2cache_wbinv_range(va, pa, size) cpu_l2cache_wbinv_range((va), (size))
212 #define pmap_l2cache_inv_range(va, pa, size) cpu_l2cache_inv_range((va), (size))
215 extern struct pv_addr systempage;
218 * Internal function prototypes
222 struct pv_entry *pmap_find_pv(struct md_page *, pmap_t, vm_offset_t);
223 static void pmap_free_pv_chunk(struct pv_chunk *pc);
224 static void pmap_free_pv_entry(pmap_t pmap, pv_entry_t pv);
225 static pv_entry_t pmap_get_pv_entry(pmap_t pmap, boolean_t try);
226 static vm_page_t pmap_pv_reclaim(pmap_t locked_pmap);
227 static boolean_t pmap_pv_insert_section(pmap_t, vm_offset_t,
229 static struct pv_entry *pmap_remove_pv(struct vm_page *, pmap_t, vm_offset_t);
230 static int pmap_pvh_wired_mappings(struct md_page *, int);
232 static void pmap_enter_locked(pmap_t, vm_offset_t, vm_prot_t,
233 vm_page_t, vm_prot_t, boolean_t, int);
234 static vm_paddr_t pmap_extract_locked(pmap_t pmap, vm_offset_t va);
235 static void pmap_alloc_l1(pmap_t);
236 static void pmap_free_l1(pmap_t);
238 static void pmap_map_section(pmap_t, vm_offset_t, vm_offset_t,
239 vm_prot_t, boolean_t);
240 static void pmap_promote_section(pmap_t, vm_offset_t);
241 static boolean_t pmap_demote_section(pmap_t, vm_offset_t);
242 static boolean_t pmap_enter_section(pmap_t, vm_offset_t, vm_page_t,
244 static void pmap_remove_section(pmap_t, vm_offset_t);
246 static int pmap_clearbit(struct vm_page *, u_int);
248 static struct l2_bucket *pmap_get_l2_bucket(pmap_t, vm_offset_t);
249 static struct l2_bucket *pmap_alloc_l2_bucket(pmap_t, vm_offset_t);
250 static void pmap_free_l2_bucket(pmap_t, struct l2_bucket *, u_int);
251 static vm_offset_t kernel_pt_lookup(vm_paddr_t);
253 static MALLOC_DEFINE(M_VMPMAP, "pmap", "PMAP L1");
255 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
256 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
257 vm_offset_t pmap_curmaxkvaddr;
258 vm_paddr_t kernel_l1pa;
260 vm_offset_t kernel_vm_end = 0;
262 vm_offset_t vm_max_kernel_address;
264 struct pmap kernel_pmap_store;
266 static pt_entry_t *csrc_pte, *cdst_pte;
267 static vm_offset_t csrcp, cdstp;
268 static struct mtx cmtx;
270 static void pmap_init_l1(struct l1_ttable *, pd_entry_t *);
272 * These routines are called when the CPU type is identified to set up
273 * the PTE prototypes, cache modes, etc.
275 * The variables are always here, just in case LKMs need to reference
276 * them (though, they shouldn't).
278 static void pmap_set_prot(pt_entry_t *pte, vm_prot_t prot, uint8_t user);
279 pt_entry_t pte_l1_s_cache_mode;
280 pt_entry_t pte_l1_s_cache_mode_pt;
282 pt_entry_t pte_l2_l_cache_mode;
283 pt_entry_t pte_l2_l_cache_mode_pt;
285 pt_entry_t pte_l2_s_cache_mode;
286 pt_entry_t pte_l2_s_cache_mode_pt;
288 struct msgbuf *msgbufp = 0;
293 static caddr_t crashdumpmap;
295 extern void bcopy_page(vm_offset_t, vm_offset_t);
296 extern void bzero_page(vm_offset_t);
301 * Metadata for L1 translation tables.
304 /* Entry on the L1 Table list */
305 SLIST_ENTRY(l1_ttable) l1_link;
307 /* Entry on the L1 Least Recently Used list */
308 TAILQ_ENTRY(l1_ttable) l1_lru;
310 /* Track how many domains are allocated from this L1 */
311 volatile u_int l1_domain_use_count;
314 * A free-list of domain numbers for this L1.
315 * We avoid using ffs() and a bitmap to track domains since ffs()
318 u_int8_t l1_domain_first;
319 u_int8_t l1_domain_free[PMAP_DOMAINS];
321 /* Physical address of this L1 page table */
322 vm_paddr_t l1_physaddr;
324 /* KVA of this L1 page table */
329 * Convert a virtual address into its L1 table index. That is, the
330 * index used to locate the L2 descriptor table pointer in an L1 table.
331 * This is basically used to index l1->l1_kva[].
333 * Each L2 descriptor table represents 1MB of VA space.
335 #define L1_IDX(va) (((vm_offset_t)(va)) >> L1_S_SHIFT)
338 * L1 Page Tables are tracked using a Least Recently Used list.
339 * - New L1s are allocated from the HEAD.
340 * - Freed L1s are added to the TAIl.
341 * - Recently accessed L1s (where an 'access' is some change to one of
342 * the userland pmaps which owns this L1) are moved to the TAIL.
344 static TAILQ_HEAD(, l1_ttable) l1_lru_list;
346 * A list of all L1 tables
348 static SLIST_HEAD(, l1_ttable) l1_list;
349 static struct mtx l1_lru_lock;
352 * The l2_dtable tracks L2_BUCKET_SIZE worth of L1 slots.
354 * This is normally 16MB worth L2 page descriptors for any given pmap.
355 * Reference counts are maintained for L2 descriptors so they can be
359 /* The number of L2 page descriptors allocated to this l2_dtable */
362 /* List of L2 page descriptors */
364 pt_entry_t *l2b_kva; /* KVA of L2 Descriptor Table */
365 vm_paddr_t l2b_phys; /* Physical address of same */
366 u_short l2b_l1idx; /* This L2 table's L1 index */
367 u_short l2b_occupancy; /* How many active descriptors */
368 } l2_bucket[L2_BUCKET_SIZE];
371 /* pmap_kenter_internal flags */
372 #define KENTER_CACHE 0x1
373 #define KENTER_USER 0x2
376 * Given an L1 table index, calculate the corresponding l2_dtable index
377 * and bucket index within the l2_dtable.
379 #define L2_IDX(l1idx) (((l1idx) >> L2_BUCKET_LOG2) & \
381 #define L2_BUCKET(l1idx) ((l1idx) & (L2_BUCKET_SIZE - 1))
384 * Given a virtual address, this macro returns the
385 * virtual address required to drop into the next L2 bucket.
387 #define L2_NEXT_BUCKET(va) (((va) & L1_S_FRAME) + L1_S_SIZE)
390 * We try to map the page tables write-through, if possible. However, not
391 * all CPUs have a write-through cache mode, so on those we have to sync
392 * the cache when we frob page tables.
394 * We try to evaluate this at compile time, if possible. However, it's
395 * not always possible to do that, hence this run-time var.
397 int pmap_needs_pte_sync;
400 * Macro to determine if a mapping might be resident in the
401 * instruction cache and/or TLB
403 #define PTE_BEEN_EXECD(pte) (L2_S_EXECUTABLE(pte) && L2_S_REFERENCED(pte))
406 * Macro to determine if a mapping might be resident in the
407 * data cache and/or TLB
409 #define PTE_BEEN_REFD(pte) (L2_S_REFERENCED(pte))
411 #ifndef PMAP_SHPGPERPROC
412 #define PMAP_SHPGPERPROC 200
415 #define pmap_is_current(pm) ((pm) == pmap_kernel() || \
416 curproc->p_vmspace->vm_map.pmap == (pm))
419 * Data for the pv entry allocation mechanism
421 static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
422 static int pv_entry_count, pv_entry_max, pv_entry_high_water;
423 static struct md_page *pv_table;
424 static int shpgperproc = PMAP_SHPGPERPROC;
426 struct pv_chunk *pv_chunkbase; /* KVA block for pv_chunks */
427 int pv_maxchunks; /* How many chunks we have KVA for */
428 vm_offset_t pv_vafree; /* Freelist stored in the PTE */
430 static __inline struct pv_chunk *
431 pv_to_chunk(pv_entry_t pv)
434 return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
437 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
439 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
440 CTASSERT(_NPCM == 8);
441 CTASSERT(_NPCPV == 252);
443 #define PC_FREE0_6 0xfffffffful /* Free values for index 0 through 6 */
444 #define PC_FREE7 0x0ffffffful /* Free values for index 7 */
446 static const uint32_t pc_freemask[_NPCM] = {
447 PC_FREE0_6, PC_FREE0_6, PC_FREE0_6,
448 PC_FREE0_6, PC_FREE0_6, PC_FREE0_6,
452 static SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters");
454 /* Superpages utilization enabled = 1 / disabled = 0 */
455 static int sp_enabled = 0;
456 SYSCTL_INT(_vm_pmap, OID_AUTO, sp_enabled, CTLFLAG_RDTUN, &sp_enabled, 0,
457 "Are large page mappings enabled?");
459 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
460 "Current number of pv entries");
463 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
465 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
466 "Current number of pv entry chunks");
467 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
468 "Current number of pv entry chunks allocated");
469 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
470 "Current number of pv entry chunks frees");
471 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
472 "Number of times tried to get a chunk page but failed.");
474 static long pv_entry_frees, pv_entry_allocs;
475 static int pv_entry_spare;
477 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
478 "Current number of pv entry frees");
479 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
480 "Current number of pv entry allocs");
481 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
482 "Current number of spare pv entries");
486 static uma_zone_t l2table_zone;
487 static vm_offset_t pmap_kernel_l2dtable_kva;
488 static vm_offset_t pmap_kernel_l2ptp_kva;
489 static vm_paddr_t pmap_kernel_l2ptp_phys;
490 static struct rwlock pvh_global_lock;
492 int l1_mem_types[] = {
494 ARM_L1S_DEVICE_NOSHARE,
495 ARM_L1S_DEVICE_SHARE,
496 ARM_L1S_NRML_NOCACHE,
497 ARM_L1S_NRML_IWT_OWT,
498 ARM_L1S_NRML_IWB_OWB,
499 ARM_L1S_NRML_IWBA_OWBA
502 int l2l_mem_types[] = {
504 ARM_L2L_DEVICE_NOSHARE,
505 ARM_L2L_DEVICE_SHARE,
506 ARM_L2L_NRML_NOCACHE,
507 ARM_L2L_NRML_IWT_OWT,
508 ARM_L2L_NRML_IWB_OWB,
509 ARM_L2L_NRML_IWBA_OWBA
512 int l2s_mem_types[] = {
514 ARM_L2S_DEVICE_NOSHARE,
515 ARM_L2S_DEVICE_SHARE,
516 ARM_L2S_NRML_NOCACHE,
517 ARM_L2S_NRML_IWT_OWT,
518 ARM_L2S_NRML_IWB_OWB,
519 ARM_L2S_NRML_IWBA_OWBA
523 * This list exists for the benefit of pmap_map_chunk(). It keeps track
524 * of the kernel L2 tables during bootstrap, so that pmap_map_chunk() can
525 * find them as necessary.
527 * Note that the data on this list MUST remain valid after initarm() returns,
528 * as pmap_bootstrap() uses it to contruct L2 table metadata.
530 SLIST_HEAD(, pv_addr) kernel_pt_list = SLIST_HEAD_INITIALIZER(kernel_pt_list);
533 pmap_init_l1(struct l1_ttable *l1, pd_entry_t *l1pt)
538 l1->l1_domain_use_count = 0;
539 l1->l1_domain_first = 0;
541 for (i = 0; i < PMAP_DOMAINS; i++)
542 l1->l1_domain_free[i] = i + 1;
545 * Copy the kernel's L1 entries to each new L1.
547 if (l1pt != pmap_kernel()->pm_l1->l1_kva)
548 memcpy(l1pt, pmap_kernel()->pm_l1->l1_kva, L1_TABLE_SIZE);
550 if ((l1->l1_physaddr = pmap_extract(pmap_kernel(), (vm_offset_t)l1pt)) == 0)
551 panic("pmap_init_l1: can't get PA of L1 at %p", l1pt);
552 SLIST_INSERT_HEAD(&l1_list, l1, l1_link);
553 TAILQ_INSERT_TAIL(&l1_lru_list, l1, l1_lru);
557 kernel_pt_lookup(vm_paddr_t pa)
561 SLIST_FOREACH(pv, &kernel_pt_list, pv_list) {
569 pmap_pte_init_mmu_v6(void)
572 if (PTE_PAGETABLE >= 3)
573 pmap_needs_pte_sync = 1;
574 pte_l1_s_cache_mode = l1_mem_types[PTE_CACHE];
575 pte_l2_l_cache_mode = l2l_mem_types[PTE_CACHE];
576 pte_l2_s_cache_mode = l2s_mem_types[PTE_CACHE];
578 pte_l1_s_cache_mode_pt = l1_mem_types[PTE_PAGETABLE];
579 pte_l2_l_cache_mode_pt = l2l_mem_types[PTE_PAGETABLE];
580 pte_l2_s_cache_mode_pt = l2s_mem_types[PTE_PAGETABLE];
585 * Allocate an L1 translation table for the specified pmap.
586 * This is called at pmap creation time.
589 pmap_alloc_l1(pmap_t pmap)
591 struct l1_ttable *l1;
595 * Remove the L1 at the head of the LRU list
597 mtx_lock(&l1_lru_lock);
598 l1 = TAILQ_FIRST(&l1_lru_list);
599 TAILQ_REMOVE(&l1_lru_list, l1, l1_lru);
602 * Pick the first available domain number, and update
603 * the link to the next number.
605 domain = l1->l1_domain_first;
606 l1->l1_domain_first = l1->l1_domain_free[domain];
609 * If there are still free domain numbers in this L1,
610 * put it back on the TAIL of the LRU list.
612 if (++l1->l1_domain_use_count < PMAP_DOMAINS)
613 TAILQ_INSERT_TAIL(&l1_lru_list, l1, l1_lru);
615 mtx_unlock(&l1_lru_lock);
618 * Fix up the relevant bits in the pmap structure
621 pmap->pm_domain = domain + 1;
625 * Free an L1 translation table.
626 * This is called at pmap destruction time.
629 pmap_free_l1(pmap_t pmap)
631 struct l1_ttable *l1 = pmap->pm_l1;
633 mtx_lock(&l1_lru_lock);
636 * If this L1 is currently on the LRU list, remove it.
638 if (l1->l1_domain_use_count < PMAP_DOMAINS)
639 TAILQ_REMOVE(&l1_lru_list, l1, l1_lru);
642 * Free up the domain number which was allocated to the pmap
644 l1->l1_domain_free[pmap->pm_domain - 1] = l1->l1_domain_first;
645 l1->l1_domain_first = pmap->pm_domain - 1;
646 l1->l1_domain_use_count--;
649 * The L1 now must have at least 1 free domain, so add
650 * it back to the LRU list. If the use count is zero,
651 * put it at the head of the list, otherwise it goes
654 if (l1->l1_domain_use_count == 0) {
655 TAILQ_INSERT_HEAD(&l1_lru_list, l1, l1_lru);
657 TAILQ_INSERT_TAIL(&l1_lru_list, l1, l1_lru);
659 mtx_unlock(&l1_lru_lock);
663 * Returns a pointer to the L2 bucket associated with the specified pmap
664 * and VA, or NULL if no L2 bucket exists for the address.
666 static PMAP_INLINE struct l2_bucket *
667 pmap_get_l2_bucket(pmap_t pmap, vm_offset_t va)
669 struct l2_dtable *l2;
670 struct l2_bucket *l2b;
675 if ((l2 = pmap->pm_l2[L2_IDX(l1idx)]) == NULL ||
676 (l2b = &l2->l2_bucket[L2_BUCKET(l1idx)])->l2b_kva == NULL)
683 * Returns a pointer to the L2 bucket associated with the specified pmap
686 * If no L2 bucket exists, perform the necessary allocations to put an L2
687 * bucket/page table in place.
689 * Note that if a new L2 bucket/page was allocated, the caller *must*
690 * increment the bucket occupancy counter appropriately *before*
691 * releasing the pmap's lock to ensure no other thread or cpu deallocates
692 * the bucket/page in the meantime.
694 static struct l2_bucket *
695 pmap_alloc_l2_bucket(pmap_t pmap, vm_offset_t va)
697 struct l2_dtable *l2;
698 struct l2_bucket *l2b;
703 PMAP_ASSERT_LOCKED(pmap);
704 rw_assert(&pvh_global_lock, RA_WLOCKED);
705 if ((l2 = pmap->pm_l2[L2_IDX(l1idx)]) == NULL) {
707 * No mapping at this address, as there is
708 * no entry in the L1 table.
709 * Need to allocate a new l2_dtable.
712 rw_wunlock(&pvh_global_lock);
713 if ((l2 = uma_zalloc(l2table_zone, M_NOWAIT)) == NULL) {
714 rw_wlock(&pvh_global_lock);
718 rw_wlock(&pvh_global_lock);
720 if (pmap->pm_l2[L2_IDX(l1idx)] != NULL) {
722 * Someone already allocated the l2_dtable while
723 * we were doing the same.
725 uma_zfree(l2table_zone, l2);
726 l2 = pmap->pm_l2[L2_IDX(l1idx)];
728 bzero(l2, sizeof(*l2));
730 * Link it into the parent pmap
732 pmap->pm_l2[L2_IDX(l1idx)] = l2;
736 l2b = &l2->l2_bucket[L2_BUCKET(l1idx)];
739 * Fetch pointer to the L2 page table associated with the address.
741 if (l2b->l2b_kva == NULL) {
745 * No L2 page table has been allocated. Chances are, this
746 * is because we just allocated the l2_dtable, above.
749 rw_wunlock(&pvh_global_lock);
750 ptep = uma_zalloc(l2zone, M_NOWAIT);
751 rw_wlock(&pvh_global_lock);
753 if (l2b->l2b_kva != 0) {
754 /* We lost the race. */
755 uma_zfree(l2zone, ptep);
758 l2b->l2b_phys = vtophys(ptep);
761 * Oops, no more L2 page tables available at this
762 * time. We may need to deallocate the l2_dtable
763 * if we allocated a new one above.
765 if (l2->l2_occupancy == 0) {
766 pmap->pm_l2[L2_IDX(l1idx)] = NULL;
767 uma_zfree(l2table_zone, l2);
774 l2b->l2b_l1idx = l1idx;
780 static PMAP_INLINE void
781 pmap_free_l2_ptp(pt_entry_t *l2)
783 uma_zfree(l2zone, l2);
786 * One or more mappings in the specified L2 descriptor table have just been
789 * Garbage collect the metadata and descriptor table itself if necessary.
791 * The pmap lock must be acquired when this is called (not necessary
792 * for the kernel pmap).
795 pmap_free_l2_bucket(pmap_t pmap, struct l2_bucket *l2b, u_int count)
797 struct l2_dtable *l2;
798 pd_entry_t *pl1pd, l1pd;
804 * Update the bucket's reference count according to how many
805 * PTEs the caller has just invalidated.
807 l2b->l2b_occupancy -= count;
812 * Level 2 page tables allocated to the kernel pmap are never freed
813 * as that would require checking all Level 1 page tables and
814 * removing any references to the Level 2 page table. See also the
815 * comment elsewhere about never freeing bootstrap L2 descriptors.
817 * We make do with just invalidating the mapping in the L2 table.
819 * This isn't really a big deal in practice and, in fact, leads
820 * to a performance win over time as we don't need to continually
823 if (l2b->l2b_occupancy > 0 || pmap == pmap_kernel())
827 * There are no more valid mappings in this level 2 page table.
828 * Go ahead and NULL-out the pointer in the bucket, then
829 * free the page table.
831 l1idx = l2b->l2b_l1idx;
835 pl1pd = &pmap->pm_l1->l1_kva[l1idx];
838 * If the L1 slot matches the pmap's domain
839 * number, then invalidate it.
841 l1pd = *pl1pd & (L1_TYPE_MASK | L1_C_DOM_MASK);
842 if (l1pd == (L1_C_DOM(pmap->pm_domain) | L1_TYPE_C)) {
848 * Release the L2 descriptor table back to the pool cache.
850 pmap_free_l2_ptp(ptep);
853 * Update the reference count in the associated l2_dtable
855 l2 = pmap->pm_l2[L2_IDX(l1idx)];
856 if (--l2->l2_occupancy > 0)
860 * There are no more valid mappings in any of the Level 1
861 * slots managed by this l2_dtable. Go ahead and NULL-out
862 * the pointer in the parent pmap and free the l2_dtable.
864 pmap->pm_l2[L2_IDX(l1idx)] = NULL;
865 uma_zfree(l2table_zone, l2);
869 * Pool cache constructors for L2 descriptor tables, metadata and pmap
873 pmap_l2ptp_ctor(void *mem, int size, void *arg, int flags)
875 struct l2_bucket *l2b;
876 pt_entry_t *ptep, pte;
877 vm_offset_t va = (vm_offset_t)mem & ~PAGE_MASK;
880 * The mappings for these page tables were initially made using
881 * pmap_kenter() by the pool subsystem. Therefore, the cache-
882 * mode will not be right for page table mappings. To avoid
883 * polluting the pmap_kenter() code with a special case for
884 * page tables, we simply fix up the cache-mode here if it's not
887 l2b = pmap_get_l2_bucket(pmap_kernel(), va);
888 ptep = &l2b->l2b_kva[l2pte_index(va)];
891 cpu_idcache_wbinv_range(va, PAGE_SIZE);
892 pmap_l2cache_wbinv_range(va, pte & L2_S_FRAME, PAGE_SIZE);
893 if ((pte & L2_S_CACHE_MASK) != pte_l2_s_cache_mode_pt) {
895 * Page tables must have the cache-mode set to
898 *ptep = (pte & ~L2_S_CACHE_MASK) | pte_l2_s_cache_mode_pt;
900 cpu_tlb_flushD_SE(va);
904 memset(mem, 0, L2_TABLE_SIZE_REAL);
909 * Modify pte bits for all ptes corresponding to the given physical address.
910 * We use `maskbits' rather than `clearbits' because we're always passing
911 * constants and the latter would require an extra inversion at run-time.
914 pmap_clearbit(struct vm_page *m, u_int maskbits)
916 struct l2_bucket *l2b;
917 struct pv_entry *pv, *pve, *next_pv;
920 pt_entry_t *ptep, npte, opte;
926 rw_wlock(&pvh_global_lock);
927 if ((m->flags & PG_FICTITIOUS) != 0)
930 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
931 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) {
935 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(va)];
936 KASSERT((*pl1pd & L1_TYPE_MASK) == L1_S_PROTO,
937 ("pmap_clearbit: valid section mapping expected"));
938 if ((maskbits & PVF_WRITE) && (pv->pv_flags & PVF_WRITE))
939 (void)pmap_demote_section(pmap, va);
940 else if ((maskbits & PVF_REF) && L1_S_REFERENCED(*pl1pd)) {
941 if (pmap_demote_section(pmap, va)) {
942 if ((pv->pv_flags & PVF_WIRED) == 0) {
944 * Remove the mapping to a single page
945 * so that a subsequent access may
946 * repromote. Since the underlying
947 * l2_bucket is fully populated, this
948 * removal never frees an entire
951 va += (VM_PAGE_TO_PHYS(m) &
953 l2b = pmap_get_l2_bucket(pmap, va);
955 ("pmap_clearbit: no l2 bucket for "
956 "va 0x%#x, pmap 0x%p", va, pmap));
957 ptep = &l2b->l2b_kva[l2pte_index(va)];
960 pmap_free_l2_bucket(pmap, l2b, 1);
961 pve = pmap_remove_pv(m, pmap, va);
962 KASSERT(pve != NULL, ("pmap_clearbit: "
963 "no PV entry for managed mapping"));
964 pmap_free_pv_entry(pmap, pve);
968 } else if ((maskbits & PVF_MOD) && L1_S_WRITABLE(*pl1pd)) {
969 if (pmap_demote_section(pmap, va)) {
970 if ((pv->pv_flags & PVF_WIRED) == 0) {
972 * Write protect the mapping to a
973 * single page so that a subsequent
974 * write access may repromote.
976 va += (VM_PAGE_TO_PHYS(m) &
978 l2b = pmap_get_l2_bucket(pmap, va);
980 ("pmap_clearbit: no l2 bucket for "
981 "va 0x%#x, pmap 0x%p", va, pmap));
982 ptep = &l2b->l2b_kva[l2pte_index(va)];
983 if ((*ptep & L2_S_PROTO) != 0) {
984 pve = pmap_find_pv(&m->md,
987 ("pmap_clearbit: no PV "
988 "entry for managed mapping"));
989 pve->pv_flags &= ~PVF_WRITE;
1000 if (TAILQ_EMPTY(&m->md.pv_list)) {
1001 rw_wunlock(&pvh_global_lock);
1006 * Loop over all current mappings setting/clearing as appropos
1008 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
1011 oflags = pv->pv_flags;
1012 pv->pv_flags &= ~maskbits;
1016 l2b = pmap_get_l2_bucket(pmap, va);
1017 KASSERT(l2b != NULL, ("pmap_clearbit: no l2 bucket for "
1018 "va 0x%#x, pmap 0x%p", va, pmap));
1020 ptep = &l2b->l2b_kva[l2pte_index(va)];
1021 npte = opte = *ptep;
1023 if (maskbits & (PVF_WRITE | PVF_MOD)) {
1024 /* make the pte read only */
1028 if (maskbits & PVF_REF) {
1030 * Clear referenced flag in PTE so that we
1031 * will take a flag fault the next time the mapping
1037 CTR4(KTR_PMAP,"clearbit: pmap:%p bits:%x pte:%x->%x",
1038 pmap, maskbits, opte, npte);
1043 /* Flush the TLB entry if a current pmap. */
1044 if (PTE_BEEN_EXECD(opte))
1045 cpu_tlb_flushID_SE(pv->pv_va);
1046 else if (PTE_BEEN_REFD(opte))
1047 cpu_tlb_flushD_SE(pv->pv_va);
1054 if (maskbits & PVF_WRITE)
1055 vm_page_aflag_clear(m, PGA_WRITEABLE);
1056 rw_wunlock(&pvh_global_lock);
1061 * main pv_entry manipulation functions:
1062 * pmap_enter_pv: enter a mapping onto a vm_page list
1063 * pmap_remove_pv: remove a mappiing from a vm_page list
1065 * NOTE: pmap_enter_pv expects to lock the pvh itself
1066 * pmap_remove_pv expects the caller to lock the pvh before calling
1070 * pmap_enter_pv: enter a mapping onto a vm_page's PV list
1072 * => caller should hold the proper lock on pvh_global_lock
1073 * => caller should have pmap locked
1074 * => we will (someday) gain the lock on the vm_page's PV list
1075 * => caller should adjust ptp's wire_count before calling
1076 * => caller should not adjust pmap's wire_count
1079 pmap_enter_pv(struct vm_page *m, struct pv_entry *pve, pmap_t pmap,
1080 vm_offset_t va, u_int flags)
1083 rw_assert(&pvh_global_lock, RA_WLOCKED);
1085 PMAP_ASSERT_LOCKED(pmap);
1087 pve->pv_flags = flags;
1089 TAILQ_INSERT_HEAD(&m->md.pv_list, pve, pv_list);
1090 if (pve->pv_flags & PVF_WIRED)
1091 ++pmap->pm_stats.wired_count;
1096 * pmap_find_pv: Find a pv entry
1098 * => caller should hold lock on vm_page
1100 static PMAP_INLINE struct pv_entry *
1101 pmap_find_pv(struct md_page *md, pmap_t pmap, vm_offset_t va)
1103 struct pv_entry *pv;
1105 rw_assert(&pvh_global_lock, RA_WLOCKED);
1106 TAILQ_FOREACH(pv, &md->pv_list, pv_list)
1107 if (pmap == PV_PMAP(pv) && va == pv->pv_va)
1114 * vector_page_setprot:
1116 * Manipulate the protection of the vector page.
1119 vector_page_setprot(int prot)
1121 struct l2_bucket *l2b;
1124 l2b = pmap_get_l2_bucket(pmap_kernel(), vector_page);
1126 ptep = &l2b->l2b_kva[l2pte_index(vector_page)];
1128 * Set referenced flag.
1129 * Vectors' page is always desired
1130 * to be allowed to reside in TLB.
1134 pmap_set_prot(ptep, prot|VM_PROT_EXECUTE, 0);
1136 cpu_tlb_flushD_SE(vector_page);
1141 pmap_set_prot(pt_entry_t *ptep, vm_prot_t prot, uint8_t user)
1144 *ptep &= ~(L2_S_PROT_MASK | L2_XN);
1146 if (!(prot & VM_PROT_EXECUTE))
1149 /* Set defaults first - kernel read access */
1151 *ptep |= L2_S_PROT_R;
1152 /* Now tune APs as desired */
1154 *ptep |= L2_S_PROT_U;
1156 if (prot & VM_PROT_WRITE)
1161 * pmap_remove_pv: try to remove a mapping from a pv_list
1163 * => caller should hold proper lock on pmap_main_lock
1164 * => pmap should be locked
1165 * => caller should hold lock on vm_page [so that attrs can be adjusted]
1166 * => caller should adjust ptp's wire_count and free PTP if needed
1167 * => caller should NOT adjust pmap's wire_count
1168 * => we return the removed pve
1170 static struct pv_entry *
1171 pmap_remove_pv(struct vm_page *m, pmap_t pmap, vm_offset_t va)
1173 struct pv_entry *pve;
1175 rw_assert(&pvh_global_lock, RA_WLOCKED);
1176 PMAP_ASSERT_LOCKED(pmap);
1178 pve = pmap_find_pv(&m->md, pmap, va); /* find corresponding pve */
1180 TAILQ_REMOVE(&m->md.pv_list, pve, pv_list);
1181 if (pve->pv_flags & PVF_WIRED)
1182 --pmap->pm_stats.wired_count;
1184 if (TAILQ_EMPTY(&m->md.pv_list))
1185 vm_page_aflag_clear(m, PGA_WRITEABLE);
1187 return(pve); /* return removed pve */
1192 * pmap_modify_pv: Update pv flags
1194 * => caller should hold lock on vm_page [so that attrs can be adjusted]
1195 * => caller should NOT adjust pmap's wire_count
1196 * => we return the old flags
1198 * Modify a physical-virtual mapping in the pv table
1201 pmap_modify_pv(struct vm_page *m, pmap_t pmap, vm_offset_t va,
1202 u_int clr_mask, u_int set_mask)
1204 struct pv_entry *npv;
1205 u_int flags, oflags;
1207 PMAP_ASSERT_LOCKED(pmap);
1208 rw_assert(&pvh_global_lock, RA_WLOCKED);
1209 if ((npv = pmap_find_pv(&m->md, pmap, va)) == NULL)
1213 * There is at least one VA mapping this page.
1215 oflags = npv->pv_flags;
1216 npv->pv_flags = flags = (oflags & ~clr_mask) | set_mask;
1218 if ((flags ^ oflags) & PVF_WIRED) {
1219 if (flags & PVF_WIRED)
1220 ++pmap->pm_stats.wired_count;
1222 --pmap->pm_stats.wired_count;
1228 /* Function to set the debug level of the pmap code */
1231 pmap_debug(int level)
1233 pmap_debug_level = level;
1234 dprintf("pmap_debug: level=%d\n", pmap_debug_level);
1236 #endif /* PMAP_DEBUG */
1239 pmap_pinit0(struct pmap *pmap)
1241 PDEBUG(1, printf("pmap_pinit0: pmap = %08x\n", (u_int32_t) pmap));
1243 bcopy(kernel_pmap, pmap, sizeof(*pmap));
1244 bzero(&pmap->pm_mtx, sizeof(pmap->pm_mtx));
1245 PMAP_LOCK_INIT(pmap);
1246 TAILQ_INIT(&pmap->pm_pvchunk);
1250 * Initialize a vm_page's machine-dependent fields.
1253 pmap_page_init(vm_page_t m)
1256 TAILQ_INIT(&m->md.pv_list);
1257 m->md.pv_memattr = VM_MEMATTR_DEFAULT;
1261 pmap_ptelist_alloc(vm_offset_t *head)
1268 return (va); /* Out of memory */
1271 if ((*head & L2_TYPE_MASK) != L2_TYPE_INV)
1272 panic("%s: va is not L2_TYPE_INV!", __func__);
1278 pmap_ptelist_free(vm_offset_t *head, vm_offset_t va)
1282 if ((va & L2_TYPE_MASK) != L2_TYPE_INV)
1283 panic("%s: freeing va that is not L2_TYPE INV!", __func__);
1285 *pte = *head; /* virtual! L2_TYPE is L2_TYPE_INV though */
1290 pmap_ptelist_init(vm_offset_t *head, void *base, int npages)
1296 for (i = npages - 1; i >= 0; i--) {
1297 va = (vm_offset_t)base + i * PAGE_SIZE;
1298 pmap_ptelist_free(head, va);
1303 * Initialize the pmap module.
1304 * Called by vm_init, to initialize any structures that the pmap
1305 * system needs to map virtual memory.
1313 PDEBUG(1, printf("pmap_init: phys_start = %08x\n", PHYSADDR));
1315 l2zone = uma_zcreate("L2 Table", L2_TABLE_SIZE_REAL, pmap_l2ptp_ctor,
1316 NULL, NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_VM | UMA_ZONE_NOFREE);
1317 l2table_zone = uma_zcreate("L2 Table", sizeof(struct l2_dtable), NULL,
1318 NULL, NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_VM | UMA_ZONE_NOFREE);
1321 * Are large page mappings supported and enabled?
1323 TUNABLE_INT_FETCH("vm.pmap.sp_enabled", &sp_enabled);
1325 KASSERT(MAXPAGESIZES > 1 && pagesizes[1] == 0,
1326 ("pmap_init: can't assign to pagesizes[1]"));
1327 pagesizes[1] = NBPDR;
1331 * Calculate the size of the pv head table for superpages.
1333 for (i = 0; phys_avail[i + 1]; i += 2);
1334 pv_npg = round_1mpage(phys_avail[(i - 2) + 1]) / NBPDR;
1337 * Allocate memory for the pv head table for superpages.
1339 s = (vm_size_t)(pv_npg * sizeof(struct md_page));
1341 pv_table = (struct md_page *)kmem_malloc(kernel_arena, s,
1343 for (i = 0; i < pv_npg; i++)
1344 TAILQ_INIT(&pv_table[i].pv_list);
1347 * Initialize the address space for the pv chunks.
1350 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc);
1351 pv_entry_max = shpgperproc * maxproc + cnt.v_page_count;
1352 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max);
1353 pv_entry_max = roundup(pv_entry_max, _NPCPV);
1354 pv_entry_high_water = 9 * (pv_entry_max / 10);
1356 pv_maxchunks = MAX(pv_entry_max / _NPCPV, maxproc);
1357 pv_chunkbase = (struct pv_chunk *)kva_alloc(PAGE_SIZE * pv_maxchunks);
1359 if (pv_chunkbase == NULL)
1360 panic("pmap_init: not enough kvm for pv chunks");
1362 pmap_ptelist_init(&pv_vafree, pv_chunkbase, pv_maxchunks);
1365 * Now it is safe to enable pv_table recording.
1367 PDEBUG(1, printf("pmap_init: done!\n"));
1370 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_max, CTLFLAG_RD, &pv_entry_max, 0,
1371 "Max number of PV entries");
1372 SYSCTL_INT(_vm_pmap, OID_AUTO, shpgperproc, CTLFLAG_RD, &shpgperproc, 0,
1373 "Page share factor per proc");
1375 static SYSCTL_NODE(_vm_pmap, OID_AUTO, section, CTLFLAG_RD, 0,
1376 "1MB page mapping counters");
1378 static u_long pmap_section_demotions;
1379 SYSCTL_ULONG(_vm_pmap_section, OID_AUTO, demotions, CTLFLAG_RD,
1380 &pmap_section_demotions, 0, "1MB page demotions");
1382 static u_long pmap_section_mappings;
1383 SYSCTL_ULONG(_vm_pmap_section, OID_AUTO, mappings, CTLFLAG_RD,
1384 &pmap_section_mappings, 0, "1MB page mappings");
1386 static u_long pmap_section_p_failures;
1387 SYSCTL_ULONG(_vm_pmap_section, OID_AUTO, p_failures, CTLFLAG_RD,
1388 &pmap_section_p_failures, 0, "1MB page promotion failures");
1390 static u_long pmap_section_promotions;
1391 SYSCTL_ULONG(_vm_pmap_section, OID_AUTO, promotions, CTLFLAG_RD,
1392 &pmap_section_promotions, 0, "1MB page promotions");
1395 pmap_fault_fixup(pmap_t pmap, vm_offset_t va, vm_prot_t ftype, int user)
1397 struct l2_dtable *l2;
1398 struct l2_bucket *l2b;
1399 pd_entry_t *pl1pd, l1pd;
1400 pt_entry_t *ptep, pte;
1406 rw_wlock(&pvh_global_lock);
1409 * Check and possibly fix-up L1 section mapping
1410 * only when superpage mappings are enabled to speed up.
1413 pl1pd = &pmap->pm_l1->l1_kva[l1idx];
1415 if ((l1pd & L1_TYPE_MASK) == L1_S_PROTO) {
1416 /* Catch an access to the vectors section */
1417 if (l1idx == L1_IDX(vector_page))
1420 * Stay away from the kernel mappings.
1421 * None of them should fault from L1 entry.
1423 if (pmap == pmap_kernel())
1426 * Catch a forbidden userland access
1428 if (user && !(l1pd & L1_S_PROT_U))
1431 * Superpage is always either mapped read only
1432 * or it is modified and permitted to be written
1433 * by default. Therefore, process only reference
1434 * flag fault and demote page in case of write fault.
1436 if ((ftype & VM_PROT_WRITE) && !L1_S_WRITABLE(l1pd) &&
1437 L1_S_REFERENCED(l1pd)) {
1438 (void)pmap_demote_section(pmap, va);
1440 } else if (!L1_S_REFERENCED(l1pd)) {
1441 /* Mark the page "referenced" */
1442 *pl1pd = l1pd | L1_S_REF;
1444 goto l1_section_out;
1450 * If there is no l2_dtable for this address, then the process
1451 * has no business accessing it.
1453 * Note: This will catch userland processes trying to access
1456 l2 = pmap->pm_l2[L2_IDX(l1idx)];
1461 * Likewise if there is no L2 descriptor table
1463 l2b = &l2->l2_bucket[L2_BUCKET(l1idx)];
1464 if (l2b->l2b_kva == NULL)
1468 * Check the PTE itself.
1470 ptep = &l2b->l2b_kva[l2pte_index(va)];
1476 * Catch a userland access to the vector page mapped at 0x0
1478 if (user && !(pte & L2_S_PROT_U))
1480 if (va == vector_page)
1484 CTR5(KTR_PMAP, "pmap_fault_fix: pmap:%p va:%x pte:0x%x ftype:%x user:%x",
1485 pmap, va, pte, ftype, user);
1486 if ((ftype & VM_PROT_WRITE) && !(L2_S_WRITABLE(pte)) &&
1487 L2_S_REFERENCED(pte)) {
1489 * This looks like a good candidate for "page modified"
1492 struct pv_entry *pv;
1495 /* Extract the physical address of the page */
1496 if ((m = PHYS_TO_VM_PAGE(pa)) == NULL) {
1499 /* Get the current flags for this page. */
1501 pv = pmap_find_pv(&m->md, pmap, va);
1507 * Do the flags say this page is writable? If not then it
1508 * is a genuine write fault. If yes then the write fault is
1509 * our fault as we did not reflect the write access in the
1510 * PTE. Now we know a write has occurred we can correct this
1511 * and also set the modified bit
1513 if ((pv->pv_flags & PVF_WRITE) == 0) {
1519 /* Re-enable write permissions for the page */
1520 pmap_set_prot(ptep, VM_PROT_WRITE, *ptep & L2_S_PROT_U);
1521 CTR1(KTR_PMAP, "pmap_fault_fix: new pte:0x%x", pte);
1524 } else if (!L2_S_REFERENCED(pte)) {
1526 * This looks like a good candidate for "page referenced"
1529 struct pv_entry *pv;
1532 /* Extract the physical address of the page */
1533 if ((m = PHYS_TO_VM_PAGE(pa)) == NULL)
1535 /* Get the current flags for this page. */
1536 pv = pmap_find_pv(&m->md, pmap, va);
1540 vm_page_aflag_set(m, PGA_REFERENCED);
1542 /* Mark the page "referenced" */
1543 *ptep = pte | L2_S_REF;
1549 * We know there is a valid mapping here, so simply
1550 * fix up the L1 if necessary.
1552 pl1pd = &pmap->pm_l1->l1_kva[l1idx];
1553 l1pd = l2b->l2b_phys | L1_C_DOM(pmap->pm_domain) | L1_C_PROTO;
1554 if (*pl1pd != l1pd) {
1562 * If 'rv == 0' at this point, it generally indicates that there is a
1563 * stale TLB entry for the faulting address. This happens when two or
1564 * more processes are sharing an L1. Since we don't flush the TLB on
1565 * a context switch between such processes, we can take domain faults
1566 * for mappings which exist at the same VA in both processes. EVEN IF
1567 * WE'VE RECENTLY FIXED UP THE CORRESPONDING L1 in pmap_enter(), for
1570 * This is extremely likely to happen if pmap_enter() updated the L1
1571 * entry for a recently entered mapping. In this case, the TLB is
1572 * flushed for the new mapping, but there may still be TLB entries for
1573 * other mappings belonging to other processes in the 1MB range
1574 * covered by the L1 entry.
1576 * Since 'rv == 0', we know that the L1 already contains the correct
1577 * value, so the fault must be due to a stale TLB entry.
1579 * Since we always need to flush the TLB anyway in the case where we
1580 * fixed up the L1, or frobbed the L2 PTE, we effectively deal with
1581 * stale TLB entries dynamically.
1583 * However, the above condition can ONLY happen if the current L1 is
1584 * being shared. If it happens when the L1 is unshared, it indicates
1585 * that other parts of the pmap are not doing their job WRT managing
1588 if (rv == 0 && pmap->pm_l1->l1_domain_use_count == 1) {
1589 printf("fixup: pmap %p, va 0x%08x, ftype %d - nothing to do!\n",
1591 printf("fixup: l2 %p, l2b %p, ptep %p, pl1pd %p\n",
1592 l2, l2b, ptep, pl1pd);
1593 printf("fixup: pte 0x%x, l1pd 0x%x, last code 0x%x\n",
1594 pte, l1pd, last_fault_code);
1602 cpu_tlb_flushID_SE(va);
1608 rw_wunlock(&pvh_global_lock);
1616 struct l2_bucket *l2b;
1617 struct l1_ttable *l1;
1619 pt_entry_t *ptep, pte;
1620 vm_offset_t va, eva;
1623 needed = (maxproc / PMAP_DOMAINS) + ((maxproc % PMAP_DOMAINS) ? 1 : 0);
1625 l1 = malloc(sizeof(*l1) * needed, M_VMPMAP, M_WAITOK);
1627 for (loop = 0; loop < needed; loop++, l1++) {
1628 /* Allocate a L1 page table */
1629 va = (vm_offset_t)contigmalloc(L1_TABLE_SIZE, M_VMPMAP, 0, 0x0,
1630 0xffffffff, L1_TABLE_SIZE, 0);
1633 panic("Cannot allocate L1 KVM");
1635 eva = va + L1_TABLE_SIZE;
1636 pl1pt = (pd_entry_t *)va;
1639 l2b = pmap_get_l2_bucket(pmap_kernel(), va);
1640 ptep = &l2b->l2b_kva[l2pte_index(va)];
1642 pte = (pte & ~L2_S_CACHE_MASK) | pte_l2_s_cache_mode_pt;
1645 cpu_tlb_flushD_SE(va);
1649 pmap_init_l1(l1, pl1pt);
1652 printf("pmap_postinit: Allocated %d static L1 descriptor tables\n",
1658 * This is used to stuff certain critical values into the PCB where they
1659 * can be accessed quickly from cpu_switch() et al.
1662 pmap_set_pcb_pagedir(pmap_t pmap, struct pcb *pcb)
1664 struct l2_bucket *l2b;
1666 pcb->pcb_pagedir = pmap->pm_l1->l1_physaddr;
1667 pcb->pcb_dacr = (DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) |
1668 (DOMAIN_CLIENT << (pmap->pm_domain * 2));
1670 if (vector_page < KERNBASE) {
1671 pcb->pcb_pl1vec = &pmap->pm_l1->l1_kva[L1_IDX(vector_page)];
1672 l2b = pmap_get_l2_bucket(pmap, vector_page);
1673 pcb->pcb_l1vec = l2b->l2b_phys | L1_C_PROTO |
1674 L1_C_DOM(pmap->pm_domain) | L1_C_DOM(PMAP_DOMAIN_KERNEL);
1676 pcb->pcb_pl1vec = NULL;
1680 pmap_activate(struct thread *td)
1685 pmap = vmspace_pmap(td->td_proc->p_vmspace);
1689 pmap_set_pcb_pagedir(pmap, pcb);
1691 if (td == curthread) {
1692 u_int cur_dacr, cur_ttb;
1694 __asm __volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(cur_ttb));
1695 __asm __volatile("mrc p15, 0, %0, c3, c0, 0" : "=r"(cur_dacr));
1697 cur_ttb &= ~(L1_TABLE_SIZE - 1);
1699 if (cur_ttb == (u_int)pcb->pcb_pagedir &&
1700 cur_dacr == pcb->pcb_dacr) {
1702 * No need to switch address spaces.
1710 * We MUST, I repeat, MUST fix up the L1 entry corresponding
1711 * to 'vector_page' in the incoming L1 table before switching
1712 * to it otherwise subsequent interrupts/exceptions (including
1713 * domain faults!) will jump into hyperspace.
1715 if (pcb->pcb_pl1vec) {
1716 *pcb->pcb_pl1vec = pcb->pcb_l1vec;
1719 cpu_domains(pcb->pcb_dacr);
1720 cpu_setttb(pcb->pcb_pagedir);
1726 pmap_set_pt_cache_mode(pd_entry_t *kl1, vm_offset_t va)
1728 pd_entry_t *pdep, pde;
1729 pt_entry_t *ptep, pte;
1734 * Make sure the descriptor itself has the correct cache mode
1736 pdep = &kl1[L1_IDX(va)];
1739 if (l1pte_section_p(pde)) {
1740 if ((pde & L1_S_CACHE_MASK) != pte_l1_s_cache_mode_pt) {
1741 *pdep = (pde & ~L1_S_CACHE_MASK) |
1742 pte_l1_s_cache_mode_pt;
1747 pa = (vm_paddr_t)(pde & L1_C_ADDR_MASK);
1748 ptep = (pt_entry_t *)kernel_pt_lookup(pa);
1750 panic("pmap_bootstrap: No L2 for L2 @ va %p\n", ptep);
1752 ptep = &ptep[l2pte_index(va)];
1754 if ((pte & L2_S_CACHE_MASK) != pte_l2_s_cache_mode_pt) {
1755 *ptep = (pte & ~L2_S_CACHE_MASK) |
1756 pte_l2_s_cache_mode_pt;
1766 pmap_alloc_specials(vm_offset_t *availp, int pages, vm_offset_t *vap,
1769 vm_offset_t va = *availp;
1770 struct l2_bucket *l2b;
1773 l2b = pmap_get_l2_bucket(pmap_kernel(), va);
1775 panic("pmap_alloc_specials: no l2b for 0x%x", va);
1777 *ptep = &l2b->l2b_kva[l2pte_index(va)];
1781 *availp = va + (PAGE_SIZE * pages);
1785 * Bootstrap the system enough to run with virtual memory.
1787 * On the arm this is called after mapping has already been enabled
1788 * and just syncs the pmap module with what has already been done.
1789 * [We can't call it easily with mapping off since the kernel is not
1790 * mapped with PA == VA, hence we would have to relocate every address
1791 * from the linked base (virtual) address "KERNBASE" to the actual
1792 * (physical) address starting relative to 0]
1794 #define PMAP_STATIC_L2_SIZE 16
1797 pmap_bootstrap(vm_offset_t firstaddr, struct pv_addr *l1pt)
1799 static struct l1_ttable static_l1;
1800 static struct l2_dtable static_l2[PMAP_STATIC_L2_SIZE];
1801 struct l1_ttable *l1 = &static_l1;
1802 struct l2_dtable *l2;
1803 struct l2_bucket *l2b;
1805 pd_entry_t *kernel_l1pt = (pd_entry_t *)l1pt->pv_va;
1810 int l1idx, l2idx, l2next = 0;
1812 PDEBUG(1, printf("firstaddr = %08x, lastaddr = %08x\n",
1813 firstaddr, vm_max_kernel_address));
1815 virtual_avail = firstaddr;
1816 kernel_pmap->pm_l1 = l1;
1817 kernel_l1pa = l1pt->pv_pa;
1820 * Scan the L1 translation table created by initarm() and create
1821 * the required metadata for all valid mappings found in it.
1823 for (l1idx = 0; l1idx < (L1_TABLE_SIZE / sizeof(pd_entry_t)); l1idx++) {
1824 pde = kernel_l1pt[l1idx];
1827 * We're only interested in Coarse mappings.
1828 * pmap_extract() can deal with section mappings without
1829 * recourse to checking L2 metadata.
1831 if ((pde & L1_TYPE_MASK) != L1_TYPE_C)
1835 * Lookup the KVA of this L2 descriptor table
1837 pa = (vm_paddr_t)(pde & L1_C_ADDR_MASK);
1838 ptep = (pt_entry_t *)kernel_pt_lookup(pa);
1841 panic("pmap_bootstrap: No L2 for va 0x%x, pa 0x%lx",
1842 (u_int)l1idx << L1_S_SHIFT, (long unsigned int)pa);
1846 * Fetch the associated L2 metadata structure.
1847 * Allocate a new one if necessary.
1849 if ((l2 = kernel_pmap->pm_l2[L2_IDX(l1idx)]) == NULL) {
1850 if (l2next == PMAP_STATIC_L2_SIZE)
1851 panic("pmap_bootstrap: out of static L2s");
1852 kernel_pmap->pm_l2[L2_IDX(l1idx)] = l2 =
1853 &static_l2[l2next++];
1857 * One more L1 slot tracked...
1862 * Fill in the details of the L2 descriptor in the
1863 * appropriate bucket.
1865 l2b = &l2->l2_bucket[L2_BUCKET(l1idx)];
1866 l2b->l2b_kva = ptep;
1868 l2b->l2b_l1idx = l1idx;
1871 * Establish an initial occupancy count for this descriptor
1874 l2idx < (L2_TABLE_SIZE_REAL / sizeof(pt_entry_t));
1876 if ((ptep[l2idx] & L2_TYPE_MASK) != L2_TYPE_INV) {
1877 l2b->l2b_occupancy++;
1882 * Make sure the descriptor itself has the correct cache mode.
1883 * If not, fix it, but whine about the problem. Port-meisters
1884 * should consider this a clue to fix up their initarm()
1887 if (pmap_set_pt_cache_mode(kernel_l1pt, (vm_offset_t)ptep)) {
1888 printf("pmap_bootstrap: WARNING! wrong cache mode for "
1889 "L2 pte @ %p\n", ptep);
1895 * Ensure the primary (kernel) L1 has the correct cache mode for
1896 * a page table. Bitch if it is not correctly set.
1898 for (va = (vm_offset_t)kernel_l1pt;
1899 va < ((vm_offset_t)kernel_l1pt + L1_TABLE_SIZE); va += PAGE_SIZE) {
1900 if (pmap_set_pt_cache_mode(kernel_l1pt, va))
1901 printf("pmap_bootstrap: WARNING! wrong cache mode for "
1902 "primary L1 @ 0x%x\n", va);
1905 cpu_dcache_wbinv_all();
1906 cpu_l2cache_wbinv_all();
1910 PMAP_LOCK_INIT(kernel_pmap);
1911 CPU_FILL(&kernel_pmap->pm_active);
1912 kernel_pmap->pm_domain = PMAP_DOMAIN_KERNEL;
1913 TAILQ_INIT(&kernel_pmap->pm_pvchunk);
1916 * Initialize the global pv list lock.
1918 rw_init(&pvh_global_lock, "pmap pv global");
1921 * Reserve some special page table entries/VA space for temporary
1925 pmap_alloc_specials(&virtual_avail, 1, &csrcp, &csrc_pte);
1926 pmap_set_pt_cache_mode(kernel_l1pt, (vm_offset_t)csrc_pte);
1927 pmap_alloc_specials(&virtual_avail, 1, &cdstp, &cdst_pte);
1928 pmap_set_pt_cache_mode(kernel_l1pt, (vm_offset_t)cdst_pte);
1929 size = ((vm_max_kernel_address - pmap_curmaxkvaddr) + L1_S_OFFSET) /
1931 pmap_alloc_specials(&virtual_avail,
1932 round_page(size * L2_TABLE_SIZE_REAL) / PAGE_SIZE,
1933 &pmap_kernel_l2ptp_kva, NULL);
1935 size = (size + (L2_BUCKET_SIZE - 1)) / L2_BUCKET_SIZE;
1936 pmap_alloc_specials(&virtual_avail,
1937 round_page(size * sizeof(struct l2_dtable)) / PAGE_SIZE,
1938 &pmap_kernel_l2dtable_kva, NULL);
1940 pmap_alloc_specials(&virtual_avail,
1941 1, (vm_offset_t*)&_tmppt, NULL);
1942 pmap_alloc_specials(&virtual_avail,
1943 MAXDUMPPGS, (vm_offset_t *)&crashdumpmap, NULL);
1944 SLIST_INIT(&l1_list);
1945 TAILQ_INIT(&l1_lru_list);
1946 mtx_init(&l1_lru_lock, "l1 list lock", NULL, MTX_DEF);
1947 pmap_init_l1(l1, kernel_l1pt);
1948 cpu_dcache_wbinv_all();
1949 cpu_l2cache_wbinv_all();
1951 virtual_avail = round_page(virtual_avail);
1952 virtual_end = vm_max_kernel_address;
1953 kernel_vm_end = pmap_curmaxkvaddr;
1954 arm_nocache_startaddr = vm_max_kernel_address;
1955 mtx_init(&cmtx, "TMP mappings mtx", NULL, MTX_DEF);
1957 pmap_set_pcb_pagedir(kernel_pmap, thread0.td_pcb);
1960 /***************************************************
1961 * Pmap allocation/deallocation routines.
1962 ***************************************************/
1965 * Release any resources held by the given physical map.
1966 * Called when a pmap initialized by pmap_pinit is being released.
1967 * Should only be called if the map contains no valid mappings.
1970 pmap_release(pmap_t pmap)
1974 cpu_idcache_wbinv_all();
1975 cpu_l2cache_wbinv_all();
1978 if (vector_page < KERNBASE) {
1979 struct pcb *curpcb = PCPU_GET(curpcb);
1980 pcb = thread0.td_pcb;
1981 if (pmap_is_current(pmap)) {
1983 * Frob the L1 entry corresponding to the vector
1984 * page so that it contains the kernel pmap's domain
1985 * number. This will ensure pmap_remove() does not
1986 * pull the current vector page out from under us.
1989 *pcb->pcb_pl1vec = pcb->pcb_l1vec;
1990 cpu_domains(pcb->pcb_dacr);
1991 cpu_setttb(pcb->pcb_pagedir);
1994 pmap_remove(pmap, vector_page, vector_page + PAGE_SIZE);
1996 * Make sure cpu_switch(), et al, DTRT. This is safe to do
1997 * since this process has no remaining mappings of its own.
1999 curpcb->pcb_pl1vec = pcb->pcb_pl1vec;
2000 curpcb->pcb_l1vec = pcb->pcb_l1vec;
2001 curpcb->pcb_dacr = pcb->pcb_dacr;
2002 curpcb->pcb_pagedir = pcb->pcb_pagedir;
2007 dprintf("pmap_release()\n");
2013 * Helper function for pmap_grow_l2_bucket()
2016 pmap_grow_map(vm_offset_t va, pt_entry_t cache_mode, vm_paddr_t *pap)
2018 struct l2_bucket *l2b;
2023 m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_WIRED);
2026 pa = VM_PAGE_TO_PHYS(m);
2031 l2b = pmap_get_l2_bucket(pmap_kernel(), va);
2033 ptep = &l2b->l2b_kva[l2pte_index(va)];
2034 *ptep = L2_S_PROTO | pa | cache_mode | L2_S_REF;
2035 pmap_set_prot(ptep, VM_PROT_READ | VM_PROT_WRITE, 0);
2042 * This is the same as pmap_alloc_l2_bucket(), except that it is only
2043 * used by pmap_growkernel().
2045 static __inline struct l2_bucket *
2046 pmap_grow_l2_bucket(pmap_t pmap, vm_offset_t va)
2048 struct l2_dtable *l2;
2049 struct l2_bucket *l2b;
2050 struct l1_ttable *l1;
2057 if ((l2 = pmap->pm_l2[L2_IDX(l1idx)]) == NULL) {
2059 * No mapping at this address, as there is
2060 * no entry in the L1 table.
2061 * Need to allocate a new l2_dtable.
2063 nva = pmap_kernel_l2dtable_kva;
2064 if ((nva & PAGE_MASK) == 0) {
2066 * Need to allocate a backing page
2068 if (pmap_grow_map(nva, pte_l2_s_cache_mode, NULL))
2072 l2 = (struct l2_dtable *)nva;
2073 nva += sizeof(struct l2_dtable);
2075 if ((nva & PAGE_MASK) < (pmap_kernel_l2dtable_kva &
2078 * The new l2_dtable straddles a page boundary.
2079 * Map in another page to cover it.
2081 if (pmap_grow_map(nva, pte_l2_s_cache_mode, NULL))
2085 pmap_kernel_l2dtable_kva = nva;
2088 * Link it into the parent pmap
2090 pmap->pm_l2[L2_IDX(l1idx)] = l2;
2091 memset(l2, 0, sizeof(*l2));
2094 l2b = &l2->l2_bucket[L2_BUCKET(l1idx)];
2097 * Fetch pointer to the L2 page table associated with the address.
2099 if (l2b->l2b_kva == NULL) {
2103 * No L2 page table has been allocated. Chances are, this
2104 * is because we just allocated the l2_dtable, above.
2106 nva = pmap_kernel_l2ptp_kva;
2107 ptep = (pt_entry_t *)nva;
2108 if ((nva & PAGE_MASK) == 0) {
2110 * Need to allocate a backing page
2112 if (pmap_grow_map(nva, pte_l2_s_cache_mode_pt,
2113 &pmap_kernel_l2ptp_phys))
2116 memset(ptep, 0, L2_TABLE_SIZE_REAL);
2118 l2b->l2b_kva = ptep;
2119 l2b->l2b_l1idx = l1idx;
2120 l2b->l2b_phys = pmap_kernel_l2ptp_phys;
2122 pmap_kernel_l2ptp_kva += L2_TABLE_SIZE_REAL;
2123 pmap_kernel_l2ptp_phys += L2_TABLE_SIZE_REAL;
2126 /* Distribute new L1 entry to all other L1s */
2127 SLIST_FOREACH(l1, &l1_list, l1_link) {
2128 pl1pd = &l1->l1_kva[L1_IDX(va)];
2129 *pl1pd = l2b->l2b_phys | L1_C_DOM(PMAP_DOMAIN_KERNEL) |
2139 * grow the number of kernel page table entries, if needed
2142 pmap_growkernel(vm_offset_t addr)
2144 pmap_t kpmap = pmap_kernel();
2146 if (addr <= pmap_curmaxkvaddr)
2147 return; /* we are OK */
2150 * whoops! we need to add kernel PTPs
2153 /* Map 1MB at a time */
2154 for (; pmap_curmaxkvaddr < addr; pmap_curmaxkvaddr += L1_S_SIZE)
2155 pmap_grow_l2_bucket(kpmap, pmap_curmaxkvaddr);
2158 * flush out the cache, expensive but growkernel will happen so
2161 cpu_dcache_wbinv_all();
2162 cpu_l2cache_wbinv_all();
2165 kernel_vm_end = pmap_curmaxkvaddr;
2169 * Returns TRUE if the given page is mapped individually or as part of
2170 * a 1MB section. Otherwise, returns FALSE.
2173 pmap_page_is_mapped(vm_page_t m)
2177 if ((m->oflags & VPO_UNMANAGED) != 0)
2179 rw_wlock(&pvh_global_lock);
2180 rv = !TAILQ_EMPTY(&m->md.pv_list) ||
2181 ((m->flags & PG_FICTITIOUS) == 0 &&
2182 !TAILQ_EMPTY(&pa_to_pvh(VM_PAGE_TO_PHYS(m))->pv_list));
2183 rw_wunlock(&pvh_global_lock);
2188 * Remove all pages from specified address space
2189 * this aids process exit speeds. Also, this code
2190 * is special cased for current process only, but
2191 * can have the more generic (and slightly slower)
2192 * mode enabled. This is much faster than pmap_remove
2193 * in the case of running down an entire address space.
2196 pmap_remove_pages(pmap_t pmap)
2198 struct pv_entry *pv;
2199 struct l2_bucket *l2b = NULL;
2200 struct pv_chunk *pc, *npc;
2201 struct md_page *pvh;
2202 pd_entry_t *pl1pd, l1pd;
2206 uint32_t inuse, bitmask;
2207 int allfree, bit, field, idx;
2209 rw_wlock(&pvh_global_lock);
2212 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
2214 for (field = 0; field < _NPCM; field++) {
2215 inuse = ~pc->pc_map[field] & pc_freemask[field];
2216 while (inuse != 0) {
2217 bit = ffs(inuse) - 1;
2218 bitmask = 1ul << bit;
2219 idx = field * sizeof(inuse) * NBBY + bit;
2220 pv = &pc->pc_pventry[idx];
2223 if (pv->pv_flags & PVF_WIRED) {
2224 /* Cannot remove wired pages now. */
2228 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(va)];
2230 l2b = pmap_get_l2_bucket(pmap, va);
2231 if ((l1pd & L1_TYPE_MASK) == L1_S_PROTO) {
2232 pvh = pa_to_pvh(l1pd & L1_S_FRAME);
2233 TAILQ_REMOVE(&pvh->pv_list, pv, pv_list);
2234 if (TAILQ_EMPTY(&pvh->pv_list)) {
2235 m = PHYS_TO_VM_PAGE(l1pd & L1_S_FRAME);
2236 KASSERT((vm_offset_t)m >= KERNBASE,
2237 ("Trying to access non-existent page "
2238 "va %x l1pd %x", trunc_1mpage(va), l1pd));
2239 for (mt = m; mt < &m[L2_PTE_NUM_TOTAL]; mt++) {
2240 if (TAILQ_EMPTY(&mt->md.pv_list))
2241 vm_page_aflag_clear(mt, PGA_WRITEABLE);
2245 KASSERT(l2b->l2b_occupancy == L2_PTE_NUM_TOTAL,
2246 ("pmap_remove_pages: l2_bucket occupancy error"));
2247 pmap_free_l2_bucket(pmap, l2b, L2_PTE_NUM_TOTAL);
2249 pmap->pm_stats.resident_count -= L2_PTE_NUM_TOTAL;
2253 KASSERT(l2b != NULL,
2254 ("No L2 bucket in pmap_remove_pages"));
2255 ptep = &l2b->l2b_kva[l2pte_index(va)];
2256 m = PHYS_TO_VM_PAGE(l2pte_pa(*ptep));
2257 KASSERT((vm_offset_t)m >= KERNBASE,
2258 ("Trying to access non-existent page "
2259 "va %x pte %x", va, *ptep));
2260 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2261 if (TAILQ_EMPTY(&m->md.pv_list) &&
2262 (m->flags & PG_FICTITIOUS) == 0) {
2263 pvh = pa_to_pvh(l2pte_pa(*ptep));
2264 if (TAILQ_EMPTY(&pvh->pv_list))
2265 vm_page_aflag_clear(m, PGA_WRITEABLE);
2269 pmap_free_l2_bucket(pmap, l2b, 1);
2270 pmap->pm_stats.resident_count--;
2274 PV_STAT(pv_entry_frees++);
2275 PV_STAT(pv_entry_spare++);
2277 pc->pc_map[field] |= bitmask;
2281 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2282 pmap_free_pv_chunk(pc);
2287 rw_wunlock(&pvh_global_lock);
2294 /***************************************************
2295 * Low level mapping routines.....
2296 ***************************************************/
2298 #ifdef ARM_HAVE_SUPERSECTIONS
2299 /* Map a super section into the KVA. */
2302 pmap_kenter_supersection(vm_offset_t va, uint64_t pa, int flags)
2304 pd_entry_t pd = L1_S_PROTO | L1_S_SUPERSEC | (pa & L1_SUP_FRAME) |
2305 (((pa >> 32) & 0xf) << 20) | L1_S_PROT(PTE_KERNEL,
2306 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE) |
2307 L1_S_DOM(PMAP_DOMAIN_KERNEL);
2308 struct l1_ttable *l1;
2309 vm_offset_t va0, va_end;
2311 KASSERT(((va | pa) & L1_SUP_OFFSET) == 0,
2312 ("Not a valid super section mapping"));
2313 if (flags & SECTION_CACHE)
2314 pd |= pte_l1_s_cache_mode;
2315 else if (flags & SECTION_PT)
2316 pd |= pte_l1_s_cache_mode_pt;
2318 va0 = va & L1_SUP_FRAME;
2319 va_end = va + L1_SUP_SIZE;
2320 SLIST_FOREACH(l1, &l1_list, l1_link) {
2322 for (; va < va_end; va += L1_S_SIZE) {
2323 l1->l1_kva[L1_IDX(va)] = pd;
2324 PTE_SYNC(&l1->l1_kva[L1_IDX(va)]);
2330 /* Map a section into the KVA. */
2333 pmap_kenter_section(vm_offset_t va, vm_offset_t pa, int flags)
2335 pd_entry_t pd = L1_S_PROTO | pa | L1_S_PROT(PTE_KERNEL,
2336 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE) | L1_S_REF |
2337 L1_S_DOM(PMAP_DOMAIN_KERNEL);
2338 struct l1_ttable *l1;
2340 KASSERT(((va | pa) & L1_S_OFFSET) == 0,
2341 ("Not a valid section mapping"));
2342 if (flags & SECTION_CACHE)
2343 pd |= pte_l1_s_cache_mode;
2344 else if (flags & SECTION_PT)
2345 pd |= pte_l1_s_cache_mode_pt;
2347 SLIST_FOREACH(l1, &l1_list, l1_link) {
2348 l1->l1_kva[L1_IDX(va)] = pd;
2349 PTE_SYNC(&l1->l1_kva[L1_IDX(va)]);
2354 * Make a temporary mapping for a physical address. This is only intended
2355 * to be used for panic dumps.
2358 pmap_kenter_temp(vm_paddr_t pa, int i)
2362 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE);
2363 pmap_kenter(va, pa);
2364 return ((void *)crashdumpmap);
2368 * add a wired page to the kva
2369 * note that in order for the mapping to take effect -- you
2370 * should do a invltlb after doing the pmap_kenter...
2372 static PMAP_INLINE void
2373 pmap_kenter_internal(vm_offset_t va, vm_offset_t pa, int flags)
2375 struct l2_bucket *l2b;
2379 PDEBUG(1, printf("pmap_kenter: va = %08x, pa = %08x\n",
2380 (uint32_t) va, (uint32_t) pa));
2383 l2b = pmap_get_l2_bucket(pmap_kernel(), va);
2385 l2b = pmap_grow_l2_bucket(pmap_kernel(), va);
2386 KASSERT(l2b != NULL, ("No L2 Bucket"));
2388 ptep = &l2b->l2b_kva[l2pte_index(va)];
2390 if (l2pte_valid(opte)) {
2391 cpu_tlb_flushD_SE(va);
2395 l2b->l2b_occupancy++;
2398 if (flags & KENTER_CACHE) {
2399 *ptep = L2_S_PROTO | pa | pte_l2_s_cache_mode | L2_S_REF;
2400 pmap_set_prot(ptep, VM_PROT_READ | VM_PROT_WRITE,
2401 flags & KENTER_USER);
2403 *ptep = L2_S_PROTO | pa | L2_S_REF;
2404 pmap_set_prot(ptep, VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE,
2408 PDEBUG(1, printf("pmap_kenter: pte = %08x, opte = %08x, npte = %08x\n",
2409 (uint32_t) ptep, opte, *ptep));
2415 pmap_kenter(vm_offset_t va, vm_paddr_t pa)
2417 pmap_kenter_internal(va, pa, KENTER_CACHE);
2421 pmap_kenter_nocache(vm_offset_t va, vm_paddr_t pa)
2424 pmap_kenter_internal(va, pa, 0);
2428 pmap_kenter_user(vm_offset_t va, vm_paddr_t pa)
2431 pmap_kenter_internal(va, pa, KENTER_CACHE|KENTER_USER);
2433 * Call pmap_fault_fixup now, to make sure we'll have no exception
2434 * at the first use of the new address, or bad things will happen,
2435 * as we use one of these addresses in the exception handlers.
2437 pmap_fault_fixup(pmap_kernel(), va, VM_PROT_READ|VM_PROT_WRITE, 1);
2441 pmap_kextract(vm_offset_t va)
2444 return (pmap_extract_locked(kernel_pmap, va));
2448 * remove a page from the kernel pagetables
2451 pmap_kremove(vm_offset_t va)
2453 struct l2_bucket *l2b;
2454 pt_entry_t *ptep, opte;
2456 l2b = pmap_get_l2_bucket(pmap_kernel(), va);
2459 KASSERT(l2b != NULL, ("No L2 Bucket"));
2460 ptep = &l2b->l2b_kva[l2pte_index(va)];
2462 if (l2pte_valid(opte)) {
2463 va = va & ~PAGE_MASK;
2464 cpu_tlb_flushD_SE(va);
2473 * Used to map a range of physical addresses into kernel
2474 * virtual address space.
2476 * The value passed in '*virt' is a suggested virtual address for
2477 * the mapping. Architectures which can support a direct-mapped
2478 * physical to virtual region can return the appropriate address
2479 * within that region, leaving '*virt' unchanged. Other
2480 * architectures should map the pages starting at '*virt' and
2481 * update '*virt' with the first usable address after the mapped
2485 pmap_map(vm_offset_t *virt, vm_offset_t start, vm_offset_t end, int prot)
2487 vm_offset_t sva = *virt;
2488 vm_offset_t va = sva;
2490 PDEBUG(1, printf("pmap_map: virt = %08x, start = %08x, end = %08x, "
2491 "prot = %d\n", (uint32_t) *virt, (uint32_t) start, (uint32_t) end,
2494 while (start < end) {
2495 pmap_kenter(va, start);
2504 * Add a list of wired pages to the kva
2505 * this routine is only used for temporary
2506 * kernel mappings that do not need to have
2507 * page modification or references recorded.
2508 * Note that old mappings are simply written
2509 * over. The page *must* be wired.
2512 pmap_qenter(vm_offset_t va, vm_page_t *m, int count)
2516 for (i = 0; i < count; i++) {
2517 pmap_kenter_internal(va, VM_PAGE_TO_PHYS(m[i]),
2525 * this routine jerks page mappings from the
2526 * kernel -- it is meant only for temporary mappings.
2529 pmap_qremove(vm_offset_t va, int count)
2533 for (i = 0; i < count; i++) {
2543 * pmap_object_init_pt preloads the ptes for a given object
2544 * into the specified pmap. This eliminates the blast of soft
2545 * faults on process startup and immediately after an mmap.
2548 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
2549 vm_pindex_t pindex, vm_size_t size)
2552 VM_OBJECT_ASSERT_WLOCKED(object);
2553 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
2554 ("pmap_object_init_pt: non-device object"));
2559 * pmap_is_prefaultable:
2561 * Return whether or not the specified virtual address is elgible
2565 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
2570 if (!pmap_get_pde_pte(pmap, addr, &pdep, &ptep))
2572 KASSERT((pdep != NULL && (l1pte_section_p(*pdep) || ptep != NULL)),
2573 ("Valid mapping but no pte ?"));
2574 if (*pdep != 0 && !l1pte_section_p(*pdep))
2581 * Fetch pointers to the PDE/PTE for the given pmap/VA pair.
2582 * Returns TRUE if the mapping exists, else FALSE.
2584 * NOTE: This function is only used by a couple of arm-specific modules.
2585 * It is not safe to take any pmap locks here, since we could be right
2586 * in the middle of debugging the pmap anyway...
2588 * It is possible for this routine to return FALSE even though a valid
2589 * mapping does exist. This is because we don't lock, so the metadata
2590 * state may be inconsistent.
2592 * NOTE: We can return a NULL *ptp in the case where the L1 pde is
2593 * a "section" mapping.
2596 pmap_get_pde_pte(pmap_t pmap, vm_offset_t va, pd_entry_t **pdp,
2599 struct l2_dtable *l2;
2600 pd_entry_t *pl1pd, l1pd;
2604 if (pmap->pm_l1 == NULL)
2608 *pdp = pl1pd = &pmap->pm_l1->l1_kva[l1idx];
2611 if (l1pte_section_p(l1pd)) {
2616 if (pmap->pm_l2 == NULL)
2619 l2 = pmap->pm_l2[L2_IDX(l1idx)];
2622 (ptep = l2->l2_bucket[L2_BUCKET(l1idx)].l2b_kva) == NULL) {
2626 *ptp = &ptep[l2pte_index(va)];
2631 * Routine: pmap_remove_all
2633 * Removes this physical page from
2634 * all physical maps in which it resides.
2635 * Reflects back modify bits to the pager.
2638 * Original versions of this routine were very
2639 * inefficient because they iteratively called
2640 * pmap_remove (slow...)
2643 pmap_remove_all(vm_page_t m)
2645 struct md_page *pvh;
2649 struct l2_bucket *l2b;
2650 boolean_t flush = FALSE;
2654 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2655 ("pmap_remove_all: page %p is not managed", m));
2656 rw_wlock(&pvh_global_lock);
2657 if ((m->flags & PG_FICTITIOUS) != 0)
2658 goto small_mappings;
2659 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
2660 while ((pv = TAILQ_FIRST(&pvh->pv_list)) != NULL) {
2664 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(pv->pv_va)];
2665 KASSERT((*pl1pd & L1_TYPE_MASK) == L1_S_PROTO,
2666 ("pmap_remove_all: valid section mapping expected"));
2667 (void)pmap_demote_section(pmap, pv->pv_va);
2671 curpmap = vmspace_pmap(curproc->p_vmspace);
2672 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2674 if (flush == FALSE && (pmap == curpmap ||
2675 pmap == pmap_kernel()))
2679 l2b = pmap_get_l2_bucket(pmap, pv->pv_va);
2680 KASSERT(l2b != NULL, ("No l2 bucket"));
2681 ptep = &l2b->l2b_kva[l2pte_index(pv->pv_va)];
2682 is_exec |= PTE_BEEN_EXECD(*ptep);
2684 if (pmap_is_current(pmap))
2686 pmap_free_l2_bucket(pmap, l2b, 1);
2687 pmap->pm_stats.resident_count--;
2688 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2689 if (pv->pv_flags & PVF_WIRED)
2690 pmap->pm_stats.wired_count--;
2691 pmap_free_pv_entry(pmap, pv);
2701 vm_page_aflag_clear(m, PGA_WRITEABLE);
2702 rw_wunlock(&pvh_global_lock);
2706 pmap_change_attr(vm_offset_t sva, vm_size_t len, int mode)
2708 vm_offset_t base, offset, tmpva;
2710 struct l2_bucket *l2b;
2711 pt_entry_t *ptep, pte;
2712 vm_offset_t next_bucket;
2714 PMAP_LOCK(kernel_pmap);
2716 base = trunc_page(sva);
2717 offset = sva & PAGE_MASK;
2718 size = roundup(offset + len, PAGE_SIZE);
2722 * Only supported on kernel virtual addresses, including the direct
2723 * map but excluding the recursive map.
2725 if (base < DMAP_MIN_ADDRESS) {
2726 PMAP_UNLOCK(kernel_pmap);
2730 for (tmpva = base; tmpva < base + size; ) {
2731 next_bucket = L2_NEXT_BUCKET(tmpva);
2732 if (next_bucket > base + size)
2733 next_bucket = base + size;
2735 l2b = pmap_get_l2_bucket(kernel_pmap, tmpva);
2737 tmpva = next_bucket;
2741 ptep = &l2b->l2b_kva[l2pte_index(tmpva)];
2744 PMAP_UNLOCK(kernel_pmap);
2748 pte = *ptep &~ L2_S_CACHE_MASK;
2749 cpu_idcache_wbinv_range(tmpva, PAGE_SIZE);
2750 pmap_l2cache_wbinv_range(tmpva, pte & L2_S_FRAME, PAGE_SIZE);
2752 cpu_tlb_flushID_SE(tmpva);
2754 dprintf("%s: for va:%x ptep:%x pte:%x\n",
2755 __func__, tmpva, (uint32_t)ptep, pte);
2759 PMAP_UNLOCK(kernel_pmap);
2765 * Set the physical protection on the
2766 * specified range of this map as requested.
2769 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2771 struct l2_bucket *l2b;
2772 struct md_page *pvh;
2773 struct pv_entry *pve;
2774 pd_entry_t *pl1pd, l1pd;
2775 pt_entry_t *ptep, pte;
2776 vm_offset_t next_bucket;
2777 u_int is_exec, is_refd;
2780 if ((prot & VM_PROT_READ) == 0) {
2781 pmap_remove(pmap, sva, eva);
2785 if (prot & VM_PROT_WRITE) {
2787 * If this is a read->write transition, just ignore it and let
2788 * vm_fault() take care of it later.
2793 rw_wlock(&pvh_global_lock);
2797 * OK, at this point, we know we're doing write-protect operation.
2798 * If the pmap is active, write-back the range.
2801 flush = ((eva - sva) >= (PAGE_SIZE * 4)) ? 0 : -1;
2802 is_exec = is_refd = 0;
2805 next_bucket = L2_NEXT_BUCKET(sva);
2807 * Check for large page.
2809 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(sva)];
2811 if ((l1pd & L1_TYPE_MASK) == L1_S_PROTO) {
2812 KASSERT(pmap != pmap_kernel(),
2813 ("pmap_protect: trying to modify "
2814 "kernel section protections"));
2816 * Are we protecting the entire large page? If not,
2817 * demote the mapping and fall through.
2819 if (sva + L1_S_SIZE == L2_NEXT_BUCKET(sva) &&
2820 eva >= L2_NEXT_BUCKET(sva)) {
2821 l1pd &= ~(L1_S_PROT_MASK | L1_S_XN);
2822 if (!(prot & VM_PROT_EXECUTE))
2825 * At this point we are always setting
2826 * write-protect bit.
2829 /* All managed superpages are user pages. */
2830 l1pd |= L1_S_PROT_U;
2833 pvh = pa_to_pvh(l1pd & L1_S_FRAME);
2834 pve = pmap_find_pv(pvh, pmap,
2836 pve->pv_flags &= ~PVF_WRITE;
2839 } else if (!pmap_demote_section(pmap, sva)) {
2840 /* The large page mapping was destroyed. */
2845 if (next_bucket > eva)
2847 l2b = pmap_get_l2_bucket(pmap, sva);
2853 ptep = &l2b->l2b_kva[l2pte_index(sva)];
2855 while (sva < next_bucket) {
2856 if ((pte = *ptep) != 0 && L2_S_WRITABLE(pte)) {
2859 m = PHYS_TO_VM_PAGE(l2pte_pa(pte));
2860 pmap_set_prot(ptep, prot,
2861 !(pmap == pmap_kernel()));
2864 pmap_modify_pv(m, pmap, sva, PVF_WRITE, 0);
2868 is_exec |= PTE_BEEN_EXECD(pte);
2869 is_refd |= PTE_BEEN_REFD(pte);
2871 if (PTE_BEEN_EXECD(pte))
2872 cpu_tlb_flushID_SE(sva);
2873 else if (PTE_BEEN_REFD(pte))
2874 cpu_tlb_flushD_SE(sva);
2891 rw_wunlock(&pvh_global_lock);
2898 * Insert the given physical page (p) at
2899 * the specified virtual address (v) in the
2900 * target physical map with the protection requested.
2902 * If specified, the page will be wired down, meaning
2903 * that the related pte can not be reclaimed.
2905 * NB: This is the only routine which MAY NOT lazy-evaluate
2906 * or lose information. That is, this routine must actually
2907 * insert this page into the given map NOW.
2911 pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m,
2912 vm_prot_t prot, boolean_t wired)
2915 rw_wlock(&pvh_global_lock);
2917 pmap_enter_locked(pmap, va, access, m, prot, wired, M_WAITOK);
2919 rw_wunlock(&pvh_global_lock);
2923 * The pvh global and pmap locks must be held.
2926 pmap_enter_locked(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m,
2927 vm_prot_t prot, boolean_t wired, int flags)
2929 struct l2_bucket *l2b = NULL;
2931 struct pv_entry *pve = NULL;
2932 pd_entry_t *pl1pd, l1pd;
2933 pt_entry_t *ptep, npte, opte;
2935 u_int is_exec, is_refd;
2939 PMAP_ASSERT_LOCKED(pmap);
2940 rw_assert(&pvh_global_lock, RA_WLOCKED);
2941 if (va == vector_page) {
2942 pa = systempage.pv_pa;
2945 KASSERT((m->oflags & VPO_UNMANAGED) != 0 ||
2946 vm_page_xbusied(m) || (flags & M_NOWAIT) != 0,
2947 ("pmap_enter_locked: page %p is not busy", m));
2948 pa = VM_PAGE_TO_PHYS(m);
2951 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(va)];
2952 if ((*pl1pd & L1_TYPE_MASK) == L1_S_PROTO)
2953 panic("pmap_enter_locked: attempt pmap_enter_on 1MB page");
2957 * Make sure userland mappings get the right permissions
2959 if (pmap != pmap_kernel() && va != vector_page)
2964 if (prot & VM_PROT_WRITE)
2965 nflags |= PVF_WRITE;
2967 nflags |= PVF_WIRED;
2969 PDEBUG(1, printf("pmap_enter: pmap = %08x, va = %08x, m = %08x, "
2970 "prot = %x, wired = %x\n", (uint32_t) pmap, va, (uint32_t) m,
2973 if (pmap == pmap_kernel()) {
2974 l2b = pmap_get_l2_bucket(pmap, va);
2976 l2b = pmap_grow_l2_bucket(pmap, va);
2979 l2b = pmap_alloc_l2_bucket(pmap, va);
2981 if (flags & M_WAITOK) {
2983 rw_wunlock(&pvh_global_lock);
2985 rw_wlock(&pvh_global_lock);
2993 ptep = &l2b->l2b_kva[l2pte_index(va)];
2997 is_exec = is_refd = 0;
3000 if (l2pte_pa(opte) == pa) {
3002 * We're changing the attrs of an existing mapping.
3005 pmap_modify_pv(m, pmap, va,
3006 PVF_WRITE | PVF_WIRED, nflags);
3007 is_exec |= PTE_BEEN_EXECD(opte);
3008 is_refd |= PTE_BEEN_REFD(opte);
3011 if ((om = PHYS_TO_VM_PAGE(l2pte_pa(opte)))) {
3013 * Replacing an existing mapping with a new one.
3014 * It is part of our managed memory so we
3015 * must remove it from the PV list
3017 if ((pve = pmap_remove_pv(om, pmap, va))) {
3018 is_exec |= PTE_BEEN_EXECD(opte);
3019 is_refd |= PTE_BEEN_REFD(opte);
3021 if (m && ((m->oflags & VPO_UNMANAGED)))
3022 pmap_free_pv_entry(pmap, pve);
3028 * Keep the stats up to date
3030 l2b->l2b_occupancy++;
3031 pmap->pm_stats.resident_count++;
3035 * Enter on the PV list if part of our managed memory.
3037 if ((m && !(m->oflags & VPO_UNMANAGED))) {
3038 if ((!pve) && (pve = pmap_get_pv_entry(pmap, FALSE)) == NULL)
3039 panic("pmap_enter: no pv entries");
3041 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva,
3042 ("pmap_enter: managed mapping within the clean submap"));
3043 KASSERT(pve != NULL, ("No pv"));
3044 pmap_enter_pv(m, pve, pmap, va, nflags);
3048 /* Make the new PTE valid */
3053 /* Set defaults first - kernel read access */
3055 npte |= L2_S_PROT_R;
3056 /* Set "referenced" flag */
3059 /* Now tune APs as desired */
3061 npte |= L2_S_PROT_U;
3063 * If this is not a vector_page
3064 * then continue setting mapping parameters
3067 if (prot & (VM_PROT_ALL)) {
3068 if ((m->oflags & VPO_UNMANAGED) == 0)
3069 vm_page_aflag_set(m, PGA_REFERENCED);
3072 * Need to do page referenced emulation.
3077 if (prot & VM_PROT_WRITE) {
3079 * Enable write permission if the access type
3080 * indicates write intention. Emulate modified
3083 if ((access & VM_PROT_WRITE) != 0)
3086 if ((m->oflags & VPO_UNMANAGED) == 0) {
3087 vm_page_aflag_set(m, PGA_WRITEABLE);
3089 * The access type and permissions indicate
3090 * that the page will be written as soon as
3091 * returned from fault service.
3092 * Mark it dirty from the outset.
3094 if ((access & VM_PROT_WRITE) != 0)
3098 if (!(prot & VM_PROT_EXECUTE))
3101 if (m->md.pv_memattr != VM_MEMATTR_UNCACHEABLE)
3102 npte |= pte_l2_s_cache_mode;
3105 CTR5(KTR_PMAP,"enter: pmap:%p va:%x prot:%x pte:%x->%x",
3106 pmap, va, prot, opte, npte);
3108 * If this is just a wiring change, the two PTEs will be
3109 * identical, so there's no need to update the page table.
3112 boolean_t is_cached = pmap_is_current(pmap);
3118 * We only need to frob the cache/tlb if this pmap
3121 if (L1_IDX(va) != L1_IDX(vector_page) &&
3122 l2pte_valid(npte)) {
3124 * This mapping is likely to be accessed as
3125 * soon as we return to userland. Fix up the
3126 * L1 entry to avoid taking another
3127 * page/domain fault.
3129 l1pd = l2b->l2b_phys |
3130 L1_C_DOM(pmap->pm_domain) | L1_C_PROTO;
3131 if (*pl1pd != l1pd) {
3139 cpu_tlb_flushID_SE(va);
3141 cpu_tlb_flushD_SE(va);
3144 if ((pmap != pmap_kernel()) && (pmap == &curproc->p_vmspace->vm_pmap))
3145 cpu_icache_sync_range(va, PAGE_SIZE);
3147 * If both the l2b_occupancy and the reservation are fully
3148 * populated, then attempt promotion.
3150 if ((l2b->l2b_occupancy == L2_PTE_NUM_TOTAL) &&
3151 sp_enabled && (m->flags & PG_FICTITIOUS) == 0 &&
3152 vm_reserv_level_iffullpop(m) == 0)
3153 pmap_promote_section(pmap, va);
3157 * Maps a sequence of resident pages belonging to the same object.
3158 * The sequence begins with the given page m_start. This page is
3159 * mapped at the given virtual address start. Each subsequent page is
3160 * mapped at a virtual address that is offset from start by the same
3161 * amount as the page is offset from m_start within the object. The
3162 * last page in the sequence is the page with the largest offset from
3163 * m_start that can be mapped at a virtual address less than the given
3164 * virtual address end. Not every virtual page between start and end
3165 * is mapped; only those for which a resident page exists with the
3166 * corresponding offset from m_start are mapped.
3169 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
3170 vm_page_t m_start, vm_prot_t prot)
3174 vm_pindex_t diff, psize;
3177 VM_OBJECT_ASSERT_LOCKED(m_start->object);
3179 psize = atop(end - start);
3181 access = prot = prot & (VM_PROT_READ | VM_PROT_EXECUTE);
3182 rw_wlock(&pvh_global_lock);
3184 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
3185 va = start + ptoa(diff);
3186 if ((va & L1_S_OFFSET) == 0 && L2_NEXT_BUCKET(va) <= end &&
3187 (VM_PAGE_TO_PHYS(m) & L1_S_OFFSET) == 0 &&
3188 sp_enabled && vm_reserv_level_iffullpop(m) == 0 &&
3189 pmap_enter_section(pmap, va, m, prot))
3190 m = &m[L1_S_SIZE / PAGE_SIZE - 1];
3192 pmap_enter_locked(pmap, va, access, m, prot,
3194 m = TAILQ_NEXT(m, listq);
3197 rw_wunlock(&pvh_global_lock);
3201 * this code makes some *MAJOR* assumptions:
3202 * 1. Current pmap & pmap exists.
3205 * 4. No page table pages.
3206 * but is *MUCH* faster than pmap_enter...
3210 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3214 access = prot = prot & (VM_PROT_READ | VM_PROT_EXECUTE);
3215 rw_wlock(&pvh_global_lock);
3217 pmap_enter_locked(pmap, va, access, m, prot, FALSE, M_NOWAIT);
3219 rw_wunlock(&pvh_global_lock);
3223 * Routine: pmap_change_wiring
3224 * Function: Change the wiring attribute for a map/virtual-address
3226 * In/out conditions:
3227 * The mapping must already exist in the pmap.
3230 pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired)
3232 struct l2_bucket *l2b;
3233 struct md_page *pvh;
3234 struct pv_entry *pve;
3235 pd_entry_t *pl1pd, l1pd;
3236 pt_entry_t *ptep, pte;
3239 rw_wlock(&pvh_global_lock);
3241 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(va)];
3243 if ((l1pd & L1_TYPE_MASK) == L1_S_PROTO) {
3244 m = PHYS_TO_VM_PAGE(l1pd & L1_S_FRAME);
3245 KASSERT((m != NULL) && ((m->oflags & VPO_UNMANAGED) == 0),
3246 ("pmap_change_wiring: unmanaged superpage should not "
3248 KASSERT(pmap != pmap_kernel(),
3249 ("pmap_change_wiring: managed kernel superpage "
3250 "should not exist"));
3251 pvh = pa_to_pvh(l1pd & L1_S_FRAME);
3252 pve = pmap_find_pv(pvh, pmap, trunc_1mpage(va));
3253 if (!wired != ((pve->pv_flags & PVF_WIRED) == 0)) {
3254 if (!pmap_demote_section(pmap, va))
3255 panic("pmap_change_wiring: demotion failed");
3259 l2b = pmap_get_l2_bucket(pmap, va);
3260 KASSERT(l2b, ("No l2b bucket in pmap_change_wiring"));
3261 ptep = &l2b->l2b_kva[l2pte_index(va)];
3263 m = PHYS_TO_VM_PAGE(l2pte_pa(pte));
3265 pmap_modify_pv(m, pmap, va, PVF_WIRED,
3266 wired == TRUE ? PVF_WIRED : 0);
3268 rw_wunlock(&pvh_global_lock);
3274 * Copy the range specified by src_addr/len
3275 * from the source map to the range dst_addr/len
3276 * in the destination map.
3278 * This routine is only advisory and need not do anything.
3281 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr,
3282 vm_size_t len, vm_offset_t src_addr)
3288 * Routine: pmap_extract
3290 * Extract the physical page address associated
3291 * with the given map/virtual_address pair.
3294 pmap_extract(pmap_t pmap, vm_offset_t va)
3299 pa = pmap_extract_locked(pmap, va);
3305 pmap_extract_locked(pmap_t pmap, vm_offset_t va)
3307 struct l2_dtable *l2;
3309 pt_entry_t *ptep, pte;
3313 if (pmap != kernel_pmap)
3314 PMAP_ASSERT_LOCKED(pmap);
3316 l1pd = pmap->pm_l1->l1_kva[l1idx];
3317 if (l1pte_section_p(l1pd)) {
3319 * These should only happen for the kernel pmap.
3321 KASSERT(pmap == kernel_pmap, ("unexpected section"));
3322 /* XXX: what to do about the bits > 32 ? */
3323 if (l1pd & L1_S_SUPERSEC)
3324 pa = (l1pd & L1_SUP_FRAME) | (va & L1_SUP_OFFSET);
3326 pa = (l1pd & L1_S_FRAME) | (va & L1_S_OFFSET);
3329 * Note that we can't rely on the validity of the L1
3330 * descriptor as an indication that a mapping exists.
3331 * We have to look it up in the L2 dtable.
3333 l2 = pmap->pm_l2[L2_IDX(l1idx)];
3335 (ptep = l2->l2_bucket[L2_BUCKET(l1idx)].l2b_kva) == NULL)
3337 pte = ptep[l2pte_index(va)];
3340 switch (pte & L2_TYPE_MASK) {
3342 pa = (pte & L2_L_FRAME) | (va & L2_L_OFFSET);
3345 pa = (pte & L2_S_FRAME) | (va & L2_S_OFFSET);
3353 * Atomically extract and hold the physical page with the given
3354 * pmap and virtual address pair if that mapping permits the given
3359 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
3361 struct l2_dtable *l2;
3363 pt_entry_t *ptep, pte;
3364 vm_paddr_t pa, paddr;
3372 l1pd = pmap->pm_l1->l1_kva[l1idx];
3373 if (l1pte_section_p(l1pd)) {
3374 /* XXX: what to do about the bits > 32 ? */
3375 if (l1pd & L1_S_SUPERSEC)
3376 pa = (l1pd & L1_SUP_FRAME) | (va & L1_SUP_OFFSET);
3378 pa = (l1pd & L1_S_FRAME) | (va & L1_S_OFFSET);
3379 if (vm_page_pa_tryrelock(pmap, pa & PG_FRAME, &paddr))
3381 if (L1_S_WRITABLE(l1pd) || (prot & VM_PROT_WRITE) == 0) {
3382 m = PHYS_TO_VM_PAGE(pa);
3387 * Note that we can't rely on the validity of the L1
3388 * descriptor as an indication that a mapping exists.
3389 * We have to look it up in the L2 dtable.
3391 l2 = pmap->pm_l2[L2_IDX(l1idx)];
3394 (ptep = l2->l2_bucket[L2_BUCKET(l1idx)].l2b_kva) == NULL) {
3399 ptep = &ptep[l2pte_index(va)];
3405 } else if ((prot & VM_PROT_WRITE) && (pte & L2_APX)) {
3409 switch (pte & L2_TYPE_MASK) {
3411 panic("extract and hold section mapping");
3414 pa = (pte & L2_S_FRAME) | (va & L2_S_OFFSET);
3417 if (vm_page_pa_tryrelock(pmap, pa & PG_FRAME, &paddr))
3419 m = PHYS_TO_VM_PAGE(pa);
3426 PA_UNLOCK_COND(paddr);
3431 * Initialize a preallocated and zeroed pmap structure,
3432 * such as one in a vmspace structure.
3436 pmap_pinit(pmap_t pmap)
3438 PDEBUG(1, printf("pmap_pinit: pmap = %08x\n", (uint32_t) pmap));
3440 pmap_alloc_l1(pmap);
3441 bzero(pmap->pm_l2, sizeof(pmap->pm_l2));
3443 CPU_ZERO(&pmap->pm_active);
3445 TAILQ_INIT(&pmap->pm_pvchunk);
3446 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
3447 pmap->pm_stats.resident_count = 1;
3448 if (vector_page < KERNBASE) {
3449 pmap_enter(pmap, vector_page,
3450 VM_PROT_READ, PHYS_TO_VM_PAGE(systempage.pv_pa),
3457 /***************************************************
3458 * Superpage management routines.
3459 ***************************************************/
3461 static PMAP_INLINE struct pv_entry *
3462 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
3466 rw_assert(&pvh_global_lock, RA_WLOCKED);
3468 pv = pmap_find_pv(pvh, pmap, va);
3470 TAILQ_REMOVE(&pvh->pv_list, pv, pv_list);
3476 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
3480 pv = pmap_pvh_remove(pvh, pmap, va);
3481 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found"));
3482 pmap_free_pv_entry(pmap, pv);
3486 pmap_pv_insert_section(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
3488 struct md_page *pvh;
3491 rw_assert(&pvh_global_lock, RA_WLOCKED);
3492 if (pv_entry_count < pv_entry_high_water &&
3493 (pv = pmap_get_pv_entry(pmap, TRUE)) != NULL) {
3495 pvh = pa_to_pvh(pa);
3496 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_list);
3503 * Create the pv entries for each of the pages within a superpage.
3506 pmap_pv_demote_section(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
3508 struct md_page *pvh;
3510 vm_offset_t va_last;
3513 rw_assert(&pvh_global_lock, RA_WLOCKED);
3514 KASSERT((pa & L1_S_OFFSET) == 0,
3515 ("pmap_pv_demote_section: pa is not 1mpage aligned"));
3518 * Transfer the 1mpage's pv entry for this mapping to the first
3521 pvh = pa_to_pvh(pa);
3522 va = trunc_1mpage(va);
3523 pv = pmap_pvh_remove(pvh, pmap, va);
3524 KASSERT(pv != NULL, ("pmap_pv_demote_section: pv not found"));
3525 m = PHYS_TO_VM_PAGE(pa);
3526 TAILQ_INSERT_HEAD(&m->md.pv_list, pv, pv_list);
3527 /* Instantiate the remaining pv entries. */
3528 va_last = L2_NEXT_BUCKET(va) - PAGE_SIZE;
3531 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3532 ("pmap_pv_demote_section: page %p is not managed", m));
3534 pve = pmap_get_pv_entry(pmap, FALSE);
3535 pmap_enter_pv(m, pve, pmap, va, pv->pv_flags);
3536 } while (va < va_last);
3540 pmap_pv_promote_section(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
3542 struct md_page *pvh;
3544 vm_offset_t va_last;
3547 rw_assert(&pvh_global_lock, RA_WLOCKED);
3548 KASSERT((pa & L1_S_OFFSET) == 0,
3549 ("pmap_pv_promote_section: pa is not 1mpage aligned"));
3552 * Transfer the first page's pv entry for this mapping to the
3553 * 1mpage's pv list. Aside from avoiding the cost of a call
3554 * to get_pv_entry(), a transfer avoids the possibility that
3555 * get_pv_entry() calls pmap_pv_reclaim() and that pmap_pv_reclaim()
3556 * removes one of the mappings that is being promoted.
3558 m = PHYS_TO_VM_PAGE(pa);
3559 va = trunc_1mpage(va);
3560 pv = pmap_pvh_remove(&m->md, pmap, va);
3561 KASSERT(pv != NULL, ("pmap_pv_promote_section: pv not found"));
3562 pvh = pa_to_pvh(pa);
3563 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_list);
3564 /* Free the remaining pv entries in the newly mapped section pages */
3565 va_last = L2_NEXT_BUCKET(va) - PAGE_SIZE;
3570 * Don't care the flags, first pv contains sufficient
3571 * information for all of the pages so nothing is really lost.
3573 pmap_pvh_free(&m->md, pmap, va);
3574 } while (va < va_last);
3578 * Tries to create a 1MB page mapping. Returns TRUE if successful and
3579 * FALSE otherwise. Fails if (1) page is unmanageg, kernel pmap or vectors
3580 * page, (2) a mapping already exists at the specified virtual address, or
3581 * (3) a pv entry cannot be allocated without reclaiming another pv entry.
3584 pmap_enter_section(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3588 struct l2_bucket *l2b;
3590 rw_assert(&pvh_global_lock, RA_WLOCKED);
3591 PMAP_ASSERT_LOCKED(pmap);
3593 /* Skip kernel, vectors page and unmanaged mappings */
3594 if ((pmap == pmap_kernel()) || (L1_IDX(va) == L1_IDX(vector_page)) ||
3595 ((m->oflags & VPO_UNMANAGED) != 0)) {
3596 CTR2(KTR_PMAP, "pmap_enter_section: failure for va %#lx"
3597 " in pmap %p", va, pmap);
3601 * Check whether this is a valid section superpage entry or
3602 * there is a l2_bucket associated with that L1 page directory.
3604 va = trunc_1mpage(va);
3605 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(va)];
3606 l2b = pmap_get_l2_bucket(pmap, va);
3607 if ((*pl1pd & L1_S_PROTO) || (l2b != NULL)) {
3608 CTR2(KTR_PMAP, "pmap_enter_section: failure for va %#lx"
3609 " in pmap %p", va, pmap);
3612 pa = VM_PAGE_TO_PHYS(m);
3614 * Abort this mapping if its PV entry could not be created.
3616 if (!pmap_pv_insert_section(pmap, va, VM_PAGE_TO_PHYS(m))) {
3617 CTR2(KTR_PMAP, "pmap_enter_section: failure for va %#lx"
3618 " in pmap %p", va, pmap);
3622 * Increment counters.
3624 pmap->pm_stats.resident_count += L2_PTE_NUM_TOTAL;
3626 * Despite permissions, mark the superpage read-only.
3628 prot &= ~VM_PROT_WRITE;
3630 * Map the superpage.
3632 pmap_map_section(pmap, va, pa, prot, FALSE);
3634 pmap_section_mappings++;
3635 CTR2(KTR_PMAP, "pmap_enter_section: success for va %#lx"
3636 " in pmap %p", va, pmap);
3641 * pmap_remove_section: do the things to unmap a superpage in a process
3644 pmap_remove_section(pmap_t pmap, vm_offset_t sva)
3646 struct md_page *pvh;
3647 struct l2_bucket *l2b;
3648 pd_entry_t *pl1pd, l1pd;
3649 vm_offset_t eva, va;
3652 PMAP_ASSERT_LOCKED(pmap);
3653 if ((pmap == pmap_kernel()) || (L1_IDX(sva) == L1_IDX(vector_page)))
3656 KASSERT((sva & L1_S_OFFSET) == 0,
3657 ("pmap_remove_section: sva is not 1mpage aligned"));
3659 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(sva)];
3662 m = PHYS_TO_VM_PAGE(l1pd & L1_S_FRAME);
3663 KASSERT((m != NULL && ((m->oflags & VPO_UNMANAGED) == 0)),
3664 ("pmap_remove_section: no corresponding vm_page or "
3667 pmap->pm_stats.resident_count -= L2_PTE_NUM_TOTAL;
3668 pvh = pa_to_pvh(l1pd & L1_S_FRAME);
3669 pmap_pvh_free(pvh, pmap, sva);
3670 eva = L2_NEXT_BUCKET(sva);
3671 for (va = sva, m = PHYS_TO_VM_PAGE(l1pd & L1_S_FRAME);
3672 va < eva; va += PAGE_SIZE, m++) {
3674 * Mark base pages referenced but skip marking them dirty.
3675 * If the superpage is writeable, hence all base pages were
3676 * already marked as dirty in pmap_fault_fixup() before
3677 * promotion. Reference bit however, might not have been set
3678 * for each base page when the superpage was created at once,
3679 * not as a result of promotion.
3681 if (L1_S_REFERENCED(l1pd))
3682 vm_page_aflag_set(m, PGA_REFERENCED);
3683 if (TAILQ_EMPTY(&m->md.pv_list) &&
3684 TAILQ_EMPTY(&pvh->pv_list))
3685 vm_page_aflag_clear(m, PGA_WRITEABLE);
3688 l2b = pmap_get_l2_bucket(pmap, sva);
3690 KASSERT(l2b->l2b_occupancy == L2_PTE_NUM_TOTAL,
3691 ("pmap_remove_section: l2_bucket occupancy error"));
3692 pmap_free_l2_bucket(pmap, l2b, L2_PTE_NUM_TOTAL);
3694 * Now invalidate L1 slot as it was not invalidated in
3695 * pmap_free_l2_bucket() due to L1_TYPE mismatch.
3703 * Tries to promote the 256, contiguous 4KB page mappings that are
3704 * within a single l2_bucket to a single 1MB section mapping.
3705 * For promotion to occur, two conditions must be met: (1) the 4KB page
3706 * mappings must map aligned, contiguous physical memory and (2) the 4KB page
3707 * mappings must have identical characteristics.
3710 pmap_promote_section(pmap_t pmap, vm_offset_t va)
3712 pt_entry_t *firstptep, firstpte, oldpte, pa, *pte;
3714 vm_offset_t first_va, old_va;
3715 struct l2_bucket *l2b = NULL;
3717 struct pv_entry *pve, *first_pve;
3719 PMAP_ASSERT_LOCKED(pmap);
3723 * Skip promoting kernel pages. This is justified by following:
3724 * 1. Kernel is already mapped using section mappings in each pmap
3725 * 2. Managed mappings within the kernel are not to be promoted anyway
3727 if (pmap == pmap_kernel()) {
3728 pmap_section_p_failures++;
3729 CTR2(KTR_PMAP, "pmap_promote_section: failure for va %#x"
3730 " in pmap %p", va, pmap);
3733 /* Do not attemp to promote vectors pages */
3734 if (L1_IDX(va) == L1_IDX(vector_page)) {
3735 pmap_section_p_failures++;
3736 CTR2(KTR_PMAP, "pmap_promote_section: failure for va %#x"
3737 " in pmap %p", va, pmap);
3741 * Examine the first PTE in the specified l2_bucket. Abort if this PTE
3742 * is either invalid, unused, or does not map the first 4KB physical
3743 * page within 1MB page.
3745 first_va = trunc_1mpage(va);
3746 l2b = pmap_get_l2_bucket(pmap, first_va);
3747 KASSERT(l2b != NULL, ("pmap_promote_section: trying to promote "
3748 "not existing l2 bucket"));
3749 firstptep = &l2b->l2b_kva[0];
3751 firstpte = *firstptep;
3752 if ((l2pte_pa(firstpte) & L1_S_OFFSET) != 0) {
3753 pmap_section_p_failures++;
3754 CTR2(KTR_PMAP, "pmap_promote_section: failure for va %#x"
3755 " in pmap %p", va, pmap);
3759 if ((firstpte & (L2_S_PROTO | L2_S_REF)) != (L2_S_PROTO | L2_S_REF)) {
3760 pmap_section_p_failures++;
3761 CTR2(KTR_PMAP, "pmap_promote_section: failure for va %#x"
3762 " in pmap %p", va, pmap);
3766 * ARM uses pv_entry to mark particular mapping WIRED so don't promote
3767 * unmanaged pages since it is impossible to determine, whether the
3768 * page is wired or not if there is no corresponding pv_entry.
3770 m = PHYS_TO_VM_PAGE(l2pte_pa(firstpte));
3771 if (m && ((m->oflags & VPO_UNMANAGED) != 0)) {
3772 pmap_section_p_failures++;
3773 CTR2(KTR_PMAP, "pmap_promote_section: failure for va %#x"
3774 " in pmap %p", va, pmap);
3777 first_pve = pmap_find_pv(&m->md, pmap, first_va);
3779 * PTE is modified only on write due to modified bit
3780 * emulation. If the entry is referenced and writable
3781 * then it is modified and we don't clear write enable.
3782 * Otherwise, writing is disabled in PTE anyway and
3783 * we just configure protections for the section mapping
3784 * that is going to be created.
3786 if (!L2_S_WRITABLE(firstpte) && (first_pve->pv_flags & PVF_WRITE)) {
3787 first_pve->pv_flags &= ~PVF_WRITE;
3788 prot &= ~VM_PROT_WRITE;
3791 if (!L2_S_EXECUTABLE(firstpte))
3792 prot &= ~VM_PROT_EXECUTE;
3795 * Examine each of the other PTEs in the specified l2_bucket.
3796 * Abort if this PTE maps an unexpected 4KB physical page or
3797 * does not have identical characteristics to the first PTE.
3799 pa = l2pte_pa(firstpte) + ((L2_PTE_NUM_TOTAL - 1) * PAGE_SIZE);
3800 old_va = L2_NEXT_BUCKET(first_va) - PAGE_SIZE;
3802 for (pte = (firstptep + L2_PTE_NUM_TOTAL - 1); pte > firstptep; pte--) {
3804 if (l2pte_pa(oldpte) != pa) {
3805 pmap_section_p_failures++;
3806 CTR2(KTR_PMAP, "pmap_promote_section: failure for "
3807 "va %#x in pmap %p", va, pmap);
3810 if ((oldpte & L2_S_PROMOTE) != (firstpte & L2_S_PROMOTE)) {
3811 pmap_section_p_failures++;
3812 CTR2(KTR_PMAP, "pmap_promote_section: failure for "
3813 "va %#x in pmap %p", va, pmap);
3816 oldm = PHYS_TO_VM_PAGE(l2pte_pa(oldpte));
3817 if (oldm && ((oldm->oflags & VPO_UNMANAGED) != 0)) {
3818 pmap_section_p_failures++;
3819 CTR2(KTR_PMAP, "pmap_promote_section: failure for "
3820 "va %#x in pmap %p", va, pmap);
3824 pve = pmap_find_pv(&oldm->md, pmap, old_va);
3826 pmap_section_p_failures++;
3827 CTR2(KTR_PMAP, "pmap_promote_section: failure for "
3828 "va %#x old_va %x - no pve", va, old_va);
3832 if (!L2_S_WRITABLE(oldpte) && (pve->pv_flags & PVF_WRITE))
3833 pve->pv_flags &= ~PVF_WRITE;
3835 old_va -= PAGE_SIZE;
3839 * Promote the pv entries.
3841 pmap_pv_promote_section(pmap, first_va, l2pte_pa(firstpte));
3843 * Map the superpage.
3845 pmap_map_section(pmap, first_va, l2pte_pa(firstpte), prot, TRUE);
3846 pmap_section_promotions++;
3847 CTR2(KTR_PMAP, "pmap_promote_section: success for va %#x"
3848 " in pmap %p", first_va, pmap);
3852 * Fills a l2_bucket with mappings to consecutive physical pages.
3855 pmap_fill_l2b(struct l2_bucket *l2b, pt_entry_t newpte)
3860 for (i = 0; i < L2_PTE_NUM_TOTAL; i++) {
3861 ptep = &l2b->l2b_kva[i];
3865 newpte += PAGE_SIZE;
3868 l2b->l2b_occupancy = L2_PTE_NUM_TOTAL;
3872 * Tries to demote a 1MB section mapping. If demotion fails, the
3873 * 1MB section mapping is invalidated.
3876 pmap_demote_section(pmap_t pmap, vm_offset_t va)
3878 struct l2_bucket *l2b;
3879 struct pv_entry *l1pdpve;
3880 struct md_page *pvh;
3881 pd_entry_t *pl1pd, l1pd;
3882 pt_entry_t *firstptep, newpte;
3886 PMAP_ASSERT_LOCKED(pmap);
3888 * According to assumptions described in pmap_promote_section,
3889 * kernel is and always should be mapped using 1MB section mappings.
3890 * What more, managed kernel pages were not to be promoted.
3892 KASSERT(pmap != pmap_kernel() && L1_IDX(va) != L1_IDX(vector_page),
3893 ("pmap_demote_section: forbidden section mapping"));
3895 va = trunc_1mpage(va);
3896 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(va)];
3898 KASSERT((l1pd & L1_TYPE_MASK) == L1_S_PROTO,
3899 ("pmap_demote_section: not section or invalid section"));
3901 pa = l1pd & L1_S_FRAME;
3902 m = PHYS_TO_VM_PAGE(pa);
3903 KASSERT((m != NULL && (m->oflags & VPO_UNMANAGED) == 0),
3904 ("pmap_demote_section: no vm_page for selected superpage or"
3907 pvh = pa_to_pvh(pa);
3908 l1pdpve = pmap_find_pv(pvh, pmap, va);
3909 KASSERT(l1pdpve != NULL, ("pmap_demote_section: no pv entry for "
3912 l2b = pmap_get_l2_bucket(pmap, va);
3914 KASSERT((l1pdpve->pv_flags & PVF_WIRED) == 0,
3915 ("pmap_demote_section: No l2_bucket for wired mapping"));
3917 * Invalidate the 1MB section mapping and return
3918 * "failure" if the mapping was never accessed or the
3919 * allocation of the new l2_bucket fails.
3921 if (!L1_S_REFERENCED(l1pd) ||
3922 (l2b = pmap_alloc_l2_bucket(pmap, va)) == NULL) {
3923 /* Unmap and invalidate superpage. */
3924 pmap_remove_section(pmap, trunc_1mpage(va));
3925 CTR2(KTR_PMAP, "pmap_demote_section: failure for "
3926 "va %#x in pmap %p", va, pmap);
3932 * Now we should have corresponding l2_bucket available.
3933 * Let's process it to recreate 256 PTEs for each base page
3936 newpte = pa | L1_S_DEMOTE(l1pd);
3937 if (m->md.pv_memattr != VM_MEMATTR_UNCACHEABLE)
3938 newpte |= pte_l2_s_cache_mode;
3941 * If the l2_bucket is new, initialize it.
3943 if (l2b->l2b_occupancy == 0)
3944 pmap_fill_l2b(l2b, newpte);
3946 firstptep = &l2b->l2b_kva[0];
3947 KASSERT(l2pte_pa(*firstptep) == (pa),
3948 ("pmap_demote_section: firstpte and newpte map different "
3949 "physical addresses"));
3951 * If the mapping has changed attributes, update the page table
3954 if ((*firstptep & L2_S_PROMOTE) != (L1_S_DEMOTE(l1pd)))
3955 pmap_fill_l2b(l2b, newpte);
3957 /* Demote PV entry */
3958 pmap_pv_demote_section(pmap, va, pa);
3961 l1pd = l2b->l2b_phys | L1_C_DOM(pmap->pm_domain) | L1_C_PROTO;
3965 pmap_section_demotions++;
3966 CTR2(KTR_PMAP, "pmap_demote_section: success for va %#x"
3967 " in pmap %p", va, pmap);
3971 /***************************************************
3972 * page management routines.
3973 ***************************************************/
3976 * We are in a serious low memory condition. Resort to
3977 * drastic measures to free some pages so we can allocate
3978 * another pv entry chunk.
3981 pmap_pv_reclaim(pmap_t locked_pmap)
3984 struct pv_chunk *pc;
3985 struct l2_bucket *l2b = NULL;
3991 vm_page_t free, m, m_pc;
3993 int bit, field, freed, idx;
3995 PMAP_ASSERT_LOCKED(locked_pmap);
3998 TAILQ_INIT(&newtail);
3999 while ((pc = TAILQ_FIRST(&pv_chunks)) != NULL && (pv_vafree == 0 ||
4001 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
4002 if (pmap != pc->pc_pmap) {
4006 if (pmap != locked_pmap)
4010 /* Avoid deadlock and lock recursion. */
4011 if (pmap > locked_pmap)
4013 else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap)) {
4015 TAILQ_INSERT_TAIL(&newtail, pc, pc_lru);
4021 * Destroy every non-wired, 4 KB page mapping in the chunk.
4024 for (field = 0; field < _NPCM; field++) {
4025 for (inuse = ~pc->pc_map[field] & pc_freemask[field];
4026 inuse != 0; inuse &= ~(1UL << bit)) {
4027 bit = ffs(inuse) - 1;
4028 idx = field * sizeof(inuse) * NBBY + bit;
4029 pv = &pc->pc_pventry[idx];
4032 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(va)];
4033 if ((*pl1pd & L1_TYPE_MASK) == L1_S_PROTO)
4035 if (pv->pv_flags & PVF_WIRED)
4038 l2b = pmap_get_l2_bucket(pmap, va);
4039 KASSERT(l2b != NULL, ("No l2 bucket"));
4040 ptep = &l2b->l2b_kva[l2pte_index(va)];
4041 m = PHYS_TO_VM_PAGE(l2pte_pa(*ptep));
4042 KASSERT((vm_offset_t)m >= KERNBASE,
4043 ("Trying to access non-existent page "
4044 "va %x pte %x", va, *ptep));
4047 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
4048 if (TAILQ_EMPTY(&m->md.pv_list))
4049 vm_page_aflag_clear(m, PGA_WRITEABLE);
4050 pc->pc_map[field] |= 1UL << bit;
4056 TAILQ_INSERT_TAIL(&newtail, pc, pc_lru);
4059 /* Every freed mapping is for a 4 KB page. */
4060 pmap->pm_stats.resident_count -= freed;
4061 PV_STAT(pv_entry_frees += freed);
4062 PV_STAT(pv_entry_spare += freed);
4063 pv_entry_count -= freed;
4064 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
4065 for (field = 0; field < _NPCM; field++)
4066 if (pc->pc_map[field] != pc_freemask[field]) {
4067 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc,
4069 TAILQ_INSERT_TAIL(&newtail, pc, pc_lru);
4072 * One freed pv entry in locked_pmap is
4075 if (pmap == locked_pmap)
4079 if (field == _NPCM) {
4080 PV_STAT(pv_entry_spare -= _NPCPV);
4081 PV_STAT(pc_chunk_count--);
4082 PV_STAT(pc_chunk_frees++);
4083 /* Entire chunk is free; return it. */
4084 m_pc = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc));
4085 pmap_qremove((vm_offset_t)pc, 1);
4086 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc);
4091 TAILQ_CONCAT(&pv_chunks, &newtail, pc_lru);
4095 if (pmap != locked_pmap)
4102 * free the pv_entry back to the free list
4105 pmap_free_pv_entry(pmap_t pmap, pv_entry_t pv)
4107 struct pv_chunk *pc;
4108 int bit, field, idx;
4110 rw_assert(&pvh_global_lock, RA_WLOCKED);
4111 PMAP_ASSERT_LOCKED(pmap);
4112 PV_STAT(pv_entry_frees++);
4113 PV_STAT(pv_entry_spare++);
4115 pc = pv_to_chunk(pv);
4116 idx = pv - &pc->pc_pventry[0];
4117 field = idx / (sizeof(u_long) * NBBY);
4118 bit = idx % (sizeof(u_long) * NBBY);
4119 pc->pc_map[field] |= 1ul << bit;
4120 for (idx = 0; idx < _NPCM; idx++)
4121 if (pc->pc_map[idx] != pc_freemask[idx]) {
4123 * 98% of the time, pc is already at the head of the
4124 * list. If it isn't already, move it to the head.
4126 if (__predict_false(TAILQ_FIRST(&pmap->pm_pvchunk) !=
4128 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
4129 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc,
4134 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
4135 pmap_free_pv_chunk(pc);
4139 pmap_free_pv_chunk(struct pv_chunk *pc)
4143 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
4144 PV_STAT(pv_entry_spare -= _NPCPV);
4145 PV_STAT(pc_chunk_count--);
4146 PV_STAT(pc_chunk_frees++);
4147 /* entire chunk is free, return it */
4148 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc));
4149 pmap_qremove((vm_offset_t)pc, 1);
4150 vm_page_unwire(m, 0);
4152 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc);
4157 pmap_get_pv_entry(pmap_t pmap, boolean_t try)
4159 static const struct timeval printinterval = { 60, 0 };
4160 static struct timeval lastprint;
4161 struct pv_chunk *pc;
4164 int bit, field, idx;
4166 rw_assert(&pvh_global_lock, RA_WLOCKED);
4167 PMAP_ASSERT_LOCKED(pmap);
4168 PV_STAT(pv_entry_allocs++);
4171 if (pv_entry_count > pv_entry_high_water)
4172 if (ratecheck(&lastprint, &printinterval))
4173 printf("%s: Approaching the limit on PV entries.\n",
4176 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
4178 for (field = 0; field < _NPCM; field++) {
4179 if (pc->pc_map[field]) {
4180 bit = ffs(pc->pc_map[field]) - 1;
4184 if (field < _NPCM) {
4185 idx = field * sizeof(pc->pc_map[field]) * NBBY + bit;
4186 pv = &pc->pc_pventry[idx];
4187 pc->pc_map[field] &= ~(1ul << bit);
4188 /* If this was the last item, move it to tail */
4189 for (field = 0; field < _NPCM; field++)
4190 if (pc->pc_map[field] != 0) {
4191 PV_STAT(pv_entry_spare--);
4192 return (pv); /* not full, return */
4194 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
4195 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
4196 PV_STAT(pv_entry_spare--);
4201 * Access to the ptelist "pv_vafree" is synchronized by the pvh
4202 * global lock. If "pv_vafree" is currently non-empty, it will
4203 * remain non-empty until pmap_ptelist_alloc() completes.
4205 if (pv_vafree == 0 || (m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
4206 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) == NULL) {
4209 PV_STAT(pc_chunk_tryfail++);
4212 m = pmap_pv_reclaim(pmap);
4216 PV_STAT(pc_chunk_count++);
4217 PV_STAT(pc_chunk_allocs++);
4218 pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree);
4219 pmap_qenter((vm_offset_t)pc, &m, 1);
4221 pc->pc_map[0] = pc_freemask[0] & ~1ul; /* preallocated bit 0 */
4222 for (field = 1; field < _NPCM; field++)
4223 pc->pc_map[field] = pc_freemask[field];
4224 TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru);
4225 pv = &pc->pc_pventry[0];
4226 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
4227 PV_STAT(pv_entry_spare += _NPCPV - 1);
4232 * Remove the given range of addresses from the specified map.
4234 * It is assumed that the start and end are properly
4235 * rounded to the page size.
4237 #define PMAP_REMOVE_CLEAN_LIST_SIZE 3
4239 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
4241 struct l2_bucket *l2b;
4242 vm_offset_t next_bucket;
4243 pd_entry_t *pl1pd, l1pd;
4246 u_int mappings, is_exec, is_refd;
4251 * we lock in the pmap => pv_head direction
4254 rw_wlock(&pvh_global_lock);
4259 * Check for large page.
4261 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(sva)];
4263 if ((l1pd & L1_TYPE_MASK) == L1_S_PROTO) {
4264 KASSERT((l1pd & L1_S_DOM_MASK) !=
4265 L1_S_DOM(PMAP_DOMAIN_KERNEL), ("pmap_remove: "
4266 "Trying to remove kernel section mapping"));
4268 * Are we removing the entire large page? If not,
4269 * demote the mapping and fall through.
4271 if (sva + L1_S_SIZE == L2_NEXT_BUCKET(sva) &&
4272 eva >= L2_NEXT_BUCKET(sva)) {
4273 pmap_remove_section(pmap, sva);
4274 sva = L2_NEXT_BUCKET(sva);
4276 } else if (!pmap_demote_section(pmap, sva)) {
4277 /* The large page mapping was destroyed. */
4278 sva = L2_NEXT_BUCKET(sva);
4283 * Do one L2 bucket's worth at a time.
4285 next_bucket = L2_NEXT_BUCKET(sva);
4286 if (next_bucket > eva)
4289 l2b = pmap_get_l2_bucket(pmap, sva);
4295 ptep = &l2b->l2b_kva[l2pte_index(sva)];
4298 while (sva < next_bucket) {
4307 * Nothing here, move along
4314 pmap->pm_stats.resident_count--;
4320 * Update flags. In a number of circumstances,
4321 * we could cluster a lot of these and do a
4322 * number of sequential pages in one go.
4324 if ((m = PHYS_TO_VM_PAGE(pa)) != NULL) {
4325 struct pv_entry *pve;
4327 pve = pmap_remove_pv(m, pmap, sva);
4329 is_exec = PTE_BEEN_EXECD(pte);
4330 is_refd = PTE_BEEN_REFD(pte);
4331 pmap_free_pv_entry(pmap, pve);
4335 if (pmap_is_current(pmap)) {
4337 if (total < PMAP_REMOVE_CLEAN_LIST_SIZE) {
4339 cpu_tlb_flushID_SE(sva);
4341 cpu_tlb_flushD_SE(sva);
4342 } else if (total == PMAP_REMOVE_CLEAN_LIST_SIZE)
4353 pmap_free_l2_bucket(pmap, l2b, mappings);
4356 rw_wunlock(&pvh_global_lock);
4365 * Zero a given physical page by mapping it at a page hook point.
4366 * In doing the zero page op, the page we zero is mapped cachable, as with
4367 * StrongARM accesses to non-cached pages are non-burst making writing
4368 * _any_ bulk data very slow.
4371 pmap_zero_page_gen(vm_page_t m, int off, int size)
4374 vm_paddr_t phys = VM_PAGE_TO_PHYS(m);
4375 if (!TAILQ_EMPTY(&m->md.pv_list))
4376 panic("pmap_zero_page: page has mappings");
4380 * Hook in the page, zero it, invalidate the TLB as needed.
4382 * Note the temporary zero-page mapping must be a non-cached page in
4383 * order to work without corruption when write-allocate is enabled.
4385 *cdst_pte = L2_S_PROTO | phys | pte_l2_s_cache_mode | L2_S_REF;
4386 pmap_set_prot(cdst_pte, VM_PROT_WRITE, 0);
4388 cpu_tlb_flushD_SE(cdstp);
4390 if (off || size != PAGE_SIZE)
4391 bzero((void *)(cdstp + off), size);
4396 * Although aliasing is not possible if we use
4397 * cdstp temporary mappings with memory that
4398 * will be mapped later as non-cached or with write-through
4399 * caches we might end up overwriting it when calling wbinv_all
4400 * So make sure caches are clean after copy operation
4402 cpu_idcache_wbinv_range(cdstp, size);
4403 pmap_l2cache_wbinv_range(cdstp, phys, size);
4409 * pmap_zero_page zeros the specified hardware page by mapping
4410 * the page into KVM and using bzero to clear its contents.
4413 pmap_zero_page(vm_page_t m)
4415 pmap_zero_page_gen(m, 0, PAGE_SIZE);
4420 * pmap_zero_page_area zeros the specified hardware page by mapping
4421 * the page into KVM and using bzero to clear its contents.
4423 * off and size may not cover an area beyond a single hardware page.
4426 pmap_zero_page_area(vm_page_t m, int off, int size)
4429 pmap_zero_page_gen(m, off, size);
4434 * pmap_zero_page_idle zeros the specified hardware page by mapping
4435 * the page into KVM and using bzero to clear its contents. This
4436 * is intended to be called from the vm_pagezero process only and
4440 pmap_zero_page_idle(vm_page_t m)
4447 * pmap_copy_page copies the specified (machine independent)
4448 * page by mapping the page into virtual memory and using
4449 * bcopy to copy the page, one machine dependent page at a
4456 * Copy one physical page into another, by mapping the pages into
4457 * hook points. The same comment regarding cachability as in
4458 * pmap_zero_page also applies here.
4461 pmap_copy_page_generic(vm_paddr_t src, vm_paddr_t dst)
4464 * Hold the source page's lock for the duration of the copy
4465 * so that no other mappings can be created while we have a
4466 * potentially aliased mapping.
4467 * Map the pages into the page hook points, copy them, and purge
4468 * the cache for the appropriate page. Invalidate the TLB
4473 /* For ARMv6 using System bit is deprecated and mapping with AP
4474 * bits set to 0x0 makes page not accessible. csrc_pte is mapped
4475 * read/write until proper mapping defines are created for ARMv6.
4477 *csrc_pte = L2_S_PROTO | src | pte_l2_s_cache_mode | L2_S_REF;
4478 pmap_set_prot(csrc_pte, VM_PROT_READ, 0);
4481 *cdst_pte = L2_S_PROTO | dst | pte_l2_s_cache_mode | L2_S_REF;
4482 pmap_set_prot(cdst_pte, VM_PROT_READ | VM_PROT_WRITE, 0);
4485 cpu_tlb_flushD_SE(csrcp);
4486 cpu_tlb_flushD_SE(cdstp);
4490 * Although aliasing is not possible if we use
4491 * cdstp temporary mappings with memory that
4492 * will be mapped later as non-cached or with write-through
4493 * caches we might end up overwriting it when calling wbinv_all
4494 * So make sure caches are clean after copy operation
4496 bcopy_page(csrcp, cdstp);
4498 cpu_idcache_wbinv_range(cdstp, PAGE_SIZE);
4499 pmap_l2cache_wbinv_range(cdstp, dst, PAGE_SIZE);
4504 int unmapped_buf_allowed = 1;
4507 pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[],
4508 vm_offset_t b_offset, int xfersize)
4510 vm_page_t a_pg, b_pg;
4511 vm_offset_t a_pg_offset, b_pg_offset;
4515 while (xfersize > 0) {
4516 a_pg = ma[a_offset >> PAGE_SHIFT];
4517 a_pg_offset = a_offset & PAGE_MASK;
4518 cnt = min(xfersize, PAGE_SIZE - a_pg_offset);
4519 b_pg = mb[b_offset >> PAGE_SHIFT];
4520 b_pg_offset = b_offset & PAGE_MASK;
4521 cnt = min(cnt, PAGE_SIZE - b_pg_offset);
4522 *csrc_pte = L2_S_PROTO | VM_PAGE_TO_PHYS(a_pg) |
4523 pte_l2_s_cache_mode | L2_S_REF;
4524 pmap_set_prot(csrc_pte, VM_PROT_READ, 0);
4526 *cdst_pte = L2_S_PROTO | VM_PAGE_TO_PHYS(b_pg) |
4527 pte_l2_s_cache_mode | L2_S_REF;
4528 pmap_set_prot(cdst_pte, VM_PROT_READ | VM_PROT_WRITE, 0);
4530 cpu_tlb_flushD_SE(csrcp);
4531 cpu_tlb_flushD_SE(cdstp);
4533 bcopy((char *)csrcp + a_pg_offset, (char *)cdstp + b_pg_offset,
4535 cpu_idcache_wbinv_range(cdstp + b_pg_offset, cnt);
4536 pmap_l2cache_wbinv_range(cdstp + b_pg_offset,
4537 VM_PAGE_TO_PHYS(b_pg) + b_pg_offset, cnt);
4546 pmap_copy_page(vm_page_t src, vm_page_t dst)
4549 if (_arm_memcpy && PAGE_SIZE >= _min_memcpy_size &&
4550 _arm_memcpy((void *)VM_PAGE_TO_PHYS(dst),
4551 (void *)VM_PAGE_TO_PHYS(src), PAGE_SIZE, IS_PHYSICAL) == 0)
4554 pmap_copy_page_generic(VM_PAGE_TO_PHYS(src), VM_PAGE_TO_PHYS(dst));
4558 * this routine returns true if a physical page resides
4559 * in the given pmap.
4562 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
4564 struct md_page *pvh;
4569 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4570 ("pmap_page_exists_quick: page %p is not managed", m));
4572 rw_wlock(&pvh_global_lock);
4573 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
4574 if (PV_PMAP(pv) == pmap) {
4582 if (!rv && loops < 16 && (m->flags & PG_FICTITIOUS) == 0) {
4583 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4584 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
4585 if (PV_PMAP(pv) == pmap) {
4594 rw_wunlock(&pvh_global_lock);
4599 * pmap_page_wired_mappings:
4601 * Return the number of managed mappings to the given physical page
4605 pmap_page_wired_mappings(vm_page_t m)
4610 if ((m->oflags & VPO_UNMANAGED) != 0)
4612 rw_wlock(&pvh_global_lock);
4613 count = pmap_pvh_wired_mappings(&m->md, count);
4614 if ((m->flags & PG_FICTITIOUS) == 0) {
4615 count = pmap_pvh_wired_mappings(pa_to_pvh(VM_PAGE_TO_PHYS(m)),
4618 rw_wunlock(&pvh_global_lock);
4623 * pmap_pvh_wired_mappings:
4625 * Return the updated number "count" of managed mappings that are wired.
4628 pmap_pvh_wired_mappings(struct md_page *pvh, int count)
4632 rw_assert(&pvh_global_lock, RA_WLOCKED);
4633 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
4634 if ((pv->pv_flags & PVF_WIRED) != 0)
4641 * Returns TRUE if any of the given mappings were referenced and FALSE
4642 * otherwise. Both page and section mappings are supported.
4645 pmap_is_referenced_pvh(struct md_page *pvh)
4647 struct l2_bucket *l2b;
4654 rw_assert(&pvh_global_lock, RA_WLOCKED);
4656 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
4659 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(pv->pv_va)];
4660 if ((*pl1pd & L1_TYPE_MASK) == L1_S_PROTO)
4661 rv = L1_S_REFERENCED(*pl1pd);
4663 l2b = pmap_get_l2_bucket(pmap, pv->pv_va);
4664 ptep = &l2b->l2b_kva[l2pte_index(pv->pv_va)];
4665 rv = L2_S_REFERENCED(*ptep);
4675 * pmap_is_referenced:
4677 * Return whether or not the specified physical page was referenced
4678 * in any physical maps.
4681 pmap_is_referenced(vm_page_t m)
4685 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4686 ("pmap_is_referenced: page %p is not managed", m));
4687 rw_wlock(&pvh_global_lock);
4688 rv = pmap_is_referenced_pvh(&m->md) ||
4689 ((m->flags & PG_FICTITIOUS) == 0 &&
4690 pmap_is_referenced_pvh(pa_to_pvh(VM_PAGE_TO_PHYS(m))));
4691 rw_wunlock(&pvh_global_lock);
4696 * pmap_ts_referenced:
4698 * Return the count of reference bits for a page, clearing all of them.
4701 pmap_ts_referenced(vm_page_t m)
4704 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4705 ("pmap_ts_referenced: page %p is not managed", m));
4706 return (pmap_clearbit(m, PVF_REF));
4710 * Returns TRUE if any of the given mappings were used to modify
4711 * physical memory. Otherwise, returns FALSE. Both page and 1MB section
4712 * mappings are supported.
4715 pmap_is_modified_pvh(struct md_page *pvh)
4718 struct l2_bucket *l2b;
4724 rw_assert(&pvh_global_lock, RA_WLOCKED);
4727 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
4730 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(pv->pv_va)];
4731 if ((*pl1pd & L1_TYPE_MASK) == L1_S_PROTO)
4732 rv = L1_S_WRITABLE(*pl1pd);
4734 l2b = pmap_get_l2_bucket(pmap, pv->pv_va);
4735 ptep = &l2b->l2b_kva[l2pte_index(pv->pv_va)];
4736 rv = L2_S_WRITABLE(*ptep);
4747 pmap_is_modified(vm_page_t m)
4751 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4752 ("pmap_is_modified: page %p is not managed", m));
4754 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
4755 * concurrently set while the object is locked. Thus, if PGA_WRITEABLE
4756 * is clear, no PTEs can have APX cleared.
4758 VM_OBJECT_ASSERT_WLOCKED(m->object);
4759 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
4761 rw_wlock(&pvh_global_lock);
4762 rv = pmap_is_modified_pvh(&m->md) ||
4763 ((m->flags & PG_FICTITIOUS) == 0 &&
4764 pmap_is_modified_pvh(pa_to_pvh(VM_PAGE_TO_PHYS(m))));
4765 rw_wunlock(&pvh_global_lock);
4770 * Apply the given advice to the specified range of addresses within the
4771 * given pmap. Depending on the advice, clear the referenced and/or
4772 * modified flags in each mapping.
4775 pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice)
4777 struct l2_bucket *l2b;
4778 struct pv_entry *pve;
4779 pd_entry_t *pl1pd, l1pd;
4780 pt_entry_t *ptep, opte, pte;
4781 vm_offset_t next_bucket;
4784 if (advice != MADV_DONTNEED && advice != MADV_FREE)
4786 rw_wlock(&pvh_global_lock);
4788 for (; sva < eva; sva = next_bucket) {
4789 next_bucket = L2_NEXT_BUCKET(sva);
4790 if (next_bucket < sva)
4792 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(sva)];
4794 if ((l1pd & L1_TYPE_MASK) == L1_S_PROTO) {
4795 if (pmap == pmap_kernel())
4797 if (!pmap_demote_section(pmap, sva)) {
4799 * The large page mapping was destroyed.
4804 * Unless the page mappings are wired, remove the
4805 * mapping to a single page so that a subsequent
4806 * access may repromote. Since the underlying
4807 * l2_bucket is fully populated, this removal
4808 * never frees an entire l2_bucket.
4810 l2b = pmap_get_l2_bucket(pmap, sva);
4811 KASSERT(l2b != NULL,
4812 ("pmap_advise: no l2 bucket for "
4813 "va 0x%#x, pmap 0x%p", sva, pmap));
4814 ptep = &l2b->l2b_kva[l2pte_index(sva)];
4816 m = PHYS_TO_VM_PAGE(l2pte_pa(*ptep));
4818 ("pmap_advise: no vm_page for demoted superpage"));
4819 pve = pmap_find_pv(&m->md, pmap, sva);
4820 KASSERT(pve != NULL,
4821 ("pmap_advise: no PV entry for managed mapping"));
4822 if ((pve->pv_flags & PVF_WIRED) == 0) {
4823 pmap_free_l2_bucket(pmap, l2b, 1);
4824 pve = pmap_remove_pv(m, pmap, sva);
4825 pmap_free_pv_entry(pmap, pve);
4828 if (pmap_is_current(pmap)) {
4829 if (PTE_BEEN_EXECD(opte))
4830 cpu_tlb_flushID_SE(sva);
4831 else if (PTE_BEEN_REFD(opte))
4832 cpu_tlb_flushD_SE(sva);
4836 if (next_bucket > eva)
4838 l2b = pmap_get_l2_bucket(pmap, sva);
4841 for (ptep = &l2b->l2b_kva[l2pte_index(sva)];
4842 sva != next_bucket; ptep++, sva += PAGE_SIZE) {
4844 if ((opte & L2_S_PROTO) == 0)
4846 m = PHYS_TO_VM_PAGE(l2pte_pa(opte));
4847 if (m == NULL || (m->oflags & VPO_UNMANAGED) != 0)
4849 else if (L2_S_WRITABLE(opte)) {
4850 if (advice == MADV_DONTNEED) {
4852 * Don't need to mark the page
4853 * dirty as it was already marked as
4854 * such in pmap_fault_fixup() or
4855 * pmap_enter_locked().
4856 * Just clear the state.
4864 } else if (L2_S_REFERENCED(opte)) {
4870 if (pmap_is_current(pmap)) {
4871 if (PTE_BEEN_EXECD(opte))
4872 cpu_tlb_flushID_SE(sva);
4873 else if (PTE_BEEN_REFD(opte))
4874 cpu_tlb_flushD_SE(sva);
4878 rw_wunlock(&pvh_global_lock);
4883 * Clear the modify bits on the specified physical page.
4886 pmap_clear_modify(vm_page_t m)
4889 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4890 ("pmap_clear_modify: page %p is not managed", m));
4891 VM_OBJECT_ASSERT_WLOCKED(m->object);
4892 KASSERT(!vm_page_xbusied(m),
4893 ("pmap_clear_modify: page %p is exclusive busied", m));
4896 * If the page is not PGA_WRITEABLE, then no mappings can be modified.
4897 * If the object containing the page is locked and the page is not
4898 * exclusive busied, then PGA_WRITEABLE cannot be concurrently set.
4900 if ((m->aflags & PGA_WRITEABLE) == 0)
4902 if (pmap_is_modified(m))
4903 pmap_clearbit(m, PVF_MOD);
4908 * Clear the write and modified bits in each of the given page's mappings.
4911 pmap_remove_write(vm_page_t m)
4913 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4914 ("pmap_remove_write: page %p is not managed", m));
4917 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
4918 * set by another thread while the object is locked. Thus,
4919 * if PGA_WRITEABLE is clear, no page table entries need updating.
4921 VM_OBJECT_ASSERT_WLOCKED(m->object);
4922 if (vm_page_xbusied(m) || (m->aflags & PGA_WRITEABLE) != 0)
4923 pmap_clearbit(m, PVF_WRITE);
4928 * perform the pmap work for mincore
4931 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa)
4933 struct l2_bucket *l2b;
4934 pd_entry_t *pl1pd, l1pd;
4935 pt_entry_t *ptep, pte;
4943 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(addr)];
4945 if ((l1pd & L1_TYPE_MASK) == L1_S_PROTO) {
4946 pa = (l1pd & L1_S_FRAME);
4947 val = MINCORE_SUPER | MINCORE_INCORE;
4948 if (L1_S_WRITABLE(l1pd))
4949 val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
4951 m = PHYS_TO_VM_PAGE(pa);
4952 if (m != NULL && (m->oflags & VPO_UNMANAGED) == 0)
4955 if (L1_S_REFERENCED(l1pd))
4956 val |= MINCORE_REFERENCED |
4957 MINCORE_REFERENCED_OTHER;
4960 l2b = pmap_get_l2_bucket(pmap, addr);
4965 ptep = &l2b->l2b_kva[l2pte_index(addr)];
4967 if (!l2pte_valid(pte)) {
4971 val = MINCORE_INCORE;
4972 if (L2_S_WRITABLE(pte))
4973 val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
4976 m = PHYS_TO_VM_PAGE(pa);
4977 if (m != NULL && (m->oflags & VPO_UNMANAGED) == 0)
4980 if (L2_S_REFERENCED(pte))
4981 val |= MINCORE_REFERENCED |
4982 MINCORE_REFERENCED_OTHER;
4985 if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
4986 (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) && managed) {
4987 /* Ensure that "PHYS_TO_VM_PAGE(pa)->object" doesn't change. */
4988 if (vm_page_pa_tryrelock(pmap, pa, locked_pa))
4992 PA_UNLOCK_COND(*locked_pa);
4998 pmap_sync_icache(pmap_t pmap, vm_offset_t va, vm_size_t sz)
5003 * Increase the starting virtual address of the given mapping if a
5004 * different alignment might result in more superpage mappings.
5007 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
5008 vm_offset_t *addr, vm_size_t size)
5014 * Map a set of physical memory pages into the kernel virtual
5015 * address space. Return a pointer to where it is mapped. This
5016 * routine is intended to be used for mapping device memory,
5020 pmap_mapdev(vm_offset_t pa, vm_size_t size)
5022 vm_offset_t va, tmpva, offset;
5024 offset = pa & PAGE_MASK;
5025 size = roundup(size, PAGE_SIZE);
5029 va = kva_alloc(size);
5031 panic("pmap_mapdev: Couldn't alloc kernel virtual memory");
5032 for (tmpva = va; size > 0;) {
5033 pmap_kenter_internal(tmpva, pa, 0);
5039 return ((void *)(va + offset));
5045 * Create a single section mapping.
5048 pmap_map_section(pmap_t pmap, vm_offset_t va, vm_offset_t pa, vm_prot_t prot,
5051 pd_entry_t *pl1pd, l1pd;
5054 KASSERT(((va | pa) & L1_S_OFFSET) == 0,
5055 ("Not a valid section mapping"));
5057 fl = pte_l1_s_cache_mode;
5059 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(va)];
5060 l1pd = L1_S_PROTO | pa | L1_S_PROT(PTE_USER, prot) | fl |
5061 L1_S_DOM(pmap->pm_domain);
5063 /* Mark page referenced if this section is a result of a promotion. */
5076 * Link the L2 page table specified by l2pv.pv_pa into the L1
5077 * page table at the slot for "va".
5080 pmap_link_l2pt(vm_offset_t l1pt, vm_offset_t va, struct pv_addr *l2pv)
5082 pd_entry_t *pde = (pd_entry_t *) l1pt, proto;
5083 u_int slot = va >> L1_S_SHIFT;
5085 proto = L1_S_DOM(PMAP_DOMAIN_KERNEL) | L1_C_PROTO;
5087 #ifdef VERBOSE_INIT_ARM
5088 printf("pmap_link_l2pt: pa=0x%x va=0x%x\n", l2pv->pv_pa, l2pv->pv_va);
5091 pde[slot + 0] = proto | (l2pv->pv_pa + 0x000);
5092 PTE_SYNC(&pde[slot]);
5094 SLIST_INSERT_HEAD(&kernel_pt_list, l2pv, pv_list);
5101 * Create a single page mapping.
5104 pmap_map_entry(vm_offset_t l1pt, vm_offset_t va, vm_offset_t pa, int prot,
5107 pd_entry_t *pde = (pd_entry_t *) l1pt;
5111 KASSERT(((va | pa) & PAGE_MASK) == 0, ("ouin"));
5113 fl = l2s_mem_types[cache];
5115 if ((pde[va >> L1_S_SHIFT] & L1_TYPE_MASK) != L1_TYPE_C)
5116 panic("pmap_map_entry: no L2 table for VA 0x%08x", va);
5118 ptep = (pt_entry_t *)kernel_pt_lookup(pde[L1_IDX(va)] & L1_C_ADDR_MASK);
5121 panic("pmap_map_entry: can't find L2 table for VA 0x%08x", va);
5123 ptep[l2pte_index(va)] = L2_S_PROTO | pa | fl | L2_S_REF;
5124 pmap_set_prot(&ptep[l2pte_index(va)], prot, 0);
5125 PTE_SYNC(&ptep[l2pte_index(va)]);
5131 * Map a chunk of memory using the most efficient mappings
5132 * possible (section. large page, small page) into the
5133 * provided L1 and L2 tables at the specified virtual address.
5136 pmap_map_chunk(vm_offset_t l1pt, vm_offset_t va, vm_offset_t pa,
5137 vm_size_t size, int prot, int type)
5139 pd_entry_t *pde = (pd_entry_t *) l1pt;
5140 pt_entry_t *ptep, f1, f2s, f2l;
5144 resid = (size + (PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1);
5147 panic("pmap_map_chunk: no L1 table provided");
5149 #ifdef VERBOSE_INIT_ARM
5150 printf("pmap_map_chunk: pa=0x%x va=0x%x size=0x%x resid=0x%x "
5151 "prot=0x%x type=%d\n", pa, va, size, resid, prot, type);
5154 f1 = l1_mem_types[type];
5155 f2l = l2l_mem_types[type];
5156 f2s = l2s_mem_types[type];
5161 /* See if we can use a section mapping. */
5162 if (L1_S_MAPPABLE_P(va, pa, resid)) {
5163 #ifdef VERBOSE_INIT_ARM
5166 pde[va >> L1_S_SHIFT] = L1_S_PROTO | pa |
5167 L1_S_PROT(PTE_KERNEL, prot | VM_PROT_EXECUTE) |
5168 f1 | L1_S_DOM(PMAP_DOMAIN_KERNEL) | L1_S_REF;
5169 PTE_SYNC(&pde[va >> L1_S_SHIFT]);
5177 * Ok, we're going to use an L2 table. Make sure
5178 * one is actually in the corresponding L1 slot
5179 * for the current VA.
5181 if ((pde[va >> L1_S_SHIFT] & L1_TYPE_MASK) != L1_TYPE_C)
5182 panic("pmap_map_chunk: no L2 table for VA 0x%08x", va);
5184 ptep = (pt_entry_t *) kernel_pt_lookup(
5185 pde[L1_IDX(va)] & L1_C_ADDR_MASK);
5187 panic("pmap_map_chunk: can't find L2 table for VA"
5189 /* See if we can use a L2 large page mapping. */
5190 if (L2_L_MAPPABLE_P(va, pa, resid)) {
5191 #ifdef VERBOSE_INIT_ARM
5194 for (i = 0; i < 16; i++) {
5195 ptep[l2pte_index(va) + i] =
5197 L2_L_PROT(PTE_KERNEL, prot) | f2l;
5198 PTE_SYNC(&ptep[l2pte_index(va) + i]);
5206 /* Use a small page mapping. */
5207 #ifdef VERBOSE_INIT_ARM
5210 ptep[l2pte_index(va)] = L2_S_PROTO | pa | f2s | L2_S_REF;
5211 pmap_set_prot(&ptep[l2pte_index(va)], prot, 0);
5212 PTE_SYNC(&ptep[l2pte_index(va)]);
5217 #ifdef VERBOSE_INIT_ARM
5224 /********************** Static device map routines ***************************/
5226 static const struct pmap_devmap *pmap_devmap_table;
5229 * Register the devmap table. This is provided in case early console
5230 * initialization needs to register mappings created by bootstrap code
5231 * before pmap_devmap_bootstrap() is called.
5234 pmap_devmap_register(const struct pmap_devmap *table)
5237 pmap_devmap_table = table;
5241 * Map all of the static regions in the devmap table, and remember
5242 * the devmap table so other parts of the kernel can look up entries
5246 pmap_devmap_bootstrap(vm_offset_t l1pt, const struct pmap_devmap *table)
5250 pmap_devmap_table = table;
5252 for (i = 0; pmap_devmap_table[i].pd_size != 0; i++) {
5253 #ifdef VERBOSE_INIT_ARM
5254 printf("devmap: %08x -> %08x @ %08x\n",
5255 pmap_devmap_table[i].pd_pa,
5256 pmap_devmap_table[i].pd_pa +
5257 pmap_devmap_table[i].pd_size - 1,
5258 pmap_devmap_table[i].pd_va);
5260 pmap_map_chunk(l1pt, pmap_devmap_table[i].pd_va,
5261 pmap_devmap_table[i].pd_pa,
5262 pmap_devmap_table[i].pd_size,
5263 pmap_devmap_table[i].pd_prot,
5264 pmap_devmap_table[i].pd_cache);
5268 const struct pmap_devmap *
5269 pmap_devmap_find_pa(vm_paddr_t pa, vm_size_t size)
5273 if (pmap_devmap_table == NULL)
5276 for (i = 0; pmap_devmap_table[i].pd_size != 0; i++) {
5277 if (pa >= pmap_devmap_table[i].pd_pa &&
5278 pa + size <= pmap_devmap_table[i].pd_pa +
5279 pmap_devmap_table[i].pd_size)
5280 return (&pmap_devmap_table[i]);
5286 const struct pmap_devmap *
5287 pmap_devmap_find_va(vm_offset_t va, vm_size_t size)
5291 if (pmap_devmap_table == NULL)
5294 for (i = 0; pmap_devmap_table[i].pd_size != 0; i++) {
5295 if (va >= pmap_devmap_table[i].pd_va &&
5296 va + size <= pmap_devmap_table[i].pd_va +
5297 pmap_devmap_table[i].pd_size)
5298 return (&pmap_devmap_table[i]);
5305 pmap_dmap_iscurrent(pmap_t pmap)
5307 return(pmap_is_current(pmap));
5311 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
5314 * Remember the memattr in a field that gets used to set the appropriate
5315 * bits in the PTEs as mappings are established.
5317 m->md.pv_memattr = ma;
5320 * It appears that this function can only be called before any mappings
5321 * for the page are established on ARM. If this ever changes, this code
5322 * will need to walk the pv_list and make each of the existing mappings
5323 * uncacheable, being careful to sync caches and PTEs (and maybe
5324 * invalidate TLB?) for any current mapping it modifies.
5326 if (TAILQ_FIRST(&m->md.pv_list) != NULL)
5327 panic("Can't change memattr on page with existing mappings");