sys/boot/fdt/dts/exynos5250.dtsi

   1 /*-
   2  * Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com>
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  *
  26  * $FreeBSD$
  27  */
  28
  29 / {
  30         compatible = "samsung,exynos5250";
  31         #address-cells = <1>;
  32         #size-cells = <1>;
  33         interrupt-parent = <&GIC>;
  34
  35         Exynos5@0 {
  36                 #address-cells = <1>;
  37                 #size-cells = <1>;
  38                 compatible = "simple-bus";
  39                 ranges;
  40                 bus-frequency = <0>;
  41
  42                 GIC: interrupt-controller@10481000 {
  43                         compatible = "arm,gic";
  44                         reg =   < 0x10481000 0x1000 >,  /* Distributor Registers */
  45                                 < 0x10482000 0x2000 >;  /* CPU Interface Registers */
  46                         interrupt-controller;
  47                         #address-cells = <0>;
  48                         #interrupt-cells = <1>;
  49                 };
  50
  51                 mct {
  52                         compatible = "exynos,mct";
  53                         reg = < 0x101C0000 0x1000 >;
  54                         clock-frequency = <24000000>;
  55                 };
  56
  57                 generic_timer {
  58                         compatible = "arm,armv7-timer";
  59                         clock-frequency = <24000000>;
  60                 };
  61
  62                 pwm {
  63                         compatible = "samsung,s3c24x0-timer";
  64                         reg = <0x12DD0000 0x1000>;
  65                         interrupts = < 71 >;
  66                         interrupt-parent = <&GIC>;
  67                         clock-frequency = <24000000>;
  68                 };
  69
  70                 usb@12110000 {
  71                         compatible = "exynos,usb-ehci", "usb-ehci";
  72                         reg = <0x12110000 0x1000>, /* EHCI */
  73                               <0x12130000 0x1000>, /* EHCI host ctrl */
  74                               <0x10040000 0x1000>, /* Power */
  75                               <0x10050000 0x1000>, /* Sysreg */
  76                               <0x11400000 0x1000>; /* GPIO left */
  77                         interrupts = < 103 >;
  78                         interrupt-parent = <&GIC>;
  79                 };
  80
  81                 usb@12120000 {
  82                         compatible = "exynos,usb-ohci", "usb-ohci";
  83                         reg = <0x12120000 0x10000>;
  84                         interrupts = < 103 >;
  85                         interrupt-parent = <&GIC>;
  86                 };
  87
  88                 sdhci@12200000 {
  89                         compatible = "sdhci_generic";
  90                         reg = <0x12200000 0x1000>;
  91                         interrupts = <107>;
  92                         interrupt-parent = <&GIC>;
  93                         clock-frequency = <24000000>; /* TODO: verify freq */
  94                 };
  95
  96                 sdhci@12210000 {
  97                         compatible = "sdhci_generic";
  98                         reg = <0x12210000 0x1000>;
  99                         interrupts = <108>;
 100                         interrupt-parent = <&GIC>;
 101                         clock-frequency = <24000000>;
 102                 };
 103
 104                 sdhci@12220000 {
 105                         compatible = "sdhci_generic";
 106                         reg = <0x12220000 0x1000>;
 107                         interrupts = <109>;
 108                         interrupt-parent = <&GIC>;
 109                         clock-frequency = <24000000>;
 110                 };
 111
 112                 sdhci@12230000 {
 113                         compatible = "sdhci_generic";
 114                         reg = <0x12230000 0x1000>;
 115                         interrupts = <110>;
 116                         interrupt-parent = <&GIC>;
 117                         clock-frequency = <24000000>;
 118                 };
 119
 120                 serial0: serial@12C00000 {
 121                         compatible = "exynos";
 122                         reg = <0x12C00000 0x100>;
 123                         interrupts = < 83 >;
 124                         interrupt-parent = <&GIC>;
 125                         clock-frequency = < 100000000 >;
 126                         current-speed = <115200>;
 127                 };
 128
 129                 serial1: serial@12C10000 {
 130                         compatible = "exynos";
 131                         reg = <0x12C10000 0x100>;
 132                         interrupts = < 84 >;
 133                         interrupt-parent = <&GIC>;
 134                         clock-frequency = < 100000000 >;
 135                         current-speed = <115200>;
 136                 };
 137
 138                 serial2: serial@12C20000 {
 139                         compatible = "exynos";
 140                         reg = <0x12C20000 0x100>;
 141                         interrupts = < 85 >;
 142                         interrupt-parent = <&GIC>;
 143                         clock-frequency = < 100000000 >;
 144                         current-speed = <115200>;
 145                 };
 146
 147                 serial3: serial@12C30000 {
 148                         compatible = "exynos";
 149                         reg = <0x12C30000 0x100>;
 150                         interrupts = < 86 >;
 151                         interrupt-parent = <&GIC>;
 152                         clock-frequency = < 100000000 >;
 153                         current-speed = <115200>;
 154                 };
 155
 156         };
 157 };