sys/boot/fdt/dts/p5020si.dtsi

   1 /*
   2  * P5020 Silicon Device Tree Source
   3  *
   4  * Copyright 2010-2011 Freescale Semiconductor Inc.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions are met:
   8  *     * Redistributions of source code must retain the above copyright
   9  *       notice, this list of conditions and the following disclaimer.
  10  *     * Redistributions in binary form must reproduce the above copyright
  11  *       notice, this list of conditions and the following disclaimer in the
  12  *       documentation and/or other materials provided with the distribution.
  13  *     * Neither the name of Freescale Semiconductor nor the
  14  *       names of its contributors may be used to endorse or promote products
  15  *       derived from this software without specific prior written permission.
  16  *
  17  *
  18  * ALTERNATIVELY, this software may be distributed under the terms of the
  19  * GNU General Public License ("GPL") as published by the Free Software
  20  * Foundation, either version 2 of that License or (at your option) any
  21  * later version.
  22  *
  23  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  24  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  25  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  26  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  27  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  30  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33  */
  34 /* $FreeBSD$ */
  35
  36 /dts-v1/;
  37
  38 / {
  39         compatible = "fsl,P5020";
  40         #address-cells = <2>;
  41         #size-cells = <2>;
  42         interrupt-parent = <&mpic>;
  43
  44         aliases {
  45                 ccsr = &soc;
  46                 dcsr = &dcsr;
  47
  48                 ethernet0 = &enet0;
  49                 ethernet1 = &enet1;
  50                 ethernet2 = &enet2;
  51                 ethernet3 = &enet3;
  52                 ethernet4 = &enet4;
  53                 ethernet5 = &enet5;
  54                 serial0 = &serial0;
  55                 serial1 = &serial1;
  56                 serial2 = &serial2;
  57                 serial3 = &serial3;
  58                 pci0 = &pci0;
  59                 pci1 = &pci1;
  60                 pci2 = &pci2;
  61                 pci3 = &pci3;
  62                 usb0 = &usb0;
  63                 usb1 = &usb1;
  64                 dma0 = &dma0;
  65                 dma1 = &dma1;
  66                 bman = &bman;
  67                 qman = &qman;
  68                 pme = &pme;
  69                 rman = &rman;
  70                 sdhc = &sdhc;
  71                 msi0 = &msi0;
  72                 msi1 = &msi1;
  73                 msi2 = &msi2;
  74
  75                 crypto = &crypto;
  76                 sec_jr0 = &sec_jr0;
  77                 sec_jr1 = &sec_jr1;
  78                 sec_jr2 = &sec_jr2;
  79                 sec_jr3 = &sec_jr3;
  80                 rtic_a = &rtic_a;
  81                 rtic_b = &rtic_b;
  82                 rtic_c = &rtic_c;
  83                 rtic_d = &rtic_d;
  84                 sec_mon = &sec_mon;
  85
  86                 raideng = &raideng;
  87                 raideng_jr0 = &raideng_jr0;
  88                 raideng_jr1 = &raideng_jr1;
  89                 raideng_jr2 = &raideng_jr2;
  90                 raideng_jr3 = &raideng_jr3;
  91
  92                 fman0 = &fman0;
  93                 fman0_oh0 = &fman0_oh0;
  94                 fman0_oh1 = &fman0_oh1;
  95                 fman0_oh2 = &fman0_oh2;
  96                 fman0_oh3 = &fman0_oh3;
  97                 fman0_oh4 = &fman0_oh4;
  98                 fman0_oh5 = &fman0_oh5;
  99                 fman0_oh6 = &fman0_oh6;
 100                 fman0_rx0 = &fman0_rx0;
 101                 fman0_rx1 = &fman0_rx1;
 102                 fman0_rx2 = &fman0_rx2;
 103                 fman0_rx3 = &fman0_rx3;
 104                 fman0_rx4 = &fman0_rx4;
 105                 fman0_rx5 = &fman0_rx5;
 106         };
 107
 108         cpus {
 109                 #address-cells = <1>;
 110                 #size-cells = <0>;
 111
 112                 cpu0: PowerPC,e5500@0 {
 113                         device_type = "cpu";
 114                         reg = <0>;
 115                         bus-frequency = <799999998>;
 116                         next-level-cache = <&L2_0>;
 117                         L2_0: l2-cache {
 118                                 next-level-cache = <&cpc>;
 119                         };
 120                 };
 121                 cpu1: PowerPC,e5500@1 {
 122                         device_type = "cpu";
 123                         reg = <1>;
 124                         next-level-cache = <&L2_1>;
 125                         L2_1: l2-cache {
 126                                 next-level-cache = <&cpc>;
 127                         };
 128                 };
 129         };
 130
 131         dcsr: dcsr@f00000000 {
 132                 #address-cells = <1>;
 133                 #size-cells = <1>;
 134                 compatible = "fsl,dcsr", "simple-bus";
 135
 136                 dcsr-epu@0 {
 137                         compatible = "fsl,dcsr-epu";
 138                         interrupts = <52 2 0 0
 139                                       84 2 0 0
 140                                       85 2 0 0>;
 141                         interrupt-parent = <&mpic>;
 142                         reg = <0x0 0x1000>;
 143                 };
 144                 dcsr-npc {
 145                         compatible = "fsl,dcsr-npc";
 146                         reg = <0x1000 0x1000 0x1000000 0x8000>;
 147                 };
 148                 dcsr-nxc@2000 {
 149                         compatible = "fsl,dcsr-nxc";
 150                         reg = <0x2000 0x1000>;
 151                 };
 152                 dcsr-corenet {
 153                         compatible = "fsl,dcsr-corenet";
 154                         reg = <0x8000 0x1000 0xB0000 0x1000>;
 155                 };
 156                 dcsr-dpaa@9000 {
 157                         compatible = "fsl,p5020-dcsr-dpaa", "fsl,dcsr-dpaa";
 158                         reg = <0x9000 0x1000>;
 159                 };
 160                 dcsr-ocn@11000 {
 161                         compatible = "fsl,p5020-dcsr-ocn", "fsl,dcsr-ocn";
 162                         reg = <0x11000 0x1000>;
 163                 };
 164                 dcsr-ddr@12000 {
 165                         compatible = "fsl,dcsr-ddr";
 166                         dev-handle = <&ddr1>;
 167                         reg = <0x12000 0x1000>;
 168                 };
 169                 dcsr-ddr@13000 {
 170                         compatible = "fsl,dcsr-ddr";
 171                         dev-handle = <&ddr2>;
 172                         reg = <0x13000 0x1000>;
 173                 };
 174                 dcsr-nal@18000 {
 175                         compatible = "fsl,p5020-dcsr-nal", "fsl,dcsr-nal";
 176                         reg = <0x18000 0x1000>;
 177                 };
 178                 dcsr-rcpm@22000 {
 179                         compatible = "fsl,p5020-dcsr-rcpm", "fsl,dcsr-rcpm";
 180                         reg = <0x22000 0x1000>;
 181                 };
 182                 dcsr-cpu-sb-proxy@40000 {
 183                         compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
 184                         cpu-handle = <&cpu0>;
 185                         reg = <0x40000 0x1000>;
 186                 };
 187                 dcsr-cpu-sb-proxy@41000 {
 188                         compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
 189                         cpu-handle = <&cpu1>;
 190                         reg = <0x41000 0x1000>;
 191                 };
 192         };
 193
 194         bman-portals@ff4000000 {
 195                 #address-cells = <0x1>;
 196                 #size-cells = <0x1>;
 197                 compatible = "bman-portals";
 198                 ranges = <0x0 0xf 0xfde00000 0x200000>;
 199                 bman-portal@0 {
 200                         cell-index = <0x0>;
 201                         compatible = "fsl,p5020-bman-portal", "fsl,bman-portal";
 202                         reg = <0x0 0x4000 0x100000 0x1000>;
 203                         interrupts = <105 2 0 0>;
 204                 };
 205                 bman-portal@4000 {
 206                         cell-index = <0x1>;
 207                         compatible = "fsl,p5020-bman-portal", "fsl,bman-portal";
 208                         reg = <0x4000 0x4000 0x101000 0x1000>;
 209                         interrupts = <107 2 0 0>;
 210                 };
 211                 bman-portal@8000 {
 212                         cell-index = <2>;
 213                         compatible = "fsl,p5020-bman-portal", "fsl,bman-portal";
 214                         reg = <0x8000 0x4000 0x102000 0x1000>;
 215                         interrupts = <109 2 0 0>;
 216                 };
 217                 bman-portal@c000 {
 218                         cell-index = <0x3>;
 219                         compatible = "fsl,p5020-bman-portal", "fsl,bman-portal";
 220                         reg = <0xc000 0x4000 0x103000 0x1000>;
 221                         interrupts = <111 2 0 0>;
 222                 };
 223                 bman-portal@10000 {
 224                         cell-index = <0x4>;
 225                         compatible = "fsl,p5020-bman-portal", "fsl,bman-portal";
 226                         reg = <0x10000 0x4000 0x104000 0x1000>;
 227                         interrupts = <113 2 0 0>;
 228                 };
 229                 bman-portal@14000 {
 230                         cell-index = <0x5>;
 231                         compatible = "fsl,p5020-bman-portal", "fsl,bman-portal";
 232                         reg = <0x14000 0x4000 0x105000 0x1000>;
 233                         interrupts = <115 2 0 0>;
 234                 };
 235                 bman-portal@18000 {
 236                         cell-index = <0x6>;
 237                         compatible = "fsl,p5020-bman-portal", "fsl,bman-portal";
 238                         reg = <0x18000 0x4000 0x106000 0x1000>;
 239                         interrupts = <117 2 0 0>;
 240                 };
 241                 bman-portal@1c000 {
 242                         cell-index = <0x7>;
 243                         compatible = "fsl,p5020-bman-portal", "fsl,bman-portal";
 244                         reg = <0x1c000 0x4000 0x107000 0x1000>;
 245                         interrupts = <119 2 0 0>;
 246                 };
 247                 bman-portal@20000 {
 248                         cell-index = <0x8>;
 249                         compatible = "fsl,p5020-bman-portal", "fsl,bman-portal";
 250                         reg = <0x20000 0x4000 0x108000 0x1000>;
 251                         interrupts = <121 2 0 0>;
 252                 };
 253                 bman-portal@24000 {
 254                         cell-index = <0x9>;
 255                         compatible = "fsl,p5020-bman-portal", "fsl,bman-portal";
 256                         reg = <0x24000 0x4000 0x109000 0x1000>;
 257                         interrupts = <123 2 0 0>;
 258                 };
 259
 260                 buffer-pool@0 {
 261                         compatible = "fsl,p5020-bpool", "fsl,bpool";
 262                         fsl,bpid = <0>;
 263                         fsl,bpool-cfg = <0 0x100 0 1 0 0x100>;
 264                 };
 265         };
 266
 267         qman-portals@ff4200000 {
 268                 #address-cells = <0x1>;
 269                 #size-cells = <0x1>;
 270                 compatible = "qman-portals";
 271                 ranges = <0x0 0xf 0xfdc00000 0x200000>;
 272                 qportal0: qman-portal@0 {
 273                         cell-index = <0x0>;
 274                         compatible = "fsl,p5020-qman-portal", "fsl,qman-portal";
 275                         reg = <0x0 0x4000 0x100000 0x1000>;
 276                         interrupts = <104 0x2 0 0>;
 277                         fsl,qman-channel-id = <0x0>;
 278                 };
 279
 280                 qportal1: qman-portal@4000 {
 281                         cell-index = <0x1>;
 282                         compatible = "fsl,p5020-qman-portal", "fsl,qman-portal";
 283                         reg = <0x4000 0x4000 0x101000 0x1000>;
 284                         interrupts = <106 0x2 0 0>;
 285                         fsl,qman-channel-id = <0x1>;
 286                 };
 287
 288                 qportal2: qman-portal@8000 {
 289                         cell-index = <0x2>;
 290                         compatible = "fsl,p5020-qman-portal", "fsl,qman-portal";
 291                         reg = <0x8000 0x4000 0x102000 0x1000>;
 292                         interrupts = <108 0x2 0 0>;
 293                         fsl,qman-channel-id = <0x2>;
 294                 };
 295
 296                 qportal3: qman-portal@c000 {
 297                         cell-index = <0x3>;
 298                         compatible = "fsl,p5020-qman-portal", "fsl,qman-portal";
 299                         reg = <0xc000 0x4000 0x103000 0x1000>;
 300                         interrupts = <110 0x2 0 0>;
 301                         fsl,qman-channel-id = <0x3>;
 302                 };
 303
 304                 qportal4: qman-portal@10000 {
 305                         cell-index = <0x4>;
 306                         compatible = "fsl,p5020-qman-portal", "fsl,qman-portal";
 307                         reg = <0x10000 0x4000 0x104000 0x1000>;
 308                         interrupts = <112 0x2 0 0>;
 309                         fsl,qman-channel-id = <0x4>;
 310                 };
 311
 312                 qportal5: qman-portal@14000 {
 313                         cell-index = <0x5>;
 314                         compatible = "fsl,p5020-qman-portal", "fsl,qman-portal";
 315                         reg = <0x14000 0x4000 0x105000 0x1000>;
 316                         interrupts = <114 0x2 0 0>;
 317                         fsl,qman-channel-id = <0x5>;
 318                 };
 319
 320                 qportal6: qman-portal@18000 {
 321                         cell-index = <0x6>;
 322                         compatible = "fsl,p5020-qman-portal", "fsl,qman-portal";
 323                         reg = <0x18000 0x4000 0x106000 0x1000>;
 324                         interrupts = <116 0x2 0 0>;
 325                         fsl,qman-channel-id = <0x6>;
 326                 };
 327
 328                 qportal7: qman-portal@1c000 {
 329                         cell-index = <0x7>;
 330                         compatible = "fsl,p5020-qman-portal", "fsl,qman-portal";
 331                         reg = <0x1c000 0x4000 0x107000 0x1000>;
 332                         interrupts = <118 0x2 0 0>;
 333                         fsl,qman-channel-id = <0x7>;
 334                 };
 335
 336                 qportal8: qman-portal@20000 {
 337                         cell-index = <0x8>;
 338                         compatible = "fsl,p5020-qman-portal", "fsl,qman-portal";
 339                         reg = <0x20000 0x4000 0x108000 0x1000>;
 340                         interrupts = <120 0x2 0 0>;
 341                         fsl,qman-channel-id = <0x8>;
 342                 };
 343
 344                 qportal9: qman-portal@24000 {
 345                         cell-index = <0x9>;
 346                         compatible = "fsl,p5020-qman-portal", "fsl,qman-portal";
 347                         reg = <0x24000 0x4000 0x109000 0x1000>;
 348                         interrupts = <122 0x2 0 0>;
 349                         fsl,qman-channel-id = <0x9>;
 350                 };
 351
 352                 qpool1: qman-pool@1 {
 353                         cell-index = <1>;
 354                         compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel";
 355                         fsl,qman-channel-id = <0x21>;
 356                 };
 357
 358                 qpool2: qman-pool@2 {
 359                         cell-index = <2>;
 360                         compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel";
 361                         fsl,qman-channel-id = <0x22>;
 362                 };
 363
 364                 qpool3: qman-pool@3 {
 365                         cell-index = <3>;
 366                         compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel";
 367                         fsl,qman-channel-id = <0x23>;
 368                 };
 369
 370                 qpool4: qman-pool@4 {
 371                         cell-index = <4>;
 372                         compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel";
 373                         fsl,qman-channel-id = <0x24>;
 374                 };
 375
 376                 qpool5: qman-pool@5 {
 377                         cell-index = <5>;
 378                         compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel";
 379                         fsl,qman-channel-id = <0x25>;
 380                 };
 381
 382                 qpool6: qman-pool@6 {
 383                         cell-index = <6>;
 384                         compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel";
 385                         fsl,qman-channel-id = <0x26>;
 386                 };
 387
 388                 qpool7: qman-pool@7 {
 389                         cell-index = <7>;
 390                         compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel";
 391                         fsl,qman-channel-id = <0x27>;
 392                 };
 393
 394                 qpool8: qman-pool@8 {
 395                         cell-index = <8>;
 396                         compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel";
 397                         fsl,qman-channel-id = <0x28>;
 398                 };
 399
 400                 qpool9: qman-pool@9 {
 401                         cell-index = <9>;
 402                         compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel";
 403                         fsl,qman-channel-id = <0x29>;
 404                 };
 405
 406                 qpool10: qman-pool@10 {
 407                         cell-index = <10>;
 408                         compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel";
 409                         fsl,qman-channel-id = <0x2a>;
 410                 };
 411
 412                 qpool11: qman-pool@11 {
 413                         cell-index = <11>;
 414                         compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel";
 415                         fsl,qman-channel-id = <0x2b>;
 416                 };
 417
 418                 qpool12: qman-pool@12 {
 419                         cell-index = <12>;
 420                         compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel";
 421                         fsl,qman-channel-id = <0x2c>;
 422                 };
 423
 424                 qpool13: qman-pool@13 {
 425                         cell-index = <13>;
 426                         compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel";
 427                         fsl,qman-channel-id = <0x2d>;
 428                 };
 429
 430                 qpool14: qman-pool@14 {
 431                         cell-index = <14>;
 432                         compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel";
 433                         fsl,qman-channel-id = <0x2e>;
 434                 };
 435
 436                 qpool15: qman-pool@15 {
 437                         cell-index = <15>;
 438                         compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel";
 439                         fsl,qman-channel-id = <0x2f>;
 440                 };
 441         };
 442
 443         soc: soc@ffe000000 {
 444                 #address-cells = <1>;
 445                 #size-cells = <1>;
 446                 device_type = "soc";
 447                 compatible = "simple-bus";
 448
 449                 bus-frequency = <0>;    // Filled out by kernel.
 450
 451                 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
 452                 reg = <0xf 0xfe000000 0 0x00001000>;
 453
 454                 soc-sram-error {
 455                         compatible = "fsl,soc-sram-error";
 456                         interrupts = <16 2 1 29>;
 457                 };
 458
 459                 corenet-law@0 {
 460                         compatible = "fsl,corenet-law";
 461                         reg = <0x0 0x1000>;
 462                         fsl,num-laws = <32>;
 463                 };
 464
 465                 ddr1: memory-controller@8000 {
 466                         compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
 467                         reg = <0x8000 0x1000>;
 468                         interrupts = <16 2 1 23>;
 469                 };
 470
 471                 ddr2: memory-controller@9000 {
 472                         compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
 473                         reg = <0x9000 0x1000>;
 474                         interrupts = <16 2 1 22>;
 475                 };
 476
 477                 cpc: l3-cache-controller@10000 {
 478                         compatible = "fsl,p5020-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
 479                         reg = <0x10000 0x1000
 480                                0x11000 0x1000>;
 481                         interrupts = <16 2 1 27
 482                                       16 2 1 26>;
 483                 };
 484
 485                 corenet-cf@18000 {
 486                         compatible = "fsl,corenet-cf";
 487                         reg = <0x18000 0x1000>;
 488                         interrupts = <16 2 1 31>;
 489                         fsl,ccf-num-csdids = <32>;
 490                         fsl,ccf-num-snoopids = <32>;
 491                 };
 492
 493                 iommu@20000 {
 494                         compatible = "fsl,pamu-v1.0", "fsl,pamu";
 495                         reg = <0x20000 0x4000>;
 496                         interrupts = <
 497                                 24 2 0 0
 498                                 16 2 1 30>;
 499                 };
 500
 501                 mpic: pic@40000 {
 502                         clock-frequency = <0>;
 503                         interrupt-controller;
 504                         #address-cells = <0>;
 505                         #interrupt-cells = <4>;
 506                         reg = <0x40000 0x40000>;
 507                         compatible = "fsl,mpic", "chrp,open-pic";
 508                         device_type = "open-pic";
 509                 };
 510
 511                 msi0: msi@41600 {
 512                         compatible = "fsl,mpic-msi";
 513                         reg = <0x41600 0x200>;
 514                         msi-available-ranges = <0 0x100>;
 515                         interrupts = <
 516                                 0xe0 0 0 0
 517                                 0xe1 0 0 0
 518                                 0xe2 0 0 0
 519                                 0xe3 0 0 0
 520                                 0xe4 0 0 0
 521                                 0xe5 0 0 0
 522                                 0xe6 0 0 0
 523                                 0xe7 0 0 0>;
 524                 };
 525
 526                 msi1: msi@41800 {
 527                         compatible = "fsl,mpic-msi";
 528                         reg = <0x41800 0x200>;
 529                         msi-available-ranges = <0 0x100>;
 530                         interrupts = <
 531                                 0xe8 0 0 0
 532                                 0xe9 0 0 0
 533                                 0xea 0 0 0
 534                                 0xeb 0 0 0
 535                                 0xec 0 0 0
 536                                 0xed 0 0 0
 537                                 0xee 0 0 0
 538                                 0xef 0 0 0>;
 539                 };
 540
 541                 msi2: msi@41a00 {
 542                         compatible = "fsl,mpic-msi";
 543                         reg = <0x41a00 0x200>;
 544                         msi-available-ranges = <0 0x100>;
 545                         interrupts = <
 546                                 0xf0 0 0 0
 547                                 0xf1 0 0 0
 548                                 0xf2 0 0 0
 549                                 0xf3 0 0 0
 550                                 0xf4 0 0 0
 551                                 0xf5 0 0 0
 552                                 0xf6 0 0 0
 553                                 0xf7 0 0 0>;
 554                 };
 555
 556                 guts: global-utilities@e0000 {
 557                         compatible = "fsl,qoriq-device-config-1.0";
 558                         reg = <0xe0000 0xe00>;
 559                         fsl,has-rstcr;
 560                         #sleep-cells = <1>;
 561                         fsl,liodn-bits = <12>;
 562                 };
 563
 564                 pins: global-utilities@e0e00 {
 565                         compatible = "fsl,qoriq-pin-control-1.0";
 566                         reg = <0xe0e00 0x200>;
 567                         #sleep-cells = <2>;
 568                 };
 569
 570                 clockgen: global-utilities@e1000 {
 571                         compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0";
 572                         reg = <0xe1000 0x1000>;
 573                         clock-frequency = <0>;
 574                 };
 575
 576                 rcpm: global-utilities@e2000 {
 577                         compatible = "fsl,qoriq-rcpm-1.0";
 578                         reg = <0xe2000 0x1000>;
 579                         #sleep-cells = <1>;
 580                 };
 581
 582                 sfp: sfp@e8000 {
 583                         compatible = "fsl,p5020-sfp", "fsl,qoriq-sfp-1.0";
 584                         reg        = <0xe8000 0x1000>;
 585                 };
 586
 587                 serdes: serdes@ea000 {
 588                         compatible = "fsl,p5020-serdes";
 589                         reg        = <0xea000 0x1000>;
 590                 };
 591
 592                 dma0: dma@100300 {
 593                         #address-cells = <1>;
 594                         #size-cells = <1>;
 595                         compatible = "fsl,p5020-dma", "fsl,eloplus-dma";
 596                         reg = <0x100300 0x4>;
 597                         ranges = <0x0 0x100100 0x200>;
 598                         cell-index = <0>;
 599                         dma-channel@0 {
 600                                 compatible = "fsl,p5020-dma-channel",
 601                                                 "fsl,eloplus-dma-channel";
 602                                 reg = <0x0 0x80>;
 603                                 cell-index = <0>;
 604                                 interrupts = <28 2 0 0>;
 605                         };
 606                         dma-channel@80 {
 607                                 compatible = "fsl,p5020-dma-channel",
 608                                                 "fsl,eloplus-dma-channel";
 609                                 reg = <0x80 0x80>;
 610                                 cell-index = <1>;
 611                                 interrupts = <29 2 0 0>;
 612                         };
 613                         dma-channel@100 {
 614                                 compatible = "fsl,p5020-dma-channel",
 615                                                 "fsl,eloplus-dma-channel";
 616                                 reg = <0x100 0x80>;
 617                                 cell-index = <2>;
 618                                 interrupts = <30 2 0 0>;
 619                         };
 620                         dma-channel@180 {
 621                                 compatible = "fsl,p5020-dma-channel",
 622                                                 "fsl,eloplus-dma-channel";
 623                                 reg = <0x180 0x80>;
 624                                 cell-index = <3>;
 625                                 interrupts = <31 2 0 0>;
 626                         };
 627                 };
 628
 629                 dma1: dma@101300 {
 630                         #address-cells = <1>;
 631                         #size-cells = <1>;
 632                         compatible = "fsl,p5020-dma", "fsl,eloplus-dma";
 633                         reg = <0x101300 0x4>;
 634                         ranges = <0x0 0x101100 0x200>;
 635                         cell-index = <1>;
 636                         dma-channel@0 {
 637                                 compatible = "fsl,p5020-dma-channel",
 638                                                 "fsl,eloplus-dma-channel";
 639                                 reg = <0x0 0x80>;
 640                                 cell-index = <0>;
 641                                 interrupts = <32 2 0 0>;
 642                         };
 643                         dma-channel@80 {
 644                                 compatible = "fsl,p5020-dma-channel",
 645                                                 "fsl,eloplus-dma-channel";
 646                                 reg = <0x80 0x80>;
 647                                 cell-index = <1>;
 648                                 interrupts = <33 2 0 0>;
 649                         };
 650                         dma-channel@100 {
 651                                 compatible = "fsl,p5020-dma-channel",
 652                                                 "fsl,eloplus-dma-channel";
 653                                 reg = <0x100 0x80>;
 654                                 cell-index = <2>;
 655                                 interrupts = <34 2 0 0>;
 656                         };
 657                         dma-channel@180 {
 658                                 compatible = "fsl,p5020-dma-channel",
 659                                                 "fsl,eloplus-dma-channel";
 660                                 reg = <0x180 0x80>;
 661                                 cell-index = <3>;
 662                                 interrupts = <35 2 0 0>;
 663                         };
 664                 };
 665
 666                 spi@110000 {
 667                         #address-cells = <1>;
 668                         #size-cells = <0>;
 669                         compatible = "fsl,p5020-espi", "fsl,mpc8536-espi";
 670                         reg = <0x110000 0x1000>;
 671                         interrupts = <53 0x2 0 0>;
 672                         fsl,espi-num-chipselects = <4>;
 673                 };
 674
 675                 sdhc: sdhc@114000 {
 676                         compatible = "fsl,p5020-esdhc", "fsl,esdhc";
 677                         reg = <0x114000 0x1000>;
 678                         interrupts = <48 2 0 0>;
 679                         sdhci,auto-cmd12;
 680                         clock-frequency = <0>;
 681                 };
 682
 683                 i2c@118000 {
 684                         #address-cells = <1>;
 685                         #size-cells = <0>;
 686                         cell-index = <0>;
 687                         compatible = "fsl-i2c";
 688                         reg = <0x118000 0x100>;
 689                         interrupts = <38 2 0 0>;
 690                         dfsrr;
 691                 };
 692
 693                 i2c@118100 {
 694                         #address-cells = <1>;
 695                         #size-cells = <0>;
 696                         cell-index = <1>;
 697                         compatible = "fsl-i2c";
 698                         reg = <0x118100 0x100>;
 699                         interrupts = <38 2 0 0>;
 700                         dfsrr;
 701                 };
 702
 703                 i2c@119000 {
 704                         #address-cells = <1>;
 705                         #size-cells = <0>;
 706                         cell-index = <2>;
 707                         compatible = "fsl-i2c";
 708                         reg = <0x119000 0x100>;
 709                         interrupts = <39 2 0 0>;
 710                         dfsrr;
 711                 };
 712
 713                 i2c@119100 {
 714                         #address-cells = <1>;
 715                         #size-cells = <0>;
 716                         cell-index = <3>;
 717                         compatible = "fsl-i2c";
 718                         reg = <0x119100 0x100>;
 719                         interrupts = <39 2 0 0>;
 720                         dfsrr;
 721                 };
 722
 723                 serial0: serial@11c500 {
 724                         cell-index = <0>;
 725                         device_type = "serial";
 726                         compatible = "ns16550";
 727                         reg = <0x11c500 0x100>;
 728                         clock-frequency = <0>;
 729                         interrupts = <36 2 0 0>;
 730                 };
 731
 732                 serial1: serial@11c600 {
 733                         cell-index = <1>;
 734                         device_type = "serial";
 735                         compatible = "ns16550";
 736                         reg = <0x11c600 0x100>;
 737                         clock-frequency = <0>;
 738                         interrupts = <36 2 0 0>;
 739                 };
 740
 741                 serial2: serial@11d500 {
 742                         cell-index = <2>;
 743                         device_type = "serial";
 744                         compatible = "ns16550";
 745                         reg = <0x11d500 0x100>;
 746                         clock-frequency = <0>;
 747                         interrupts = <37 2 0 0>;
 748                 };
 749
 750                 serial3: serial@11d600 {
 751                         cell-index = <3>;
 752                         device_type = "serial";
 753                         compatible = "ns16550";
 754                         reg = <0x11d600 0x100>;
 755                         clock-frequency = <0>;
 756                         interrupts = <37 2 0 0>;
 757                 };
 758
 759                 gpio0: gpio@130000 {
 760                         compatible = "fsl,p5020-gpio", "fsl,qoriq-gpio";
 761                         reg = <0x130000 0x1000>;
 762                         interrupts = <55 2 0 0>;
 763                         #gpio-cells = <2>;
 764                         gpio-controller;
 765                 };
 766
 767                 rman: rman@1e0000 {
 768                         compatible = "fsl,rman";
 769                         #address-cells = <1>;
 770                         #size-cells = <1>;
 771                         ranges = <0x0 0x1e0000 0x20000>;
 772                         reg = <0x1e0000 0x20000>;
 773                         interrupts = <16 2 1 11>; /* err_irq */
 774                         fsl,qman-channels-id = <0x62 0x63>;
 775
 776                         inbound-block@0 {
 777                                 compatible = "fsl,rman-inbound-block";
 778                                 reg = <0x0 0x800>;
 779                         };
 780                         global-cfg@b00 {
 781                                 compatible = "fsl,rman-global-cfg";
 782                                 reg = <0xb00 0x500>;
 783                         };
 784                         inbound-block@1000 {
 785                                 compatible = "fsl,rman-inbound-block";
 786                                 reg = <0x1000 0x800>;
 787                         };
 788                         inbound-block@2000 {
 789                                 compatible = "fsl,rman-inbound-block";
 790                                 reg = <0x2000 0x800>;
 791                         };
 792                         inbound-block@3000 {
 793                                 compatible = "fsl,rman-inbound-block";
 794                                 reg = <0x3000 0x800>;
 795                         };
 796                 };
 797
 798                 usb0: usb@210000 {
 799                         compatible = "fsl,p5020-usb2-mph",
 800                                         "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
 801                         reg = <0x210000 0x1000>;
 802                         #address-cells = <1>;
 803                         #size-cells = <0>;
 804                         interrupts = <44 0x2 0 0>;
 805                         phy_type = "utmi";
 806                         port0;
 807                 };
 808
 809                 usb1: usb@211000 {
 810                         compatible = "fsl,p5020-usb2-dr",
 811                                         "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
 812                         reg = <0x211000 0x1000>;
 813                         #address-cells = <1>;
 814                         #size-cells = <0>;
 815                         interrupts = <45 0x2 0 0>;
 816                         dr_mode = "host";
 817                         phy_type = "utmi";
 818                 };
 819
 820                 sata@220000 {
 821                         compatible = "fsl,p5020-sata", "fsl,pq-sata-v2";
 822                         reg = <0x220000 0x1000>;
 823                         interrupts = <68 0x2 0 0>;
 824                 };
 825
 826                 sata@221000 {
 827                         compatible = "fsl,p5020-sata", "fsl,pq-sata-v2";
 828                         reg = <0x221000 0x1000>;
 829                         interrupts = <69 0x2 0 0>;
 830                 };
 831
 832                 crypto: crypto@300000 {
 833                         compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
 834                         #address-cells = <1>;
 835                         #size-cells = <1>;
 836                         reg              = <0x300000 0x10000>;
 837                         ranges           = <0 0x300000 0x10000>;
 838                         interrupts       = <92 2 0 0>;
 839
 840                         sec_jr0: jr@1000 {
 841                                 compatible = "fsl,sec-v4.2-job-ring",
 842                                              "fsl,sec-v4.0-job-ring";
 843                                 reg = <0x1000 0x1000>;
 844                                 interrupts = <88 2 0 0>;
 845                         };
 846
 847                         sec_jr1: jr@2000 {
 848                                 compatible = "fsl,sec-v4.2-job-ring",
 849                                              "fsl,sec-v4.0-job-ring";
 850                                 reg = <0x2000 0x1000>;
 851                                 interrupts = <89 2 0 0>;
 852                         };
 853
 854                         sec_jr2: jr@3000 {
 855                                 compatible = "fsl,sec-v4.2-job-ring",
 856                                              "fsl,sec-v4.0-job-ring";
 857                                 reg = <0x3000 0x1000>;
 858                                 interrupts = <90 2 0 0>;
 859                         };
 860
 861                         sec_jr3: jr@4000 {
 862                                 compatible = "fsl,sec-v4.2-job-ring",
 863                                              "fsl,sec-v4.0-job-ring";
 864                                 reg = <0x4000 0x1000>;
 865                                 interrupts = <91 2 0 0>;
 866                         };
 867
 868                         rtic@6000 {
 869                                 compatible = "fsl,sec-v4.2-rtic",
 870                                              "fsl,sec-v4.0-rtic";
 871                                 #address-cells = <1>;
 872                                 #size-cells = <1>;
 873                                 reg = <0x6000 0x100>;
 874                                 ranges = <0x0 0x6100 0xe00>;
 875
 876                                 rtic_a: rtic-a@0 {
 877                                         compatible = "fsl,sec-v4.2-rtic-memory",
 878                                                      "fsl,sec-v4.0-rtic-memory";
 879                                         reg = <0x00 0x20 0x100 0x80>;
 880                                 };
 881
 882                                 rtic_b: rtic-b@20 {
 883                                         compatible = "fsl,sec-v4.2-rtic-memory",
 884                                                      "fsl,sec-v4.0-rtic-memory";
 885                                         reg = <0x20 0x20 0x200 0x80>;
 886                                 };
 887
 888                                 rtic_c: rtic-c@40 {
 889                                         compatible = "fsl,sec-v4.2-rtic-memory",
 890                                                      "fsl,sec-v4.0-rtic-memory";
 891                                         reg = <0x40 0x20 0x300 0x80>;
 892                                 };
 893
 894                                 rtic_d: rtic-d@60 {
 895                                         compatible = "fsl,sec-v4.2-rtic-memory",
 896                                                      "fsl,sec-v4.0-rtic-memory";
 897                                         reg = <0x60 0x20 0x500 0x80>;
 898                                 };
 899                         };
 900                 };
 901
 902                 sec_mon: sec_mon@314000 {
 903                         compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon";
 904                         reg = <0x314000 0x1000>;
 905                         interrupts = <93 2 0 0>;
 906                 };
 907
 908                 raideng: raideng@320000 {
 909                         compatible = "fsl,raideng-v1.0";
 910                         #address-cells = <1>;
 911                         #size-cells = <1>;
 912                         reg = <0x320000 0x10000>;
 913                         ranges = <0 0x320000 0x10000>;
 914
 915                         raideng_jq0@1000 {
 916                                 compatible = "fsl,raideng-v1.0-job-queue";
 917                                 #address-cells = <1>;
 918                                 #size-cells = <1>;
 919                                 reg = <0x1000 0x1000>;
 920                                 ranges = <0x0 0x1000 0x1000>;
 921
 922                                 raideng_jr0: jr@0 {
 923                                         compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-hp-ring";
 924                                         reg = <0x0 0x400>;
 925                                         interrupts = <139 2 0 0>;
 926                                         interrupt-parent = <&mpic>;
 927                                 };
 928
 929                                 raideng_jr1: jr@400 {
 930                                         compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-lp-ring";
 931                                         reg = <0x400 0x400>;
 932                                         interrupts = <140 2 0 0>;
 933                                         interrupt-parent = <&mpic>;
 934                                 };
 935                         };
 936
 937                         raideng_jq1@2000 {
 938                                 compatible = "fsl,raideng-v1.0-job-queue";
 939                                 #address-cells = <1>;
 940                                 #size-cells = <1>;
 941                                 reg = <0x2000 0x1000>;
 942                                 ranges = <0x0 0x2000 0x1000>;
 943
 944                                 raideng_jr2: jr@0 {
 945                                         compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-hp-ring";
 946                                         reg = <0x0 0x400>;
 947                                         interrupts = <141 2 0 0>;
 948                                         interrupt-parent = <&mpic>;
 949                                 };
 950
 951                                 raideng_jr3: jr@400 {
 952                                         compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-lp-ring";
 953                                         reg = <0x400 0x400>;
 954                                         interrupts = <142 2 0 0>;
 955                                         interrupt-parent = <&mpic>;
 956                                 };
 957                         };
 958                 };
 959
 960                 pme: pme@316000 {
 961                         compatible = "fsl,pme";
 962                         reg = <0x316000 0x10000>;
 963                         /* fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */
 964                         /* fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */
 965                         interrupts = <16 2 1 5>;
 966                 };
 967
 968                 qman: qman@318000 {
 969                         compatible = "fsl,p5020-qman", "fsl,qman";
 970                         reg = <0x318000 0x1000>;
 971                         interrupts = <16 2 1 3>;
 972                         /* Commented out, use default allocation */
 973                         /* fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */
 974                         /* fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */
 975                 };
 976
 977                 bman: bman@31a000 {
 978                         compatible = "fsl,p5020-bman", "fsl,bman";
 979                         reg = <0x31a000 0x1000>;
 980                         interrupts = <16 2 1 2>;
 981                         /* Same as fsl,qman-*, use default allocation */
 982                         /* fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */
 983                 };
 984
 985                 fman0: fman@400000 {
 986                         #address-cells = <1>;
 987                         #size-cells = <1>;
 988                         cell-index = <0>;
 989                         compatible = "fsl,p5020-fman", "fsl,fman", "simple-bus";
 990                         ranges = <0 0x400000 0x100000>;
 991                         reg = <0x400000 0x100000>;
 992                         clock-frequency = <0>;
 993                         interrupts = <
 994                                 96 2 0 0
 995                                 16 2 1 1>;
 996
 997                         cc@0 {
 998                                 compatible = "fsl,p5020-fman-cc", "fsl,fman-cc";
 999                         };
1000
1001                         parser@c7000 {
1002                                 compatible = "fsl,p5020-fman-parser", "fsl,fman-parser";
1003                                 reg = <0xc7000 0x1000>;
1004                         };
1005
1006                         keygen@c1000 {
1007                                 compatible = "fsl,p5020-fman-keygen", "fsl,fman-keygen";
1008                                 reg = <0xc1000 0x1000>;
1009                         };
1010
1011                         policer@c0000 {
1012                                 compatible = "fsl,p5020-fman-policer", "fsl,fman-policer";
1013                                 reg = <0xc0000 0x1000>;
1014                         };
1015
1016                         muram@0 {
1017                                 compatible = "fsl,p5020-fman-muram", "fsl,fman-muram";
1018                                 reg = <0x0 0x28000>;
1019                         };
1020
1021                         bmi@80000 {
1022                                 compatible = "fsl,p5020-fman-bmi", "fsl,fman-bmi";
1023                                 reg = <0x80000 0x400>;
1024                         };
1025
1026                         qmi@80400 {
1027                                 compatible = "fsl,p5020-fman-qmi", "fsl,fman-qmi";
1028                                 reg = <0x80400 0x400>;
1029                         };
1030
1031                         fman0_rx0: port@88000 {
1032                                 cell-index = <0>;
1033                                 compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx";
1034                                 reg = <0x88000 0x1000>;
1035                         };
1036                         fman0_rx1: port@89000 {
1037                                 cell-index = <1>;
1038                                 compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx";
1039                                 reg = <0x89000 0x1000>;
1040                         };
1041                         fman0_rx2: port@8a000 {
1042                                 cell-index = <2>;
1043                                 compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx";
1044                                 reg = <0x8a000 0x1000>;
1045                         };
1046                         fman0_rx3: port@8b000 {
1047                                 cell-index = <3>;
1048                                 compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx";
1049                                 reg = <0x8b000 0x1000>;
1050                         };
1051                         fman0_rx4: port@8c000 {
1052                                 cell-index = <4>;
1053                                 compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx";
1054                                 reg = <0x8c000 0x1000>;
1055                         };
1056                         fman0_rx5: port@90000 {
1057                                 cell-index = <0>;
1058                                 compatible = "fsl,p5020-fman-port-10g-rx", "fsl,fman-port-10g-rx";
1059                                 reg = <0x90000 0x1000>;
1060                         };
1061
1062                         fman0_tx5: port@b0000 {
1063                                 cell-index = <0>;
1064                                 compatible = "fsl,p5020-fman-port-10g-tx", "fsl,fman-port-10g-tx";
1065                                 reg = <0xb0000 0x1000>;
1066                                 fsl,qman-channel-id = <0x40>;
1067                         };
1068                         fman0_tx0: port@a8000 {
1069                                 cell-index = <0>;
1070                                 compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx";
1071                                 reg = <0xa8000 0x1000>;
1072                                 fsl,qman-channel-id = <0x41>;
1073                         };
1074                         fman0_tx1: port@a9000 {
1075                                 cell-index = <1>;
1076                                 compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx";
1077                                 reg = <0xa9000 0x1000>;
1078                                 fsl,qman-channel-id = <0x42>;
1079                         };
1080                         fman0_tx2: port@aa000 {
1081                                 cell-index = <2>;
1082                                 compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx";
1083                                 reg = <0xaa000 0x1000>;
1084                                 fsl,qman-channel-id = <0x43>;
1085                         };
1086                         fman0_tx3: port@ab000 {
1087                                 cell-index = <3>;
1088                                 compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx";
1089                                 reg = <0xab000 0x1000>;
1090                                 fsl,qman-channel-id = <0x44>;
1091                         };
1092                         fman0_tx4: port@ac000 {
1093                                 cell-index = <4>;
1094                                 compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx";
1095                                 reg = <0xac000 0x1000>;
1096                                 fsl,qman-channel-id = <0x45>;
1097                         };
1098
1099                         fman0_oh0: port@81000 {
1100                                 cell-index = <0>;
1101                                 compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh";
1102                                 reg = <0x81000 0x1000>;
1103                                 fsl,qman-channel-id = <0x46>;
1104                         };
1105                         fman0_oh1: port@82000 {
1106                                 cell-index = <1>;
1107                                 compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh";
1108                                 reg = <0x82000 0x1000>;
1109                                 fsl,qman-channel-id = <0x47>;
1110                         };
1111                         fman0_oh2: port@83000 {
1112                                 cell-index = <2>;
1113                                 compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh";
1114                                 reg = <0x83000 0x1000>;
1115                                 fsl,qman-channel-id = <0x48>;
1116                         };
1117                         fman0_oh3: port@84000 {
1118                                 cell-index = <3>;
1119                                 compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh";
1120                                 reg = <0x84000 0x1000>;
1121                                 fsl,qman-channel-id = <0x49>;
1122                         };
1123                         fman0_oh4: port@85000 {
1124                                 cell-index = <4>;
1125                                 compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh";
1126                                 reg = <0x85000 0x1000>;
1127                                 fsl,qman-channel-id = <0x4a>;
1128                         };
1129                         fman0_oh5: port@86000 {
1130                                 cell-index = <5>;
1131                                 compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh";
1132                                 reg = <0x86000 0x1000>;
1133                                 fsl,qman-channel-id = <0x4b>;
1134                         };
1135                         fman0_oh6: port@87000 {
1136                                 cell-index = <6>;
1137                                 compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh";
1138                                 reg = <0x87000 0x1000>;
1139                         };
1140
1141                         enet0: ethernet@e0000 {
1142                                 cell-index = <0>;
1143                                 compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac";
1144                                 reg = <0xe0000 0x1000>;
1145                                 fsl,port-handles = <&fman0_rx0 &fman0_tx0>;
1146                                 ptimer-handle = <&ptp_timer0>;
1147                         };
1148
1149                         mdio0: mdio@e1120 {
1150                                 #address-cells = <1>;
1151                                 #size-cells = <0>;
1152                                 compatible = "fsl,fman-mdio";
1153                                 reg = <0xe1120 0xee0>;
1154                                 interrupts = <100 1 0 0>;
1155                         };
1156
1157                         enet1: ethernet@e2000 {
1158                                 cell-index = <1>;
1159                                 compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac";
1160                                 reg = <0xe2000 0x1000>;
1161                                 fsl,port-handles = <&fman0_rx1 &fman0_tx1>;
1162                                 ptimer-handle = <&ptp_timer0>;
1163                         };
1164
1165                         mdio@e3120 {
1166                                 #address-cells = <1>;
1167                                 #size-cells = <0>;
1168                                 compatible = "fsl,fman-tbi";
1169                                 reg = <0xe3120 0xee0>;
1170                                 interrupts = <100 1 0 0>;
1171                         };
1172
1173                         enet2: ethernet@e4000 {
1174                                 cell-index = <2>;
1175                                 compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac";
1176                                 reg = <0xe4000 0x1000>;
1177                                 fsl,port-handles = <&fman0_rx2 &fman0_tx2>;
1178                                 ptimer-handle = <&ptp_timer0>;
1179                         };
1180
1181                         mdio@e5120 {
1182                                 #address-cells = <1>;
1183                                 #size-cells = <0>;
1184                                 compatible = "fsl,fman-tbi";
1185                                 reg = <0xe5120 0xee0>;
1186                                 interrupts = <100 1 0 0>;
1187                         };
1188
1189                         enet3: ethernet@e6000 {
1190                                 cell-index = <3>;
1191                                 compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac";
1192                                 reg = <0xe6000 0x1000>;
1193                                 fsl,port-handles = <&fman0_rx3 &fman0_tx3>;
1194                                 ptimer-handle = <&ptp_timer0>;
1195                         };
1196
1197                         mdio@e7120 {
1198                                 #address-cells = <1>;
1199                                 #size-cells = <0>;
1200                                 compatible = "fsl,fman-tbi";
1201                                 reg = <0xe7120 0xee0>;
1202                                 interrupts = <100 1 0 0>;
1203                         };
1204
1205                         enet4: ethernet@e8000 {
1206                                 cell-index = <4>;
1207                                 compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac";
1208                                 reg = <0xe8000 0x1000>;
1209                                 fsl,port-handles = <&fman0_rx4 &fman0_tx4>;
1210                                 ptimer-handle = <&ptp_timer0>;
1211                         };
1212
1213                         mdio@e9120 {
1214                                 #address-cells = <1>;
1215                                 #size-cells = <0>;
1216                                 compatible = "fsl,fman-tbi";
1217                                 reg = <0xe9120 0xee0>;
1218                                 interrupts = <100 1 0 0>;
1219                         };
1220
1221                         enet5: ethernet@f0000 {
1222                                 cell-index = <0>;
1223                                 compatible = "fsl,p5020-fman-10g-mac", "fsl,fman-10g-mac";
1224                                 reg = <0xf0000 0x1000>;
1225                                 fsl,port-handles = <&fman0_rx5 &fman0_tx5>;
1226                         };
1227
1228                         mdio@f1000 {
1229                                 #address-cells = <1>;
1230                                 #size-cells = <0>;
1231                                 compatible = "fsl,fman-xmdio";
1232                                 reg = <0xf1000 0x1000>;
1233                                 interrupts = <100 1 0 0>;
1234                         };
1235
1236                         ptp_timer0: rtc@fe000 {
1237                                 compatible = "fsl,fman-rtc";
1238                                 reg = <0xfe000 0x1000>;
1239                         };
1240                 };
1241         };
1242
1243         rapidio@ffe0c0000 {
1244                 compatible = "fsl,srio";
1245                 interrupts = <16 2 1 11>;
1246                 #address-cells = <2>;
1247                 #size-cells = <2>;
1248                 ranges;
1249
1250                 port1 {
1251                         #address-cells = <2>;
1252                         #size-cells = <2>;
1253                         cell-index = <1>;
1254                 };
1255
1256                 port2 {
1257                         #address-cells = <2>;
1258                         #size-cells = <2>;
1259                         cell-index = <2>;
1260                 };
1261         };
1262
1263         localbus@ffe124000 {
1264                 compatible = "fsl,p5020-rev1.0-elbc", "simple-bus", "fsl,elbc";
1265                 interrupts = <
1266                         25 2 0 0
1267                         16 2 1 19
1268                         >;
1269                 #address-cells = <2>;
1270                 #size-cells = <1>;
1271         };
1272
1273         pci0: pcie@ffe200000 {
1274                 compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
1275                 device_type = "pci";
1276                 status = "okay";
1277                 #size-cells = <2>;
1278                 #address-cells = <3>;
1279                 cell-index = <0>;
1280                 bus-range = <0x0 0xff>;
1281                 clock-frequency = <0x1fca055>;
1282                 fsl,msi = <&msi0>;
1283                 interrupts = <16 2 1 15>;
1284
1285                 pcie@0 {
1286                         reg = <0 0 0 0 0>;
1287                         #interrupt-cells = <1>;
1288                         #size-cells = <2>;
1289                         #address-cells = <3>;
1290                         device_type = "pci";
1291                         interrupts = <16 2 1 15>;
1292                         interrupt-map-mask = <0xf800 0 0 7>;
1293                         interrupt-map = <
1294                                 /* IDSEL 0x0 */
1295                                 0000 0 0 1 &mpic 40 1 0 0
1296                                 0000 0 0 2 &mpic 1 1 0 0
1297                                 0000 0 0 3 &mpic 2 1 0 0
1298                                 0000 0 0 4 &mpic 3 1 0 0
1299                                 >;
1300                 };
1301         };
1302
1303         pci1: pcie@ffe201000 {
1304                 compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
1305                 device_type = "pci";
1306                 status = "disabled";
1307                 #size-cells = <2>;
1308                 #address-cells = <3>;
1309                 cell-index = <1>;
1310                 bus-range = <0 0xff>;
1311                 clock-frequency = <0x1fca055>;
1312                 fsl,msi = <&msi1>;
1313                 interrupts = <16 2 1 14>;
1314                 pcie@0 {
1315                         reg = <0 0 0 0 0>;
1316                         #interrupt-cells = <1>;
1317                         #size-cells = <2>;
1318                         #address-cells = <3>;
1319                         device_type = "pci";
1320                         interrupts = <16 2 1 14>;
1321                         interrupt-map-mask = <0xf800 0 0 7>;
1322                         interrupt-map = <
1323                                 /* IDSEL 0x0 */
1324                                 0000 0 0 1 &mpic 41 1 0 0
1325                                 0000 0 0 2 &mpic 5 1 0 0
1326                                 0000 0 0 3 &mpic 6 1 0 0
1327                                 0000 0 0 4 &mpic 7 1 0 0
1328                                 >;
1329                 };
1330         };
1331
1332         pci2: pcie@ffe202000 {
1333                 compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
1334                 device_type = "pci";
1335                 status = "okay";
1336                 #size-cells = <2>;
1337                 #address-cells = <3>;
1338                 cell-index = <2>;
1339                 bus-range = <0x0 0xff>;
1340                 clock-frequency = <0x1fca055>;
1341                 fsl,msi = <&msi2>;
1342                 interrupts = <16 2 1 13>;
1343                 pcie@0 {
1344                         reg = <0 0 0 0 0>;
1345                         #interrupt-cells = <1>;
1346                         #size-cells = <2>;
1347                         #address-cells = <3>;
1348                         device_type = "pci";
1349                         interrupts = <16 2 1 13>;
1350                         interrupt-map-mask = <0xf800 0 0 7>;
1351                         interrupt-map = <
1352                                 /* IDSEL 0x0 */
1353                                 0000 0 0 1 &mpic 42 1 0 0
1354                                 0000 0 0 2 &mpic 9 1 0 0
1355                                 0000 0 0 3 &mpic 10 1 0 0
1356                                 0000 0 0 4 &mpic 11 1 0 0
1357                                 >;
1358                 };
1359         };
1360
1361         pci3: pcie@ffe203000 {
1362                 compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
1363                 device_type = "pci";
1364                 status = "disabled";
1365                 #size-cells = <2>;
1366                 #address-cells = <3>;
1367                 cell-index = <3>;
1368                 bus-range = <0x0 0xff>;
1369                 clock-frequency = <0x1fca055>;
1370                 fsl,msi = <&msi2>;
1371                 interrupts = <16 2 1 12>;
1372                 pcie@0 {
1373                         reg = <0 0 0 0 0>;
1374                         #interrupt-cells = <1>;
1375                         #size-cells = <2>;
1376                         #address-cells = <3>;
1377                         device_type = "pci";
1378                         interrupts = <16 2 1 12>;
1379                         interrupt-map-mask = <0xf800 0 0 7>;
1380                         interrupt-map = <
1381                                 /* IDSEL 0x0 */
1382                                 0000 0 0 1 &mpic 43 1 0 0
1383                                 0000 0 0 2 &mpic 0 1 0 0
1384                                 0000 0 0 3 &mpic 4 1 0 0
1385                                 0000 0 0 4 &mpic 8 1 0 0
1386                                 >;
1387                 };
1388         };
1389 };