sys/contrib/dev/ath/ath_hal/ar9300/ar9300template_xb112.h

   1 /*
   2  * Copyright (c) 2013 Qualcomm Atheros, Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
   9  * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
  10  * AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
  11  * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
  12  * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
  13  * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  14  * PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 /*
  18  * READ THIS NOTICE!
  19  *
  20  * Values defined in this file may only be changed under exceptional circumstances.
  21  *
  22  * Please ask Fiona Cain before making any changes.
  23  */
  24
  25 #ifndef __ar9300templateXB112_h__
  26 #define __ar9300templateXB112_h__
  27
  28 static ar9300_eeprom_t ar9300_template_xb112=
  29 {
  30
  31         2, //  eeprom_version;
  32
  33     ar9300_eeprom_template_xb112, //  template_version;
  34
  35         {0x00,0x03,0x7f,0x0,0x0,0x0}, //mac_addr[6];
  36
  37     //static  A_UINT8   custData[OSPREY_CUSTOMER_DATA_SIZE]=
  38
  39         {"xb112-041-f0000"},
  40 //      {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},
  41
  42     //static OSPREY_BASE_EEP_HEADER base_eep_header=
  43
  44         {
  45                     {0,0x1f},   //   reg_dmn[2]; //Does this need to be outside of this structure, if it gets written after calibration
  46                     0x77,       //   txrx_mask;  //4 bits tx and 4 bits rx
  47                     {AR9300_OPFLAGS_11G | AR9300_OPFLAGS_11A, 0},       //   op_cap_flags;
  48                     0,          //   rf_silent;
  49                     0,          //   blue_tooth_options;
  50                     0,          //   device_cap;
  51                     5,          //   device_type; // takes lower byte in eeprom location
  52                     OSPREY_PWR_TABLE_OFFSET,    //    pwrTableOffset; // offset in dB to be added to beginning of pdadc table in calibration
  53                         {0,0},  //   params_for_tuning_caps[2];  //placeholder, get more details from Don
  54             0x0d,     //feature_enable; //bit0 - enable tx temp comp
  55                              //bit1 - enable tx volt comp
  56                              //bit2 - enable fastClock - default to 1
  57                              //bit3 - enable doubling - default to 1
  58                                                          //bit4 - enable internal regulator - default to 0
  59                                                          //bit5 - enable paprd -- default to 0
  60                 0,       //misc_configuration: bit0 - turn down drivestrength
  61                         6,              // eeprom_write_enable_gpio
  62                         0,              // wlan_disable_gpio
  63                         8,              // wlan_led_gpio
  64                         0xff,           // rx_band_select_gpio
  65                         0,                      // txrxgain
  66             0,          //   swreg
  67         },
  68
  69
  70         //static OSPREY_MODAL_EEP_HEADER modal_header_2g=
  71         {
  72
  73                     0x110,                      //  ant_ctrl_common;                         // 4   idle, t1, t2, b (4 bits per setting)
  74                     0x22222,            //  ant_ctrl_common2;                        // 4    ra1l1, ra2l1, ra1l2, ra2l2, ra12
  75                     {0x10,0x10,0x10},   //  ant_ctrl_chain[OSPREY_MAX_CHAINS];       // 6   idle, t, r, rx1, rx12, b (2 bits each)
  76                     {0x1b,0x1b,0x1b},           //   xatten1_db[OSPREY_MAX_CHAINS];           // 3  //xatten1_db for merlin (0xa20c/b20c 5:0)
  77                     {0x15,0x15,0x15},                   //   xatten1_margin[OSPREY_MAX_CHAINS];          // 3  //xatten1_margin for merlin (0xa20c/b20c 16:12
  78                         50,                             //    temp_slope;
  79                         0,                              //    voltSlope;
  80                     {FREQ2FBIN(2464, 1),0,0,0,0}, // spur_chans[OSPREY_EEPROM_MODAL_SPURS];  // spur channels in usual fbin coding format
  81                     {-1,0,0},                   //    noise_floor_thresh_ch[OSPREY_MAX_CHAINS]; // 3    //Check if the register is per chain
  82                         {0, 0, 0, 0, 0, 0,0,0,0,0,0},                           // reserved
  83                         0,                                                                                      // quick drop
  84                     0,                          //   xpa_bias_lvl;                            // 1
  85                     0x0e,                       //   tx_frame_to_data_start;                    // 1
  86                     0x0e,                       //   tx_frame_to_pa_on;                         // 1
  87                     3,                          //   txClip;                                     // 4 bits tx_clip, 4 bits dac_scale_cck
  88                     0,                          //    antenna_gain;                           // 1
  89                     0x2c,                       //   switchSettling;                        // 1
  90                     -30,                        //    adcDesiredSize;                        // 1
  91                     0,                          //   txEndToXpaOff;                         // 1
  92                     0x2,                        //   txEndToRxOn;                           // 1
  93                     0xe,                        //   tx_frame_to_xpa_on;                        // 1
  94                     28,                         //   thresh62;                              // 1
  95                         0x0c80C080,             //       paprd_rate_mask_ht20                                           // 4
  96                         0x0080C080,             //       paprd_rate_mask_ht40
  97                     0,                          //   switchcomspdt;                         // 2
  98                         0,                              // bit: 0,1:chain0, 2,3:chain1, 4,5:chain2
  99                         0,                              //  rf_gain_cap
 100                         0,                              //  tx_gain_cap
 101                         {0,0,0,0,0}    //futureModal[5];
 102         },
 103
 104         {
 105                 0,                                                          //   ant_div_control
 106                         {0,0},                                  // base_ext1
 107                         0,                                              // misc_enable
 108                         {0,0,0,0,0,0,0,0},              // temp slop extension
 109                 0,                                                                      // quick drop low
 110                 0,                                                                      // quick drop high
 111         },
 112
 113         //static A_UINT8 cal_freq_pier_2g[OSPREY_NUM_2G_CAL_PIERS]=
 114         {
 115                 FREQ2FBIN(2412, 1),
 116                 FREQ2FBIN(2437, 1),
 117                 FREQ2FBIN(2462, 1)
 118         },
 119
 120         //static OSP_CAL_DATA_PER_FREQ_OP_LOOP cal_pier_data_2g[OSPREY_MAX_CHAINS][OSPREY_NUM_2G_CAL_PIERS]=
 121
 122         {       {{0,0,0,0,0,0},  {0,0,0,0,0,0},  {0,0,0,0,0,0}},
 123                 {{0,0,0,0,0,0},  {0,0,0,0,0,0},  {0,0,0,0,0,0}},
 124                 {{0,0,0,0,0,0},  {0,0,0,0,0,0},  {0,0,0,0,0,0}},
 125         },
 126
 127         //A_UINT8 cal_target_freqbin_cck[OSPREY_NUM_2G_CCK_TARGET_POWERS];
 128
 129         {
 130                 FREQ2FBIN(2412, 1),
 131                 FREQ2FBIN(2472, 1)
 132         },
 133
 134         //static CAL_TARGET_POWER_LEG cal_target_freqbin_2g[OSPREY_NUM_2G_20_TARGET_POWERS]
 135         {
 136                 FREQ2FBIN(2412, 1),
 137                 FREQ2FBIN(2437, 1),
 138                 FREQ2FBIN(2472, 1)
 139         },
 140
 141         //static   OSP_CAL_TARGET_POWER_HT  cal_target_freqbin_2g_ht20[OSPREY_NUM_2G_20_TARGET_POWERS]
 142         {
 143                 FREQ2FBIN(2412, 1),
 144                 FREQ2FBIN(2437, 1),
 145                 FREQ2FBIN(2472, 1)
 146         },
 147
 148         //static   OSP_CAL_TARGET_POWER_HT  cal_target_freqbin_2g_ht40[OSPREY_NUM_2G_40_TARGET_POWERS]
 149         {
 150                 FREQ2FBIN(2412, 1),
 151                 FREQ2FBIN(2437, 1),
 152                 FREQ2FBIN(2472, 1)
 153         },
 154
 155         //static CAL_TARGET_POWER_LEG cal_target_power_cck[OSPREY_NUM_2G_CCK_TARGET_POWERS]=
 156         {
 157                 //1L-5L,5S,11L,11S
 158         {{38,38,38,38}},
 159                 {{38,38,38,38}}
 160          },
 161
 162         //static CAL_TARGET_POWER_LEG cal_target_power_2g[OSPREY_NUM_2G_20_TARGET_POWERS]=
 163         {
 164         //6-24,36,48,54
 165                 {{38,38,36,34}},
 166                 {{38,38,36,34}},
 167                 {{38,38,34,32}},
 168         },
 169
 170         //static   OSP_CAL_TARGET_POWER_HT  cal_target_power_2g_ht20[OSPREY_NUM_2G_20_TARGET_POWERS]=
 171         {
 172         //0_8_16,1-3_9-11_17-19,
 173         //      4,5,6,7,12,13,14,15,20,21,22,23
 174                 {{36,36,36,36,36,34,34,32,30,28,28,28,28,26}},
 175                 {{36,36,36,36,36,34,36,34,32,30,30,30,28,26}},
 176                 {{36,36,36,36,36,34,34,32,30,28,28,28,28,26}},
 177         },
 178
 179         //static    OSP_CAL_TARGET_POWER_HT  cal_target_power_2g_ht40[OSPREY_NUM_2G_40_TARGET_POWERS]=
 180         {
 181         //0_8_16,1-3_9-11_17-19,
 182         //      4,5,6,7,12,13,14,15,20,21,22,23
 183                 {{36,36,36,36,34,32,32,30,28,26,26,26,26,24}},
 184                 {{36,36,36,36,34,32,34,32,30,28,28,28,28,24}},
 185                 {{36,36,36,36,34,32,32,30,28,26,26,26,26,24}},
 186         },
 187
 188 //static    A_UINT8            ctl_index_2g[OSPREY_NUM_CTLS_2G]=
 189
 190         {
 191
 192                     0x11,
 193                 0x12,
 194                 0x15,
 195                 0x17,
 196                 0x41,
 197                 0x42,
 198                         0x45,
 199                 0x47,
 200                         0x31,
 201                 0x32,
 202                 0x35,
 203                 0x37
 204
 205     },
 206
 207 //A_UINT8   ctl_freqbin_2G[OSPREY_NUM_CTLS_2G][OSPREY_NUM_BAND_EDGES_2G];
 208
 209         {
 210                 {FREQ2FBIN(2412, 1),
 211                  FREQ2FBIN(2417, 1),
 212                  FREQ2FBIN(2457, 1),
 213                  FREQ2FBIN(2462, 1)},
 214
 215                 {FREQ2FBIN(2412, 1),
 216                  FREQ2FBIN(2417, 1),
 217                  FREQ2FBIN(2462, 1),
 218                  0xFF},
 219
 220                 {FREQ2FBIN(2412, 1),
 221                  FREQ2FBIN(2417, 1),
 222                  FREQ2FBIN(2462, 1),
 223                  0xFF},
 224
 225                 {FREQ2FBIN(2422, 1),
 226                  FREQ2FBIN(2427, 1),
 227                  FREQ2FBIN(2447, 1),
 228                  FREQ2FBIN(2452, 1)},
 229
 230                 {/*Data[4].ctl_edges[0].bChannel*/FREQ2FBIN(2412, 1),
 231                 /*Data[4].ctl_edges[1].bChannel*/FREQ2FBIN(2417, 1),
 232                 /*Data[4].ctl_edges[2].bChannel*/FREQ2FBIN(2472, 1),
 233                 /*Data[4].ctl_edges[3].bChannel*/FREQ2FBIN(2484, 1)},
 234
 235                 {/*Data[5].ctl_edges[0].bChannel*/FREQ2FBIN(2412, 1),
 236                  /*Data[5].ctl_edges[1].bChannel*/FREQ2FBIN(2417, 1),
 237                  /*Data[5].ctl_edges[2].bChannel*/FREQ2FBIN(2472, 1),
 238                  0},
 239
 240                 {/*Data[6].ctl_edges[0].bChannel*/FREQ2FBIN(2412, 1),
 241                  /*Data[6].ctl_edges[1].bChannel*/FREQ2FBIN(2417, 1),
 242                  FREQ2FBIN(2472, 1),
 243                  0},
 244
 245                 {/*Data[7].ctl_edges[0].bChannel*/FREQ2FBIN(2422, 1),
 246                  /*Data[7].ctl_edges[1].bChannel*/FREQ2FBIN(2427, 1),
 247                  /*Data[7].ctl_edges[2].bChannel*/FREQ2FBIN(2447, 1),
 248                  /*Data[7].ctl_edges[3].bChannel*/FREQ2FBIN(2462, 1)},
 249
 250                 {/*Data[8].ctl_edges[0].bChannel*/FREQ2FBIN(2412, 1),
 251                  /*Data[8].ctl_edges[1].bChannel*/FREQ2FBIN(2417, 1),
 252                  /*Data[8].ctl_edges[2].bChannel*/FREQ2FBIN(2472, 1),
 253                  0},
 254
 255                 {/*Data[9].ctl_edges[0].bChannel*/FREQ2FBIN(2412, 1),
 256                  /*Data[9].ctl_edges[1].bChannel*/FREQ2FBIN(2417, 1),
 257                  /*Data[9].ctl_edges[2].bChannel*/FREQ2FBIN(2472, 1),
 258                  0},
 259
 260                 {/*Data[10].ctl_edges[0].bChannel*/FREQ2FBIN(2412, 1),
 261                  /*Data[10].ctl_edges[1].bChannel*/FREQ2FBIN(2417, 1),
 262                  /*Data[10].ctl_edges[2].bChannel*/FREQ2FBIN(2472, 1),
 263                  0},
 264
 265                 {/*Data[11].ctl_edges[0].bChannel*/FREQ2FBIN(2422, 1),
 266                  /*Data[11].ctl_edges[1].bChannel*/FREQ2FBIN(2427, 1),
 267                  /*Data[11].ctl_edges[2].bChannel*/FREQ2FBIN(2447, 1),
 268                  /*Data[11].ctl_edges[3].bChannel*/FREQ2FBIN(2462, 1)}
 269         },
 270
 271
 272 //OSP_CAL_CTL_DATA_2G   ctl_power_data_2g[OSPREY_NUM_CTLS_2G];
 273
 274 #if AH_BYTE_ORDER == AH_BIG_ENDIAN
 275     {
 276
 277             {{{0, 60}, {1, 60}, {0, 60}, {0, 60}}},
 278             {{{0, 60}, {1, 60}, {0, 60}, {0, 60}}},
 279             {{{1, 60}, {0, 60}, {0, 60}, {1, 60}}},
 280
 281             {{{1, 60}, {0, 60}, {0, 60}, {0, 60}}},
 282             {{{0, 60}, {1, 60}, {0, 60}, {0, 60}}},
 283             {{{0, 60}, {1, 60}, {0, 60}, {0, 60}}},
 284
 285             {{{0, 60}, {1, 60}, {1, 60}, {0, 60}}},
 286             {{{0, 60}, {1, 60}, {0, 60}, {0, 60}}},
 287             {{{0, 60}, {1, 60}, {0, 60}, {0, 60}}},
 288
 289             {{{0, 60}, {1, 60}, {0, 60}, {0, 60}}},
 290             {{{0, 60}, {1, 60}, {1, 60}, {1, 60}}},
 291             {{{0, 60}, {1, 60}, {1, 60}, {1, 60}}},
 292
 293     },
 294 #else
 295         {
 296             {{{60, 0}, {60, 1}, {60, 0}, {60, 0}}},
 297             {{{60, 0}, {60, 1}, {60, 0}, {60, 0}}},
 298             {{{60, 1}, {60, 0}, {60, 0}, {60, 1}}},
 299
 300             {{{60, 1}, {60, 0}, {60, 0}, {60, 0}}},
 301             {{{60, 0}, {60, 1}, {60, 0}, {60, 0}}},
 302             {{{60, 0}, {60, 1}, {60, 0}, {60, 0}}},
 303
 304             {{{60, 0}, {60, 1}, {60, 1}, {60, 0}}},
 305             {{{60, 0}, {60, 1}, {60, 0}, {60, 0}}},
 306             {{{60, 0}, {60, 1}, {60, 0}, {60, 0}}},
 307
 308             {{{60, 0}, {60, 1}, {60, 0}, {60, 0}}},
 309             {{{60, 0}, {60, 1}, {60, 1}, {60, 1}}},
 310             {{{60, 0}, {60, 1}, {60, 1}, {60, 1}}},
 311         },
 312 #endif
 313
 314 //static    OSPREY_MODAL_EEP_HEADER   modal_header_5g=
 315
 316         {
 317
 318                     0x110,                      //  ant_ctrl_common;                         // 4   idle, t1, t2, b (4 bits per setting)
 319                     0x22222,            //  ant_ctrl_common2;                        // 4    ra1l1, ra2l1, ra1l2, ra2l2, ra12
 320                     {0x000,0x000,0x000},        //  ant_ctrl_chain[OSPREY_MAX_CHAINS];       // 6   idle, t, r, rx1, rx12, b (2 bits each)
 321                     {0x13,0x19,0x17},                   //   xatten1_db[OSPREY_MAX_CHAINS];           // 3  //xatten1_db for merlin (0xa20c/b20c 5:0)
 322                     {0x19,0x19,0x19},                   //   xatten1_margin[OSPREY_MAX_CHAINS];          // 3  //xatten1_margin for merlin (0xa20c/b20c 16:12
 323                         70,                             //    temp_slope;
 324                         15,                             //    voltSlope;
 325                     {0,0,0,0,0}, // spur_chans[OSPREY_EEPROM_MODAL_SPURS];  // spur channels in usual fbin coding format
 326                     {-1,0,0},                   //    noise_floor_thresh_ch[OSPREY_MAX_CHAINS]; // 3    //Check if the register is per chain
 327                         {0, 0, 0, 0, 0, 0,0,0,0,0,0},                           // reserved
 328                         0,                                                                                      // quick drop
 329                     0,                          //   xpa_bias_lvl;                            // 1
 330                     0x0e,                       //   tx_frame_to_data_start;                    // 1
 331                     0x0e,                       //   tx_frame_to_pa_on;                         // 1
 332                     3,                          //   txClip;                                     // 4 bits tx_clip, 4 bits dac_scale_cck
 333                     0,                          //    antenna_gain;                           // 1
 334                     0x2d,                       //   switchSettling;                        // 1
 335                     -30,                        //    adcDesiredSize;                        // 1
 336                     0,                          //   txEndToXpaOff;                         // 1
 337                     0x2,                        //   txEndToRxOn;                           // 1
 338                     0xe,                        //   tx_frame_to_xpa_on;                        // 1
 339                     28,                         //   thresh62;                              // 1
 340                         0x0cf0e0e0,             //       paprd_rate_mask_ht20                                           // 4
 341                         0x6cf0e0e0,             //       paprd_rate_mask_ht40                                           // 4
 342                     0,                          //   switchcomspdt;                         // 2
 343                         0,                              // bit: 0,1:chain0, 2,3:chain1, 4,5:chain2
 344                         0,                              //  rf_gain_cap
 345                         0,                              //  tx_gain_cap
 346                         {0,0,0,0,0}    //futureModal[5];
 347         },
 348
 349         {                               // base_ext2
 350                 72,                             //    tempSlopeL;
 351                 105,                    //    tempSlopeH;
 352                 {0x10,0x14,0x10},       // xatten1_db_low
 353                 {0x19,0x19,0x19},       // xatten1_margin_low
 354                 {0x1d,0x20,0x24},       // xatten1_db_high
 355                 {0x10,0x10,0x10}        // xatten1_margin_high
 356         },
 357
 358 //static    A_UINT8            cal_freq_pier_5g[OSPREY_NUM_5G_CAL_PIERS]=
 359         {
 360                     //pPiers[0] =
 361                     FREQ2FBIN(5180, 0),
 362                     //pPiers[1] =
 363                     FREQ2FBIN(5220, 0),
 364                     //pPiers[2] =
 365                     FREQ2FBIN(5320, 0),
 366                     //pPiers[3] =
 367                     FREQ2FBIN(5400, 0),
 368                     //pPiers[4] =
 369                     FREQ2FBIN(5500, 0),
 370                     //pPiers[5] =
 371                     FREQ2FBIN(5600, 0),
 372                     //pPiers[6] =
 373                     FREQ2FBIN(5700, 0),
 374                 //pPiers[7] =
 375                 FREQ2FBIN(5785, 0)
 376         },
 377
 378 //static    OSP_CAL_DATA_PER_FREQ_OP_LOOP cal_pier_data_5g[OSPREY_MAX_CHAINS][OSPREY_NUM_5G_CAL_PIERS]=
 379
 380         {
 381                 {{0,0,0,0,0,0},  {0,0,0,0,0,0},  {0,0,0,0,0,0},  {0,0,0,0,0,0},  {0,0,0,0,0,0},  {0,0,0,0,0,0},    {0,0,0,0,0,0},  {0,0,0,0,0,0}},
 382                 {{0,0,0,0,0,0},  {0,0,0,0,0,0},  {0,0,0,0,0,0},  {0,0,0,0,0,0},  {0,0,0,0,0,0},  {0,0,0,0,0,0},    {0,0,0,0,0,0},  {0,0,0,0,0,0}},
 383                 {{0,0,0,0,0,0},  {0,0,0,0,0,0},  {0,0,0,0,0,0},  {0,0,0,0,0,0},  {0,0,0,0,0,0},  {0,0,0,0,0,0},    {0,0,0,0,0,0},  {0,0,0,0,0,0}},
 384
 385         },
 386
 387 //static    CAL_TARGET_POWER_LEG cal_target_freqbin_5g[OSPREY_NUM_5G_20_TARGET_POWERS]=
 388
 389         {
 390                         FREQ2FBIN(5180, 0),
 391                         FREQ2FBIN(5220, 0),
 392                         FREQ2FBIN(5320, 0),
 393                         FREQ2FBIN(5400, 0),
 394                         FREQ2FBIN(5500, 0),
 395                         FREQ2FBIN(5600, 0),
 396                         FREQ2FBIN(5725, 0),
 397                         FREQ2FBIN(5825, 0)
 398         },
 399
 400 //static    OSP_CAL_TARGET_POWER_HT  cal_target_power_5g_ht20[OSPREY_NUM_5G_20_TARGET_POWERS]=
 401
 402         {
 403                         FREQ2FBIN(5180, 0),
 404                         FREQ2FBIN(5220, 0),
 405                         FREQ2FBIN(5320, 0),
 406                         FREQ2FBIN(5400, 0),
 407                         FREQ2FBIN(5500, 0),
 408                         FREQ2FBIN(5600, 0),
 409                         FREQ2FBIN(5725, 0),
 410                         FREQ2FBIN(5825, 0)
 411         },
 412
 413 //static    OSP_CAL_TARGET_POWER_HT  cal_target_power_5g_ht40[OSPREY_NUM_5G_40_TARGET_POWERS]=
 414
 415         {
 416                         FREQ2FBIN(5180, 0),
 417                         FREQ2FBIN(5220, 0),
 418                         FREQ2FBIN(5320, 0),
 419                         FREQ2FBIN(5400, 0),
 420                         FREQ2FBIN(5500, 0),
 421                         FREQ2FBIN(5600, 0),
 422                         FREQ2FBIN(5725, 0),
 423                         FREQ2FBIN(5825, 0)
 424         },
 425
 426
 427 //static    CAL_TARGET_POWER_LEG cal_target_power_5g[OSPREY_NUM_5G_20_TARGET_POWERS]=
 428
 429
 430         {
 431         //6-24,36,48,54
 432             {{32,32,28,26}},
 433             {{32,32,28,26}},
 434             {{32,32,28,26}},
 435             {{32,32,26,24}},
 436             {{32,32,26,24}},
 437             {{32,32,24,22}},
 438             {{30,30,24,22}},
 439             {{30,30,24,22}},
 440         },
 441
 442 //static    OSP_CAL_TARGET_POWER_HT  cal_target_power_5g_ht20[OSPREY_NUM_5G_20_TARGET_POWERS]=
 443
 444         {
 445         //0_8_16,1-3_9-11_17-19,
 446         //      4,5,6,7,12,13,14,15,20,21,22,23
 447             {{32,32,32,32,28,26,32,28,26,24,24,24,22,22}},
 448             {{32,32,32,32,28,26,32,28,26,24,24,24,22,22}},
 449             {{32,32,32,32,28,26,32,28,26,24,24,24,22,22}},
 450             {{32,32,32,32,28,26,32,26,24,22,22,22,20,20}},
 451             {{32,32,32,32,28,26,32,26,24,22,20,18,16,16}},
 452             {{32,32,32,32,28,26,32,24,20,16,18,16,14,14}},
 453             {{30,30,30,30,28,26,30,24,20,16,18,16,14,14}},
 454             {{30,30,30,30,28,26,30,24,20,16,18,16,14,14}},
 455         },
 456
 457 //static    OSP_CAL_TARGET_POWER_HT  cal_target_power_5g_ht40[OSPREY_NUM_5G_40_TARGET_POWERS]=
 458         {
 459         //0_8_16,1-3_9-11_17-19,
 460         //      4,5,6,7,12,13,14,15,20,21,22,23
 461             {{32,32,32,30,28,26,30,28,26,24,24,24,22,22}},
 462             {{32,32,32,30,28,26,30,28,26,24,24,24,22,22}},
 463             {{32,32,32,30,28,26,30,28,26,24,24,24,22,22}},
 464             {{32,32,32,30,28,26,30,26,24,22,22,22,20,20}},
 465             {{32,32,32,30,28,26,30,26,24,22,20,18,16,16}},
 466             {{32,32,32,30,28,26,30,22,20,16,18,16,14,14}},
 467             {{30,30,30,30,28,26,30,22,20,16,18,16,14,14}},
 468             {{30,30,30,30,28,26,30,22,20,16,18,16,14,14}},
 469         },
 470
 471 //static    A_UINT8            ctl_index_5g[OSPREY_NUM_CTLS_5G]=
 472
 473         {
 474                     //pCtlIndex[0] =
 475                     0x10,
 476                     //pCtlIndex[1] =
 477                     0x16,
 478                     //pCtlIndex[2] =
 479                     0x18,
 480                     //pCtlIndex[3] =
 481                     0x40,
 482                     //pCtlIndex[4] =
 483                     0x46,
 484                     //pCtlIndex[5] =
 485                     0x48,
 486                     //pCtlIndex[6] =
 487                     0x30,
 488                     //pCtlIndex[7] =
 489                     0x36,
 490                 //pCtlIndex[8] =
 491                 0x38
 492         },
 493
 494 //    A_UINT8   ctl_freqbin_5G[OSPREY_NUM_CTLS_5G][OSPREY_NUM_BAND_EDGES_5G];
 495
 496         {
 497             {/* Data[0].ctl_edges[0].bChannel*/FREQ2FBIN(5180, 0),
 498             /* Data[0].ctl_edges[1].bChannel*/FREQ2FBIN(5260, 0),
 499             /* Data[0].ctl_edges[2].bChannel*/FREQ2FBIN(5280, 0),
 500             /* Data[0].ctl_edges[3].bChannel*/FREQ2FBIN(5500, 0),
 501             /* Data[0].ctl_edges[4].bChannel*/FREQ2FBIN(5600, 0),
 502             /* Data[0].ctl_edges[5].bChannel*/FREQ2FBIN(5700, 0),
 503             /* Data[0].ctl_edges[6].bChannel*/FREQ2FBIN(5745, 0),
 504             /* Data[0].ctl_edges[7].bChannel*/FREQ2FBIN(5825, 0)},
 505
 506             {/* Data[1].ctl_edges[0].bChannel*/FREQ2FBIN(5180, 0),
 507             /* Data[1].ctl_edges[1].bChannel*/FREQ2FBIN(5260, 0),
 508             /* Data[1].ctl_edges[2].bChannel*/FREQ2FBIN(5280, 0),
 509             /* Data[1].ctl_edges[3].bChannel*/FREQ2FBIN(5500, 0),
 510             /* Data[1].ctl_edges[4].bChannel*/FREQ2FBIN(5520, 0),
 511             /* Data[1].ctl_edges[5].bChannel*/FREQ2FBIN(5700, 0),
 512             /* Data[1].ctl_edges[6].bChannel*/FREQ2FBIN(5745, 0),
 513             /* Data[1].ctl_edges[7].bChannel*/FREQ2FBIN(5825, 0)},
 514
 515             {/* Data[2].ctl_edges[0].bChannel*/FREQ2FBIN(5190, 0),
 516             /* Data[2].ctl_edges[1].bChannel*/FREQ2FBIN(5230, 0),
 517             /* Data[2].ctl_edges[2].bChannel*/FREQ2FBIN(5270, 0),
 518             /* Data[2].ctl_edges[3].bChannel*/FREQ2FBIN(5310, 0),
 519             /* Data[2].ctl_edges[4].bChannel*/FREQ2FBIN(5510, 0),
 520             /* Data[2].ctl_edges[5].bChannel*/FREQ2FBIN(5550, 0),
 521             /* Data[2].ctl_edges[6].bChannel*/FREQ2FBIN(5670, 0),
 522             /* Data[2].ctl_edges[7].bChannel*/FREQ2FBIN(5755, 0)},
 523
 524             {/* Data[3].ctl_edges[0].bChannel*/FREQ2FBIN(5180, 0),
 525             /* Data[3].ctl_edges[1].bChannel*/FREQ2FBIN(5200, 0),
 526             /* Data[3].ctl_edges[2].bChannel*/FREQ2FBIN(5260, 0),
 527             /* Data[3].ctl_edges[3].bChannel*/FREQ2FBIN(5320, 0),
 528             /* Data[3].ctl_edges[4].bChannel*/FREQ2FBIN(5500, 0),
 529             /* Data[3].ctl_edges[5].bChannel*/FREQ2FBIN(5700, 0),
 530             /* Data[3].ctl_edges[6].bChannel*/0xFF,
 531             /* Data[3].ctl_edges[7].bChannel*/0xFF},
 532
 533             {/* Data[4].ctl_edges[0].bChannel*/FREQ2FBIN(5180, 0),
 534             /* Data[4].ctl_edges[1].bChannel*/FREQ2FBIN(5260, 0),
 535             /* Data[4].ctl_edges[2].bChannel*/FREQ2FBIN(5500, 0),
 536             /* Data[4].ctl_edges[3].bChannel*/FREQ2FBIN(5700, 0),
 537             /* Data[4].ctl_edges[4].bChannel*/0xFF,
 538             /* Data[4].ctl_edges[5].bChannel*/0xFF,
 539             /* Data[4].ctl_edges[6].bChannel*/0xFF,
 540             /* Data[4].ctl_edges[7].bChannel*/0xFF},
 541
 542             {/* Data[5].ctl_edges[0].bChannel*/FREQ2FBIN(5190, 0),
 543             /* Data[5].ctl_edges[1].bChannel*/FREQ2FBIN(5270, 0),
 544             /* Data[5].ctl_edges[2].bChannel*/FREQ2FBIN(5310, 0),
 545             /* Data[5].ctl_edges[3].bChannel*/FREQ2FBIN(5510, 0),
 546             /* Data[5].ctl_edges[4].bChannel*/FREQ2FBIN(5590, 0),
 547             /* Data[5].ctl_edges[5].bChannel*/FREQ2FBIN(5670, 0),
 548             /* Data[5].ctl_edges[6].bChannel*/0xFF,
 549             /* Data[5].ctl_edges[7].bChannel*/0xFF},
 550
 551             {/* Data[6].ctl_edges[0].bChannel*/FREQ2FBIN(5180, 0),
 552             /* Data[6].ctl_edges[1].bChannel*/FREQ2FBIN(5200, 0),
 553             /* Data[6].ctl_edges[2].bChannel*/FREQ2FBIN(5220, 0),
 554             /* Data[6].ctl_edges[3].bChannel*/FREQ2FBIN(5260, 0),
 555             /* Data[6].ctl_edges[4].bChannel*/FREQ2FBIN(5500, 0),
 556             /* Data[6].ctl_edges[5].bChannel*/FREQ2FBIN(5600, 0),
 557             /* Data[6].ctl_edges[6].bChannel*/FREQ2FBIN(5700, 0),
 558             /* Data[6].ctl_edges[7].bChannel*/FREQ2FBIN(5745, 0)},
 559
 560             {/* Data[7].ctl_edges[0].bChannel*/FREQ2FBIN(5180, 0),
 561             /* Data[7].ctl_edges[1].bChannel*/FREQ2FBIN(5260, 0),
 562             /* Data[7].ctl_edges[2].bChannel*/FREQ2FBIN(5320, 0),
 563             /* Data[7].ctl_edges[3].bChannel*/FREQ2FBIN(5500, 0),
 564             /* Data[7].ctl_edges[4].bChannel*/FREQ2FBIN(5560, 0),
 565             /* Data[7].ctl_edges[5].bChannel*/FREQ2FBIN(5700, 0),
 566             /* Data[7].ctl_edges[6].bChannel*/FREQ2FBIN(5745, 0),
 567             /* Data[7].ctl_edges[7].bChannel*/FREQ2FBIN(5825, 0)},
 568
 569             {/* Data[8].ctl_edges[0].bChannel*/FREQ2FBIN(5190, 0),
 570             /* Data[8].ctl_edges[1].bChannel*/FREQ2FBIN(5230, 0),
 571             /* Data[8].ctl_edges[2].bChannel*/FREQ2FBIN(5270, 0),
 572             /* Data[8].ctl_edges[3].bChannel*/FREQ2FBIN(5510, 0),
 573             /* Data[8].ctl_edges[4].bChannel*/FREQ2FBIN(5550, 0),
 574             /* Data[8].ctl_edges[5].bChannel*/FREQ2FBIN(5670, 0),
 575             /* Data[8].ctl_edges[6].bChannel*/FREQ2FBIN(5755, 0),
 576             /* Data[8].ctl_edges[7].bChannel*/FREQ2FBIN(5795, 0)}
 577         },
 578
 579 //static    OSP_CAL_CTL_DATA_5G   ctlData_5G[OSPREY_NUM_CTLS_5G]=
 580
 581 #if AH_BYTE_ORDER == AH_BIG_ENDIAN
 582         {
 583             {{{1, 60},
 584               {1, 60},
 585               {1, 60},
 586               {1, 60},
 587               {1, 60},
 588               {1, 60},
 589               {1, 60},
 590               {0, 60}}},
 591
 592             {{{1, 60},
 593               {1, 60},
 594               {1, 60},
 595               {1, 60},
 596               {1, 60},
 597               {1, 60},
 598               {1, 60},
 599               {0, 60}}},
 600
 601             {{{0, 60},
 602               {1, 60},
 603               {0, 60},
 604               {1, 60},
 605               {1, 60},
 606               {1, 60},
 607               {1, 60},
 608               {1, 60}}},
 609
 610             {{{0, 60},
 611               {1, 60},
 612               {1, 60},
 613               {0, 60},
 614               {1, 60},
 615               {0, 60},
 616               {0, 60},
 617               {0, 60}}},
 618
 619             {{{1, 60},
 620               {1, 60},
 621               {1, 60},
 622               {0, 60},
 623               {0, 60},
 624               {0, 60},
 625               {0, 60},
 626               {0, 60}}},
 627
 628             {{{1, 60},
 629               {1, 60},
 630               {1, 60},
 631               {1, 60},
 632               {1, 60},
 633               {0, 60},
 634               {0, 60},
 635               {0, 60}}},
 636
 637             {{{1, 60},
 638               {1, 60},
 639               {1, 60},
 640               {1, 60},
 641               {1, 60},
 642               {1, 60},
 643               {1, 60},
 644               {1, 60}}},
 645
 646             {{{1, 60},
 647               {1, 60},
 648               {0, 60},
 649               {1, 60},
 650               {1, 60},
 651               {1, 60},
 652               {1, 60},
 653               {0, 60}}},
 654
 655             {{{1, 60},
 656               {0, 60},
 657               {1, 60},
 658               {1, 60},
 659               {1, 60},
 660               {1, 60},
 661               {0, 60},
 662               {1, 60}}},
 663         }
 664 #else
 665         {
 666             {{{60, 1},
 667               {60, 1},
 668               {60, 1},
 669               {60, 1},
 670               {60, 1},
 671               {60, 1},
 672               {60, 1},
 673               {60, 0}}},
 674
 675             {{{60, 1},
 676               {60, 1},
 677               {60, 1},
 678               {60, 1},
 679               {60, 1},
 680               {60, 1},
 681               {60, 1},
 682               {60, 0}}},
 683
 684             {{{60, 0},
 685               {60, 1},
 686               {60, 0},
 687               {60, 1},
 688               {60, 1},
 689               {60, 1},
 690               {60, 1},
 691               {60, 1}}},
 692
 693             {{{60, 0},
 694               {60, 1},
 695               {60, 1},
 696               {60, 0},
 697               {60, 1},
 698               {60, 0},
 699               {60, 0},
 700               {60, 0}}},
 701
 702             {{{60, 1},
 703               {60, 1},
 704               {60, 1},
 705               {60, 0},
 706               {60, 0},
 707               {60, 0},
 708               {60, 0},
 709               {60, 0}}},
 710
 711             {{{60, 1},
 712               {60, 1},
 713               {60, 1},
 714               {60, 1},
 715               {60, 1},
 716               {60, 0},
 717               {60, 0},
 718               {60, 0}}},
 719
 720             {{{60, 1},
 721               {60, 1},
 722               {60, 1},
 723               {60, 1},
 724               {60, 1},
 725               {60, 1},
 726               {60, 1},
 727               {60, 1}}},
 728
 729             {{{60, 1},
 730               {60, 1},
 731               {60, 0},
 732               {60, 1},
 733               {60, 1},
 734               {60, 1},
 735               {60, 1},
 736               {60, 0}}},
 737
 738             {{{60, 1},
 739               {60, 0},
 740               {60, 1},
 741               {60, 1},
 742               {60, 1},
 743               {60, 1},
 744               {60, 0},
 745               {60, 1}}},
 746         }
 747 #endif
 748 };
 749
 750 #endif