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49 * Function and structure definitions for random number generator hardware
51 * <hr>$Revision: 70030 $<hr>
55 #ifndef __CMVX_RNG_H__
56 #define __CMVX_RNG_H__
62 #define CVMX_RNG_LOAD_ADDRESS CVMX_ADD_IO_SEG(cvmx_build_io_address(CVMX_OCT_DID_RNG, 0))
65 * Structure describing the data format used for IOBDMA stores to the RNG.
71 uint64_t scraddr : 8; /**< the (64-bit word) location in scratchpad to write to (if len != 0) */
72 uint64_t len : 8; /**< the number of words in the response (0 => no response) */
73 uint64_t did : 5; /**< the ID of the device on the non-coherent bus */
74 uint64_t subdid : 3; /**< the sub ID of the device on the non-coherent bus */
75 uint64_t addr :40; /**< the address that will appear in the first tick on the NCB bus */
77 } cvmx_rng_iobdma_data_t;
80 * Enables the random number generator. Must be called before RNG is used
82 static inline void cvmx_rng_enable(void)
84 cvmx_rnm_ctl_status_t rnm_ctl_status;
85 rnm_ctl_status.u64 = cvmx_read_csr(CVMX_RNM_CTL_STATUS);
86 rnm_ctl_status.s.ent_en = 1;
87 rnm_ctl_status.s.rng_en = 1;
88 cvmx_write_csr(CVMX_RNM_CTL_STATUS, rnm_ctl_status.u64);
91 * Reads 8 bits of random data from Random number generator
95 static inline uint8_t cvmx_rng_get_random8(void)
97 return cvmx_read64_uint8(CVMX_RNG_LOAD_ADDRESS);
101 * Reads 16 bits of random data from Random number generator
103 * @return random data
105 static inline uint16_t cvmx_rng_get_random16(void)
107 return cvmx_read64_uint16(CVMX_RNG_LOAD_ADDRESS);
111 * Reads 32 bits of random data from Random number generator
113 * @return random data
115 static inline uint32_t cvmx_rng_get_random32(void)
117 return cvmx_read64_uint32(CVMX_RNG_LOAD_ADDRESS);
121 * Reads 64 bits of random data from Random number generator
123 * @return random data
125 static inline uint64_t cvmx_rng_get_random64(void)
127 return cvmx_read64_uint64(CVMX_RNG_LOAD_ADDRESS);
131 * Requests random data from the RNG block asynchronously using and IOBDMA operation.
132 * The random data will be written into the cores
133 * local memory at the specified address. A SYNCIOBDMA
134 * operation should be issued to stall for completion of the write.
136 * @param scr_addr Address in scratch memory to put the result
137 * MUST be a multiple of 8 bytes
138 * @param num_bytes Number of bytes of random data to write at
140 * MUST be a multiple of 8 bytes
142 * @return 0 on success
145 static inline int cvmx_rng_request_random_async(uint64_t scr_addr, uint64_t num_bytes)
147 cvmx_rng_iobdma_data_t data;
149 if (num_bytes & 0x7 || scr_addr & 0x7)
153 /* scr_addr must be 8 byte aligned */
154 data.s.scraddr = scr_addr >> 3;
155 data.s.len = num_bytes >> 3;
156 data.s.did = CVMX_OCT_DID_RNG;
157 cvmx_send_single(data.u64);
165 #endif /* __CMVX_RNG_H__ */