2 ********************************************************************************
4 ** FILE NAME : arcmsr.c
5 ** BY : Erich Chen, Ching Huang
6 ** Description: SCSI RAID Device Driver for
7 ** ARECA (ARC11XX/ARC12XX/ARC13XX/ARC16XX/ARC188x)
8 ** SATA/SAS RAID HOST Adapter
9 ********************************************************************************
10 ********************************************************************************
12 ** Copyright (C) 2002 - 2012, Areca Technology Corporation All rights reserved.
14 ** Redistribution and use in source and binary forms, with or without
15 ** modification, are permitted provided that the following conditions
17 ** 1. Redistributions of source code must retain the above copyright
18 ** notice, this list of conditions and the following disclaimer.
19 ** 2. Redistributions in binary form must reproduce the above copyright
20 ** notice, this list of conditions and the following disclaimer in the
21 ** documentation and/or other materials provided with the distribution.
22 ** 3. The name of the author may not be used to endorse or promote products
23 ** derived from this software without specific prior written permission.
25 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
26 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
27 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
29 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, BUT
30 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
32 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33 **(INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
34 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 ********************************************************************************
38 ** REV# DATE NAME DESCRIPTION
39 ** 1.00.00.00 03/31/2004 Erich Chen First release
40 ** 1.20.00.02 11/29/2004 Erich Chen bug fix with arcmsr_bus_reset when PHY error
41 ** 1.20.00.03 04/19/2005 Erich Chen add SATA 24 Ports adapter type support
42 ** clean unused function
43 ** 1.20.00.12 09/12/2005 Erich Chen bug fix with abort command handling,
44 ** firmware version check
45 ** and firmware update notify for hardware bug fix
46 ** handling if none zero high part physical address
48 ** 1.20.00.13 08/18/2006 Erich Chen remove pending srb and report busy
49 ** add iop message xfer
50 ** with scsi pass-through command
51 ** add new device id of sas raid adapters
52 ** code fit for SPARC64 & PPC
53 ** 1.20.00.14 02/05/2007 Erich Chen bug fix for incorrect ccb_h.status report
54 ** and cause g_vfs_done() read write error
55 ** 1.20.00.15 10/10/2007 Erich Chen support new RAID adapter type ARC120x
56 ** 1.20.00.16 10/10/2009 Erich Chen Bug fix for RAID adapter type ARC120x
57 ** bus_dmamem_alloc() with BUS_DMA_ZERO
58 ** 1.20.00.17 07/15/2010 Ching Huang Added support ARC1880
59 ** report CAM_DEV_NOT_THERE instead of CAM_SEL_TIMEOUT when device failed,
60 ** prevent cam_periph_error removing all LUN devices of one Target id
61 ** for any one LUN device failed
62 ** 1.20.00.18 10/14/2010 Ching Huang Fixed "inquiry data fails comparion at DV1 step"
63 ** 10/25/2010 Ching Huang Fixed bad range input in bus_alloc_resource for ADAPTER_TYPE_B
64 ** 1.20.00.19 11/11/2010 Ching Huang Fixed arcmsr driver prevent arcsas support for Areca SAS HBA ARC13x0
65 ** 1.20.00.20 12/08/2010 Ching Huang Avoid calling atomic_set_int function
66 ** 1.20.00.21 02/08/2011 Ching Huang Implement I/O request timeout
67 ** 02/14/2011 Ching Huang Modified pktRequestCount
68 ** 1.20.00.21 03/03/2011 Ching Huang if a command timeout, then wait its ccb back before free it
69 ** 1.20.00.22 07/04/2011 Ching Huang Fixed multiple MTX panic
70 ** 1.20.00.23 10/28/2011 Ching Huang Added TIMEOUT_DELAY in case of too many HDDs need to start
71 ** 1.20.00.23 11/08/2011 Ching Huang Added report device transfer speed
72 ** 1.20.00.23 01/30/2012 Ching Huang Fixed Request requeued and Retrying command
73 ** 1.20.00.24 06/11/2012 Ching Huang Fixed return sense data condition
74 ** 1.20.00.25 08/17/2012 Ching Huang Fixed hotplug device no function on type A adapter
75 ** 1.20.00.26 12/14/2012 Ching Huang Added support ARC1214,1224,1264,1284
76 ** 1.20.00.27 05/06/2013 Ching Huang Fixed out standing cmd full on ARC-12x4
77 ** 1.20.00.28 09/13/2013 Ching Huang Removed recursive mutex in arcmsr_abort_dr_ccbs
78 ******************************************************************************************
81 #include <sys/cdefs.h>
82 __FBSDID("$FreeBSD$");
85 #define ARCMSR_DEBUG1 1
87 #include <sys/param.h>
88 #include <sys/systm.h>
89 #include <sys/malloc.h>
90 #include <sys/kernel.h>
92 #include <sys/queue.h>
94 #include <sys/devicestat.h>
95 #include <sys/kthread.h>
96 #include <sys/module.h>
99 #include <sys/sysctl.h>
100 #include <sys/poll.h>
101 #include <sys/ioccom.h>
103 #include <vm/vm_param.h>
108 #include <machine/bus.h>
109 #include <machine/resource.h>
110 #include <machine/atomic.h>
111 #include <sys/conf.h>
112 #include <sys/rman.h>
115 #include <cam/cam_ccb.h>
116 #include <cam/cam_sim.h>
117 #include <cam/cam_periph.h>
118 #include <cam/cam_xpt_periph.h>
119 #include <cam/cam_xpt_sim.h>
120 #include <cam/cam_debug.h>
121 #include <cam/scsi/scsi_all.h>
122 #include <cam/scsi/scsi_message.h>
124 **************************************************************************
125 **************************************************************************
127 #if __FreeBSD_version >= 500005
128 #include <sys/selinfo.h>
129 #include <sys/mutex.h>
130 #include <sys/endian.h>
131 #include <dev/pci/pcivar.h>
132 #include <dev/pci/pcireg.h>
134 #include <sys/select.h>
135 #include <pci/pcivar.h>
136 #include <pci/pcireg.h>
139 #if !defined(CAM_NEW_TRAN_CODE) && __FreeBSD_version >= 700025
140 #define CAM_NEW_TRAN_CODE 1
143 #if __FreeBSD_version > 500000
144 #define arcmsr_callout_init(a) callout_init(a, /*mpsafe*/1);
146 #define arcmsr_callout_init(a) callout_init(a);
149 #define ARCMSR_DRIVER_VERSION "arcmsr version 1.20.00.28 2013-09-13"
150 #include <dev/arcmsr/arcmsr.h>
152 **************************************************************************
153 **************************************************************************
155 static void arcmsr_free_srb(struct CommandControlBlock *srb);
156 static struct CommandControlBlock *arcmsr_get_freesrb(struct AdapterControlBlock *acb);
157 static u_int8_t arcmsr_seek_cmd2abort(union ccb *abortccb);
158 static int arcmsr_probe(device_t dev);
159 static int arcmsr_attach(device_t dev);
160 static int arcmsr_detach(device_t dev);
161 static u_int32_t arcmsr_iop_ioctlcmd(struct AdapterControlBlock *acb, u_int32_t ioctl_cmd, caddr_t arg);
162 static void arcmsr_iop_parking(struct AdapterControlBlock *acb);
163 static int arcmsr_shutdown(device_t dev);
164 static void arcmsr_interrupt(struct AdapterControlBlock *acb);
165 static void arcmsr_polling_srbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_srb);
166 static void arcmsr_free_resource(struct AdapterControlBlock *acb);
167 static void arcmsr_bus_reset(struct AdapterControlBlock *acb);
168 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb);
169 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb);
170 static void arcmsr_iop_init(struct AdapterControlBlock *acb);
171 static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb);
172 static u_int32_t arcmsr_Read_iop_rqbuffer_data(struct AdapterControlBlock *acb, struct QBUFFER *prbuffer);
173 static void arcmsr_Write_data_2iop_wqbuffer(struct AdapterControlBlock *acb);
174 static void arcmsr_abort_allcmd(struct AdapterControlBlock *acb);
175 static void arcmsr_srb_complete(struct CommandControlBlock *srb, int stand_flag);
176 static void arcmsr_iop_reset(struct AdapterControlBlock *acb);
177 static void arcmsr_report_sense_info(struct CommandControlBlock *srb);
178 static void arcmsr_build_srb(struct CommandControlBlock *srb, bus_dma_segment_t *dm_segs, u_int32_t nseg);
179 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, union ccb *pccb);
180 static int arcmsr_resume(device_t dev);
181 static int arcmsr_suspend(device_t dev);
182 static void arcmsr_rescanLun_cb(struct cam_periph *periph, union ccb *ccb);
183 static void arcmsr_polling_devmap(void *arg);
184 static void arcmsr_srb_timeout(void *arg);
185 static void arcmsr_hbd_postqueue_isr(struct AdapterControlBlock *acb);
187 static void arcmsr_dump_data(struct AdapterControlBlock *acb);
190 **************************************************************************
191 **************************************************************************
193 static void UDELAY(u_int32_t us) { DELAY(us); }
195 **************************************************************************
196 **************************************************************************
198 static bus_dmamap_callback_t arcmsr_map_free_srb;
199 static bus_dmamap_callback_t arcmsr_execute_srb;
201 **************************************************************************
202 **************************************************************************
204 static d_open_t arcmsr_open;
205 static d_close_t arcmsr_close;
206 static d_ioctl_t arcmsr_ioctl;
208 static device_method_t arcmsr_methods[]={
209 DEVMETHOD(device_probe, arcmsr_probe),
210 DEVMETHOD(device_attach, arcmsr_attach),
211 DEVMETHOD(device_detach, arcmsr_detach),
212 DEVMETHOD(device_shutdown, arcmsr_shutdown),
213 DEVMETHOD(device_suspend, arcmsr_suspend),
214 DEVMETHOD(device_resume, arcmsr_resume),
216 #if __FreeBSD_version >= 803000
223 static driver_t arcmsr_driver={
224 "arcmsr", arcmsr_methods, sizeof(struct AdapterControlBlock)
227 static devclass_t arcmsr_devclass;
228 DRIVER_MODULE(arcmsr, pci, arcmsr_driver, arcmsr_devclass, 0, 0);
229 MODULE_DEPEND(arcmsr, pci, 1, 1, 1);
230 MODULE_DEPEND(arcmsr, cam, 1, 1, 1);
231 #ifndef BUS_DMA_COHERENT
232 #define BUS_DMA_COHERENT 0x04 /* hint: map memory in a coherent way */
234 #if __FreeBSD_version >= 501000
235 static struct cdevsw arcmsr_cdevsw={
236 #if __FreeBSD_version >= 503000
237 .d_version = D_VERSION,
239 #if (__FreeBSD_version>=503000 && __FreeBSD_version<600034)
240 .d_flags = D_NEEDGIANT,
242 .d_open = arcmsr_open, /* open */
243 .d_close = arcmsr_close, /* close */
244 .d_ioctl = arcmsr_ioctl, /* ioctl */
245 .d_name = "arcmsr", /* name */
248 #define ARCMSR_CDEV_MAJOR 180
250 static struct cdevsw arcmsr_cdevsw = {
251 arcmsr_open, /* open */
252 arcmsr_close, /* close */
255 arcmsr_ioctl, /* ioctl */
258 nostrategy, /* strategy */
260 ARCMSR_CDEV_MAJOR, /* major */
267 **************************************************************************
268 **************************************************************************
270 #if __FreeBSD_version < 500005
271 static int arcmsr_open(dev_t dev, int flags, int fmt, struct proc *proc)
273 #if __FreeBSD_version < 503000
274 static int arcmsr_open(dev_t dev, int flags, int fmt, struct thread *proc)
276 static int arcmsr_open(struct cdev *dev, int flags, int fmt, struct thread *proc)
280 #if __FreeBSD_version < 503000
281 struct AdapterControlBlock *acb = dev->si_drv1;
283 int unit = dev2unit(dev);
284 struct AdapterControlBlock *acb = devclass_get_softc(arcmsr_devclass, unit);
292 **************************************************************************
293 **************************************************************************
295 #if __FreeBSD_version < 500005
296 static int arcmsr_close(dev_t dev, int flags, int fmt, struct proc *proc)
298 #if __FreeBSD_version < 503000
299 static int arcmsr_close(dev_t dev, int flags, int fmt, struct thread *proc)
301 static int arcmsr_close(struct cdev *dev, int flags, int fmt, struct thread *proc)
305 #if __FreeBSD_version < 503000
306 struct AdapterControlBlock *acb = dev->si_drv1;
308 int unit = dev2unit(dev);
309 struct AdapterControlBlock *acb = devclass_get_softc(arcmsr_devclass, unit);
317 **************************************************************************
318 **************************************************************************
320 #if __FreeBSD_version < 500005
321 static int arcmsr_ioctl(dev_t dev, u_long ioctl_cmd, caddr_t arg, int flags, struct proc *proc)
323 #if __FreeBSD_version < 503000
324 static int arcmsr_ioctl(dev_t dev, u_long ioctl_cmd, caddr_t arg, int flags, struct thread *proc)
326 static int arcmsr_ioctl(struct cdev *dev, u_long ioctl_cmd, caddr_t arg, int flags, struct thread *proc)
330 #if __FreeBSD_version < 503000
331 struct AdapterControlBlock *acb = dev->si_drv1;
333 int unit = dev2unit(dev);
334 struct AdapterControlBlock *acb = devclass_get_softc(arcmsr_devclass, unit);
340 return (arcmsr_iop_ioctlcmd(acb, ioctl_cmd, arg));
343 **********************************************************************
344 **********************************************************************
346 static u_int32_t arcmsr_disable_allintr( struct AdapterControlBlock *acb)
348 u_int32_t intmask_org = 0;
350 switch (acb->adapter_type) {
351 case ACB_ADAPTER_TYPE_A: {
352 /* disable all outbound interrupt */
353 intmask_org = CHIP_REG_READ32(HBA_MessageUnit, 0, outbound_intmask); /* disable outbound message0 int */
354 CHIP_REG_WRITE32(HBA_MessageUnit, 0, outbound_intmask, intmask_org|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE);
357 case ACB_ADAPTER_TYPE_B: {
358 /* disable all outbound interrupt */
359 intmask_org = CHIP_REG_READ32(HBB_DOORBELL,
360 0, iop2drv_doorbell_mask) & (~ARCMSR_IOP2DRV_MESSAGE_CMD_DONE); /* disable outbound message0 int */
361 CHIP_REG_WRITE32(HBB_DOORBELL, 0, iop2drv_doorbell_mask, 0); /* disable all interrupt */
364 case ACB_ADAPTER_TYPE_C: {
365 /* disable all outbound interrupt */
366 intmask_org = CHIP_REG_READ32(HBC_MessageUnit, 0, host_int_mask) ; /* disable outbound message0 int */
367 CHIP_REG_WRITE32(HBC_MessageUnit, 0, host_int_mask, intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE);
370 case ACB_ADAPTER_TYPE_D: {
371 /* disable all outbound interrupt */
372 intmask_org = CHIP_REG_READ32(HBD_MessageUnit, 0, pcief0_int_enable) ; /* disable outbound message0 int */
373 CHIP_REG_WRITE32(HBD_MessageUnit, 0, pcief0_int_enable, ARCMSR_HBDMU_ALL_INT_DISABLE);
377 return (intmask_org);
380 **********************************************************************
381 **********************************************************************
383 static void arcmsr_enable_allintr( struct AdapterControlBlock *acb, u_int32_t intmask_org)
387 switch (acb->adapter_type) {
388 case ACB_ADAPTER_TYPE_A: {
389 /* enable outbound Post Queue, outbound doorbell Interrupt */
390 mask = ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE|ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE);
391 CHIP_REG_WRITE32(HBA_MessageUnit, 0, outbound_intmask, intmask_org & mask);
392 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
395 case ACB_ADAPTER_TYPE_B: {
396 /* enable ARCMSR_IOP2DRV_MESSAGE_CMD_DONE */
397 mask = (ARCMSR_IOP2DRV_DATA_WRITE_OK|ARCMSR_IOP2DRV_DATA_READ_OK|ARCMSR_IOP2DRV_CDB_DONE|ARCMSR_IOP2DRV_MESSAGE_CMD_DONE);
398 CHIP_REG_WRITE32(HBB_DOORBELL, 0, iop2drv_doorbell_mask, intmask_org | mask); /*1=interrupt enable, 0=interrupt disable*/
399 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f;
402 case ACB_ADAPTER_TYPE_C: {
403 /* enable outbound Post Queue, outbound doorbell Interrupt */
404 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK);
405 CHIP_REG_WRITE32(HBC_MessageUnit, 0, host_int_mask, intmask_org & mask);
406 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f;
409 case ACB_ADAPTER_TYPE_D: {
410 /* enable outbound Post Queue, outbound doorbell Interrupt */
411 mask = ARCMSR_HBDMU_ALL_INT_ENABLE;
412 CHIP_REG_WRITE32(HBD_MessageUnit, 0, pcief0_int_enable, intmask_org | mask);
413 CHIP_REG_READ32(HBD_MessageUnit, 0, pcief0_int_enable);
414 acb->outbound_int_enable = mask;
420 **********************************************************************
421 **********************************************************************
423 static u_int8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb)
426 u_int8_t Retries = 0x00;
429 for(Index=0; Index < 100; Index++) {
430 if(CHIP_REG_READ32(HBA_MessageUnit, 0, outbound_intstatus) & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
431 CHIP_REG_WRITE32(HBA_MessageUnit, 0, outbound_intstatus, ARCMSR_MU_OUTBOUND_MESSAGE0_INT);/*clear interrupt*/
436 }while(Retries++ < 20);/*max 20 sec*/
440 **********************************************************************
441 **********************************************************************
443 static u_int8_t arcmsr_hbb_wait_msgint_ready(struct AdapterControlBlock *acb)
446 u_int8_t Retries = 0x00;
449 for(Index=0; Index < 100; Index++) {
450 if(CHIP_REG_READ32(HBB_DOORBELL, 0, iop2drv_doorbell) & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
451 CHIP_REG_WRITE32(HBB_DOORBELL, 0, iop2drv_doorbell, ARCMSR_MESSAGE_INT_CLEAR_PATTERN);/*clear interrupt*/
452 CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_DRV2IOP_END_OF_INTERRUPT);
457 }while(Retries++ < 20);/*max 20 sec*/
461 **********************************************************************
462 **********************************************************************
464 static u_int8_t arcmsr_hbc_wait_msgint_ready(struct AdapterControlBlock *acb)
467 u_int8_t Retries = 0x00;
470 for(Index=0; Index < 100; Index++) {
471 if(CHIP_REG_READ32(HBC_MessageUnit, 0, outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
472 CHIP_REG_WRITE32(HBC_MessageUnit, 0, outbound_doorbell_clear, ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR);/*clear interrupt*/
477 }while(Retries++ < 20);/*max 20 sec*/
481 **********************************************************************
482 **********************************************************************
484 static u_int8_t arcmsr_hbd_wait_msgint_ready(struct AdapterControlBlock *acb)
487 u_int8_t Retries = 0x00;
490 for(Index=0; Index < 100; Index++) {
491 if(CHIP_REG_READ32(HBD_MessageUnit, 0, outbound_doorbell) & ARCMSR_HBDMU_IOP2DRV_MESSAGE_CMD_DONE) {
492 CHIP_REG_WRITE32(HBD_MessageUnit, 0, outbound_doorbell, ARCMSR_HBDMU_IOP2DRV_MESSAGE_CMD_DONE_CLEAR);/*clear interrupt*/
497 }while(Retries++ < 20);/*max 20 sec*/
501 ************************************************************************
502 ************************************************************************
504 static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb)
506 int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */
508 CHIP_REG_WRITE32(HBA_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_FLUSH_CACHE);
510 if(arcmsr_hba_wait_msgint_ready(acb)) {
515 }while(retry_count != 0);
518 ************************************************************************
519 ************************************************************************
521 static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb)
523 int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */
525 CHIP_REG_WRITE32(HBB_DOORBELL,
526 0, drv2iop_doorbell, ARCMSR_MESSAGE_FLUSH_CACHE);
528 if(arcmsr_hbb_wait_msgint_ready(acb)) {
533 }while(retry_count != 0);
536 ************************************************************************
537 ************************************************************************
539 static void arcmsr_flush_hbc_cache(struct AdapterControlBlock *acb)
541 int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */
543 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_FLUSH_CACHE);
544 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE);
546 if(arcmsr_hbc_wait_msgint_ready(acb)) {
551 }while(retry_count != 0);
554 ************************************************************************
555 ************************************************************************
557 static void arcmsr_flush_hbd_cache(struct AdapterControlBlock *acb)
559 int retry_count = 30; /* enlarge wait flush adapter cache time: 10 minute */
561 CHIP_REG_WRITE32(HBD_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_FLUSH_CACHE);
563 if(arcmsr_hbd_wait_msgint_ready(acb)) {
568 }while(retry_count != 0);
571 ************************************************************************
572 ************************************************************************
574 static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
576 switch (acb->adapter_type) {
577 case ACB_ADAPTER_TYPE_A: {
578 arcmsr_flush_hba_cache(acb);
581 case ACB_ADAPTER_TYPE_B: {
582 arcmsr_flush_hbb_cache(acb);
585 case ACB_ADAPTER_TYPE_C: {
586 arcmsr_flush_hbc_cache(acb);
589 case ACB_ADAPTER_TYPE_D: {
590 arcmsr_flush_hbd_cache(acb);
596 *******************************************************************************
597 *******************************************************************************
599 static int arcmsr_suspend(device_t dev)
601 struct AdapterControlBlock *acb = device_get_softc(dev);
603 /* flush controller */
604 arcmsr_iop_parking(acb);
605 /* disable all outbound interrupt */
606 arcmsr_disable_allintr(acb);
610 *******************************************************************************
611 *******************************************************************************
613 static int arcmsr_resume(device_t dev)
615 struct AdapterControlBlock *acb = device_get_softc(dev);
617 arcmsr_iop_init(acb);
621 *********************************************************************************
622 *********************************************************************************
624 static void arcmsr_async(void *cb_arg, u_int32_t code, struct cam_path *path, void *arg)
626 struct AdapterControlBlock *acb;
627 u_int8_t target_id, target_lun;
630 sim = (struct cam_sim *) cb_arg;
631 acb =(struct AdapterControlBlock *) cam_sim_softc(sim);
634 target_id = xpt_path_target_id(path);
635 target_lun = xpt_path_lun_id(path);
636 if((target_id > ARCMSR_MAX_TARGETID) || (target_lun > ARCMSR_MAX_TARGETLUN)) {
639 // printf("%s:scsi id=%d lun=%d device lost \n", device_get_name(acb->pci_dev), target_id, target_lun);
646 **********************************************************************
647 **********************************************************************
649 static void arcmsr_report_sense_info(struct CommandControlBlock *srb)
651 union ccb *pccb = srb->pccb;
653 pccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR;
654 pccb->csio.scsi_status = SCSI_STATUS_CHECK_COND;
655 if(pccb->csio.sense_len) {
656 memset(&pccb->csio.sense_data, 0, sizeof(pccb->csio.sense_data));
657 memcpy(&pccb->csio.sense_data, srb->arcmsr_cdb.SenseData,
658 get_min(sizeof(struct SENSE_DATA), sizeof(pccb->csio.sense_data)));
659 ((u_int8_t *)&pccb->csio.sense_data)[0] = (0x1 << 7 | 0x70); /* Valid,ErrorCode */
660 pccb->ccb_h.status |= CAM_AUTOSNS_VALID;
664 *********************************************************************
665 *********************************************************************
667 static void arcmsr_abort_hba_allcmd(struct AdapterControlBlock *acb)
669 CHIP_REG_WRITE32(HBA_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_ABORT_CMD);
670 if(!arcmsr_hba_wait_msgint_ready(acb)) {
671 printf("arcmsr%d: wait 'abort all outstanding command' timeout \n", acb->pci_unit);
675 *********************************************************************
676 *********************************************************************
678 static void arcmsr_abort_hbb_allcmd(struct AdapterControlBlock *acb)
680 CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_MESSAGE_ABORT_CMD);
681 if(!arcmsr_hbb_wait_msgint_ready(acb)) {
682 printf("arcmsr%d: wait 'abort all outstanding command' timeout \n", acb->pci_unit);
686 *********************************************************************
687 *********************************************************************
689 static void arcmsr_abort_hbc_allcmd(struct AdapterControlBlock *acb)
691 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_ABORT_CMD);
692 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE);
693 if(!arcmsr_hbc_wait_msgint_ready(acb)) {
694 printf("arcmsr%d: wait 'abort all outstanding command' timeout \n", acb->pci_unit);
698 *********************************************************************
699 *********************************************************************
701 static void arcmsr_abort_hbd_allcmd(struct AdapterControlBlock *acb)
703 CHIP_REG_WRITE32(HBD_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_ABORT_CMD);
704 if(!arcmsr_hbd_wait_msgint_ready(acb)) {
705 printf("arcmsr%d: wait 'abort all outstanding command' timeout \n", acb->pci_unit);
709 *********************************************************************
710 *********************************************************************
712 static void arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
714 switch (acb->adapter_type) {
715 case ACB_ADAPTER_TYPE_A: {
716 arcmsr_abort_hba_allcmd(acb);
719 case ACB_ADAPTER_TYPE_B: {
720 arcmsr_abort_hbb_allcmd(acb);
723 case ACB_ADAPTER_TYPE_C: {
724 arcmsr_abort_hbc_allcmd(acb);
727 case ACB_ADAPTER_TYPE_D: {
728 arcmsr_abort_hbd_allcmd(acb);
734 **********************************************************************
735 **********************************************************************
737 static void arcmsr_srb_complete(struct CommandControlBlock *srb, int stand_flag)
739 struct AdapterControlBlock *acb = srb->acb;
740 union ccb *pccb = srb->pccb;
742 if(srb->srb_flags & SRB_FLAG_TIMER_START)
743 callout_stop(&srb->ccb_callout);
744 if((pccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
747 if((pccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
748 op = BUS_DMASYNC_POSTREAD;
750 op = BUS_DMASYNC_POSTWRITE;
752 bus_dmamap_sync(acb->dm_segs_dmat, srb->dm_segs_dmamap, op);
753 bus_dmamap_unload(acb->dm_segs_dmat, srb->dm_segs_dmamap);
755 if(stand_flag == 1) {
756 atomic_subtract_int(&acb->srboutstandingcount, 1);
757 if((acb->acb_flags & ACB_F_CAM_DEV_QFRZN) && (
758 acb->srboutstandingcount < (acb->maxOutstanding -10))) {
759 acb->acb_flags &= ~ACB_F_CAM_DEV_QFRZN;
760 pccb->ccb_h.status |= CAM_RELEASE_SIMQ;
763 if(srb->srb_state != ARCMSR_SRB_TIMEOUT)
764 arcmsr_free_srb(srb);
765 acb->pktReturnCount++;
769 **************************************************************************
770 **************************************************************************
772 static void arcmsr_report_srb_state(struct AdapterControlBlock *acb, struct CommandControlBlock *srb, u_int16_t error)
776 target = srb->pccb->ccb_h.target_id;
777 lun = srb->pccb->ccb_h.target_lun;
779 if(acb->devstate[target][lun] == ARECA_RAID_GONE) {
780 acb->devstate[target][lun] = ARECA_RAID_GOOD;
782 srb->pccb->ccb_h.status |= CAM_REQ_CMP;
783 arcmsr_srb_complete(srb, 1);
785 switch(srb->arcmsr_cdb.DeviceStatus) {
786 case ARCMSR_DEV_SELECT_TIMEOUT: {
787 if(acb->devstate[target][lun] == ARECA_RAID_GOOD) {
788 printf( "arcmsr%d: Target=%x, Lun=%x, selection timeout, raid volume was lost\n", acb->pci_unit, target, lun);
790 acb->devstate[target][lun] = ARECA_RAID_GONE;
791 srb->pccb->ccb_h.status |= CAM_DEV_NOT_THERE;
792 arcmsr_srb_complete(srb, 1);
795 case ARCMSR_DEV_ABORTED:
796 case ARCMSR_DEV_INIT_FAIL: {
797 acb->devstate[target][lun] = ARECA_RAID_GONE;
798 srb->pccb->ccb_h.status |= CAM_DEV_NOT_THERE;
799 arcmsr_srb_complete(srb, 1);
802 case SCSISTAT_CHECK_CONDITION: {
803 acb->devstate[target][lun] = ARECA_RAID_GOOD;
804 arcmsr_report_sense_info(srb);
805 arcmsr_srb_complete(srb, 1);
809 printf("arcmsr%d: scsi id=%d lun=%d isr got command error done,but got unknown DeviceStatus=0x%x \n"
810 , acb->pci_unit, target, lun ,srb->arcmsr_cdb.DeviceStatus);
811 acb->devstate[target][lun] = ARECA_RAID_GONE;
812 srb->pccb->ccb_h.status |= CAM_UNCOR_PARITY;
813 /*unknown error or crc error just for retry*/
814 arcmsr_srb_complete(srb, 1);
820 **************************************************************************
821 **************************************************************************
823 static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, u_int32_t flag_srb, u_int16_t error)
825 struct CommandControlBlock *srb;
827 /* check if command done with no error*/
828 switch (acb->adapter_type) {
829 case ACB_ADAPTER_TYPE_C:
830 case ACB_ADAPTER_TYPE_D:
831 srb = (struct CommandControlBlock *)(acb->vir2phy_offset+(flag_srb & 0xFFFFFFE0)); /*frame must be 32 bytes aligned*/
833 case ACB_ADAPTER_TYPE_A:
834 case ACB_ADAPTER_TYPE_B:
836 srb = (struct CommandControlBlock *)(acb->vir2phy_offset+(flag_srb << 5));/*frame must be 32 bytes aligned*/
839 if((srb->acb != acb) || (srb->srb_state != ARCMSR_SRB_START)) {
840 if(srb->srb_state == ARCMSR_SRB_TIMEOUT) {
841 arcmsr_free_srb(srb);
842 printf("arcmsr%d: srb='%p' return srb has been timeouted\n", acb->pci_unit, srb);
845 printf("arcmsr%d: return srb has been completed\n"
846 "srb='%p' srb_state=0x%x outstanding srb count=%d \n",
847 acb->pci_unit, srb, srb->srb_state, acb->srboutstandingcount);
850 arcmsr_report_srb_state(acb, srb, error);
853 **************************************************************************
854 **************************************************************************
856 static void arcmsr_srb_timeout(void *arg)
858 struct CommandControlBlock *srb = (struct CommandControlBlock *)arg;
859 struct AdapterControlBlock *acb;
863 target = srb->pccb->ccb_h.target_id;
864 lun = srb->pccb->ccb_h.target_lun;
866 ARCMSR_LOCK_ACQUIRE(&acb->isr_lock);
867 if(srb->srb_state == ARCMSR_SRB_START)
869 cmd = srb->pccb->csio.cdb_io.cdb_bytes[0];
870 srb->srb_state = ARCMSR_SRB_TIMEOUT;
871 srb->pccb->ccb_h.status |= CAM_CMD_TIMEOUT;
872 arcmsr_srb_complete(srb, 1);
873 printf("arcmsr%d: scsi id %d lun %d cmd=0x%x srb='%p' ccb command time out!\n",
874 acb->pci_unit, target, lun, cmd, srb);
876 ARCMSR_LOCK_RELEASE(&acb->isr_lock);
878 arcmsr_dump_data(acb);
883 **********************************************************************
884 **********************************************************************
886 static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
892 switch (acb->adapter_type) {
893 case ACB_ADAPTER_TYPE_A: {
894 u_int32_t outbound_intstatus;
896 /*clear and abort all outbound posted Q*/
897 outbound_intstatus = CHIP_REG_READ32(HBA_MessageUnit, 0, outbound_intstatus) & acb->outbound_int_enable;
898 CHIP_REG_WRITE32(HBA_MessageUnit, 0, outbound_intstatus, outbound_intstatus);/*clear interrupt*/
899 while(((flag_srb=CHIP_REG_READ32(HBA_MessageUnit, 0, outbound_queueport)) != 0xFFFFFFFF) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
900 error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE;
901 arcmsr_drain_donequeue(acb, flag_srb, error);
905 case ACB_ADAPTER_TYPE_B: {
906 struct HBB_MessageUnit *phbbmu=(struct HBB_MessageUnit *)acb->pmu;
908 /*clear all outbound posted Q*/
909 CHIP_REG_WRITE32(HBB_DOORBELL, 0, iop2drv_doorbell, ARCMSR_DOORBELL_INT_CLEAR_PATTERN); /* clear doorbell interrupt */
910 for(i=0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
911 if((flag_srb = phbbmu->done_qbuffer[i]) != 0) {
912 phbbmu->done_qbuffer[i] = 0;
913 error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE;
914 arcmsr_drain_donequeue(acb, flag_srb, error);
916 phbbmu->post_qbuffer[i] = 0;
917 }/*drain reply FIFO*/
918 phbbmu->doneq_index = 0;
919 phbbmu->postq_index = 0;
922 case ACB_ADAPTER_TYPE_C: {
924 while((CHIP_REG_READ32(HBC_MessageUnit, 0, host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
925 flag_srb = CHIP_REG_READ32(HBC_MessageUnit, 0, outbound_queueport_low);
926 error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE1) ? TRUE : FALSE;
927 arcmsr_drain_donequeue(acb, flag_srb, error);
931 case ACB_ADAPTER_TYPE_D: {
932 arcmsr_hbd_postqueue_isr(acb);
938 ****************************************************************************
939 ****************************************************************************
941 static void arcmsr_iop_reset(struct AdapterControlBlock *acb)
943 struct CommandControlBlock *srb;
944 u_int32_t intmask_org;
947 if(acb->srboutstandingcount>0) {
948 /* disable all outbound interrupt */
949 intmask_org = arcmsr_disable_allintr(acb);
950 /*clear and abort all outbound posted Q*/
951 arcmsr_done4abort_postqueue(acb);
952 /* talk to iop 331 outstanding command aborted*/
953 arcmsr_abort_allcmd(acb);
954 for(i=0; i < ARCMSR_MAX_FREESRB_NUM; i++) {
955 srb = acb->psrb_pool[i];
956 if(srb->srb_state == ARCMSR_SRB_START) {
957 srb->srb_state = ARCMSR_SRB_ABORTED;
958 srb->pccb->ccb_h.status |= CAM_REQ_ABORTED;
959 arcmsr_srb_complete(srb, 1);
960 printf("arcmsr%d: scsi id=%d lun=%d srb='%p' aborted\n"
961 , acb->pci_unit, srb->pccb->ccb_h.target_id
962 , srb->pccb->ccb_h.target_lun, srb);
965 /* enable all outbound interrupt */
966 arcmsr_enable_allintr(acb, intmask_org);
968 acb->srboutstandingcount = 0;
969 acb->workingsrb_doneindex = 0;
970 acb->workingsrb_startindex = 0;
971 acb->pktRequestCount = 0;
972 acb->pktReturnCount = 0;
975 **********************************************************************
976 **********************************************************************
978 static void arcmsr_build_srb(struct CommandControlBlock *srb,
979 bus_dma_segment_t *dm_segs, u_int32_t nseg)
981 struct ARCMSR_CDB *arcmsr_cdb = &srb->arcmsr_cdb;
982 u_int8_t *psge = (u_int8_t *)&arcmsr_cdb->u;
983 u_int32_t address_lo, address_hi;
984 union ccb *pccb = srb->pccb;
985 struct ccb_scsiio *pcsio = &pccb->csio;
986 u_int32_t arccdbsize = 0x30;
988 memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB));
990 arcmsr_cdb->TargetID = pccb->ccb_h.target_id;
991 arcmsr_cdb->LUN = pccb->ccb_h.target_lun;
992 arcmsr_cdb->Function = 1;
993 arcmsr_cdb->CdbLength = (u_int8_t)pcsio->cdb_len;
994 bcopy(pcsio->cdb_io.cdb_bytes, arcmsr_cdb->Cdb, pcsio->cdb_len);
996 struct AdapterControlBlock *acb = srb->acb;
998 u_int32_t length, i, cdb_sgcount = 0;
1000 if((pccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
1001 op = BUS_DMASYNC_PREREAD;
1003 op = BUS_DMASYNC_PREWRITE;
1004 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE;
1005 srb->srb_flags |= SRB_FLAG_WRITE;
1007 bus_dmamap_sync(acb->dm_segs_dmat, srb->dm_segs_dmamap, op);
1008 for(i=0; i < nseg; i++) {
1009 /* Get the physical address of the current data pointer */
1010 length = arcmsr_htole32(dm_segs[i].ds_len);
1011 address_lo = arcmsr_htole32(dma_addr_lo32(dm_segs[i].ds_addr));
1012 address_hi = arcmsr_htole32(dma_addr_hi32(dm_segs[i].ds_addr));
1013 if(address_hi == 0) {
1014 struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
1015 pdma_sg->address = address_lo;
1016 pdma_sg->length = length;
1017 psge += sizeof(struct SG32ENTRY);
1018 arccdbsize += sizeof(struct SG32ENTRY);
1020 u_int32_t sg64s_size = 0, tmplength = length;
1023 u_int64_t span4G, length0;
1024 struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
1026 span4G = (u_int64_t)address_lo + tmplength;
1027 pdma_sg->addresshigh = address_hi;
1028 pdma_sg->address = address_lo;
1029 if(span4G > 0x100000000) {
1030 /*see if cross 4G boundary*/
1031 length0 = 0x100000000-address_lo;
1032 pdma_sg->length = (u_int32_t)length0 | IS_SG64_ADDR;
1033 address_hi = address_hi+1;
1035 tmplength = tmplength - (u_int32_t)length0;
1036 sg64s_size += sizeof(struct SG64ENTRY);
1037 psge += sizeof(struct SG64ENTRY);
1040 pdma_sg->length = tmplength | IS_SG64_ADDR;
1041 sg64s_size += sizeof(struct SG64ENTRY);
1042 psge += sizeof(struct SG64ENTRY);
1046 arccdbsize += sg64s_size;
1050 arcmsr_cdb->sgcount = (u_int8_t)cdb_sgcount;
1051 arcmsr_cdb->DataLength = pcsio->dxfer_len;
1052 if( arccdbsize > 256) {
1053 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE;
1056 arcmsr_cdb->DataLength = 0;
1058 srb->arc_cdb_size = arccdbsize;
1059 arcmsr_cdb->msgPages = (arccdbsize/256) + ((arccdbsize % 256) ? 1 : 0);
1062 **************************************************************************
1063 **************************************************************************
1065 static void arcmsr_post_srb(struct AdapterControlBlock *acb, struct CommandControlBlock *srb)
1067 u_int32_t cdb_phyaddr_low = (u_int32_t) srb->cdb_phyaddr_low;
1068 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&srb->arcmsr_cdb;
1070 bus_dmamap_sync(acb->srb_dmat, acb->srb_dmamap, (srb->srb_flags & SRB_FLAG_WRITE) ? BUS_DMASYNC_POSTWRITE:BUS_DMASYNC_POSTREAD);
1071 atomic_add_int(&acb->srboutstandingcount, 1);
1072 srb->srb_state = ARCMSR_SRB_START;
1074 switch (acb->adapter_type) {
1075 case ACB_ADAPTER_TYPE_A: {
1076 if(arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) {
1077 CHIP_REG_WRITE32(HBA_MessageUnit, 0, inbound_queueport, cdb_phyaddr_low|ARCMSR_SRBPOST_FLAG_SGL_BSIZE);
1079 CHIP_REG_WRITE32(HBA_MessageUnit, 0, inbound_queueport, cdb_phyaddr_low);
1083 case ACB_ADAPTER_TYPE_B: {
1084 struct HBB_MessageUnit *phbbmu = (struct HBB_MessageUnit *)acb->pmu;
1085 int ending_index, index;
1087 index = phbbmu->postq_index;
1088 ending_index = ((index+1) % ARCMSR_MAX_HBB_POSTQUEUE);
1089 phbbmu->post_qbuffer[ending_index] = 0;
1090 if(arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) {
1091 phbbmu->post_qbuffer[index] = cdb_phyaddr_low | ARCMSR_SRBPOST_FLAG_SGL_BSIZE;
1093 phbbmu->post_qbuffer[index] = cdb_phyaddr_low;
1096 index %= ARCMSR_MAX_HBB_POSTQUEUE; /*if last index number set it to 0 */
1097 phbbmu->postq_index = index;
1098 CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_DRV2IOP_CDB_POSTED);
1101 case ACB_ADAPTER_TYPE_C: {
1102 u_int32_t ccb_post_stamp, arc_cdb_size, cdb_phyaddr_hi32;
1104 arc_cdb_size = (srb->arc_cdb_size > 0x300) ? 0x300 : srb->arc_cdb_size;
1105 ccb_post_stamp = (cdb_phyaddr_low | ((arc_cdb_size-1) >> 6) | 1);
1106 cdb_phyaddr_hi32 = acb->srb_phyaddr.B.phyadd_high;
1107 if(cdb_phyaddr_hi32)
1109 CHIP_REG_WRITE32(HBC_MessageUnit,0,inbound_queueport_high, cdb_phyaddr_hi32);
1110 CHIP_REG_WRITE32(HBC_MessageUnit,0,inbound_queueport_low, ccb_post_stamp);
1114 CHIP_REG_WRITE32(HBC_MessageUnit,0,inbound_queueport_low, ccb_post_stamp);
1118 case ACB_ADAPTER_TYPE_D: {
1119 struct HBD_MessageUnit0 *phbdmu = (struct HBD_MessageUnit0 *)acb->pmu;
1120 u_int16_t index_stripped;
1121 u_int16_t postq_index;
1122 struct InBound_SRB *pinbound_srb;
1124 ARCMSR_LOCK_ACQUIRE(&acb->postDone_lock);
1125 postq_index = phbdmu->postq_index;
1126 pinbound_srb = (struct InBound_SRB *)&phbdmu->post_qbuffer[postq_index & 0xFF];
1127 pinbound_srb->addressHigh = srb->cdb_phyaddr_high;
1128 pinbound_srb->addressLow = srb->cdb_phyaddr_low;
1129 pinbound_srb->length = srb->arc_cdb_size >> 2;
1130 arcmsr_cdb->Context = srb->cdb_phyaddr_low;
1131 if (postq_index & 0x4000) {
1132 index_stripped = postq_index & 0xFF;
1133 index_stripped += 1;
1134 index_stripped %= ARCMSR_MAX_HBD_POSTQUEUE;
1135 phbdmu->postq_index = index_stripped ? (index_stripped | 0x4000) : index_stripped;
1137 index_stripped = postq_index;
1138 index_stripped += 1;
1139 index_stripped %= ARCMSR_MAX_HBD_POSTQUEUE;
1140 phbdmu->postq_index = index_stripped ? index_stripped : (index_stripped | 0x4000);
1142 CHIP_REG_WRITE32(HBD_MessageUnit, 0, inboundlist_write_pointer, postq_index);
1143 ARCMSR_LOCK_RELEASE(&acb->postDone_lock);
1149 ************************************************************************
1150 ************************************************************************
1152 static struct QBUFFER *arcmsr_get_iop_rqbuffer( struct AdapterControlBlock *acb)
1154 struct QBUFFER *qbuffer=NULL;
1156 switch (acb->adapter_type) {
1157 case ACB_ADAPTER_TYPE_A: {
1158 struct HBA_MessageUnit *phbamu = (struct HBA_MessageUnit *)acb->pmu;
1160 qbuffer = (struct QBUFFER *)&phbamu->message_rbuffer;
1163 case ACB_ADAPTER_TYPE_B: {
1164 struct HBB_MessageUnit *phbbmu = (struct HBB_MessageUnit *)acb->pmu;
1166 qbuffer = (struct QBUFFER *)&phbbmu->hbb_rwbuffer->message_rbuffer;
1169 case ACB_ADAPTER_TYPE_C: {
1170 struct HBC_MessageUnit *phbcmu = (struct HBC_MessageUnit *)acb->pmu;
1172 qbuffer = (struct QBUFFER *)&phbcmu->message_rbuffer;
1175 case ACB_ADAPTER_TYPE_D: {
1176 struct HBD_MessageUnit0 *phbdmu = (struct HBD_MessageUnit0 *)acb->pmu;
1178 qbuffer = (struct QBUFFER *)&phbdmu->phbdmu->message_rbuffer;
1185 ************************************************************************
1186 ************************************************************************
1188 static struct QBUFFER *arcmsr_get_iop_wqbuffer( struct AdapterControlBlock *acb)
1190 struct QBUFFER *qbuffer = NULL;
1192 switch (acb->adapter_type) {
1193 case ACB_ADAPTER_TYPE_A: {
1194 struct HBA_MessageUnit *phbamu = (struct HBA_MessageUnit *)acb->pmu;
1196 qbuffer = (struct QBUFFER *)&phbamu->message_wbuffer;
1199 case ACB_ADAPTER_TYPE_B: {
1200 struct HBB_MessageUnit *phbbmu = (struct HBB_MessageUnit *)acb->pmu;
1202 qbuffer = (struct QBUFFER *)&phbbmu->hbb_rwbuffer->message_wbuffer;
1205 case ACB_ADAPTER_TYPE_C: {
1206 struct HBC_MessageUnit *phbcmu = (struct HBC_MessageUnit *)acb->pmu;
1208 qbuffer = (struct QBUFFER *)&phbcmu->message_wbuffer;
1211 case ACB_ADAPTER_TYPE_D: {
1212 struct HBD_MessageUnit0 *phbdmu = (struct HBD_MessageUnit0 *)acb->pmu;
1214 qbuffer = (struct QBUFFER *)&phbdmu->phbdmu->message_wbuffer;
1221 **************************************************************************
1222 **************************************************************************
1224 static void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
1226 switch (acb->adapter_type) {
1227 case ACB_ADAPTER_TYPE_A: {
1228 /* let IOP know data has been read */
1229 CHIP_REG_WRITE32(HBA_MessageUnit, 0, inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_READ_OK);
1232 case ACB_ADAPTER_TYPE_B: {
1233 /* let IOP know data has been read */
1234 CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_DRV2IOP_DATA_READ_OK);
1237 case ACB_ADAPTER_TYPE_C: {
1238 /* let IOP know data has been read */
1239 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK);
1242 case ACB_ADAPTER_TYPE_D: {
1243 /* let IOP know data has been read */
1244 CHIP_REG_WRITE32(HBD_MessageUnit, 0, inbound_doorbell, ARCMSR_HBDMU_DRV2IOP_DATA_OUT_READ);
1250 **************************************************************************
1251 **************************************************************************
1253 static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb)
1255 switch (acb->adapter_type) {
1256 case ACB_ADAPTER_TYPE_A: {
1258 ** push inbound doorbell tell iop, driver data write ok
1259 ** and wait reply on next hwinterrupt for next Qbuffer post
1261 CHIP_REG_WRITE32(HBA_MessageUnit, 0, inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK);
1264 case ACB_ADAPTER_TYPE_B: {
1266 ** push inbound doorbell tell iop, driver data write ok
1267 ** and wait reply on next hwinterrupt for next Qbuffer post
1269 CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_DRV2IOP_DATA_WRITE_OK);
1272 case ACB_ADAPTER_TYPE_C: {
1274 ** push inbound doorbell tell iop, driver data write ok
1275 ** and wait reply on next hwinterrupt for next Qbuffer post
1277 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK);
1280 case ACB_ADAPTER_TYPE_D: {
1282 ** push inbound doorbell tell iop, driver data write ok
1283 ** and wait reply on next hwinterrupt for next Qbuffer post
1285 CHIP_REG_WRITE32(HBD_MessageUnit, 0, inbound_doorbell, ARCMSR_HBDMU_DRV2IOP_DATA_IN_READY);
1291 ************************************************************************
1292 ************************************************************************
1294 static void arcmsr_stop_hba_bgrb(struct AdapterControlBlock *acb)
1296 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1297 CHIP_REG_WRITE32(HBA_MessageUnit,
1298 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_STOP_BGRB);
1299 if(!arcmsr_hba_wait_msgint_ready(acb)) {
1300 printf("arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1305 ************************************************************************
1306 ************************************************************************
1308 static void arcmsr_stop_hbb_bgrb(struct AdapterControlBlock *acb)
1310 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1311 CHIP_REG_WRITE32(HBB_DOORBELL,
1312 0, drv2iop_doorbell, ARCMSR_MESSAGE_STOP_BGRB);
1313 if(!arcmsr_hbb_wait_msgint_ready(acb)) {
1314 printf( "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1319 ************************************************************************
1320 ************************************************************************
1322 static void arcmsr_stop_hbc_bgrb(struct AdapterControlBlock *acb)
1324 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1325 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_STOP_BGRB);
1326 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell,ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE);
1327 if(!arcmsr_hbc_wait_msgint_ready(acb)) {
1328 printf("arcmsr%d: wait 'stop adapter background rebulid' timeout \n", acb->pci_unit);
1332 ************************************************************************
1333 ************************************************************************
1335 static void arcmsr_stop_hbd_bgrb(struct AdapterControlBlock *acb)
1337 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1338 CHIP_REG_WRITE32(HBD_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_STOP_BGRB);
1339 if(!arcmsr_hbd_wait_msgint_ready(acb)) {
1340 printf("arcmsr%d: wait 'stop adapter background rebulid' timeout \n", acb->pci_unit);
1344 ************************************************************************
1345 ************************************************************************
1347 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
1349 switch (acb->adapter_type) {
1350 case ACB_ADAPTER_TYPE_A: {
1351 arcmsr_stop_hba_bgrb(acb);
1354 case ACB_ADAPTER_TYPE_B: {
1355 arcmsr_stop_hbb_bgrb(acb);
1358 case ACB_ADAPTER_TYPE_C: {
1359 arcmsr_stop_hbc_bgrb(acb);
1362 case ACB_ADAPTER_TYPE_D: {
1363 arcmsr_stop_hbd_bgrb(acb);
1369 ************************************************************************
1370 ************************************************************************
1372 static void arcmsr_poll(struct cam_sim *psim)
1374 struct AdapterControlBlock *acb;
1377 acb = (struct AdapterControlBlock *)cam_sim_softc(psim);
1378 mutex = mtx_owned(&acb->isr_lock);
1380 ARCMSR_LOCK_ACQUIRE(&acb->isr_lock);
1381 arcmsr_interrupt(acb);
1383 ARCMSR_LOCK_RELEASE(&acb->isr_lock);
1386 **************************************************************************
1387 **************************************************************************
1389 static u_int32_t arcmsr_Read_iop_rqbuffer_data_D(struct AdapterControlBlock *acb,
1390 struct QBUFFER *prbuffer) {
1394 u_int32_t *iop_data, *buf2 = 0;
1395 u_int32_t iop_len, data_len;
1397 iop_data = (u_int32_t *)prbuffer->data;
1398 iop_len = (u_int32_t)prbuffer->data_len;
1401 buf1 = malloc(128, M_DEVBUF, M_NOWAIT | M_ZERO);
1402 buf2 = (u_int32_t *)buf1;
1406 while(data_len >= 4)
1408 *buf2++ = *iop_data++;
1413 buf2 = (u_int32_t *)buf1;
1415 while (iop_len > 0) {
1416 pQbuffer = &acb->rqbuffer[acb->rqbuf_lastindex];
1418 acb->rqbuf_lastindex++;
1419 /* if last, index number set it to 0 */
1420 acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1425 free( (u_int8_t *)buf2, M_DEVBUF);
1426 /* let IOP know data has been read */
1427 arcmsr_iop_message_read(acb);
1431 **************************************************************************
1432 **************************************************************************
1434 static u_int32_t arcmsr_Read_iop_rqbuffer_data(struct AdapterControlBlock *acb,
1435 struct QBUFFER *prbuffer) {
1441 if(acb->adapter_type == ACB_ADAPTER_TYPE_D) {
1442 return(arcmsr_Read_iop_rqbuffer_data_D(acb, prbuffer));
1444 iop_data = (u_int8_t *)prbuffer->data;
1445 iop_len = (u_int32_t)prbuffer->data_len;
1446 while (iop_len > 0) {
1447 pQbuffer = &acb->rqbuffer[acb->rqbuf_lastindex];
1448 *pQbuffer = *iop_data;
1449 acb->rqbuf_lastindex++;
1450 /* if last, index number set it to 0 */
1451 acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1455 /* let IOP know data has been read */
1456 arcmsr_iop_message_read(acb);
1460 **************************************************************************
1461 **************************************************************************
1463 static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb)
1465 struct QBUFFER *prbuffer;
1468 /*check this iop data if overflow my rqbuffer*/
1469 ARCMSR_LOCK_ACQUIRE(&acb->qbuffer_lock);
1470 prbuffer = arcmsr_get_iop_rqbuffer(acb);
1471 my_empty_len = (acb->rqbuf_lastindex - acb->rqbuf_firstindex - 1) &
1472 (ARCMSR_MAX_QBUFFER-1);
1473 if(my_empty_len >= prbuffer->data_len) {
1474 if(arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
1475 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
1477 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
1479 ARCMSR_LOCK_RELEASE(&acb->qbuffer_lock);
1482 **********************************************************************
1483 **********************************************************************
1485 static void arcmsr_Write_data_2iop_wqbuffer_D(struct AdapterControlBlock *acb)
1488 struct QBUFFER *pwbuffer;
1490 u_int32_t *iop_data, *buf2 = 0;
1491 u_int32_t allxfer_len = 0, data_len;
1493 if(acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READ) {
1494 buf1 = malloc(128, M_DEVBUF, M_NOWAIT | M_ZERO);
1495 buf2 = (u_int32_t *)buf1;
1499 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READ);
1500 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
1501 iop_data = (u_int32_t *)pwbuffer->data;
1502 while((acb->wqbuf_firstindex != acb->wqbuf_lastindex)
1503 && (allxfer_len < 124)) {
1504 pQbuffer = &acb->wqbuffer[acb->wqbuf_firstindex];
1506 acb->wqbuf_firstindex++;
1507 acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1511 pwbuffer->data_len = allxfer_len;
1512 data_len = allxfer_len;
1513 buf1 = (u_int8_t *)buf2;
1514 while(data_len >= 4)
1516 *iop_data++ = *buf2++;
1521 free( buf1, M_DEVBUF);
1522 arcmsr_iop_message_wrote(acb);
1526 **********************************************************************
1527 **********************************************************************
1529 static void arcmsr_Write_data_2iop_wqbuffer(struct AdapterControlBlock *acb)
1532 struct QBUFFER *pwbuffer;
1534 int32_t allxfer_len=0;
1536 if(acb->adapter_type == ACB_ADAPTER_TYPE_D) {
1537 arcmsr_Write_data_2iop_wqbuffer_D(acb);
1540 if(acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READ) {
1541 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READ);
1542 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
1543 iop_data = (u_int8_t *)pwbuffer->data;
1544 while((acb->wqbuf_firstindex != acb->wqbuf_lastindex)
1545 && (allxfer_len < 124)) {
1546 pQbuffer = &acb->wqbuffer[acb->wqbuf_firstindex];
1547 *iop_data = *pQbuffer;
1548 acb->wqbuf_firstindex++;
1549 acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1553 pwbuffer->data_len = allxfer_len;
1554 arcmsr_iop_message_wrote(acb);
1558 **************************************************************************
1559 **************************************************************************
1561 static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb)
1563 ARCMSR_LOCK_ACQUIRE(&acb->qbuffer_lock);
1564 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READ;
1566 *****************************************************************
1567 ** check if there are any mail packages from user space program
1568 ** in my post bag, now is the time to send them into Areca's firmware
1569 *****************************************************************
1571 if(acb->wqbuf_firstindex != acb->wqbuf_lastindex) {
1572 arcmsr_Write_data_2iop_wqbuffer(acb);
1574 if(acb->wqbuf_firstindex == acb->wqbuf_lastindex) {
1575 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
1577 ARCMSR_LOCK_RELEASE(&acb->qbuffer_lock);
1580 **************************************************************************
1581 **************************************************************************
1583 static void arcmsr_rescanLun_cb(struct cam_periph *periph, union ccb *ccb)
1586 if (ccb->ccb_h.status != CAM_REQ_CMP)
1587 printf("arcmsr_rescanLun_cb: Rescan Target=%x, lun=%x,"
1588 "failure status=%x\n", ccb->ccb_h.target_id,
1589 ccb->ccb_h.target_lun, ccb->ccb_h.status);
1591 printf("arcmsr_rescanLun_cb: Rescan lun successfully!\n");
1593 xpt_free_path(ccb->ccb_h.path);
1597 static void arcmsr_rescan_lun(struct AdapterControlBlock *acb, int target, int lun)
1599 struct cam_path *path;
1602 if ((ccb = (union ccb *)xpt_alloc_ccb_nowait()) == NULL)
1604 if (xpt_create_path(&path, NULL, cam_sim_path(acb->psim), target, lun) != CAM_REQ_CMP)
1609 /* printf("arcmsr_rescan_lun: Rescan Target=%x, Lun=%x\n", target, lun); */
1610 bzero(ccb, sizeof(union ccb));
1611 xpt_setup_ccb(&ccb->ccb_h, path, 5);
1612 ccb->ccb_h.func_code = XPT_SCAN_LUN;
1613 ccb->ccb_h.cbfcnp = arcmsr_rescanLun_cb;
1614 ccb->crcn.flags = CAM_FLAG_NONE;
1619 static void arcmsr_abort_dr_ccbs(struct AdapterControlBlock *acb, int target, int lun)
1621 struct CommandControlBlock *srb;
1622 u_int32_t intmask_org;
1625 /* disable all outbound interrupts */
1626 intmask_org = arcmsr_disable_allintr(acb);
1627 for (i = 0; i < ARCMSR_MAX_FREESRB_NUM; i++)
1629 srb = acb->psrb_pool[i];
1630 if (srb->srb_state == ARCMSR_SRB_START)
1632 if((target == srb->pccb->ccb_h.target_id) && (lun == srb->pccb->ccb_h.target_lun))
1634 srb->srb_state = ARCMSR_SRB_ABORTED;
1635 srb->pccb->ccb_h.status |= CAM_REQ_ABORTED;
1636 arcmsr_srb_complete(srb, 1);
1637 printf("arcmsr%d: abort scsi id %d lun %d srb=%p \n", acb->pci_unit, target, lun, srb);
1641 /* enable outbound Post Queue, outbound doorbell Interrupt */
1642 arcmsr_enable_allintr(acb, intmask_org);
1645 **************************************************************************
1646 **************************************************************************
1648 static void arcmsr_dr_handle(struct AdapterControlBlock *acb) {
1649 u_int32_t devicemap;
1650 u_int32_t target, lun;
1651 u_int32_t deviceMapCurrent[4]={0};
1654 switch (acb->adapter_type) {
1655 case ACB_ADAPTER_TYPE_A:
1656 devicemap = offsetof(struct HBA_MessageUnit, msgcode_rwbuffer[ARCMSR_FW_DEVMAP_OFFSET]);
1657 for (target = 0; target < 4; target++)
1659 deviceMapCurrent[target]=bus_space_read_4(acb->btag[0], acb->bhandle[0], devicemap);
1664 case ACB_ADAPTER_TYPE_B:
1665 devicemap = offsetof(struct HBB_RWBUFFER, msgcode_rwbuffer[ARCMSR_FW_DEVMAP_OFFSET]);
1666 for (target = 0; target < 4; target++)
1668 deviceMapCurrent[target]=bus_space_read_4(acb->btag[1], acb->bhandle[1], devicemap);
1673 case ACB_ADAPTER_TYPE_C:
1674 devicemap = offsetof(struct HBC_MessageUnit, msgcode_rwbuffer[ARCMSR_FW_DEVMAP_OFFSET]);
1675 for (target = 0; target < 4; target++)
1677 deviceMapCurrent[target]=bus_space_read_4(acb->btag[0], acb->bhandle[0], devicemap);
1681 case ACB_ADAPTER_TYPE_D:
1682 devicemap = offsetof(struct HBD_MessageUnit, msgcode_rwbuffer[ARCMSR_FW_DEVMAP_OFFSET]);
1683 for (target = 0; target < 4; target++)
1685 deviceMapCurrent[target]=bus_space_read_4(acb->btag[0], acb->bhandle[0], devicemap);
1691 if(acb->acb_flags & ACB_F_BUS_HANG_ON)
1693 acb->acb_flags &= ~ACB_F_BUS_HANG_ON;
1696 ** adapter posted CONFIG message
1697 ** copy the new map, note if there are differences with the current map
1699 pDevMap = (u_int8_t *)&deviceMapCurrent[0];
1700 for (target = 0; target < ARCMSR_MAX_TARGETID - 1; target++)
1702 if (*pDevMap != acb->device_map[target])
1704 u_int8_t difference, bit_check;
1706 difference = *pDevMap ^ acb->device_map[target];
1707 for(lun=0; lun < ARCMSR_MAX_TARGETLUN; lun++)
1709 bit_check = (1 << lun); /*check bit from 0....31*/
1710 if(difference & bit_check)
1712 if(acb->device_map[target] & bit_check)
1713 {/* unit departed */
1714 printf("arcmsr_dr_handle: Target=%x, lun=%x, GONE!!!\n",target,lun);
1715 arcmsr_abort_dr_ccbs(acb, target, lun);
1716 arcmsr_rescan_lun(acb, target, lun);
1717 acb->devstate[target][lun] = ARECA_RAID_GONE;
1721 printf("arcmsr_dr_handle: Target=%x, lun=%x, Plug-IN!!!\n",target,lun);
1722 arcmsr_rescan_lun(acb, target, lun);
1723 acb->devstate[target][lun] = ARECA_RAID_GOOD;
1727 /* printf("arcmsr_dr_handle: acb->device_map[%x]=0x%x, deviceMapCurrent[%x]=%x\n",target,acb->device_map[target],target,*pDevMap); */
1728 acb->device_map[target] = *pDevMap;
1734 **************************************************************************
1735 **************************************************************************
1737 static void arcmsr_hba_message_isr(struct AdapterControlBlock *acb) {
1738 u_int32_t outbound_message;
1740 CHIP_REG_WRITE32(HBA_MessageUnit, 0, outbound_intstatus, ARCMSR_MU_OUTBOUND_MESSAGE0_INT);
1741 outbound_message = CHIP_REG_READ32(HBA_MessageUnit, 0, msgcode_rwbuffer[0]);
1742 if (outbound_message == ARCMSR_SIGNATURE_GET_CONFIG)
1743 arcmsr_dr_handle( acb );
1746 **************************************************************************
1747 **************************************************************************
1749 static void arcmsr_hbb_message_isr(struct AdapterControlBlock *acb) {
1750 u_int32_t outbound_message;
1752 /* clear interrupts */
1753 CHIP_REG_WRITE32(HBB_DOORBELL, 0, iop2drv_doorbell, ARCMSR_MESSAGE_INT_CLEAR_PATTERN);
1754 outbound_message = CHIP_REG_READ32(HBB_RWBUFFER, 1, msgcode_rwbuffer[0]);
1755 if (outbound_message == ARCMSR_SIGNATURE_GET_CONFIG)
1756 arcmsr_dr_handle( acb );
1759 **************************************************************************
1760 **************************************************************************
1762 static void arcmsr_hbc_message_isr(struct AdapterControlBlock *acb) {
1763 u_int32_t outbound_message;
1765 CHIP_REG_WRITE32(HBC_MessageUnit, 0, outbound_doorbell_clear, ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR);
1766 outbound_message = CHIP_REG_READ32(HBC_MessageUnit, 0, msgcode_rwbuffer[0]);
1767 if (outbound_message == ARCMSR_SIGNATURE_GET_CONFIG)
1768 arcmsr_dr_handle( acb );
1771 **************************************************************************
1772 **************************************************************************
1774 static void arcmsr_hbd_message_isr(struct AdapterControlBlock *acb) {
1775 u_int32_t outbound_message;
1777 CHIP_REG_WRITE32(HBD_MessageUnit, 0, outbound_doorbell, ARCMSR_HBDMU_IOP2DRV_MESSAGE_CMD_DONE_CLEAR);
1778 outbound_message = CHIP_REG_READ32(HBD_MessageUnit, 0, msgcode_rwbuffer[0]);
1779 if (outbound_message == ARCMSR_SIGNATURE_GET_CONFIG)
1780 arcmsr_dr_handle( acb );
1783 **************************************************************************
1784 **************************************************************************
1786 static void arcmsr_hba_doorbell_isr(struct AdapterControlBlock *acb)
1788 u_int32_t outbound_doorbell;
1791 *******************************************************************
1792 ** Maybe here we need to check wrqbuffer_lock is lock or not
1793 ** DOORBELL: din! don!
1794 ** check if there are any mail need to pack from firmware
1795 *******************************************************************
1797 outbound_doorbell = CHIP_REG_READ32(HBA_MessageUnit,
1798 0, outbound_doorbell);
1799 CHIP_REG_WRITE32(HBA_MessageUnit,
1800 0, outbound_doorbell, outbound_doorbell); /* clear doorbell interrupt */
1801 if(outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) {
1802 arcmsr_iop2drv_data_wrote_handle(acb);
1804 if(outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) {
1805 arcmsr_iop2drv_data_read_handle(acb);
1809 **************************************************************************
1810 **************************************************************************
1812 static void arcmsr_hbc_doorbell_isr(struct AdapterControlBlock *acb)
1814 u_int32_t outbound_doorbell;
1817 *******************************************************************
1818 ** Maybe here we need to check wrqbuffer_lock is lock or not
1819 ** DOORBELL: din! don!
1820 ** check if there are any mail need to pack from firmware
1821 *******************************************************************
1823 outbound_doorbell = CHIP_REG_READ32(HBC_MessageUnit, 0, outbound_doorbell);
1824 CHIP_REG_WRITE32(HBC_MessageUnit, 0, outbound_doorbell_clear, outbound_doorbell); /* clear doorbell interrupt */
1825 if(outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) {
1826 arcmsr_iop2drv_data_wrote_handle(acb);
1828 if(outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK) {
1829 arcmsr_iop2drv_data_read_handle(acb);
1831 if(outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
1832 arcmsr_hbc_message_isr(acb); /* messenger of "driver to iop commands" */
1836 **************************************************************************
1837 **************************************************************************
1839 static void arcmsr_hbd_doorbell_isr(struct AdapterControlBlock *acb)
1841 u_int32_t outbound_Doorbell;
1844 *******************************************************************
1845 ** Maybe here we need to check wrqbuffer_lock is lock or not
1846 ** DOORBELL: din! don!
1847 ** check if there are any mail need to pack from firmware
1848 *******************************************************************
1850 outbound_Doorbell = CHIP_REG_READ32(HBD_MessageUnit, 0, outbound_doorbell) & ARCMSR_HBDMU_F0_DOORBELL_CAUSE;
1851 if(outbound_Doorbell)
1852 CHIP_REG_WRITE32(HBD_MessageUnit, 0, outbound_doorbell, outbound_Doorbell); /* clear doorbell interrupt */
1853 while( outbound_Doorbell & ARCMSR_HBDMU_F0_DOORBELL_CAUSE ) {
1854 if(outbound_Doorbell & ARCMSR_HBDMU_IOP2DRV_DATA_WRITE_OK) {
1855 arcmsr_iop2drv_data_wrote_handle(acb);
1857 if(outbound_Doorbell & ARCMSR_HBDMU_IOP2DRV_DATA_READ_OK) {
1858 arcmsr_iop2drv_data_read_handle(acb);
1860 if(outbound_Doorbell & ARCMSR_HBDMU_IOP2DRV_MESSAGE_CMD_DONE) {
1861 arcmsr_hbd_message_isr(acb); /* messenger of "driver to iop commands" */
1863 outbound_Doorbell = CHIP_REG_READ32(HBD_MessageUnit, 0, outbound_doorbell) & ARCMSR_HBDMU_F0_DOORBELL_CAUSE;
1864 if(outbound_Doorbell)
1865 CHIP_REG_WRITE32(HBD_MessageUnit, 0, outbound_doorbell, outbound_Doorbell); /* clear doorbell interrupt */
1869 **************************************************************************
1870 **************************************************************************
1872 static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb)
1878 *****************************************************************************
1879 ** areca cdb command done
1880 *****************************************************************************
1882 bus_dmamap_sync(acb->srb_dmat, acb->srb_dmamap,
1883 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1884 while((flag_srb = CHIP_REG_READ32(HBA_MessageUnit,
1885 0, outbound_queueport)) != 0xFFFFFFFF) {
1886 /* check if command done with no error*/
1887 error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE0) ? TRUE : FALSE;
1888 arcmsr_drain_donequeue(acb, flag_srb, error);
1889 } /*drain reply FIFO*/
1892 **************************************************************************
1893 **************************************************************************
1895 static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb)
1897 struct HBB_MessageUnit *phbbmu = (struct HBB_MessageUnit *)acb->pmu;
1903 *****************************************************************************
1904 ** areca cdb command done
1905 *****************************************************************************
1907 bus_dmamap_sync(acb->srb_dmat, acb->srb_dmamap,
1908 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1909 index = phbbmu->doneq_index;
1910 while((flag_srb = phbbmu->done_qbuffer[index]) != 0) {
1911 phbbmu->done_qbuffer[index] = 0;
1913 index %= ARCMSR_MAX_HBB_POSTQUEUE; /*if last index number set it to 0 */
1914 phbbmu->doneq_index = index;
1915 /* check if command done with no error*/
1916 error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE;
1917 arcmsr_drain_donequeue(acb, flag_srb, error);
1918 } /*drain reply FIFO*/
1921 **************************************************************************
1922 **************************************************************************
1924 static void arcmsr_hbc_postqueue_isr(struct AdapterControlBlock *acb)
1926 u_int32_t flag_srb,throttling = 0;
1930 *****************************************************************************
1931 ** areca cdb command done
1932 *****************************************************************************
1934 bus_dmamap_sync(acb->srb_dmat, acb->srb_dmamap, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1936 while(CHIP_REG_READ32(HBC_MessageUnit, 0, host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) {
1938 flag_srb = CHIP_REG_READ32(HBC_MessageUnit, 0, outbound_queueport_low);
1939 /* check if command done with no error*/
1940 error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE1)?TRUE:FALSE;
1941 arcmsr_drain_donequeue(acb, flag_srb, error);
1943 if(throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) {
1944 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell,ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING);
1947 } /*drain reply FIFO*/
1950 **********************************************************************
1952 **********************************************************************
1954 static uint16_t arcmsr_get_doneq_index(struct HBD_MessageUnit0 *phbdmu)
1956 uint16_t doneq_index, index_stripped;
1958 doneq_index = phbdmu->doneq_index;
1959 if (doneq_index & 0x4000) {
1960 index_stripped = doneq_index & 0xFF;
1961 index_stripped += 1;
1962 index_stripped %= ARCMSR_MAX_HBD_POSTQUEUE;
1963 phbdmu->doneq_index = index_stripped ?
1964 (index_stripped | 0x4000) : index_stripped;
1966 index_stripped = doneq_index;
1967 index_stripped += 1;
1968 index_stripped %= ARCMSR_MAX_HBD_POSTQUEUE;
1969 phbdmu->doneq_index = index_stripped ?
1970 index_stripped : (index_stripped | 0x4000);
1972 return (phbdmu->doneq_index);
1975 **************************************************************************
1976 **************************************************************************
1978 static void arcmsr_hbd_postqueue_isr(struct AdapterControlBlock *acb)
1980 struct HBD_MessageUnit0 *phbdmu = (struct HBD_MessageUnit0 *)acb->pmu;
1981 u_int32_t outbound_write_pointer;
1982 u_int32_t addressLow;
1983 uint16_t doneq_index;
1986 *****************************************************************************
1987 ** areca cdb command done
1988 *****************************************************************************
1990 if((CHIP_REG_READ32(HBD_MessageUnit, 0, outboundlist_interrupt_cause) &
1991 ARCMSR_HBDMU_OUTBOUND_LIST_INTERRUPT) == 0)
1993 bus_dmamap_sync(acb->srb_dmat, acb->srb_dmamap,
1994 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1995 outbound_write_pointer = phbdmu->done_qbuffer[0].addressLow;
1996 doneq_index = phbdmu->doneq_index;
1997 while ((doneq_index & 0xFF) != (outbound_write_pointer & 0xFF)) {
1998 doneq_index = arcmsr_get_doneq_index(phbdmu);
1999 addressLow = phbdmu->done_qbuffer[(doneq_index & 0xFF)+1].addressLow;
2000 error = (addressLow & ARCMSR_SRBREPLY_FLAG_ERROR_MODE1) ? TRUE : FALSE;
2001 arcmsr_drain_donequeue(acb, addressLow, error); /*Check if command done with no error */
2002 CHIP_REG_WRITE32(HBD_MessageUnit, 0, outboundlist_read_pointer, doneq_index);
2003 outbound_write_pointer = phbdmu->done_qbuffer[0].addressLow;
2005 CHIP_REG_WRITE32(HBD_MessageUnit, 0, outboundlist_interrupt_cause, ARCMSR_HBDMU_OUTBOUND_LIST_INTERRUPT_CLEAR);
2006 CHIP_REG_READ32(HBD_MessageUnit, 0, outboundlist_interrupt_cause); /*Dummy ioread32 to force pci flush */
2009 **********************************************************************
2010 **********************************************************************
2012 static void arcmsr_handle_hba_isr( struct AdapterControlBlock *acb)
2014 u_int32_t outbound_intStatus;
2016 *********************************************
2017 ** check outbound intstatus
2018 *********************************************
2020 outbound_intStatus = CHIP_REG_READ32(HBA_MessageUnit, 0, outbound_intstatus) & acb->outbound_int_enable;
2021 if(!outbound_intStatus) {
2022 /*it must be share irq*/
2025 CHIP_REG_WRITE32(HBA_MessageUnit, 0, outbound_intstatus, outbound_intStatus); /*clear interrupt*/
2026 /* MU doorbell interrupts*/
2027 if(outbound_intStatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) {
2028 arcmsr_hba_doorbell_isr(acb);
2030 /* MU post queue interrupts*/
2031 if(outbound_intStatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) {
2032 arcmsr_hba_postqueue_isr(acb);
2034 if(outbound_intStatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
2035 arcmsr_hba_message_isr(acb);
2039 **********************************************************************
2040 **********************************************************************
2042 static void arcmsr_handle_hbb_isr( struct AdapterControlBlock *acb)
2044 u_int32_t outbound_doorbell;
2046 *********************************************
2047 ** check outbound intstatus
2048 *********************************************
2050 outbound_doorbell = CHIP_REG_READ32(HBB_DOORBELL, 0, iop2drv_doorbell) & acb->outbound_int_enable;
2051 if(!outbound_doorbell) {
2052 /*it must be share irq*/
2055 CHIP_REG_WRITE32(HBB_DOORBELL, 0, iop2drv_doorbell, ~outbound_doorbell); /* clear doorbell interrupt */
2056 CHIP_REG_READ32(HBB_DOORBELL, 0, iop2drv_doorbell);
2057 CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_DRV2IOP_END_OF_INTERRUPT);
2058 /* MU ioctl transfer doorbell interrupts*/
2059 if(outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) {
2060 arcmsr_iop2drv_data_wrote_handle(acb);
2062 if(outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK) {
2063 arcmsr_iop2drv_data_read_handle(acb);
2065 /* MU post queue interrupts*/
2066 if(outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE) {
2067 arcmsr_hbb_postqueue_isr(acb);
2069 if(outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
2070 arcmsr_hbb_message_isr(acb);
2074 **********************************************************************
2075 **********************************************************************
2077 static void arcmsr_handle_hbc_isr( struct AdapterControlBlock *acb)
2079 u_int32_t host_interrupt_status;
2081 *********************************************
2082 ** check outbound intstatus
2083 *********************************************
2085 host_interrupt_status = CHIP_REG_READ32(HBC_MessageUnit, 0, host_int_status);
2086 if(!host_interrupt_status) {
2087 /*it must be share irq*/
2090 /* MU doorbell interrupts*/
2091 if(host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR) {
2092 arcmsr_hbc_doorbell_isr(acb);
2094 /* MU post queue interrupts*/
2095 if(host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) {
2096 arcmsr_hbc_postqueue_isr(acb);
2100 **********************************************************************
2101 **********************************************************************
2103 static void arcmsr_handle_hbd_isr( struct AdapterControlBlock *acb)
2105 u_int32_t host_interrupt_status;
2106 u_int32_t intmask_org;
2108 *********************************************
2109 ** check outbound intstatus
2110 *********************************************
2112 host_interrupt_status = CHIP_REG_READ32(HBD_MessageUnit, 0, host_int_status) & acb->outbound_int_enable;
2113 if(!(host_interrupt_status & ARCMSR_HBDMU_OUTBOUND_INT)) {
2114 /*it must be share irq*/
2117 /* disable outbound interrupt */
2118 intmask_org = CHIP_REG_READ32(HBD_MessageUnit, 0, pcief0_int_enable) ; /* disable outbound message0 int */
2119 CHIP_REG_WRITE32(HBD_MessageUnit, 0, pcief0_int_enable, ARCMSR_HBDMU_ALL_INT_DISABLE);
2120 /* MU doorbell interrupts*/
2121 if(host_interrupt_status & ARCMSR_HBDMU_OUTBOUND_DOORBELL_INT) {
2122 arcmsr_hbd_doorbell_isr(acb);
2124 /* MU post queue interrupts*/
2125 if(host_interrupt_status & ARCMSR_HBDMU_OUTBOUND_POSTQUEUE_INT) {
2126 arcmsr_hbd_postqueue_isr(acb);
2128 /* enable all outbound interrupt */
2129 CHIP_REG_WRITE32(HBD_MessageUnit, 0, pcief0_int_enable, intmask_org | ARCMSR_HBDMU_ALL_INT_ENABLE);
2130 // CHIP_REG_READ32(HBD_MessageUnit, 0, pcief0_int_enable);
2133 ******************************************************************************
2134 ******************************************************************************
2136 static void arcmsr_interrupt(struct AdapterControlBlock *acb)
2138 switch (acb->adapter_type) {
2139 case ACB_ADAPTER_TYPE_A:
2140 arcmsr_handle_hba_isr(acb);
2142 case ACB_ADAPTER_TYPE_B:
2143 arcmsr_handle_hbb_isr(acb);
2145 case ACB_ADAPTER_TYPE_C:
2146 arcmsr_handle_hbc_isr(acb);
2148 case ACB_ADAPTER_TYPE_D:
2149 arcmsr_handle_hbd_isr(acb);
2152 printf("arcmsr%d: interrupt service,"
2153 " unknown adapter type =%d\n", acb->pci_unit, acb->adapter_type);
2158 **********************************************************************
2159 **********************************************************************
2161 static void arcmsr_intr_handler(void *arg)
2163 struct AdapterControlBlock *acb = (struct AdapterControlBlock *)arg;
2165 ARCMSR_LOCK_ACQUIRE(&acb->isr_lock);
2166 arcmsr_interrupt(acb);
2167 ARCMSR_LOCK_RELEASE(&acb->isr_lock);
2170 ******************************************************************************
2171 ******************************************************************************
2173 static void arcmsr_polling_devmap(void *arg)
2175 struct AdapterControlBlock *acb = (struct AdapterControlBlock *)arg;
2176 switch (acb->adapter_type) {
2177 case ACB_ADAPTER_TYPE_A:
2178 CHIP_REG_WRITE32(HBA_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG);
2181 case ACB_ADAPTER_TYPE_B:
2182 CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_MESSAGE_GET_CONFIG);
2185 case ACB_ADAPTER_TYPE_C:
2186 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG);
2187 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE);
2190 case ACB_ADAPTER_TYPE_D:
2191 CHIP_REG_WRITE32(HBD_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG);
2195 if((acb->acb_flags & ACB_F_SCSISTOPADAPTER) == 0)
2197 callout_reset(&acb->devmap_callout, 5 * hz, arcmsr_polling_devmap, acb); /* polling per 5 seconds */
2202 *******************************************************************************
2204 *******************************************************************************
2206 static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
2208 u_int32_t intmask_org;
2211 /* stop adapter background rebuild */
2212 if(acb->acb_flags & ACB_F_MSG_START_BGRB) {
2213 intmask_org = arcmsr_disable_allintr(acb);
2214 arcmsr_stop_adapter_bgrb(acb);
2215 arcmsr_flush_adapter_cache(acb);
2216 arcmsr_enable_allintr(acb, intmask_org);
2221 ***********************************************************************
2223 ************************************************************************
2225 u_int32_t arcmsr_iop_ioctlcmd(struct AdapterControlBlock *acb, u_int32_t ioctl_cmd, caddr_t arg)
2227 struct CMD_MESSAGE_FIELD *pcmdmessagefld;
2228 u_int32_t retvalue = EINVAL;
2230 pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) arg;
2231 if(memcmp(pcmdmessagefld->cmdmessage.Signature, "ARCMSR", 6)!=0) {
2234 ARCMSR_LOCK_ACQUIRE(&acb->qbuffer_lock);
2236 case ARCMSR_MESSAGE_READ_RQBUFFER: {
2238 u_int8_t *ptmpQbuffer = pcmdmessagefld->messagedatabuffer;
2239 u_int32_t allxfer_len=0;
2241 while((acb->rqbuf_firstindex != acb->rqbuf_lastindex)
2242 && (allxfer_len < 1031)) {
2243 /*copy READ QBUFFER to srb*/
2244 pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex];
2245 *ptmpQbuffer = *pQbuffer;
2246 acb->rqbuf_firstindex++;
2247 acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
2248 /*if last index number set it to 0 */
2252 if(acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2253 struct QBUFFER *prbuffer;
2255 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2256 prbuffer = arcmsr_get_iop_rqbuffer(acb);
2257 if(arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
2258 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2260 pcmdmessagefld->cmdmessage.Length = allxfer_len;
2261 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
2262 retvalue = ARCMSR_MESSAGE_SUCCESS;
2265 case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
2266 u_int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex;
2268 u_int8_t *ptmpuserbuffer = pcmdmessagefld->messagedatabuffer;
2270 user_len = pcmdmessagefld->cmdmessage.Length;
2271 /*check if data xfer length of this request will overflow my array qbuffer */
2272 wqbuf_lastindex = acb->wqbuf_lastindex;
2273 wqbuf_firstindex = acb->wqbuf_firstindex;
2274 if(wqbuf_lastindex != wqbuf_firstindex) {
2275 arcmsr_Write_data_2iop_wqbuffer(acb);
2276 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_ERROR;
2278 my_empty_len = (wqbuf_firstindex - wqbuf_lastindex - 1) &
2279 (ARCMSR_MAX_QBUFFER - 1);
2280 if(my_empty_len >= user_len) {
2281 while(user_len > 0) {
2282 /*copy srb data to wqbuffer*/
2283 pQbuffer = &acb->wqbuffer[acb->wqbuf_lastindex];
2284 *pQbuffer = *ptmpuserbuffer;
2285 acb->wqbuf_lastindex++;
2286 acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
2287 /*if last index number set it to 0 */
2291 /*post fist Qbuffer*/
2292 if(acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
2293 acb->acb_flags &= ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
2294 arcmsr_Write_data_2iop_wqbuffer(acb);
2296 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
2298 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_ERROR;
2301 retvalue = ARCMSR_MESSAGE_SUCCESS;
2304 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
2305 u_int8_t *pQbuffer = acb->rqbuffer;
2307 if(acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2308 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2309 arcmsr_iop_message_read(acb);
2310 /*signature, let IOP know data has been readed */
2312 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
2313 acb->rqbuf_firstindex = 0;
2314 acb->rqbuf_lastindex = 0;
2315 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
2316 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
2317 retvalue = ARCMSR_MESSAGE_SUCCESS;
2320 case ARCMSR_MESSAGE_CLEAR_WQBUFFER:
2322 u_int8_t *pQbuffer = acb->wqbuffer;
2324 if(acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2325 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2326 arcmsr_iop_message_read(acb);
2327 /*signature, let IOP know data has been readed */
2329 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED|ACB_F_MESSAGE_WQBUFFER_READ);
2330 acb->wqbuf_firstindex = 0;
2331 acb->wqbuf_lastindex = 0;
2332 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
2333 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
2334 retvalue = ARCMSR_MESSAGE_SUCCESS;
2337 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
2340 if(acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2341 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2342 arcmsr_iop_message_read(acb);
2343 /*signature, let IOP know data has been readed */
2345 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED
2346 |ACB_F_MESSAGE_RQBUFFER_CLEARED
2347 |ACB_F_MESSAGE_WQBUFFER_READ);
2348 acb->rqbuf_firstindex = 0;
2349 acb->rqbuf_lastindex = 0;
2350 acb->wqbuf_firstindex = 0;
2351 acb->wqbuf_lastindex = 0;
2352 pQbuffer = acb->rqbuffer;
2353 memset(pQbuffer, 0, sizeof(struct QBUFFER));
2354 pQbuffer = acb->wqbuffer;
2355 memset(pQbuffer, 0, sizeof(struct QBUFFER));
2356 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
2357 retvalue = ARCMSR_MESSAGE_SUCCESS;
2360 case ARCMSR_MESSAGE_REQUEST_RETURNCODE_3F: {
2361 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_3F;
2362 retvalue = ARCMSR_MESSAGE_SUCCESS;
2365 case ARCMSR_MESSAGE_SAY_HELLO: {
2366 u_int8_t *hello_string = "Hello! I am ARCMSR";
2367 u_int8_t *puserbuffer = (u_int8_t *)pcmdmessagefld->messagedatabuffer;
2369 if(memcpy(puserbuffer, hello_string, (int16_t)strlen(hello_string))) {
2370 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_ERROR;
2371 ARCMSR_LOCK_RELEASE(&acb->qbuffer_lock);
2374 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
2375 retvalue = ARCMSR_MESSAGE_SUCCESS;
2378 case ARCMSR_MESSAGE_SAY_GOODBYE: {
2379 arcmsr_iop_parking(acb);
2380 retvalue = ARCMSR_MESSAGE_SUCCESS;
2383 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: {
2384 arcmsr_flush_adapter_cache(acb);
2385 retvalue = ARCMSR_MESSAGE_SUCCESS;
2389 ARCMSR_LOCK_RELEASE(&acb->qbuffer_lock);
2393 **************************************************************************
2394 **************************************************************************
2396 static void arcmsr_free_srb(struct CommandControlBlock *srb)
2398 struct AdapterControlBlock *acb;
2401 ARCMSR_LOCK_ACQUIRE(&acb->srb_lock);
2402 srb->srb_state = ARCMSR_SRB_DONE;
2404 acb->srbworkingQ[acb->workingsrb_doneindex] = srb;
2405 acb->workingsrb_doneindex++;
2406 acb->workingsrb_doneindex %= ARCMSR_MAX_FREESRB_NUM;
2407 ARCMSR_LOCK_RELEASE(&acb->srb_lock);
2410 **************************************************************************
2411 **************************************************************************
2413 struct CommandControlBlock *arcmsr_get_freesrb(struct AdapterControlBlock *acb)
2415 struct CommandControlBlock *srb = NULL;
2416 u_int32_t workingsrb_startindex, workingsrb_doneindex;
2418 ARCMSR_LOCK_ACQUIRE(&acb->srb_lock);
2419 workingsrb_doneindex = acb->workingsrb_doneindex;
2420 workingsrb_startindex = acb->workingsrb_startindex;
2421 srb = acb->srbworkingQ[workingsrb_startindex];
2422 workingsrb_startindex++;
2423 workingsrb_startindex %= ARCMSR_MAX_FREESRB_NUM;
2424 if(workingsrb_doneindex != workingsrb_startindex) {
2425 acb->workingsrb_startindex = workingsrb_startindex;
2429 ARCMSR_LOCK_RELEASE(&acb->srb_lock);
2433 **************************************************************************
2434 **************************************************************************
2436 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, union ccb *pccb)
2438 struct CMD_MESSAGE_FIELD *pcmdmessagefld;
2439 int retvalue = 0, transfer_len = 0;
2441 u_int32_t controlcode = (u_int32_t ) pccb->csio.cdb_io.cdb_bytes[5] << 24 |
2442 (u_int32_t ) pccb->csio.cdb_io.cdb_bytes[6] << 16 |
2443 (u_int32_t ) pccb->csio.cdb_io.cdb_bytes[7] << 8 |
2444 (u_int32_t ) pccb->csio.cdb_io.cdb_bytes[8];
2445 /* 4 bytes: Areca io control code */
2446 if ((pccb->ccb_h.flags & CAM_DATA_MASK) == CAM_DATA_VADDR) {
2447 buffer = pccb->csio.data_ptr;
2448 transfer_len = pccb->csio.dxfer_len;
2450 retvalue = ARCMSR_MESSAGE_FAIL;
2453 if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) {
2454 retvalue = ARCMSR_MESSAGE_FAIL;
2457 pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) buffer;
2458 switch(controlcode) {
2459 case ARCMSR_MESSAGE_READ_RQBUFFER: {
2461 u_int8_t *ptmpQbuffer = pcmdmessagefld->messagedatabuffer;
2462 int32_t allxfer_len = 0;
2464 ARCMSR_LOCK_ACQUIRE(&acb->qbuffer_lock);
2465 while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex)
2466 && (allxfer_len < 1031)) {
2467 pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex];
2468 *ptmpQbuffer = *pQbuffer;
2469 acb->rqbuf_firstindex++;
2470 acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
2474 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2475 struct QBUFFER *prbuffer;
2477 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2478 prbuffer = arcmsr_get_iop_rqbuffer(acb);
2479 if(arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
2480 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2482 pcmdmessagefld->cmdmessage.Length = allxfer_len;
2483 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
2484 retvalue = ARCMSR_MESSAGE_SUCCESS;
2485 ARCMSR_LOCK_RELEASE(&acb->qbuffer_lock);
2488 case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
2489 int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex;
2491 u_int8_t *ptmpuserbuffer = pcmdmessagefld->messagedatabuffer;
2493 user_len = pcmdmessagefld->cmdmessage.Length;
2494 ARCMSR_LOCK_ACQUIRE(&acb->qbuffer_lock);
2495 wqbuf_lastindex = acb->wqbuf_lastindex;
2496 wqbuf_firstindex = acb->wqbuf_firstindex;
2497 if (wqbuf_lastindex != wqbuf_firstindex) {
2498 arcmsr_Write_data_2iop_wqbuffer(acb);
2499 /* has error report sensedata */
2500 if(pccb->csio.sense_len) {
2501 ((u_int8_t *)&pccb->csio.sense_data)[0] = (0x1 << 7 | 0x70);
2502 /* Valid,ErrorCode */
2503 ((u_int8_t *)&pccb->csio.sense_data)[2] = 0x05;
2504 /* FileMark,EndOfMedia,IncorrectLength,Reserved,SenseKey */
2505 ((u_int8_t *)&pccb->csio.sense_data)[7] = 0x0A;
2506 /* AdditionalSenseLength */
2507 ((u_int8_t *)&pccb->csio.sense_data)[12] = 0x20;
2508 /* AdditionalSenseCode */
2510 retvalue = ARCMSR_MESSAGE_FAIL;
2512 my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1)
2513 &(ARCMSR_MAX_QBUFFER - 1);
2514 if (my_empty_len >= user_len) {
2515 while (user_len > 0) {
2516 pQbuffer = &acb->wqbuffer[acb->wqbuf_lastindex];
2517 *pQbuffer = *ptmpuserbuffer;
2518 acb->wqbuf_lastindex++;
2519 acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
2523 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
2525 ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
2526 arcmsr_Write_data_2iop_wqbuffer(acb);
2529 /* has error report sensedata */
2530 if(pccb->csio.sense_len) {
2531 ((u_int8_t *)&pccb->csio.sense_data)[0] = (0x1 << 7 | 0x70);
2532 /* Valid,ErrorCode */
2533 ((u_int8_t *)&pccb->csio.sense_data)[2] = 0x05;
2534 /* FileMark,EndOfMedia,IncorrectLength,Reserved,SenseKey */
2535 ((u_int8_t *)&pccb->csio.sense_data)[7] = 0x0A;
2536 /* AdditionalSenseLength */
2537 ((u_int8_t *)&pccb->csio.sense_data)[12] = 0x20;
2538 /* AdditionalSenseCode */
2540 retvalue = ARCMSR_MESSAGE_FAIL;
2543 ARCMSR_LOCK_RELEASE(&acb->qbuffer_lock);
2546 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
2547 u_int8_t *pQbuffer = acb->rqbuffer;
2549 ARCMSR_LOCK_ACQUIRE(&acb->qbuffer_lock);
2550 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2551 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2552 arcmsr_iop_message_read(acb);
2554 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
2555 acb->rqbuf_firstindex = 0;
2556 acb->rqbuf_lastindex = 0;
2557 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
2558 pcmdmessagefld->cmdmessage.ReturnCode =
2559 ARCMSR_MESSAGE_RETURNCODE_OK;
2560 ARCMSR_LOCK_RELEASE(&acb->qbuffer_lock);
2563 case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
2564 u_int8_t *pQbuffer = acb->wqbuffer;
2566 ARCMSR_LOCK_ACQUIRE(&acb->qbuffer_lock);
2567 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2568 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2569 arcmsr_iop_message_read(acb);
2572 (ACB_F_MESSAGE_WQBUFFER_CLEARED |
2573 ACB_F_MESSAGE_WQBUFFER_READ);
2574 acb->wqbuf_firstindex = 0;
2575 acb->wqbuf_lastindex = 0;
2576 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
2577 pcmdmessagefld->cmdmessage.ReturnCode =
2578 ARCMSR_MESSAGE_RETURNCODE_OK;
2579 ARCMSR_LOCK_RELEASE(&acb->qbuffer_lock);
2582 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
2585 ARCMSR_LOCK_ACQUIRE(&acb->qbuffer_lock);
2586 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2587 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2588 arcmsr_iop_message_read(acb);
2591 (ACB_F_MESSAGE_WQBUFFER_CLEARED
2592 | ACB_F_MESSAGE_RQBUFFER_CLEARED
2593 | ACB_F_MESSAGE_WQBUFFER_READ);
2594 acb->rqbuf_firstindex = 0;
2595 acb->rqbuf_lastindex = 0;
2596 acb->wqbuf_firstindex = 0;
2597 acb->wqbuf_lastindex = 0;
2598 pQbuffer = acb->rqbuffer;
2599 memset(pQbuffer, 0, sizeof (struct QBUFFER));
2600 pQbuffer = acb->wqbuffer;
2601 memset(pQbuffer, 0, sizeof (struct QBUFFER));
2602 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
2603 ARCMSR_LOCK_RELEASE(&acb->qbuffer_lock);
2606 case ARCMSR_MESSAGE_REQUEST_RETURNCODE_3F: {
2607 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_3F;
2610 case ARCMSR_MESSAGE_SAY_HELLO: {
2611 int8_t *hello_string = "Hello! I am ARCMSR";
2613 memcpy(pcmdmessagefld->messagedatabuffer, hello_string
2614 , (int16_t)strlen(hello_string));
2615 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
2618 case ARCMSR_MESSAGE_SAY_GOODBYE:
2619 arcmsr_iop_parking(acb);
2621 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE:
2622 arcmsr_flush_adapter_cache(acb);
2625 retvalue = ARCMSR_MESSAGE_FAIL;
2631 *********************************************************************
2632 *********************************************************************
2634 static void arcmsr_execute_srb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
2636 struct CommandControlBlock *srb = (struct CommandControlBlock *)arg;
2637 struct AdapterControlBlock *acb = (struct AdapterControlBlock *)srb->acb;
2642 target = pccb->ccb_h.target_id;
2643 lun = pccb->ccb_h.target_lun;
2644 acb->pktRequestCount++;
2646 if(error != EFBIG) {
2647 printf("arcmsr%d: unexpected error %x"
2648 " returned from 'bus_dmamap_load' \n"
2649 , acb->pci_unit, error);
2651 if((pccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG) {
2652 pccb->ccb_h.status |= CAM_REQ_TOO_BIG;
2654 arcmsr_srb_complete(srb, 0);
2657 if(nseg > ARCMSR_MAX_SG_ENTRIES) {
2658 pccb->ccb_h.status |= CAM_REQ_TOO_BIG;
2659 arcmsr_srb_complete(srb, 0);
2662 if(acb->acb_flags & ACB_F_BUS_RESET) {
2663 printf("arcmsr%d: bus reset and return busy \n", acb->pci_unit);
2664 pccb->ccb_h.status |= CAM_SCSI_BUS_RESET;
2665 arcmsr_srb_complete(srb, 0);
2668 if(acb->devstate[target][lun] == ARECA_RAID_GONE) {
2669 u_int8_t block_cmd, cmd;
2671 cmd = pccb->csio.cdb_io.cdb_bytes[0];
2672 block_cmd = cmd & 0x0f;
2673 if(block_cmd == 0x08 || block_cmd == 0x0a) {
2674 printf("arcmsr%d:block 'read/write' command "
2675 "with gone raid volume Cmd=0x%2x, TargetId=%d, Lun=%d \n"
2676 , acb->pci_unit, cmd, target, lun);
2677 pccb->ccb_h.status |= CAM_DEV_NOT_THERE;
2678 arcmsr_srb_complete(srb, 0);
2682 if((pccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
2684 bus_dmamap_unload(acb->dm_segs_dmat, srb->dm_segs_dmamap);
2686 arcmsr_srb_complete(srb, 0);
2689 if(acb->srboutstandingcount >= acb->maxOutstanding) {
2690 if((acb->acb_flags & ACB_F_CAM_DEV_QFRZN) == 0)
2692 xpt_freeze_simq(acb->psim, 1);
2693 acb->acb_flags |= ACB_F_CAM_DEV_QFRZN;
2695 pccb->ccb_h.status &= ~CAM_SIM_QUEUED;
2696 pccb->ccb_h.status |= CAM_REQUEUE_REQ;
2697 arcmsr_srb_complete(srb, 0);
2700 pccb->ccb_h.status |= CAM_SIM_QUEUED;
2701 arcmsr_build_srb(srb, dm_segs, nseg);
2702 arcmsr_post_srb(acb, srb);
2703 if (pccb->ccb_h.timeout != CAM_TIME_INFINITY)
2705 arcmsr_callout_init(&srb->ccb_callout);
2706 callout_reset(&srb->ccb_callout, ((pccb->ccb_h.timeout + (ARCMSR_TIMEOUT_DELAY * 1000)) * hz) / 1000, arcmsr_srb_timeout, srb);
2707 srb->srb_flags |= SRB_FLAG_TIMER_START;
2711 *****************************************************************************************
2712 *****************************************************************************************
2714 static u_int8_t arcmsr_seek_cmd2abort(union ccb *abortccb)
2716 struct CommandControlBlock *srb;
2717 struct AdapterControlBlock *acb = (struct AdapterControlBlock *) abortccb->ccb_h.arcmsr_ccbacb_ptr;
2718 u_int32_t intmask_org;
2723 ***************************************************************************
2724 ** It is the upper layer do abort command this lock just prior to calling us.
2725 ** First determine if we currently own this command.
2726 ** Start by searching the device queue. If not found
2727 ** at all, and the system wanted us to just abort the
2728 ** command return success.
2729 ***************************************************************************
2731 if(acb->srboutstandingcount != 0) {
2732 /* disable all outbound interrupt */
2733 intmask_org = arcmsr_disable_allintr(acb);
2734 for(i=0; i < ARCMSR_MAX_FREESRB_NUM; i++) {
2735 srb = acb->psrb_pool[i];
2736 if(srb->srb_state == ARCMSR_SRB_START) {
2737 if(srb->pccb == abortccb) {
2738 srb->srb_state = ARCMSR_SRB_ABORTED;
2739 printf("arcmsr%d:scsi id=%d lun=%d abort srb '%p'"
2740 "outstanding command \n"
2741 , acb->pci_unit, abortccb->ccb_h.target_id
2742 , abortccb->ccb_h.target_lun, srb);
2743 arcmsr_polling_srbdone(acb, srb);
2744 /* enable outbound Post Queue, outbound doorbell Interrupt */
2745 arcmsr_enable_allintr(acb, intmask_org);
2750 /* enable outbound Post Queue, outbound doorbell Interrupt */
2751 arcmsr_enable_allintr(acb, intmask_org);
2756 ****************************************************************************
2757 ****************************************************************************
2759 static void arcmsr_bus_reset(struct AdapterControlBlock *acb)
2764 acb->acb_flags |= ACB_F_BUS_RESET;
2765 while(acb->srboutstandingcount != 0 && retry < 400) {
2766 arcmsr_interrupt(acb);
2770 arcmsr_iop_reset(acb);
2771 acb->acb_flags &= ~ACB_F_BUS_RESET;
2774 **************************************************************************
2775 **************************************************************************
2777 static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
2780 if (pccb->ccb_h.target_lun) {
2781 pccb->ccb_h.status |= CAM_DEV_NOT_THERE;
2785 pccb->ccb_h.status |= CAM_REQ_CMP;
2786 switch (pccb->csio.cdb_io.cdb_bytes[0]) {
2788 unsigned char inqdata[36];
2789 char *buffer = pccb->csio.data_ptr;
2791 inqdata[0] = T_PROCESSOR; /* Periph Qualifier & Periph Dev Type */
2792 inqdata[1] = 0; /* rem media bit & Dev Type Modifier */
2793 inqdata[2] = 0; /* ISO, ECMA, & ANSI versions */
2795 inqdata[4] = 31; /* length of additional data */
2799 strncpy(&inqdata[8], "Areca ", 8); /* Vendor Identification */
2800 strncpy(&inqdata[16], "RAID controller ", 16); /* Product Identification */
2801 strncpy(&inqdata[32], "R001", 4); /* Product Revision */
2802 memcpy(buffer, inqdata, sizeof(inqdata));
2808 if (arcmsr_iop_message_xfer(acb, pccb)) {
2809 pccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR;
2810 pccb->csio.scsi_status = SCSI_STATUS_CHECK_COND;
2820 *********************************************************************
2821 *********************************************************************
2823 static void arcmsr_action(struct cam_sim *psim, union ccb *pccb)
2825 struct AdapterControlBlock *acb;
2827 acb = (struct AdapterControlBlock *) cam_sim_softc(psim);
2829 pccb->ccb_h.status |= CAM_REQ_INVALID;
2833 switch (pccb->ccb_h.func_code) {
2835 struct CommandControlBlock *srb;
2836 int target = pccb->ccb_h.target_id;
2840 /* virtual device for iop message transfer */
2841 arcmsr_handle_virtual_command(acb, pccb);
2844 if((srb = arcmsr_get_freesrb(acb)) == NULL) {
2845 pccb->ccb_h.status |= CAM_RESRC_UNAVAIL;
2849 pccb->ccb_h.arcmsr_ccbsrb_ptr = srb;
2850 pccb->ccb_h.arcmsr_ccbacb_ptr = acb;
2852 error = bus_dmamap_load_ccb(acb->dm_segs_dmat
2853 , srb->dm_segs_dmamap
2855 , arcmsr_execute_srb, srb, /*flags*/0);
2856 if(error == EINPROGRESS) {
2857 xpt_freeze_simq(acb->psim, 1);
2858 pccb->ccb_h.status |= CAM_RELEASE_SIMQ;
2862 case XPT_TARGET_IO: {
2863 /* target mode not yet support vendor specific commands. */
2864 pccb->ccb_h.status |= CAM_REQ_CMP;
2868 case XPT_PATH_INQ: {
2869 struct ccb_pathinq *cpi = &pccb->cpi;
2871 cpi->version_num = 1;
2872 cpi->hba_inquiry = PI_SDTR_ABLE | PI_TAG_ABLE;
2873 cpi->target_sprt = 0;
2875 cpi->hba_eng_cnt = 0;
2876 cpi->max_target = ARCMSR_MAX_TARGETID; /* 0-16 */
2877 cpi->max_lun = ARCMSR_MAX_TARGETLUN; /* 0-7 */
2878 cpi->initiator_id = ARCMSR_SCSI_INITIATOR_ID; /* 255 */
2879 cpi->bus_id = cam_sim_bus(psim);
2880 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
2881 strncpy(cpi->hba_vid, "ARCMSR", HBA_IDLEN);
2882 strncpy(cpi->dev_name, cam_sim_name(psim), DEV_IDLEN);
2883 cpi->unit_number = cam_sim_unit(psim);
2884 #ifdef CAM_NEW_TRAN_CODE
2885 if(acb->adapter_bus_speed == ACB_BUS_SPEED_6G)
2886 cpi->base_transfer_speed = 600000;
2888 cpi->base_transfer_speed = 300000;
2889 if((acb->vendor_device_id == PCIDevVenIDARC1880) ||
2890 (acb->vendor_device_id == PCIDevVenIDARC1680) ||
2891 (acb->vendor_device_id == PCIDevVenIDARC1214))
2893 cpi->transport = XPORT_SAS;
2894 cpi->transport_version = 0;
2895 cpi->protocol_version = SCSI_REV_SPC2;
2899 cpi->transport = XPORT_SPI;
2900 cpi->transport_version = 2;
2901 cpi->protocol_version = SCSI_REV_2;
2903 cpi->protocol = PROTO_SCSI;
2905 cpi->ccb_h.status |= CAM_REQ_CMP;
2910 union ccb *pabort_ccb;
2912 pabort_ccb = pccb->cab.abort_ccb;
2913 switch (pabort_ccb->ccb_h.func_code) {
2914 case XPT_ACCEPT_TARGET_IO:
2915 case XPT_IMMED_NOTIFY:
2916 case XPT_CONT_TARGET_IO:
2917 if(arcmsr_seek_cmd2abort(pabort_ccb)==TRUE) {
2918 pabort_ccb->ccb_h.status |= CAM_REQ_ABORTED;
2919 xpt_done(pabort_ccb);
2920 pccb->ccb_h.status |= CAM_REQ_CMP;
2922 xpt_print_path(pabort_ccb->ccb_h.path);
2923 printf("Not found\n");
2924 pccb->ccb_h.status |= CAM_PATH_INVALID;
2928 pccb->ccb_h.status |= CAM_UA_ABORT;
2931 pccb->ccb_h.status |= CAM_REQ_INVALID;
2938 case XPT_RESET_DEV: {
2941 arcmsr_bus_reset(acb);
2942 for (i=0; i < 500; i++) {
2945 pccb->ccb_h.status |= CAM_REQ_CMP;
2950 pccb->ccb_h.status |= CAM_REQ_INVALID;
2954 case XPT_GET_TRAN_SETTINGS: {
2955 struct ccb_trans_settings *cts;
2957 if(pccb->ccb_h.target_id == 16) {
2958 pccb->ccb_h.status |= CAM_FUNC_NOTAVAIL;
2963 #ifdef CAM_NEW_TRAN_CODE
2965 struct ccb_trans_settings_scsi *scsi;
2966 struct ccb_trans_settings_spi *spi;
2967 struct ccb_trans_settings_sas *sas;
2969 scsi = &cts->proto_specific.scsi;
2970 scsi->flags = CTS_SCSI_FLAGS_TAG_ENB;
2971 scsi->valid = CTS_SCSI_VALID_TQ;
2972 cts->protocol = PROTO_SCSI;
2974 if((acb->vendor_device_id == PCIDevVenIDARC1880) ||
2975 (acb->vendor_device_id == PCIDevVenIDARC1680) ||
2976 (acb->vendor_device_id == PCIDevVenIDARC1214))
2978 cts->protocol_version = SCSI_REV_SPC2;
2979 cts->transport_version = 0;
2980 cts->transport = XPORT_SAS;
2981 sas = &cts->xport_specific.sas;
2982 sas->valid = CTS_SAS_VALID_SPEED;
2983 if((acb->vendor_device_id == PCIDevVenIDARC1880) ||
2984 (acb->vendor_device_id == PCIDevVenIDARC1214))
2985 sas->bitrate = 600000;
2986 else if(acb->vendor_device_id == PCIDevVenIDARC1680)
2987 sas->bitrate = 300000;
2991 cts->protocol_version = SCSI_REV_2;
2992 cts->transport_version = 2;
2993 cts->transport = XPORT_SPI;
2994 spi = &cts->xport_specific.spi;
2995 spi->flags = CTS_SPI_FLAGS_DISC_ENB;
2996 spi->sync_period = 2;
2997 spi->sync_offset = 32;
2998 spi->bus_width = MSG_EXT_WDTR_BUS_16_BIT;
2999 spi->valid = CTS_SPI_VALID_DISC
3000 | CTS_SPI_VALID_SYNC_RATE
3001 | CTS_SPI_VALID_SYNC_OFFSET
3002 | CTS_SPI_VALID_BUS_WIDTH;
3007 cts->flags = (CCB_TRANS_DISC_ENB | CCB_TRANS_TAG_ENB);
3008 cts->sync_period = 2;
3009 cts->sync_offset = 32;
3010 cts->bus_width = MSG_EXT_WDTR_BUS_16_BIT;
3011 cts->valid = CCB_TRANS_SYNC_RATE_VALID |
3012 CCB_TRANS_SYNC_OFFSET_VALID |
3013 CCB_TRANS_BUS_WIDTH_VALID |
3014 CCB_TRANS_DISC_VALID |
3018 pccb->ccb_h.status |= CAM_REQ_CMP;
3022 case XPT_SET_TRAN_SETTINGS: {
3023 pccb->ccb_h.status |= CAM_FUNC_NOTAVAIL;
3027 case XPT_CALC_GEOMETRY:
3028 if(pccb->ccb_h.target_id == 16) {
3029 pccb->ccb_h.status |= CAM_FUNC_NOTAVAIL;
3033 #if __FreeBSD_version >= 500000
3034 cam_calc_geometry(&pccb->ccg, 1);
3037 struct ccb_calc_geometry *ccg;
3039 u_int32_t secs_per_cylinder;
3042 if (ccg->block_size == 0) {
3043 pccb->ccb_h.status = CAM_REQ_INVALID;
3047 if(((1024L * 1024L)/ccg->block_size) < 0) {
3048 pccb->ccb_h.status = CAM_REQ_INVALID;
3052 size_mb = ccg->volume_size/((1024L * 1024L)/ccg->block_size);
3053 if(size_mb > 1024 ) {
3055 ccg->secs_per_track = 63;
3058 ccg->secs_per_track = 32;
3060 secs_per_cylinder = ccg->heads * ccg->secs_per_track;
3061 ccg->cylinders = ccg->volume_size / secs_per_cylinder;
3062 pccb->ccb_h.status |= CAM_REQ_CMP;
3068 pccb->ccb_h.status |= CAM_REQ_INVALID;
3074 **********************************************************************
3075 **********************************************************************
3077 static void arcmsr_start_hba_bgrb(struct AdapterControlBlock *acb)
3079 acb->acb_flags |= ACB_F_MSG_START_BGRB;
3080 CHIP_REG_WRITE32(HBA_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_START_BGRB);
3081 if(!arcmsr_hba_wait_msgint_ready(acb)) {
3082 printf("arcmsr%d: wait 'start adapter background rebulid' timeout \n", acb->pci_unit);
3086 **********************************************************************
3087 **********************************************************************
3089 static void arcmsr_start_hbb_bgrb(struct AdapterControlBlock *acb)
3091 acb->acb_flags |= ACB_F_MSG_START_BGRB;
3092 CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_MESSAGE_START_BGRB);
3093 if(!arcmsr_hbb_wait_msgint_ready(acb)) {
3094 printf( "arcmsr%d: wait 'start adapter background rebulid' timeout \n", acb->pci_unit);
3098 **********************************************************************
3099 **********************************************************************
3101 static void arcmsr_start_hbc_bgrb(struct AdapterControlBlock *acb)
3103 acb->acb_flags |= ACB_F_MSG_START_BGRB;
3104 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_START_BGRB);
3105 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE);
3106 if(!arcmsr_hbc_wait_msgint_ready(acb)) {
3107 printf("arcmsr%d: wait 'start adapter background rebulid' timeout \n", acb->pci_unit);
3111 **********************************************************************
3112 **********************************************************************
3114 static void arcmsr_start_hbd_bgrb(struct AdapterControlBlock *acb)
3116 acb->acb_flags |= ACB_F_MSG_START_BGRB;
3117 CHIP_REG_WRITE32(HBD_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_START_BGRB);
3118 if(!arcmsr_hbd_wait_msgint_ready(acb)) {
3119 printf("arcmsr%d: wait 'start adapter background rebulid' timeout \n", acb->pci_unit);
3123 **********************************************************************
3124 **********************************************************************
3126 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb)
3128 switch (acb->adapter_type) {
3129 case ACB_ADAPTER_TYPE_A:
3130 arcmsr_start_hba_bgrb(acb);
3132 case ACB_ADAPTER_TYPE_B:
3133 arcmsr_start_hbb_bgrb(acb);
3135 case ACB_ADAPTER_TYPE_C:
3136 arcmsr_start_hbc_bgrb(acb);
3138 case ACB_ADAPTER_TYPE_D:
3139 arcmsr_start_hbd_bgrb(acb);
3144 **********************************************************************
3146 **********************************************************************
3148 static void arcmsr_polling_hba_srbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_srb)
3150 struct CommandControlBlock *srb;
3151 u_int32_t flag_srb, outbound_intstatus, poll_srb_done=0, poll_count=0;
3156 outbound_intstatus=CHIP_REG_READ32(HBA_MessageUnit, 0, outbound_intstatus) & acb->outbound_int_enable;
3157 CHIP_REG_WRITE32(HBA_MessageUnit, 0, outbound_intstatus, outbound_intstatus); /*clear interrupt*/
3158 bus_dmamap_sync(acb->srb_dmat, acb->srb_dmamap, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
3160 if((flag_srb = CHIP_REG_READ32(HBA_MessageUnit,
3161 0, outbound_queueport)) == 0xFFFFFFFF) {
3163 break;/*chip FIFO no ccb for completion already*/
3166 if ((poll_count > 100) && (poll_srb != NULL)) {
3169 goto polling_ccb_retry;
3172 /* check if command done with no error*/
3173 srb = (struct CommandControlBlock *)
3174 (acb->vir2phy_offset+(flag_srb << 5));/*frame must be 32 bytes aligned*/
3175 error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE;
3176 poll_srb_done = (srb == poll_srb) ? 1:0;
3177 if((srb->acb != acb) || (srb->srb_state != ARCMSR_SRB_START)) {
3178 if(srb->srb_state == ARCMSR_SRB_ABORTED) {
3179 printf("arcmsr%d: scsi id=%d lun=%d srb='%p'"
3180 "poll command abort successfully \n"
3182 , srb->pccb->ccb_h.target_id
3183 , srb->pccb->ccb_h.target_lun, srb);
3184 srb->pccb->ccb_h.status |= CAM_REQ_ABORTED;
3185 arcmsr_srb_complete(srb, 1);
3188 printf("arcmsr%d: polling get an illegal srb command done srb='%p'"
3189 "srboutstandingcount=%d \n"
3191 , srb, acb->srboutstandingcount);
3194 arcmsr_report_srb_state(acb, srb, error);
3195 } /*drain reply FIFO*/
3198 **********************************************************************
3200 **********************************************************************
3202 static void arcmsr_polling_hbb_srbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_srb)
3204 struct HBB_MessageUnit *phbbmu = (struct HBB_MessageUnit *)acb->pmu;
3205 struct CommandControlBlock *srb;
3206 u_int32_t flag_srb, poll_srb_done=0, poll_count=0;
3212 CHIP_REG_WRITE32(HBB_DOORBELL,
3213 0, iop2drv_doorbell, ARCMSR_DOORBELL_INT_CLEAR_PATTERN); /* clear doorbell interrupt */
3214 bus_dmamap_sync(acb->srb_dmat, acb->srb_dmamap, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
3216 index = phbbmu->doneq_index;
3217 if((flag_srb = phbbmu->done_qbuffer[index]) == 0) {
3219 break;/*chip FIFO no ccb for completion already*/
3222 if ((poll_count > 100) && (poll_srb != NULL)) {
3225 goto polling_ccb_retry;
3228 phbbmu->done_qbuffer[index] = 0;
3230 index %= ARCMSR_MAX_HBB_POSTQUEUE; /*if last index number set it to 0 */
3231 phbbmu->doneq_index = index;
3232 /* check if command done with no error*/
3233 srb = (struct CommandControlBlock *)
3234 (acb->vir2phy_offset+(flag_srb << 5));/*frame must be 32 bytes aligned*/
3235 error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE;
3236 poll_srb_done = (srb == poll_srb) ? 1:0;
3237 if((srb->acb != acb) || (srb->srb_state != ARCMSR_SRB_START)) {
3238 if(srb->srb_state == ARCMSR_SRB_ABORTED) {
3239 printf("arcmsr%d: scsi id=%d lun=%d srb='%p'"
3240 "poll command abort successfully \n"
3242 , srb->pccb->ccb_h.target_id
3243 , srb->pccb->ccb_h.target_lun, srb);
3244 srb->pccb->ccb_h.status |= CAM_REQ_ABORTED;
3245 arcmsr_srb_complete(srb, 1);
3248 printf("arcmsr%d: polling get an illegal srb command done srb='%p'"
3249 "srboutstandingcount=%d \n"
3251 , srb, acb->srboutstandingcount);
3254 arcmsr_report_srb_state(acb, srb, error);
3255 } /*drain reply FIFO*/
3258 **********************************************************************
3260 **********************************************************************
3262 static void arcmsr_polling_hbc_srbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_srb)
3264 struct CommandControlBlock *srb;
3265 u_int32_t flag_srb, poll_srb_done=0, poll_count=0;
3270 bus_dmamap_sync(acb->srb_dmat, acb->srb_dmamap, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
3272 if(!(CHIP_REG_READ32(HBC_MessageUnit, 0, host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR)) {
3274 break;/*chip FIFO no ccb for completion already*/
3277 if ((poll_count > 100) && (poll_srb != NULL)) {
3280 if (acb->srboutstandingcount == 0) {
3283 goto polling_ccb_retry;
3286 flag_srb = CHIP_REG_READ32(HBC_MessageUnit, 0, outbound_queueport_low);
3287 /* check if command done with no error*/
3288 srb = (struct CommandControlBlock *)(acb->vir2phy_offset+(flag_srb & 0xFFFFFFE0));/*frame must be 32 bytes aligned*/
3289 error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE1)?TRUE:FALSE;
3290 if (poll_srb != NULL)
3291 poll_srb_done = (srb == poll_srb) ? 1:0;
3292 if((srb->acb != acb) || (srb->srb_state != ARCMSR_SRB_START)) {
3293 if(srb->srb_state == ARCMSR_SRB_ABORTED) {
3294 printf("arcmsr%d: scsi id=%d lun=%d srb='%p'poll command abort successfully \n"
3295 , acb->pci_unit, srb->pccb->ccb_h.target_id, srb->pccb->ccb_h.target_lun, srb);
3296 srb->pccb->ccb_h.status |= CAM_REQ_ABORTED;
3297 arcmsr_srb_complete(srb, 1);
3300 printf("arcmsr%d: polling get an illegal srb command done srb='%p'srboutstandingcount=%d \n"
3301 , acb->pci_unit, srb, acb->srboutstandingcount);
3304 arcmsr_report_srb_state(acb, srb, error);
3305 } /*drain reply FIFO*/
3308 **********************************************************************
3310 **********************************************************************
3312 static void arcmsr_polling_hbd_srbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_srb)
3314 struct HBD_MessageUnit0 *phbdmu = (struct HBD_MessageUnit0 *)acb->pmu;
3315 struct CommandControlBlock *srb;
3316 u_int32_t flag_srb, poll_srb_done=0, poll_count=0;
3317 u_int32_t outbound_write_pointer;
3318 u_int16_t error, doneq_index;
3322 bus_dmamap_sync(acb->srb_dmat, acb->srb_dmamap, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
3324 outbound_write_pointer = phbdmu->done_qbuffer[0].addressLow;
3325 doneq_index = phbdmu->doneq_index;
3326 if ((outbound_write_pointer & 0xFF) == (doneq_index & 0xFF)) {
3328 break;/*chip FIFO no ccb for completion already*/
3331 if ((poll_count > 100) && (poll_srb != NULL)) {
3334 if (acb->srboutstandingcount == 0) {
3337 goto polling_ccb_retry;
3340 doneq_index = arcmsr_get_doneq_index(phbdmu);
3341 flag_srb = phbdmu->done_qbuffer[(doneq_index & 0xFF)+1].addressLow;
3342 /* check if command done with no error*/
3343 srb = (struct CommandControlBlock *)(acb->vir2phy_offset+(flag_srb & 0xFFFFFFE0));/*frame must be 32 bytes aligned*/
3344 error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE1) ? TRUE : FALSE;
3345 CHIP_REG_WRITE32(HBD_MessageUnit, 0, outboundlist_read_pointer, doneq_index);
3346 if (poll_srb != NULL)
3347 poll_srb_done = (srb == poll_srb) ? 1:0;
3348 if((srb->acb != acb) || (srb->srb_state != ARCMSR_SRB_START)) {
3349 if(srb->srb_state == ARCMSR_SRB_ABORTED) {
3350 printf("arcmsr%d: scsi id=%d lun=%d srb='%p'poll command abort successfully \n"
3351 , acb->pci_unit, srb->pccb->ccb_h.target_id, srb->pccb->ccb_h.target_lun, srb);
3352 srb->pccb->ccb_h.status |= CAM_REQ_ABORTED;
3353 arcmsr_srb_complete(srb, 1);
3356 printf("arcmsr%d: polling get an illegal srb command done srb='%p'srboutstandingcount=%d \n"
3357 , acb->pci_unit, srb, acb->srboutstandingcount);
3360 arcmsr_report_srb_state(acb, srb, error);
3361 } /*drain reply FIFO*/
3364 **********************************************************************
3365 **********************************************************************
3367 static void arcmsr_polling_srbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_srb)
3369 switch (acb->adapter_type) {
3370 case ACB_ADAPTER_TYPE_A: {
3371 arcmsr_polling_hba_srbdone(acb, poll_srb);
3374 case ACB_ADAPTER_TYPE_B: {
3375 arcmsr_polling_hbb_srbdone(acb, poll_srb);
3378 case ACB_ADAPTER_TYPE_C: {
3379 arcmsr_polling_hbc_srbdone(acb, poll_srb);
3382 case ACB_ADAPTER_TYPE_D: {
3383 arcmsr_polling_hbd_srbdone(acb, poll_srb);
3389 **********************************************************************
3390 **********************************************************************
3392 static void arcmsr_get_hba_config(struct AdapterControlBlock *acb)
3394 char *acb_firm_model = acb->firm_model;
3395 char *acb_firm_version = acb->firm_version;
3396 char *acb_device_map = acb->device_map;
3397 size_t iop_firm_model = offsetof(struct HBA_MessageUnit,msgcode_rwbuffer[ARCMSR_FW_MODEL_OFFSET]); /*firm_model,15,60-67*/
3398 size_t iop_firm_version = offsetof(struct HBA_MessageUnit,msgcode_rwbuffer[ARCMSR_FW_VERS_OFFSET]); /*firm_version,17,68-83*/
3399 size_t iop_device_map = offsetof(struct HBA_MessageUnit,msgcode_rwbuffer[ARCMSR_FW_DEVMAP_OFFSET]);
3402 CHIP_REG_WRITE32(HBA_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG);
3403 if(!arcmsr_hba_wait_msgint_ready(acb)) {
3404 printf("arcmsr%d: wait 'get adapter firmware miscellaneous data' timeout \n", acb->pci_unit);
3408 *acb_firm_model = bus_space_read_1(acb->btag[0], acb->bhandle[0], iop_firm_model+i);
3409 /* 8 bytes firm_model, 15, 60-67*/
3415 *acb_firm_version = bus_space_read_1(acb->btag[0], acb->bhandle[0], iop_firm_version+i);
3416 /* 16 bytes firm_version, 17, 68-83*/
3422 *acb_device_map = bus_space_read_1(acb->btag[0], acb->bhandle[0], iop_device_map+i);
3426 printf("Areca RAID adapter%d: %s F/W version %s \n", acb->pci_unit, acb->firm_model, acb->firm_version);
3427 acb->firm_request_len = CHIP_REG_READ32(HBA_MessageUnit, 0, msgcode_rwbuffer[1]); /*firm_request_len, 1, 04-07*/
3428 acb->firm_numbers_queue = CHIP_REG_READ32(HBA_MessageUnit, 0, msgcode_rwbuffer[2]); /*firm_numbers_queue, 2, 08-11*/
3429 acb->firm_sdram_size = CHIP_REG_READ32(HBA_MessageUnit, 0, msgcode_rwbuffer[3]); /*firm_sdram_size, 3, 12-15*/
3430 acb->firm_ide_channels = CHIP_REG_READ32(HBA_MessageUnit, 0, msgcode_rwbuffer[4]); /*firm_ide_channels, 4, 16-19*/
3431 acb->firm_cfg_version = CHIP_REG_READ32(HBA_MessageUnit, 0, msgcode_rwbuffer[ARCMSR_FW_CFGVER_OFFSET]); /*firm_cfg_version, 25, */
3432 if(acb->firm_numbers_queue > ARCMSR_MAX_OUTSTANDING_CMD)
3433 acb->maxOutstanding = ARCMSR_MAX_OUTSTANDING_CMD - 1;
3435 acb->maxOutstanding = acb->firm_numbers_queue - 1;
3438 **********************************************************************
3439 **********************************************************************
3441 static void arcmsr_get_hbb_config(struct AdapterControlBlock *acb)
3443 char *acb_firm_model = acb->firm_model;
3444 char *acb_firm_version = acb->firm_version;
3445 char *acb_device_map = acb->device_map;
3446 size_t iop_firm_model = offsetof(struct HBB_RWBUFFER, msgcode_rwbuffer[ARCMSR_FW_MODEL_OFFSET]); /*firm_model,15,60-67*/
3447 size_t iop_firm_version = offsetof(struct HBB_RWBUFFER, msgcode_rwbuffer[ARCMSR_FW_VERS_OFFSET]); /*firm_version,17,68-83*/
3448 size_t iop_device_map = offsetof(struct HBB_RWBUFFER, msgcode_rwbuffer[ARCMSR_FW_DEVMAP_OFFSET]);
3451 CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_MESSAGE_GET_CONFIG);
3452 if(!arcmsr_hbb_wait_msgint_ready(acb)) {
3453 printf( "arcmsr%d: wait" "'get adapter firmware miscellaneous data' timeout \n", acb->pci_unit);
3457 *acb_firm_model = bus_space_read_1(acb->btag[1], acb->bhandle[1], iop_firm_model+i);
3458 /* 8 bytes firm_model, 15, 60-67*/
3464 *acb_firm_version = bus_space_read_1(acb->btag[1], acb->bhandle[1], iop_firm_version+i);
3465 /* 16 bytes firm_version, 17, 68-83*/
3471 *acb_device_map = bus_space_read_1(acb->btag[1], acb->bhandle[1], iop_device_map+i);
3475 printf("Areca RAID adapter%d: %s F/W version %s \n", acb->pci_unit, acb->firm_model, acb->firm_version);
3476 acb->firm_request_len = CHIP_REG_READ32(HBB_RWBUFFER, 1, msgcode_rwbuffer[1]); /*firm_request_len, 1, 04-07*/
3477 acb->firm_numbers_queue = CHIP_REG_READ32(HBB_RWBUFFER, 1, msgcode_rwbuffer[2]); /*firm_numbers_queue, 2, 08-11*/
3478 acb->firm_sdram_size = CHIP_REG_READ32(HBB_RWBUFFER, 1, msgcode_rwbuffer[3]); /*firm_sdram_size, 3, 12-15*/
3479 acb->firm_ide_channels = CHIP_REG_READ32(HBB_RWBUFFER, 1, msgcode_rwbuffer[4]); /*firm_ide_channels, 4, 16-19*/
3480 acb->firm_cfg_version = CHIP_REG_READ32(HBB_RWBUFFER, 1, msgcode_rwbuffer[ARCMSR_FW_CFGVER_OFFSET]); /*firm_cfg_version, 25, */
3481 if(acb->firm_numbers_queue > ARCMSR_MAX_HBB_POSTQUEUE)
3482 acb->maxOutstanding = ARCMSR_MAX_HBB_POSTQUEUE - 1;
3484 acb->maxOutstanding = acb->firm_numbers_queue - 1;
3487 **********************************************************************
3488 **********************************************************************
3490 static void arcmsr_get_hbc_config(struct AdapterControlBlock *acb)
3492 char *acb_firm_model = acb->firm_model;
3493 char *acb_firm_version = acb->firm_version;
3494 char *acb_device_map = acb->device_map;
3495 size_t iop_firm_model = offsetof(struct HBC_MessageUnit,msgcode_rwbuffer[ARCMSR_FW_MODEL_OFFSET]); /*firm_model,15,60-67*/
3496 size_t iop_firm_version = offsetof(struct HBC_MessageUnit,msgcode_rwbuffer[ARCMSR_FW_VERS_OFFSET]); /*firm_version,17,68-83*/
3497 size_t iop_device_map = offsetof(struct HBC_MessageUnit,msgcode_rwbuffer[ARCMSR_FW_DEVMAP_OFFSET]);
3500 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG);
3501 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE);
3502 if(!arcmsr_hbc_wait_msgint_ready(acb)) {
3503 printf("arcmsr%d: wait 'get adapter firmware miscellaneous data' timeout \n", acb->pci_unit);
3507 *acb_firm_model = bus_space_read_1(acb->btag[0], acb->bhandle[0], iop_firm_model+i);
3508 /* 8 bytes firm_model, 15, 60-67*/
3514 *acb_firm_version = bus_space_read_1(acb->btag[0], acb->bhandle[0], iop_firm_version+i);
3515 /* 16 bytes firm_version, 17, 68-83*/
3521 *acb_device_map = bus_space_read_1(acb->btag[0], acb->bhandle[0], iop_device_map+i);
3525 printf("Areca RAID adapter%d: %s F/W version %s \n", acb->pci_unit, acb->firm_model, acb->firm_version);
3526 acb->firm_request_len = CHIP_REG_READ32(HBC_MessageUnit, 0, msgcode_rwbuffer[1]); /*firm_request_len, 1, 04-07*/
3527 acb->firm_numbers_queue = CHIP_REG_READ32(HBC_MessageUnit, 0, msgcode_rwbuffer[2]); /*firm_numbers_queue, 2, 08-11*/
3528 acb->firm_sdram_size = CHIP_REG_READ32(HBC_MessageUnit, 0, msgcode_rwbuffer[3]); /*firm_sdram_size, 3, 12-15*/
3529 acb->firm_ide_channels = CHIP_REG_READ32(HBC_MessageUnit, 0, msgcode_rwbuffer[4]); /*firm_ide_channels, 4, 16-19*/
3530 acb->firm_cfg_version = CHIP_REG_READ32(HBC_MessageUnit, 0, msgcode_rwbuffer[ARCMSR_FW_CFGVER_OFFSET]); /*firm_cfg_version, 25, */
3531 if(acb->firm_numbers_queue > ARCMSR_MAX_OUTSTANDING_CMD)
3532 acb->maxOutstanding = ARCMSR_MAX_OUTSTANDING_CMD - 1;
3534 acb->maxOutstanding = acb->firm_numbers_queue - 1;
3537 **********************************************************************
3538 **********************************************************************
3540 static void arcmsr_get_hbd_config(struct AdapterControlBlock *acb)
3542 char *acb_firm_model = acb->firm_model;
3543 char *acb_firm_version = acb->firm_version;
3544 char *acb_device_map = acb->device_map;
3545 size_t iop_firm_model = offsetof(struct HBD_MessageUnit, msgcode_rwbuffer[ARCMSR_FW_MODEL_OFFSET]); /*firm_model,15,60-67*/
3546 size_t iop_firm_version = offsetof(struct HBD_MessageUnit, msgcode_rwbuffer[ARCMSR_FW_VERS_OFFSET]); /*firm_version,17,68-83*/
3547 size_t iop_device_map = offsetof(struct HBD_MessageUnit, msgcode_rwbuffer[ARCMSR_FW_DEVMAP_OFFSET]);
3550 if(CHIP_REG_READ32(HBD_MessageUnit, 0, outbound_doorbell) & ARCMSR_HBDMU_IOP2DRV_MESSAGE_CMD_DONE)
3551 CHIP_REG_WRITE32(HBD_MessageUnit, 0, outbound_doorbell, ARCMSR_HBDMU_IOP2DRV_MESSAGE_CMD_DONE_CLEAR);
3552 CHIP_REG_WRITE32(HBD_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG);
3553 if(!arcmsr_hbd_wait_msgint_ready(acb)) {
3554 printf("arcmsr%d: wait 'get adapter firmware miscellaneous data' timeout \n", acb->pci_unit);
3558 *acb_firm_model = bus_space_read_1(acb->btag[0], acb->bhandle[0], iop_firm_model+i);
3559 /* 8 bytes firm_model, 15, 60-67*/
3565 *acb_firm_version = bus_space_read_1(acb->btag[0], acb->bhandle[0], iop_firm_version+i);
3566 /* 16 bytes firm_version, 17, 68-83*/
3572 *acb_device_map = bus_space_read_1(acb->btag[0], acb->bhandle[0], iop_device_map+i);
3576 printf("Areca RAID adapter%d: %s F/W version %s \n", acb->pci_unit, acb->firm_model, acb->firm_version);
3577 acb->firm_request_len = CHIP_REG_READ32(HBD_MessageUnit, 0, msgcode_rwbuffer[2]); /*firm_request_len, 1, 04-07*/
3578 acb->firm_numbers_queue = CHIP_REG_READ32(HBD_MessageUnit, 0, msgcode_rwbuffer[3]); /*firm_numbers_queue, 2, 08-11*/
3579 acb->firm_sdram_size = CHIP_REG_READ32(HBD_MessageUnit, 0, msgcode_rwbuffer[4]); /*firm_sdram_size, 3, 12-15*/
3580 acb->firm_ide_channels = CHIP_REG_READ32(HBD_MessageUnit, 0, msgcode_rwbuffer[5]); /*firm_ide_channels, 4, 16-19*/
3581 acb->firm_cfg_version = CHIP_REG_READ32(HBD_MessageUnit, 0, msgcode_rwbuffer[ARCMSR_FW_CFGVER_OFFSET]); /*firm_cfg_version, 25, */
3582 if(acb->firm_numbers_queue > ARCMSR_MAX_HBD_POSTQUEUE)
3583 acb->maxOutstanding = ARCMSR_MAX_HBD_POSTQUEUE - 1;
3585 acb->maxOutstanding = acb->firm_numbers_queue - 1;
3588 **********************************************************************
3589 **********************************************************************
3591 static void arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
3593 switch (acb->adapter_type) {
3594 case ACB_ADAPTER_TYPE_A: {
3595 arcmsr_get_hba_config(acb);
3598 case ACB_ADAPTER_TYPE_B: {
3599 arcmsr_get_hbb_config(acb);
3602 case ACB_ADAPTER_TYPE_C: {
3603 arcmsr_get_hbc_config(acb);
3606 case ACB_ADAPTER_TYPE_D: {
3607 arcmsr_get_hbd_config(acb);
3613 **********************************************************************
3614 **********************************************************************
3616 static void arcmsr_wait_firmware_ready( struct AdapterControlBlock *acb)
3620 switch (acb->adapter_type) {
3621 case ACB_ADAPTER_TYPE_A: {
3622 while ((CHIP_REG_READ32(HBA_MessageUnit, 0, outbound_msgaddr1) & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0)
3624 if (timeout++ > 2000) /* (2000*15)/1000 = 30 sec */
3626 printf( "arcmsr%d:timed out waiting for firmware \n", acb->pci_unit);
3629 UDELAY(15000); /* wait 15 milli-seconds */
3633 case ACB_ADAPTER_TYPE_B: {
3634 while ((CHIP_REG_READ32(HBB_DOORBELL, 0, iop2drv_doorbell) & ARCMSR_MESSAGE_FIRMWARE_OK) == 0)
3636 if (timeout++ > 2000) /* (2000*15)/1000 = 30 sec */
3638 printf( "arcmsr%d: timed out waiting for firmware \n", acb->pci_unit);
3641 UDELAY(15000); /* wait 15 milli-seconds */
3643 CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_DRV2IOP_END_OF_INTERRUPT);
3646 case ACB_ADAPTER_TYPE_C: {
3647 while ((CHIP_REG_READ32(HBC_MessageUnit, 0, outbound_msgaddr1) & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0)
3649 if (timeout++ > 2000) /* (2000*15)/1000 = 30 sec */
3651 printf( "arcmsr%d:timed out waiting for firmware ready\n", acb->pci_unit);
3654 UDELAY(15000); /* wait 15 milli-seconds */
3658 case ACB_ADAPTER_TYPE_D: {
3659 while ((CHIP_REG_READ32(HBD_MessageUnit, 0, outbound_msgaddr1) & ARCMSR_HBDMU_MESSAGE_FIRMWARE_OK) == 0)
3661 if (timeout++ > 2000) /* (2000*15)/1000 = 30 sec */
3663 printf( "arcmsr%d:timed out waiting for firmware ready\n", acb->pci_unit);
3666 UDELAY(15000); /* wait 15 milli-seconds */
3673 **********************************************************************
3674 **********************************************************************
3676 static void arcmsr_clear_doorbell_queue_buffer( struct AdapterControlBlock *acb)
3678 u_int32_t outbound_doorbell;
3680 switch (acb->adapter_type) {
3681 case ACB_ADAPTER_TYPE_A: {
3682 /* empty doorbell Qbuffer if door bell ringed */
3683 outbound_doorbell = CHIP_REG_READ32(HBA_MessageUnit, 0, outbound_doorbell);
3684 CHIP_REG_WRITE32(HBA_MessageUnit, 0, outbound_doorbell, outbound_doorbell); /*clear doorbell interrupt */
3685 CHIP_REG_WRITE32(HBA_MessageUnit, 0, inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_READ_OK);
3689 case ACB_ADAPTER_TYPE_B: {
3690 CHIP_REG_WRITE32(HBB_DOORBELL, 0, iop2drv_doorbell, ARCMSR_MESSAGE_INT_CLEAR_PATTERN);/*clear interrupt and message state*/
3691 CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_DRV2IOP_DATA_READ_OK);
3692 /* let IOP know data has been read */
3695 case ACB_ADAPTER_TYPE_C: {
3696 /* empty doorbell Qbuffer if door bell ringed */
3697 outbound_doorbell = CHIP_REG_READ32(HBC_MessageUnit, 0, outbound_doorbell);
3698 CHIP_REG_WRITE32(HBC_MessageUnit, 0, outbound_doorbell_clear, outbound_doorbell); /*clear doorbell interrupt */
3699 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK);
3700 CHIP_REG_READ32(HBC_MessageUnit, 0, outbound_doorbell_clear); /* Dummy read to force pci flush */
3701 CHIP_REG_READ32(HBC_MessageUnit, 0, inbound_doorbell); /* Dummy read to force pci flush */
3704 case ACB_ADAPTER_TYPE_D: {
3705 /* empty doorbell Qbuffer if door bell ringed */
3706 outbound_doorbell = CHIP_REG_READ32(HBD_MessageUnit, 0, outbound_doorbell);
3707 CHIP_REG_WRITE32(HBD_MessageUnit, 0, outbound_doorbell, outbound_doorbell); /*clear doorbell interrupt */
3708 CHIP_REG_WRITE32(HBD_MessageUnit, 0, inbound_doorbell, ARCMSR_HBDMU_DRV2IOP_DATA_OUT_READ);
3715 ************************************************************************
3716 ************************************************************************
3718 static u_int32_t arcmsr_iop_confirm(struct AdapterControlBlock *acb)
3720 unsigned long srb_phyaddr;
3721 u_int32_t srb_phyaddr_hi32;
3722 u_int32_t srb_phyaddr_lo32;
3725 ********************************************************************
3726 ** here we need to tell iop 331 our freesrb.HighPart
3727 ** if freesrb.HighPart is not zero
3728 ********************************************************************
3730 srb_phyaddr = (unsigned long) acb->srb_phyaddr.phyaddr;
3731 srb_phyaddr_hi32 = acb->srb_phyaddr.B.phyadd_high;
3732 srb_phyaddr_lo32 = acb->srb_phyaddr.B.phyadd_low;
3733 switch (acb->adapter_type) {
3734 case ACB_ADAPTER_TYPE_A: {
3735 if(srb_phyaddr_hi32 != 0) {
3736 CHIP_REG_WRITE32(HBA_MessageUnit, 0, msgcode_rwbuffer[0], ARCMSR_SIGNATURE_SET_CONFIG);
3737 CHIP_REG_WRITE32(HBA_MessageUnit, 0, msgcode_rwbuffer[1], srb_phyaddr_hi32);
3738 CHIP_REG_WRITE32(HBA_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_SET_CONFIG);
3739 if(!arcmsr_hba_wait_msgint_ready(acb)) {
3740 printf( "arcmsr%d: 'set srb high part physical address' timeout \n", acb->pci_unit);
3747 ***********************************************************************
3748 ** if adapter type B, set window of "post command Q"
3749 ***********************************************************************
3751 case ACB_ADAPTER_TYPE_B: {
3752 u_int32_t post_queue_phyaddr;
3753 struct HBB_MessageUnit *phbbmu;
3755 phbbmu = (struct HBB_MessageUnit *)acb->pmu;
3756 phbbmu->postq_index = 0;
3757 phbbmu->doneq_index = 0;
3758 CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_MESSAGE_SET_POST_WINDOW);
3759 if(!arcmsr_hbb_wait_msgint_ready(acb)) {
3760 printf( "arcmsr%d: 'set window of post command Q' timeout\n", acb->pci_unit);
3763 post_queue_phyaddr = srb_phyaddr + ARCMSR_SRBS_POOL_SIZE
3764 + offsetof(struct HBB_MessageUnit, post_qbuffer);
3765 CHIP_REG_WRITE32(HBB_RWBUFFER, 1, msgcode_rwbuffer[0], ARCMSR_SIGNATURE_SET_CONFIG); /* driver "set config" signature */
3766 CHIP_REG_WRITE32(HBB_RWBUFFER, 1, msgcode_rwbuffer[1], srb_phyaddr_hi32); /* normal should be zero */
3767 CHIP_REG_WRITE32(HBB_RWBUFFER, 1, msgcode_rwbuffer[2], post_queue_phyaddr); /* postQ size (256+8)*4 */
3768 CHIP_REG_WRITE32(HBB_RWBUFFER, 1, msgcode_rwbuffer[3], post_queue_phyaddr+1056); /* doneQ size (256+8)*4 */
3769 CHIP_REG_WRITE32(HBB_RWBUFFER, 1, msgcode_rwbuffer[4], 1056); /* srb maxQ size must be --> [(256+8)*4] */
3770 CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_MESSAGE_SET_CONFIG);
3771 if(!arcmsr_hbb_wait_msgint_ready(acb)) {
3772 printf( "arcmsr%d: 'set command Q window' timeout \n", acb->pci_unit);
3775 CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_MESSAGE_START_DRIVER_MODE);
3776 if(!arcmsr_hbb_wait_msgint_ready(acb)) {
3777 printf( "arcmsr%d: 'start diver mode' timeout \n", acb->pci_unit);
3782 case ACB_ADAPTER_TYPE_C: {
3783 if(srb_phyaddr_hi32 != 0) {
3784 CHIP_REG_WRITE32(HBC_MessageUnit, 0, msgcode_rwbuffer[0], ARCMSR_SIGNATURE_SET_CONFIG);
3785 CHIP_REG_WRITE32(HBC_MessageUnit, 0, msgcode_rwbuffer[1], srb_phyaddr_hi32);
3786 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_SET_CONFIG);
3787 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell,ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE);
3788 if(!arcmsr_hbc_wait_msgint_ready(acb)) {
3789 printf( "arcmsr%d: 'set srb high part physical address' timeout \n", acb->pci_unit);
3795 case ACB_ADAPTER_TYPE_D: {
3796 u_int32_t post_queue_phyaddr, done_queue_phyaddr;
3797 struct HBD_MessageUnit0 *phbdmu;
3799 phbdmu = (struct HBD_MessageUnit0 *)acb->pmu;
3800 phbdmu->postq_index = 0;
3801 phbdmu->doneq_index = 0x40FF;
3802 post_queue_phyaddr = srb_phyaddr_lo32 + ARCMSR_SRBS_POOL_SIZE
3803 + offsetof(struct HBD_MessageUnit0, post_qbuffer);
3804 done_queue_phyaddr = srb_phyaddr_lo32 + ARCMSR_SRBS_POOL_SIZE
3805 + offsetof(struct HBD_MessageUnit0, done_qbuffer);
3806 CHIP_REG_WRITE32(HBD_MessageUnit, 0, msgcode_rwbuffer[0], ARCMSR_SIGNATURE_SET_CONFIG); /* driver "set config" signature */
3807 CHIP_REG_WRITE32(HBD_MessageUnit, 0, msgcode_rwbuffer[1], srb_phyaddr_hi32);
3808 CHIP_REG_WRITE32(HBD_MessageUnit, 0, msgcode_rwbuffer[2], post_queue_phyaddr); /* postQ base */
3809 CHIP_REG_WRITE32(HBD_MessageUnit, 0, msgcode_rwbuffer[3], done_queue_phyaddr); /* doneQ base */
3810 CHIP_REG_WRITE32(HBD_MessageUnit, 0, msgcode_rwbuffer[4], 0x100);
3811 CHIP_REG_WRITE32(HBD_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_SET_CONFIG);
3812 if(!arcmsr_hbd_wait_msgint_ready(acb)) {
3813 printf( "arcmsr%d: 'set srb high part physical address' timeout \n", acb->pci_unit);
3822 ************************************************************************
3823 ************************************************************************
3825 static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb)
3827 switch (acb->adapter_type)
3829 case ACB_ADAPTER_TYPE_A:
3830 case ACB_ADAPTER_TYPE_C:
3831 case ACB_ADAPTER_TYPE_D:
3833 case ACB_ADAPTER_TYPE_B: {
3834 CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell,ARCMSR_MESSAGE_ACTIVE_EOI_MODE);
3835 if(!arcmsr_hbb_wait_msgint_ready(acb)) {
3836 printf( "arcmsr%d: 'iop enable eoi mode' timeout \n", acb->pci_unit);
3844 **********************************************************************
3845 **********************************************************************
3847 static void arcmsr_iop_init(struct AdapterControlBlock *acb)
3849 u_int32_t intmask_org;
3851 /* disable all outbound interrupt */
3852 intmask_org = arcmsr_disable_allintr(acb);
3853 arcmsr_wait_firmware_ready(acb);
3854 arcmsr_iop_confirm(acb);
3855 arcmsr_get_firmware_spec(acb);
3856 /*start background rebuild*/
3857 arcmsr_start_adapter_bgrb(acb);
3858 /* empty doorbell Qbuffer if door bell ringed */
3859 arcmsr_clear_doorbell_queue_buffer(acb);
3860 arcmsr_enable_eoi_mode(acb);
3861 /* enable outbound Post Queue, outbound doorbell Interrupt */
3862 arcmsr_enable_allintr(acb, intmask_org);
3863 acb->acb_flags |= ACB_F_IOP_INITED;
3866 **********************************************************************
3867 **********************************************************************
3869 static void arcmsr_map_free_srb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
3871 struct AdapterControlBlock *acb = arg;
3872 struct CommandControlBlock *srb_tmp;
3874 unsigned long srb_phyaddr = (unsigned long)segs->ds_addr;
3876 acb->srb_phyaddr.phyaddr = srb_phyaddr;
3877 srb_tmp = (struct CommandControlBlock *)acb->uncacheptr;
3878 for(i=0; i < ARCMSR_MAX_FREESRB_NUM; i++) {
3879 if(bus_dmamap_create(acb->dm_segs_dmat,
3880 /*flags*/0, &srb_tmp->dm_segs_dmamap) != 0) {
3881 acb->acb_flags |= ACB_F_MAPFREESRB_FAILD;
3883 " srb dmamap bus_dmamap_create error\n", acb->pci_unit);
3886 if((acb->adapter_type == ACB_ADAPTER_TYPE_C) || (acb->adapter_type == ACB_ADAPTER_TYPE_D))
3888 srb_tmp->cdb_phyaddr_low = srb_phyaddr;
3889 srb_tmp->cdb_phyaddr_high = (u_int32_t)((srb_phyaddr >> 16) >> 16);
3892 srb_tmp->cdb_phyaddr_low = srb_phyaddr >> 5;
3894 acb->srbworkingQ[i] = acb->psrb_pool[i] = srb_tmp;
3895 srb_phyaddr = srb_phyaddr + SRB_SIZE;
3896 srb_tmp = (struct CommandControlBlock *)((unsigned long)srb_tmp + SRB_SIZE);
3898 acb->vir2phy_offset = (unsigned long)srb_tmp - (unsigned long)srb_phyaddr;
3901 ************************************************************************
3902 ************************************************************************
3904 static void arcmsr_free_resource(struct AdapterControlBlock *acb)
3906 /* remove the control device */
3907 if(acb->ioctl_dev != NULL) {
3908 destroy_dev(acb->ioctl_dev);
3910 bus_dmamap_unload(acb->srb_dmat, acb->srb_dmamap);
3911 bus_dmamap_destroy(acb->srb_dmat, acb->srb_dmamap);
3912 bus_dma_tag_destroy(acb->srb_dmat);
3913 bus_dma_tag_destroy(acb->dm_segs_dmat);
3914 bus_dma_tag_destroy(acb->parent_dmat);
3917 ************************************************************************
3918 ************************************************************************
3920 static void arcmsr_mutex_init(struct AdapterControlBlock *acb)
3922 ARCMSR_LOCK_INIT(&acb->isr_lock, "arcmsr isr lock");
3923 ARCMSR_LOCK_INIT(&acb->srb_lock, "arcmsr srb lock");
3924 ARCMSR_LOCK_INIT(&acb->postDone_lock, "arcmsr postQ lock");
3925 ARCMSR_LOCK_INIT(&acb->qbuffer_lock, "arcmsr RW buffer lock");
3928 ************************************************************************
3929 ************************************************************************
3931 static void arcmsr_mutex_destroy(struct AdapterControlBlock *acb)
3933 ARCMSR_LOCK_DESTROY(&acb->qbuffer_lock);
3934 ARCMSR_LOCK_DESTROY(&acb->postDone_lock);
3935 ARCMSR_LOCK_DESTROY(&acb->srb_lock);
3936 ARCMSR_LOCK_DESTROY(&acb->isr_lock);
3939 ************************************************************************
3940 ************************************************************************
3942 static u_int32_t arcmsr_initialize(device_t dev)
3944 struct AdapterControlBlock *acb = device_get_softc(dev);
3945 u_int16_t pci_command;
3946 int i, j,max_coherent_size;
3947 u_int32_t vendor_dev_id;
3949 vendor_dev_id = pci_get_devid(dev);
3950 acb->vendor_device_id = vendor_dev_id;
3951 switch (vendor_dev_id) {
3952 case PCIDevVenIDARC1880:
3953 case PCIDevVenIDARC1882:
3954 case PCIDevVenIDARC1213:
3955 case PCIDevVenIDARC1223: {
3956 acb->adapter_type = ACB_ADAPTER_TYPE_C;
3957 acb->adapter_bus_speed = ACB_BUS_SPEED_6G;
3958 max_coherent_size = ARCMSR_SRBS_POOL_SIZE;
3961 case PCIDevVenIDARC1214: {
3962 acb->adapter_type = ACB_ADAPTER_TYPE_D;
3963 acb->adapter_bus_speed = ACB_BUS_SPEED_6G;
3964 max_coherent_size = ARCMSR_SRBS_POOL_SIZE + (sizeof(struct HBD_MessageUnit0));
3967 case PCIDevVenIDARC1200:
3968 case PCIDevVenIDARC1201: {
3969 acb->adapter_type = ACB_ADAPTER_TYPE_B;
3970 acb->adapter_bus_speed = ACB_BUS_SPEED_3G;
3971 max_coherent_size = ARCMSR_SRBS_POOL_SIZE + (sizeof(struct HBB_MessageUnit));
3974 case PCIDevVenIDARC1110:
3975 case PCIDevVenIDARC1120:
3976 case PCIDevVenIDARC1130:
3977 case PCIDevVenIDARC1160:
3978 case PCIDevVenIDARC1170:
3979 case PCIDevVenIDARC1210:
3980 case PCIDevVenIDARC1220:
3981 case PCIDevVenIDARC1230:
3982 case PCIDevVenIDARC1231:
3983 case PCIDevVenIDARC1260:
3984 case PCIDevVenIDARC1261:
3985 case PCIDevVenIDARC1270:
3986 case PCIDevVenIDARC1280:
3987 case PCIDevVenIDARC1212:
3988 case PCIDevVenIDARC1222:
3989 case PCIDevVenIDARC1380:
3990 case PCIDevVenIDARC1381:
3991 case PCIDevVenIDARC1680:
3992 case PCIDevVenIDARC1681: {
3993 acb->adapter_type = ACB_ADAPTER_TYPE_A;
3994 acb->adapter_bus_speed = ACB_BUS_SPEED_3G;
3995 max_coherent_size = ARCMSR_SRBS_POOL_SIZE;
4000 " unknown RAID adapter type \n", device_get_unit(dev));
4004 #if __FreeBSD_version >= 700000
4005 if(bus_dma_tag_create( /*PCI parent*/ bus_get_dma_tag(dev),
4007 if(bus_dma_tag_create( /*PCI parent*/ NULL,
4011 /*lowaddr*/ BUS_SPACE_MAXADDR,
4012 /*highaddr*/ BUS_SPACE_MAXADDR,
4015 /*maxsize*/ BUS_SPACE_MAXSIZE_32BIT,
4016 /*nsegments*/ BUS_SPACE_UNRESTRICTED,
4017 /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT,
4019 #if __FreeBSD_version >= 501102
4023 &acb->parent_dmat) != 0)
4025 printf("arcmsr%d: parent_dmat bus_dma_tag_create failure!\n", device_get_unit(dev));
4029 /* Create a single tag describing a region large enough to hold all of the s/g lists we will need. */
4030 if(bus_dma_tag_create( /*parent_dmat*/ acb->parent_dmat,
4034 /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT,
4036 /*lowaddr*/ BUS_SPACE_MAXADDR,
4038 /*highaddr*/ BUS_SPACE_MAXADDR,
4041 /*maxsize*/ ARCMSR_MAX_SG_ENTRIES * PAGE_SIZE * ARCMSR_MAX_FREESRB_NUM,
4042 /*nsegments*/ ARCMSR_MAX_SG_ENTRIES,
4043 /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT,
4045 #if __FreeBSD_version >= 501102
4046 /*lockfunc*/ busdma_lock_mutex,
4047 /*lockarg*/ &acb->isr_lock,
4049 &acb->dm_segs_dmat) != 0)
4051 bus_dma_tag_destroy(acb->parent_dmat);
4052 printf("arcmsr%d: dm_segs_dmat bus_dma_tag_create failure!\n", device_get_unit(dev));
4056 /* DMA tag for our srb structures.... Allocate the freesrb memory */
4057 if(bus_dma_tag_create( /*parent_dmat*/ acb->parent_dmat,
4060 /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT,
4061 /*highaddr*/ BUS_SPACE_MAXADDR,
4064 /*maxsize*/ max_coherent_size,
4066 /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT,
4068 #if __FreeBSD_version >= 501102
4072 &acb->srb_dmat) != 0)
4074 bus_dma_tag_destroy(acb->dm_segs_dmat);
4075 bus_dma_tag_destroy(acb->parent_dmat);
4076 printf("arcmsr%d: srb_dmat bus_dma_tag_create failure!\n", device_get_unit(dev));
4079 /* Allocation for our srbs */
4080 if(bus_dmamem_alloc(acb->srb_dmat, (void **)&acb->uncacheptr, BUS_DMA_WAITOK | BUS_DMA_COHERENT | BUS_DMA_ZERO, &acb->srb_dmamap) != 0) {
4081 bus_dma_tag_destroy(acb->srb_dmat);
4082 bus_dma_tag_destroy(acb->dm_segs_dmat);
4083 bus_dma_tag_destroy(acb->parent_dmat);
4084 printf("arcmsr%d: srb_dmat bus_dmamem_alloc failure!\n", device_get_unit(dev));
4087 /* And permanently map them */
4088 if(bus_dmamap_load(acb->srb_dmat, acb->srb_dmamap, acb->uncacheptr, max_coherent_size, arcmsr_map_free_srb, acb, /*flags*/0)) {
4089 bus_dma_tag_destroy(acb->srb_dmat);
4090 bus_dma_tag_destroy(acb->dm_segs_dmat);
4091 bus_dma_tag_destroy(acb->parent_dmat);
4092 printf("arcmsr%d: srb_dmat bus_dmamap_load failure!\n", device_get_unit(dev));
4095 pci_command = pci_read_config(dev, PCIR_COMMAND, 2);
4096 pci_command |= PCIM_CMD_BUSMASTEREN;
4097 pci_command |= PCIM_CMD_PERRESPEN;
4098 pci_command |= PCIM_CMD_MWRICEN;
4099 /* Enable Busmaster */
4100 pci_write_config(dev, PCIR_COMMAND, pci_command, 2);
4101 switch(acb->adapter_type) {
4102 case ACB_ADAPTER_TYPE_A: {
4103 u_int32_t rid0 = PCIR_BAR(0);
4104 vm_offset_t mem_base0;
4106 acb->sys_res_arcmsr[0] = bus_alloc_resource(dev,SYS_RES_MEMORY, &rid0, 0ul, ~0ul, 0x1000, RF_ACTIVE);
4107 if(acb->sys_res_arcmsr[0] == NULL) {
4108 arcmsr_free_resource(acb);
4109 printf("arcmsr%d: bus_alloc_resource failure!\n", device_get_unit(dev));
4112 if(rman_get_start(acb->sys_res_arcmsr[0]) <= 0) {
4113 arcmsr_free_resource(acb);
4114 printf("arcmsr%d: rman_get_start failure!\n", device_get_unit(dev));
4117 mem_base0 = (vm_offset_t) rman_get_virtual(acb->sys_res_arcmsr[0]);
4118 if(mem_base0 == 0) {
4119 arcmsr_free_resource(acb);
4120 printf("arcmsr%d: rman_get_virtual failure!\n", device_get_unit(dev));
4123 acb->btag[0] = rman_get_bustag(acb->sys_res_arcmsr[0]);
4124 acb->bhandle[0] = rman_get_bushandle(acb->sys_res_arcmsr[0]);
4125 acb->pmu = (struct MessageUnit_UNION *)mem_base0;
4128 case ACB_ADAPTER_TYPE_B: {
4129 struct HBB_MessageUnit *phbbmu;
4130 struct CommandControlBlock *freesrb;
4131 u_int32_t rid[]={ PCIR_BAR(0), PCIR_BAR(2) };
4132 vm_offset_t mem_base[]={0,0};
4133 for(i=0; i < 2; i++) {
4135 acb->sys_res_arcmsr[i] = bus_alloc_resource(dev,SYS_RES_MEMORY, &rid[i],
4136 0ul, ~0ul, sizeof(struct HBB_DOORBELL), RF_ACTIVE);
4138 acb->sys_res_arcmsr[i] = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid[i],
4139 0ul, ~0ul, sizeof(struct HBB_RWBUFFER), RF_ACTIVE);
4141 if(acb->sys_res_arcmsr[i] == NULL) {
4142 arcmsr_free_resource(acb);
4143 printf("arcmsr%d: bus_alloc_resource %d failure!\n", device_get_unit(dev), i);
4146 if(rman_get_start(acb->sys_res_arcmsr[i]) <= 0) {
4147 arcmsr_free_resource(acb);
4148 printf("arcmsr%d: rman_get_start %d failure!\n", device_get_unit(dev), i);
4151 mem_base[i] = (vm_offset_t) rman_get_virtual(acb->sys_res_arcmsr[i]);
4152 if(mem_base[i] == 0) {
4153 arcmsr_free_resource(acb);
4154 printf("arcmsr%d: rman_get_virtual %d failure!\n", device_get_unit(dev), i);
4157 acb->btag[i] = rman_get_bustag(acb->sys_res_arcmsr[i]);
4158 acb->bhandle[i] = rman_get_bushandle(acb->sys_res_arcmsr[i]);
4160 freesrb = (struct CommandControlBlock *)acb->uncacheptr;
4161 acb->pmu = (struct MessageUnit_UNION *)((unsigned long)freesrb+ARCMSR_SRBS_POOL_SIZE);
4162 phbbmu = (struct HBB_MessageUnit *)acb->pmu;
4163 phbbmu->hbb_doorbell = (struct HBB_DOORBELL *)mem_base[0];
4164 phbbmu->hbb_rwbuffer = (struct HBB_RWBUFFER *)mem_base[1];
4167 case ACB_ADAPTER_TYPE_C: {
4168 u_int32_t rid0 = PCIR_BAR(1);
4169 vm_offset_t mem_base0;
4171 acb->sys_res_arcmsr[0] = bus_alloc_resource(dev,SYS_RES_MEMORY, &rid0, 0ul, ~0ul, sizeof(struct HBC_MessageUnit), RF_ACTIVE);
4172 if(acb->sys_res_arcmsr[0] == NULL) {
4173 arcmsr_free_resource(acb);
4174 printf("arcmsr%d: bus_alloc_resource failure!\n", device_get_unit(dev));
4177 if(rman_get_start(acb->sys_res_arcmsr[0]) <= 0) {
4178 arcmsr_free_resource(acb);
4179 printf("arcmsr%d: rman_get_start failure!\n", device_get_unit(dev));
4182 mem_base0 = (vm_offset_t) rman_get_virtual(acb->sys_res_arcmsr[0]);
4183 if(mem_base0 == 0) {
4184 arcmsr_free_resource(acb);
4185 printf("arcmsr%d: rman_get_virtual failure!\n", device_get_unit(dev));
4188 acb->btag[0] = rman_get_bustag(acb->sys_res_arcmsr[0]);
4189 acb->bhandle[0] = rman_get_bushandle(acb->sys_res_arcmsr[0]);
4190 acb->pmu = (struct MessageUnit_UNION *)mem_base0;
4193 case ACB_ADAPTER_TYPE_D: {
4194 struct HBD_MessageUnit0 *phbdmu;
4195 u_int32_t rid0 = PCIR_BAR(0);
4196 vm_offset_t mem_base0;
4198 acb->sys_res_arcmsr[0] = bus_alloc_resource(dev,SYS_RES_MEMORY, &rid0, 0ul, ~0ul, sizeof(struct HBD_MessageUnit), RF_ACTIVE);
4199 if(acb->sys_res_arcmsr[0] == NULL) {
4200 arcmsr_free_resource(acb);
4201 printf("arcmsr%d: bus_alloc_resource failure!\n", device_get_unit(dev));
4204 if(rman_get_start(acb->sys_res_arcmsr[0]) <= 0) {
4205 arcmsr_free_resource(acb);
4206 printf("arcmsr%d: rman_get_start failure!\n", device_get_unit(dev));
4209 mem_base0 = (vm_offset_t) rman_get_virtual(acb->sys_res_arcmsr[0]);
4210 if(mem_base0 == 0) {
4211 arcmsr_free_resource(acb);
4212 printf("arcmsr%d: rman_get_virtual failure!\n", device_get_unit(dev));
4215 acb->btag[0] = rman_get_bustag(acb->sys_res_arcmsr[0]);
4216 acb->bhandle[0] = rman_get_bushandle(acb->sys_res_arcmsr[0]);
4217 acb->pmu = (struct MessageUnit_UNION *)((unsigned long)acb->uncacheptr+ARCMSR_SRBS_POOL_SIZE);
4218 phbdmu = (struct HBD_MessageUnit0 *)acb->pmu;
4219 phbdmu->phbdmu = (struct HBD_MessageUnit *)mem_base0;
4223 if(acb->acb_flags & ACB_F_MAPFREESRB_FAILD) {
4224 arcmsr_free_resource(acb);
4225 printf("arcmsr%d: map free srb failure!\n", device_get_unit(dev));
4228 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED|ACB_F_MESSAGE_RQBUFFER_CLEARED|ACB_F_MESSAGE_WQBUFFER_READ);
4229 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
4231 ********************************************************************
4232 ** init raid volume state
4233 ********************************************************************
4235 for(i=0; i < ARCMSR_MAX_TARGETID; i++) {
4236 for(j=0; j < ARCMSR_MAX_TARGETLUN; j++) {
4237 acb->devstate[i][j] = ARECA_RAID_GONE;
4240 arcmsr_iop_init(acb);
4244 ************************************************************************
4245 ************************************************************************
4247 static int arcmsr_attach(device_t dev)
4249 struct AdapterControlBlock *acb=(struct AdapterControlBlock *)device_get_softc(dev);
4250 u_int32_t unit=device_get_unit(dev);
4251 struct ccb_setasync csa;
4252 struct cam_devq *devq; /* Device Queue to use for this SIM */
4253 struct resource *irqres;
4257 printf("arcmsr%d: cannot allocate softc\n", unit);
4260 arcmsr_mutex_init(acb);
4262 acb->pci_unit = unit;
4263 if(arcmsr_initialize(dev)) {
4264 printf("arcmsr%d: initialize failure!\n", unit);
4265 arcmsr_mutex_destroy(acb);
4268 /* After setting up the adapter, map our interrupt */
4270 irqres = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul, ~0ul, 1, RF_SHAREABLE | RF_ACTIVE);
4271 if(irqres == NULL ||
4272 #if __FreeBSD_version >= 700025
4273 bus_setup_intr(dev, irqres, INTR_TYPE_CAM|INTR_ENTROPY|INTR_MPSAFE, NULL, arcmsr_intr_handler, acb, &acb->ih)) {
4275 bus_setup_intr(dev, irqres, INTR_TYPE_CAM|INTR_ENTROPY|INTR_MPSAFE, arcmsr_intr_handler, acb, &acb->ih)) {
4277 arcmsr_free_resource(acb);
4278 arcmsr_mutex_destroy(acb);
4279 printf("arcmsr%d: unable to register interrupt handler!\n", unit);
4282 acb->irqres = irqres;
4284 * Now let the CAM generic SCSI layer find the SCSI devices on
4285 * the bus * start queue to reset to the idle loop. *
4286 * Create device queue of SIM(s) * (MAX_START_JOB - 1) :
4287 * max_sim_transactions
4289 devq = cam_simq_alloc(ARCMSR_MAX_START_JOB);
4291 arcmsr_free_resource(acb);
4292 bus_release_resource(dev, SYS_RES_IRQ, 0, acb->irqres);
4293 arcmsr_mutex_destroy(acb);
4294 printf("arcmsr%d: cam_simq_alloc failure!\n", unit);
4297 #if __FreeBSD_version >= 700025
4298 acb->psim = cam_sim_alloc(arcmsr_action, arcmsr_poll, "arcmsr", acb, unit, &acb->isr_lock, 1, ARCMSR_MAX_OUTSTANDING_CMD, devq);
4300 acb->psim = cam_sim_alloc(arcmsr_action, arcmsr_poll, "arcmsr", acb, unit, 1, ARCMSR_MAX_OUTSTANDING_CMD, devq);
4302 if(acb->psim == NULL) {
4303 arcmsr_free_resource(acb);
4304 bus_release_resource(dev, SYS_RES_IRQ, 0, acb->irqres);
4305 cam_simq_free(devq);
4306 arcmsr_mutex_destroy(acb);
4307 printf("arcmsr%d: cam_sim_alloc failure!\n", unit);
4310 ARCMSR_LOCK_ACQUIRE(&acb->isr_lock);
4311 #if __FreeBSD_version >= 700044
4312 if(xpt_bus_register(acb->psim, dev, 0) != CAM_SUCCESS) {
4314 if(xpt_bus_register(acb->psim, 0) != CAM_SUCCESS) {
4316 arcmsr_free_resource(acb);
4317 bus_release_resource(dev, SYS_RES_IRQ, 0, acb->irqres);
4318 cam_sim_free(acb->psim, /*free_devq*/TRUE);
4319 arcmsr_mutex_destroy(acb);
4320 printf("arcmsr%d: xpt_bus_register failure!\n", unit);
4323 if(xpt_create_path(&acb->ppath, /* periph */ NULL, cam_sim_path(acb->psim), CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
4324 arcmsr_free_resource(acb);
4325 bus_release_resource(dev, SYS_RES_IRQ, 0, acb->irqres);
4326 xpt_bus_deregister(cam_sim_path(acb->psim));
4327 cam_sim_free(acb->psim, /* free_simq */ TRUE);
4328 arcmsr_mutex_destroy(acb);
4329 printf("arcmsr%d: xpt_create_path failure!\n", unit);
4333 ****************************************************
4335 xpt_setup_ccb(&csa.ccb_h, acb->ppath, /*priority*/5);
4336 csa.ccb_h.func_code = XPT_SASYNC_CB;
4337 csa.event_enable = AC_FOUND_DEVICE|AC_LOST_DEVICE;
4338 csa.callback = arcmsr_async;
4339 csa.callback_arg = acb->psim;
4340 xpt_action((union ccb *)&csa);
4341 ARCMSR_LOCK_RELEASE(&acb->isr_lock);
4342 /* Create the control device. */
4343 acb->ioctl_dev = make_dev(&arcmsr_cdevsw, unit, UID_ROOT, GID_WHEEL /* GID_OPERATOR */, S_IRUSR | S_IWUSR, "arcmsr%d", unit);
4345 #if __FreeBSD_version < 503000
4346 acb->ioctl_dev->si_drv1 = acb;
4348 #if __FreeBSD_version > 500005
4349 (void)make_dev_alias(acb->ioctl_dev, "arc%d", unit);
4351 arcmsr_callout_init(&acb->devmap_callout);
4352 callout_reset(&acb->devmap_callout, 60 * hz, arcmsr_polling_devmap, acb);
4357 ************************************************************************
4358 ************************************************************************
4360 static int arcmsr_probe(device_t dev)
4363 static char buf[256];
4364 char x_type[]={"unknown"};
4368 if (pci_get_vendor(dev) != PCI_VENDOR_ID_ARECA) {
4371 switch(id = pci_get_devid(dev)) {
4372 case PCIDevVenIDARC1110:
4373 case PCIDevVenIDARC1200:
4374 case PCIDevVenIDARC1201:
4375 case PCIDevVenIDARC1210:
4378 case PCIDevVenIDARC1120:
4379 case PCIDevVenIDARC1130:
4380 case PCIDevVenIDARC1160:
4381 case PCIDevVenIDARC1170:
4382 case PCIDevVenIDARC1220:
4383 case PCIDevVenIDARC1230:
4384 case PCIDevVenIDARC1231:
4385 case PCIDevVenIDARC1260:
4386 case PCIDevVenIDARC1261:
4387 case PCIDevVenIDARC1270:
4388 case PCIDevVenIDARC1280:
4391 case PCIDevVenIDARC1212:
4392 case PCIDevVenIDARC1222:
4393 case PCIDevVenIDARC1380:
4394 case PCIDevVenIDARC1381:
4395 case PCIDevVenIDARC1680:
4396 case PCIDevVenIDARC1681:
4399 case PCIDevVenIDARC1880:
4400 case PCIDevVenIDARC1882:
4401 case PCIDevVenIDARC1213:
4402 case PCIDevVenIDARC1223:
4405 case PCIDevVenIDARC1214:
4415 sprintf(buf, "Areca %s Host Adapter RAID Controller %s\n%s\n",
4416 type, raid6 ? "(RAID6 capable)" : "", ARCMSR_DRIVER_VERSION);
4417 device_set_desc_copy(dev, buf);
4418 return (BUS_PROBE_DEFAULT);
4421 ************************************************************************
4422 ************************************************************************
4424 static int arcmsr_shutdown(device_t dev)
4427 u_int32_t intmask_org;
4428 struct CommandControlBlock *srb;
4429 struct AdapterControlBlock *acb=(struct AdapterControlBlock *)device_get_softc(dev);
4431 /* stop adapter background rebuild */
4432 ARCMSR_LOCK_ACQUIRE(&acb->isr_lock);
4433 /* disable all outbound interrupt */
4434 intmask_org = arcmsr_disable_allintr(acb);
4435 arcmsr_stop_adapter_bgrb(acb);
4436 arcmsr_flush_adapter_cache(acb);
4437 /* abort all outstanding command */
4438 acb->acb_flags |= ACB_F_SCSISTOPADAPTER;
4439 acb->acb_flags &= ~ACB_F_IOP_INITED;
4440 if(acb->srboutstandingcount != 0) {
4441 /*clear and abort all outbound posted Q*/
4442 arcmsr_done4abort_postqueue(acb);
4443 /* talk to iop 331 outstanding command aborted*/
4444 arcmsr_abort_allcmd(acb);
4445 for(i=0; i < ARCMSR_MAX_FREESRB_NUM; i++) {
4446 srb = acb->psrb_pool[i];
4447 if(srb->srb_state == ARCMSR_SRB_START) {
4448 srb->srb_state = ARCMSR_SRB_ABORTED;
4449 srb->pccb->ccb_h.status |= CAM_REQ_ABORTED;
4450 arcmsr_srb_complete(srb, 1);
4454 acb->srboutstandingcount = 0;
4455 acb->workingsrb_doneindex = 0;
4456 acb->workingsrb_startindex = 0;
4457 acb->pktRequestCount = 0;
4458 acb->pktReturnCount = 0;
4459 ARCMSR_LOCK_RELEASE(&acb->isr_lock);
4463 ************************************************************************
4464 ************************************************************************
4466 static int arcmsr_detach(device_t dev)
4468 struct AdapterControlBlock *acb=(struct AdapterControlBlock *)device_get_softc(dev);
4471 callout_stop(&acb->devmap_callout);
4472 bus_teardown_intr(dev, acb->irqres, acb->ih);
4473 arcmsr_shutdown(dev);
4474 arcmsr_free_resource(acb);
4475 for(i=0; (acb->sys_res_arcmsr[i]!=NULL) && (i<2); i++) {
4476 bus_release_resource(dev, SYS_RES_MEMORY, PCIR_BAR(i), acb->sys_res_arcmsr[i]);
4478 bus_release_resource(dev, SYS_RES_IRQ, 0, acb->irqres);
4479 ARCMSR_LOCK_ACQUIRE(&acb->isr_lock);
4480 xpt_async(AC_LOST_DEVICE, acb->ppath, NULL);
4481 xpt_free_path(acb->ppath);
4482 xpt_bus_deregister(cam_sim_path(acb->psim));
4483 cam_sim_free(acb->psim, TRUE);
4484 ARCMSR_LOCK_RELEASE(&acb->isr_lock);
4485 arcmsr_mutex_destroy(acb);
4489 #ifdef ARCMSR_DEBUG1
4490 static void arcmsr_dump_data(struct AdapterControlBlock *acb)
4492 if((acb->pktRequestCount - acb->pktReturnCount) == 0)
4494 printf("Command Request Count =0x%x\n",acb->pktRequestCount);
4495 printf("Command Return Count =0x%x\n",acb->pktReturnCount);
4496 printf("Command (Req-Rtn) Count =0x%x\n",(acb->pktRequestCount - acb->pktReturnCount));
4497 printf("Queued Command Count =0x%x\n",acb->srboutstandingcount);