sys/dev/ath/ath_hal/ar5212/ar5212_attach.c

   1 /*
   2  * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
   3  * Copyright (c) 2002-2008 Atheros Communications, Inc.
   4  *
   5  * Permission to use, copy, modify, and/or distribute this software for any
   6  * purpose with or without fee is hereby granted, provided that the above
   7  * copyright notice and this permission notice appear in all copies.
   8  *
   9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16  *
  17  * $FreeBSD$
  18  */
  19 #include "opt_ah.h"
  20
  21 #include "ah.h"
  22 #include "ah_internal.h"
  23 #include "ah_devid.h"
  24
  25 #include "ar5212/ar5212.h"
  26 #include "ar5212/ar5212reg.h"
  27 #include "ar5212/ar5212phy.h"
  28
  29 #define AH_5212_COMMON
  30 #include "ar5212/ar5212.ini"
  31
  32 static void ar5212ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore,
  33                 HAL_BOOL power_off);
  34 static void ar5212DisablePCIE(struct ath_hal *ah);
  35
  36 static const struct ath_hal_private ar5212hal = {{
  37         .ah_magic                       = AR5212_MAGIC,
  38
  39         .ah_getRateTable                = ar5212GetRateTable,
  40         .ah_detach                      = ar5212Detach,
  41
  42         /* Reset Functions */
  43         .ah_reset                       = ar5212Reset,
  44         .ah_phyDisable                  = ar5212PhyDisable,
  45         .ah_disable                     = ar5212Disable,
  46         .ah_configPCIE                  = ar5212ConfigPCIE,
  47         .ah_disablePCIE                 = ar5212DisablePCIE,
  48         .ah_setPCUConfig                = ar5212SetPCUConfig,
  49         .ah_perCalibration              = ar5212PerCalibration,
  50         .ah_perCalibrationN             = ar5212PerCalibrationN,
  51         .ah_resetCalValid               = ar5212ResetCalValid,
  52         .ah_setTxPowerLimit             = ar5212SetTxPowerLimit,
  53         .ah_getChanNoise                = ath_hal_getChanNoise,
  54
  55         /* Transmit functions */
  56         .ah_updateTxTrigLevel           = ar5212UpdateTxTrigLevel,
  57         .ah_setupTxQueue                = ar5212SetupTxQueue,
  58         .ah_setTxQueueProps             = ar5212SetTxQueueProps,
  59         .ah_getTxQueueProps             = ar5212GetTxQueueProps,
  60         .ah_releaseTxQueue              = ar5212ReleaseTxQueue,
  61         .ah_resetTxQueue                = ar5212ResetTxQueue,
  62         .ah_getTxDP                     = ar5212GetTxDP,
  63         .ah_setTxDP                     = ar5212SetTxDP,
  64         .ah_numTxPending                = ar5212NumTxPending,
  65         .ah_startTxDma                  = ar5212StartTxDma,
  66         .ah_stopTxDma                   = ar5212StopTxDma,
  67         .ah_setupTxDesc                 = ar5212SetupTxDesc,
  68         .ah_setupXTxDesc                = ar5212SetupXTxDesc,
  69         .ah_fillTxDesc                  = ar5212FillTxDesc,
  70         .ah_procTxDesc                  = ar5212ProcTxDesc,
  71         .ah_getTxIntrQueue              = ar5212GetTxIntrQueue,
  72         .ah_reqTxIntrDesc               = ar5212IntrReqTxDesc,
  73         .ah_getTxCompletionRates        = ar5212GetTxCompletionRates,
  74         .ah_setTxDescLink               = ar5212SetTxDescLink,
  75         .ah_getTxDescLink               = ar5212GetTxDescLink,
  76         .ah_getTxDescLinkPtr            = ar5212GetTxDescLinkPtr,
  77
  78         /* RX Functions */
  79         .ah_getRxDP                     = ar5212GetRxDP,
  80         .ah_setRxDP                     = ar5212SetRxDP,
  81         .ah_enableReceive               = ar5212EnableReceive,
  82         .ah_stopDmaReceive              = ar5212StopDmaReceive,
  83         .ah_startPcuReceive             = ar5212StartPcuReceive,
  84         .ah_stopPcuReceive              = ar5212StopPcuReceive,
  85         .ah_setMulticastFilter          = ar5212SetMulticastFilter,
  86         .ah_setMulticastFilterIndex     = ar5212SetMulticastFilterIndex,
  87         .ah_clrMulticastFilterIndex     = ar5212ClrMulticastFilterIndex,
  88         .ah_getRxFilter                 = ar5212GetRxFilter,
  89         .ah_setRxFilter                 = ar5212SetRxFilter,
  90         .ah_setupRxDesc                 = ar5212SetupRxDesc,
  91         .ah_procRxDesc                  = ar5212ProcRxDesc,
  92         .ah_rxMonitor                   = ar5212RxMonitor,
  93         .ah_aniPoll                     = ar5212AniPoll,
  94         .ah_procMibEvent                = ar5212ProcessMibIntr,
  95
  96         /* Misc Functions */
  97         .ah_getCapability               = ar5212GetCapability,
  98         .ah_setCapability               = ar5212SetCapability,
  99         .ah_getDiagState                = ar5212GetDiagState,
 100         .ah_getMacAddress               = ar5212GetMacAddress,
 101         .ah_setMacAddress               = ar5212SetMacAddress,
 102         .ah_getBssIdMask                = ar5212GetBssIdMask,
 103         .ah_setBssIdMask                = ar5212SetBssIdMask,
 104         .ah_setRegulatoryDomain         = ar5212SetRegulatoryDomain,
 105         .ah_setLedState                 = ar5212SetLedState,
 106         .ah_writeAssocid                = ar5212WriteAssocid,
 107         .ah_gpioCfgInput                = ar5212GpioCfgInput,
 108         .ah_gpioCfgOutput               = ar5212GpioCfgOutput,
 109         .ah_gpioGet                     = ar5212GpioGet,
 110         .ah_gpioSet                     = ar5212GpioSet,
 111         .ah_gpioSetIntr                 = ar5212GpioSetIntr,
 112         .ah_getTsf32                    = ar5212GetTsf32,
 113         .ah_getTsf64                    = ar5212GetTsf64,
 114         .ah_setTsf64                    = ar5212SetTsf64,
 115         .ah_resetTsf                    = ar5212ResetTsf,
 116         .ah_detectCardPresent           = ar5212DetectCardPresent,
 117         .ah_updateMibCounters           = ar5212UpdateMibCounters,
 118         .ah_getRfGain                   = ar5212GetRfgain,
 119         .ah_getDefAntenna               = ar5212GetDefAntenna,
 120         .ah_setDefAntenna               = ar5212SetDefAntenna,
 121         .ah_getAntennaSwitch            = ar5212GetAntennaSwitch,
 122         .ah_setAntennaSwitch            = ar5212SetAntennaSwitch,
 123         .ah_setSifsTime                 = ar5212SetSifsTime,
 124         .ah_getSifsTime                 = ar5212GetSifsTime,
 125         .ah_setSlotTime                 = ar5212SetSlotTime,
 126         .ah_getSlotTime                 = ar5212GetSlotTime,
 127         .ah_setAckTimeout               = ar5212SetAckTimeout,
 128         .ah_getAckTimeout               = ar5212GetAckTimeout,
 129         .ah_setAckCTSRate               = ar5212SetAckCTSRate,
 130         .ah_getAckCTSRate               = ar5212GetAckCTSRate,
 131         .ah_setCTSTimeout               = ar5212SetCTSTimeout,
 132         .ah_getCTSTimeout               = ar5212GetCTSTimeout,
 133         .ah_setDecompMask               = ar5212SetDecompMask,
 134         .ah_setCoverageClass            = ar5212SetCoverageClass,
 135         .ah_setQuiet                    = ar5212SetQuiet,
 136         .ah_getMibCycleCounts           = ar5212GetMibCycleCounts,
 137         .ah_setChainMasks               = ar5212SetChainMasks,
 138
 139         /* DFS Functions */
 140         .ah_enableDfs                   = ar5212EnableDfs,
 141         .ah_getDfsThresh                = ar5212GetDfsThresh,
 142         .ah_getDfsDefaultThresh         = ar5212GetDfsDefaultThresh,
 143         .ah_procRadarEvent              = ar5212ProcessRadarEvent,
 144         .ah_isFastClockEnabled          = ar5212IsFastClockEnabled,
 145         .ah_get11nExtBusy               = ar5212Get11nExtBusy,
 146
 147         /* Key Cache Functions */
 148         .ah_getKeyCacheSize             = ar5212GetKeyCacheSize,
 149         .ah_resetKeyCacheEntry          = ar5212ResetKeyCacheEntry,
 150         .ah_isKeyCacheEntryValid        = ar5212IsKeyCacheEntryValid,
 151         .ah_setKeyCacheEntry            = ar5212SetKeyCacheEntry,
 152         .ah_setKeyCacheEntryMac         = ar5212SetKeyCacheEntryMac,
 153
 154         /* Power Management Functions */
 155         .ah_setPowerMode                = ar5212SetPowerMode,
 156         .ah_getPowerMode                = ar5212GetPowerMode,
 157
 158         /* Beacon Functions */
 159         .ah_setBeaconTimers             = ar5212SetBeaconTimers,
 160         .ah_beaconInit                  = ar5212BeaconInit,
 161         .ah_setStationBeaconTimers      = ar5212SetStaBeaconTimers,
 162         .ah_resetStationBeaconTimers    = ar5212ResetStaBeaconTimers,
 163         .ah_getNextTBTT                 = ar5212GetNextTBTT,
 164
 165         /* Interrupt Functions */
 166         .ah_isInterruptPending          = ar5212IsInterruptPending,
 167         .ah_getPendingInterrupts        = ar5212GetPendingInterrupts,
 168         .ah_getInterrupts               = ar5212GetInterrupts,
 169         .ah_setInterrupts               = ar5212SetInterrupts },
 170
 171         .ah_getChannelEdges             = ar5212GetChannelEdges,
 172         .ah_getWirelessModes            = ar5212GetWirelessModes,
 173         .ah_eepromRead                  = ar5212EepromRead,
 174 #ifdef AH_SUPPORT_WRITE_EEPROM
 175         .ah_eepromWrite                 = ar5212EepromWrite,
 176 #endif
 177         .ah_getChipPowerLimits          = ar5212GetChipPowerLimits,
 178 };
 179
 180 uint32_t
 181 ar5212GetRadioRev(struct ath_hal *ah)
 182 {
 183         uint32_t val;
 184         int i;
 185
 186         /* Read Radio Chip Rev Extract */
 187         OS_REG_WRITE(ah, AR_PHY(0x34), 0x00001c16);
 188         for (i = 0; i < 8; i++)
 189                 OS_REG_WRITE(ah, AR_PHY(0x20), 0x00010000);
 190         val = (OS_REG_READ(ah, AR_PHY(256)) >> 24) & 0xff;
 191         val = ((val & 0xf0) >> 4) | ((val & 0x0f) << 4);
 192         return ath_hal_reverseBits(val, 8);
 193 }
 194
 195 static void
 196 ar5212AniSetup(struct ath_hal *ah)
 197 {
 198         static const struct ar5212AniParams aniparams = {
 199                 .maxNoiseImmunityLevel  = 4,    /* levels 0..4 */
 200                 .totalSizeDesired       = { -55, -55, -55, -55, -62 },
 201                 .coarseHigh             = { -14, -14, -14, -14, -12 },
 202                 .coarseLow              = { -64, -64, -64, -64, -70 },
 203                 .firpwr                 = { -78, -78, -78, -78, -80 },
 204                 .maxSpurImmunityLevel   = 2,    /* NB: depends on chip rev */
 205                 .cycPwrThr1             = { 2, 4, 6, 8, 10, 12, 14, 16 },
 206                 .maxFirstepLevel        = 2,    /* levels 0..2 */
 207                 .firstep                = { 0, 4, 8 },
 208                 .ofdmTrigHigh           = 500,
 209                 .ofdmTrigLow            = 200,
 210                 .cckTrigHigh            = 200,
 211                 .cckTrigLow             = 100,
 212                 .rssiThrHigh            = 40,
 213                 .rssiThrLow             = 7,
 214                 .period                 = 100,
 215         };
 216         if (AH_PRIVATE(ah)->ah_macVersion < AR_SREV_VERSION_GRIFFIN) {
 217                 struct ar5212AniParams tmp;
 218                 OS_MEMCPY(&tmp, &aniparams, sizeof(struct ar5212AniParams));
 219                 tmp.maxSpurImmunityLevel = 7;   /* Venice and earlier */
 220                 ar5212AniAttach(ah, &tmp, &tmp, AH_TRUE);
 221         } else
 222                 ar5212AniAttach(ah, &aniparams, &aniparams, AH_TRUE);
 223
 224         /* Set overridable ANI methods */
 225         AH5212(ah)->ah_aniControl = ar5212AniControl;
 226 }
 227
 228 /*
 229  * Attach for an AR5212 part.
 230  */
 231 void
 232 ar5212InitState(struct ath_hal_5212 *ahp, uint16_t devid, HAL_SOFTC sc,
 233         HAL_BUS_TAG st, HAL_BUS_HANDLE sh, HAL_STATUS *status)
 234 {
 235 #define N(a)    (sizeof(a)/sizeof(a[0]))
 236         static const uint8_t defbssidmask[IEEE80211_ADDR_LEN] =
 237                 { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
 238         struct ath_hal *ah;
 239
 240         ah = &ahp->ah_priv.h;
 241         /* set initial values */
 242         OS_MEMCPY(&ahp->ah_priv, &ar5212hal, sizeof(struct ath_hal_private));
 243         ah->ah_sc = sc;
 244         ah->ah_st = st;
 245         ah->ah_sh = sh;
 246
 247         ah->ah_devid = devid;                   /* NB: for alq */
 248         AH_PRIVATE(ah)->ah_devid = devid;
 249         AH_PRIVATE(ah)->ah_subvendorid = 0;     /* XXX */
 250
 251         AH_PRIVATE(ah)->ah_powerLimit = MAX_RATE_POWER;
 252         AH_PRIVATE(ah)->ah_tpScale = HAL_TP_SCALE_MAX;  /* no scaling */
 253
 254         ahp->ah_antControl = HAL_ANT_VARIABLE;
 255         ahp->ah_diversity = AH_TRUE;
 256         ahp->ah_bIQCalibration = AH_FALSE;
 257         /*
 258          * Enable MIC handling.
 259          */
 260         ahp->ah_staId1Defaults = AR_STA_ID1_CRPT_MIC_ENABLE;
 261         ahp->ah_rssiThr = INIT_RSSI_THR;
 262         ahp->ah_tpcEnabled = AH_FALSE;          /* disabled by default */
 263         ahp->ah_phyPowerOn = AH_FALSE;
 264         ahp->ah_macTPC = SM(MAX_RATE_POWER, AR_TPC_ACK)
 265                        | SM(MAX_RATE_POWER, AR_TPC_CTS)
 266                        | SM(MAX_RATE_POWER, AR_TPC_CHIRP);
 267         ahp->ah_beaconInterval = 100;           /* XXX [20..1000] */
 268         ahp->ah_enable32kHzClock = DONT_USE_32KHZ;/* XXX */
 269         ahp->ah_slottime = (u_int) -1;
 270         ahp->ah_acktimeout = (u_int) -1;
 271         ahp->ah_ctstimeout = (u_int) -1;
 272         ahp->ah_sifstime = (u_int) -1;
 273         ahp->ah_txTrigLev = INIT_TX_FIFO_THRESHOLD,
 274         ahp->ah_maxTxTrigLev = MAX_TX_FIFO_THRESHOLD,
 275
 276         OS_MEMCPY(&ahp->ah_bssidmask, defbssidmask, IEEE80211_ADDR_LEN);
 277 #undef N
 278 }
 279
 280 /*
 281  * Validate MAC version and revision.
 282  */
 283 static HAL_BOOL
 284 ar5212IsMacSupported(uint8_t macVersion, uint8_t macRev)
 285 {
 286 #define N(a)    (sizeof(a)/sizeof(a[0]))
 287         static const struct {
 288                 uint8_t version;
 289                 uint8_t revMin, revMax;
 290         } macs[] = {
 291             { AR_SREV_VERSION_VENICE,
 292               AR_SREV_D2PLUS,           AR_SREV_REVISION_MAX },
 293             { AR_SREV_VERSION_GRIFFIN,
 294               AR_SREV_D2PLUS,           AR_SREV_REVISION_MAX },
 295             { AR_SREV_5413,
 296               AR_SREV_REVISION_MIN,     AR_SREV_REVISION_MAX },
 297             { AR_SREV_5424,
 298               AR_SREV_REVISION_MIN,     AR_SREV_REVISION_MAX },
 299             { AR_SREV_2425,
 300               AR_SREV_REVISION_MIN,     AR_SREV_REVISION_MAX },
 301             { AR_SREV_2417,
 302               AR_SREV_REVISION_MIN,     AR_SREV_REVISION_MAX },
 303         };
 304         int i;
 305
 306         for (i = 0; i < N(macs); i++)
 307                 if (macs[i].version == macVersion &&
 308                     macs[i].revMin <= macRev && macRev <= macs[i].revMax)
 309                         return AH_TRUE;
 310         return AH_FALSE;
 311 #undef N
 312 }
 313
 314 /*
 315  * Attach for an AR5212 part.
 316  */
 317 static struct ath_hal *
 318 ar5212Attach(uint16_t devid, HAL_SOFTC sc,
 319         HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata,
 320         HAL_STATUS *status)
 321 {
 322 #define AH_EEPROM_PROTECT(ah) \
 323         (AH_PRIVATE(ah)->ah_ispcie)? AR_EEPROM_PROTECT_PCIE : AR_EEPROM_PROTECT)
 324         struct ath_hal_5212 *ahp;
 325         struct ath_hal *ah;
 326         struct ath_hal_rf *rf;
 327         uint32_t val;
 328         uint16_t eeval;
 329         HAL_STATUS ecode;
 330
 331         HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",
 332             __func__, sc, (void*) st, (void*) sh);
 333
 334         /* NB: memory is returned zero'd */
 335         ahp = ath_hal_malloc(sizeof (struct ath_hal_5212));
 336         if (ahp == AH_NULL) {
 337                 HALDEBUG(AH_NULL, HAL_DEBUG_ANY,
 338                     "%s: cannot allocate memory for state block\n", __func__);
 339                 *status = HAL_ENOMEM;
 340                 return AH_NULL;
 341         }
 342         ar5212InitState(ahp, devid, sc, st, sh, status);
 343         ah = &ahp->ah_priv.h;
 344
 345         if (!ar5212SetPowerMode(ah, HAL_PM_AWAKE, AH_TRUE)) {
 346                 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't wakeup chip\n",
 347                     __func__);
 348                 ecode = HAL_EIO;
 349                 goto bad;
 350         }
 351         /* Read Revisions from Chips before taking out of reset */
 352         val = OS_REG_READ(ah, AR_SREV) & AR_SREV_ID;
 353         AH_PRIVATE(ah)->ah_macVersion = val >> AR_SREV_ID_S;
 354         AH_PRIVATE(ah)->ah_macRev = val & AR_SREV_REVISION;
 355         AH_PRIVATE(ah)->ah_ispcie = IS_5424(ah) || IS_2425(ah);
 356
 357         if (!ar5212IsMacSupported(AH_PRIVATE(ah)->ah_macVersion, AH_PRIVATE(ah)->ah_macRev)) {
 358                 HALDEBUG(ah, HAL_DEBUG_ANY,
 359                     "%s: Mac Chip Rev 0x%02x.%x not supported\n" ,
 360                     __func__, AH_PRIVATE(ah)->ah_macVersion,
 361                     AH_PRIVATE(ah)->ah_macRev);
 362                 ecode = HAL_ENOTSUPP;
 363                 goto bad;
 364         }
 365
 366         /* setup common ini data; rf backends handle remainder */
 367         HAL_INI_INIT(&ahp->ah_ini_modes, ar5212Modes, 6);
 368         HAL_INI_INIT(&ahp->ah_ini_common, ar5212Common, 2);
 369
 370         if (!ar5212ChipReset(ah, AH_NULL)) {    /* reset chip */
 371                 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", __func__);
 372                 ecode = HAL_EIO;
 373                 goto bad;
 374         }
 375
 376         AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID);
 377
 378         if (AH_PRIVATE(ah)->ah_ispcie) {
 379                 /* XXX: build flag to disable this? */
 380                 ath_hal_configPCIE(ah, AH_FALSE, AH_FALSE);
 381         }
 382
 383         if (!ar5212ChipTest(ah)) {
 384                 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: hardware self-test failed\n",
 385                     __func__);
 386                 ecode = HAL_ESELFTEST;
 387                 goto bad;
 388         }
 389
 390         /* Enable PCI core retry fix in software for Hainan and up */
 391         if (AH_PRIVATE(ah)->ah_macVersion >= AR_SREV_VERSION_VENICE)
 392                 OS_REG_SET_BIT(ah, AR_PCICFG, AR_PCICFG_RETRYFIXEN);
 393
 394         /*
 395          * Set correct Baseband to analog shift
 396          * setting to access analog chips.
 397          */
 398         OS_REG_WRITE(ah, AR_PHY(0), 0x00000007);
 399
 400         /* Read Radio Chip Rev Extract */
 401         AH_PRIVATE(ah)->ah_analog5GhzRev = ar5212GetRadioRev(ah);
 402
 403         rf = ath_hal_rfprobe(ah, &ecode);
 404         if (rf == AH_NULL)
 405                 goto bad;
 406
 407         /* NB: silently accept anything in release code per Atheros */
 408         switch (AH_PRIVATE(ah)->ah_analog5GhzRev & AR_RADIO_SREV_MAJOR) {
 409         case AR_RAD5111_SREV_MAJOR:
 410         case AR_RAD5112_SREV_MAJOR:
 411         case AR_RAD2112_SREV_MAJOR:
 412         case AR_RAD2111_SREV_MAJOR:
 413         case AR_RAD2413_SREV_MAJOR:
 414         case AR_RAD5413_SREV_MAJOR:
 415         case AR_RAD5424_SREV_MAJOR:
 416                 break;
 417         default:
 418                 if (AH_PRIVATE(ah)->ah_analog5GhzRev == 0) {
 419                         /*
 420                          * When RF_Silent is used, the
 421                          * analog chip is reset.  So when the system boots
 422                          * up with the radio switch off we cannot determine
 423                          * the RF chip rev.  To workaround this check the
 424                          * mac+phy revs and if Hainan, set the radio rev
 425                          * to Derby.
 426                          */
 427                         if (AH_PRIVATE(ah)->ah_macVersion == AR_SREV_VERSION_VENICE &&
 428                             AH_PRIVATE(ah)->ah_macRev == AR_SREV_HAINAN &&
 429                             AH_PRIVATE(ah)->ah_phyRev == AR_PHYREV_HAINAN) {
 430                                 AH_PRIVATE(ah)->ah_analog5GhzRev = AR_ANALOG5REV_HAINAN;
 431                                 break;
 432                         }
 433                         if (IS_2413(ah)) {              /* Griffin */
 434                                 AH_PRIVATE(ah)->ah_analog5GhzRev =
 435                                     AR_RAD2413_SREV_MAJOR | 0x1;
 436                                 break;
 437                         }
 438                         if (IS_5413(ah)) {              /* Eagle */
 439                                 AH_PRIVATE(ah)->ah_analog5GhzRev =
 440                                     AR_RAD5413_SREV_MAJOR | 0x2;
 441                                 break;
 442                         }
 443                         if (IS_2425(ah) || IS_2417(ah)) {/* Swan or Nala */
 444                                 AH_PRIVATE(ah)->ah_analog5GhzRev =
 445                                     AR_RAD5424_SREV_MAJOR | 0x2;
 446                                 break;
 447                         }
 448                 }
 449 #ifdef AH_DEBUG
 450                 HALDEBUG(ah, HAL_DEBUG_ANY,
 451                     "%s: 5G Radio Chip Rev 0x%02X is not supported by "
 452                     "this driver\n",
 453                     __func__, AH_PRIVATE(ah)->ah_analog5GhzRev);
 454                 ecode = HAL_ENOTSUPP;
 455                 goto bad;
 456 #endif
 457         }
 458         if (IS_RAD5112_REV1(ah)) {
 459                 HALDEBUG(ah, HAL_DEBUG_ANY,
 460                     "%s: 5112 Rev 1 is not supported by this "
 461                     "driver (analog5GhzRev 0x%x)\n", __func__,
 462                     AH_PRIVATE(ah)->ah_analog5GhzRev);
 463                 ecode = HAL_ENOTSUPP;
 464                 goto bad;
 465         }
 466
 467         val = OS_REG_READ(ah, AR_PCICFG);
 468         val = MS(val, AR_PCICFG_EEPROM_SIZE);
 469         if (val == 0) {
 470                 if (!AH_PRIVATE(ah)->ah_ispcie) {
 471                         HALDEBUG(ah, HAL_DEBUG_ANY,
 472                             "%s: unsupported EEPROM size %u (0x%x) found\n",
 473                             __func__, val, val);
 474                         ecode = HAL_EESIZE;
 475                         goto bad;
 476                 }
 477                 /* XXX AH_PRIVATE(ah)->ah_isPciExpress = AH_TRUE; */
 478         } else if (val != AR_PCICFG_EEPROM_SIZE_16K) {
 479                 if (AR_PCICFG_EEPROM_SIZE_FAILED == val) {
 480                         HALDEBUG(ah, HAL_DEBUG_ANY,
 481                             "%s: unsupported EEPROM size %u (0x%x) found\n",
 482                             __func__, val, val);
 483                         ecode = HAL_EESIZE;
 484                         goto bad;
 485                 }
 486                 HALDEBUG(ah, HAL_DEBUG_ANY,
 487                     "%s: EEPROM size = %d. Must be %d (16k).\n",
 488                     __func__, val, AR_PCICFG_EEPROM_SIZE_16K);
 489                 ecode = HAL_EESIZE;
 490                 goto bad;
 491         }
 492         ecode = ath_hal_legacyEepromAttach(ah);
 493         if (ecode != HAL_OK) {
 494                 goto bad;
 495         }
 496         ahp->ah_isHb63 = IS_2425(ah) && ath_hal_eepromGetFlag(ah, AR_EEP_ISTALON);
 497
 498         /*
 499          * If Bmode and AR5212, verify 2.4 analog exists
 500          */
 501         if (ath_hal_eepromGetFlag(ah, AR_EEP_BMODE) &&
 502             (AH_PRIVATE(ah)->ah_analog5GhzRev & 0xF0) == AR_RAD5111_SREV_MAJOR) {
 503                 /*
 504                  * Set correct Baseband to analog shift
 505                  * setting to access analog chips.
 506                  */
 507                 OS_REG_WRITE(ah, AR_PHY(0), 0x00004007);
 508                 OS_DELAY(2000);
 509                 AH_PRIVATE(ah)->ah_analog2GhzRev = ar5212GetRadioRev(ah);
 510
 511                 /* Set baseband for 5GHz chip */
 512                 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007);
 513                 OS_DELAY(2000);
 514                 if ((AH_PRIVATE(ah)->ah_analog2GhzRev & 0xF0) != AR_RAD2111_SREV_MAJOR) {
 515                         HALDEBUG(ah, HAL_DEBUG_ANY,
 516                             "%s: 2G Radio Chip Rev 0x%02X is not "
 517                             "supported by this driver\n", __func__,
 518                             AH_PRIVATE(ah)->ah_analog2GhzRev);
 519                         ecode = HAL_ENOTSUPP;
 520                         goto bad;
 521                 }
 522         }
 523
 524         ecode = ath_hal_eepromGet(ah, AR_EEP_REGDMN_0, &eeval);
 525         if (ecode != HAL_OK) {
 526                 HALDEBUG(ah, HAL_DEBUG_ANY,
 527                     "%s: cannot read regulatory domain from EEPROM\n",
 528                     __func__);
 529                 goto bad;
 530         }
 531         AH_PRIVATE(ah)->ah_currentRD = eeval;
 532         /* XXX record serial number */
 533
 534         /*
 535          * Got everything we need now to setup the capabilities.
 536          */
 537         if (!ar5212FillCapabilityInfo(ah)) {
 538                 HALDEBUG(ah, HAL_DEBUG_ANY,
 539                     "%s: failed ar5212FillCapabilityInfo\n", __func__);
 540                 ecode = HAL_EEREAD;
 541                 goto bad;
 542         }
 543
 544         if (!rf->attach(ah, &ecode)) {
 545                 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: RF setup failed, status %u\n",
 546                     __func__, ecode);
 547                 goto bad;
 548         }
 549         /*
 550          * Set noise floor adjust method; we arrange a
 551          * direct call instead of thunking.
 552          */
 553         AH_PRIVATE(ah)->ah_getNfAdjust = ahp->ah_rfHal->getNfAdjust;
 554
 555         /* Initialize gain ladder thermal calibration structure */
 556         ar5212InitializeGainValues(ah);
 557
 558         ecode = ath_hal_eepromGet(ah, AR_EEP_MACADDR, ahp->ah_macaddr);
 559         if (ecode != HAL_OK) {
 560                 HALDEBUG(ah, HAL_DEBUG_ANY,
 561                     "%s: error getting mac address from EEPROM\n", __func__);
 562                 goto bad;
 563         }
 564
 565         ar5212AniSetup(ah);
 566         /* Setup of Radar/AR structures happens in ath_hal_initchannels*/
 567         ar5212InitNfCalHistBuffer(ah);
 568
 569         /* XXX EAR stuff goes here */
 570
 571         HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: return\n", __func__);
 572
 573         return ah;
 574
 575 bad:
 576         if (ahp)
 577                 ar5212Detach((struct ath_hal *) ahp);
 578         if (status)
 579                 *status = ecode;
 580         return AH_NULL;
 581 #undef AH_EEPROM_PROTECT
 582 }
 583
 584 void
 585 ar5212Detach(struct ath_hal *ah)
 586 {
 587         HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s:\n", __func__);
 588
 589         HALASSERT(ah != AH_NULL);
 590         HALASSERT(ah->ah_magic == AR5212_MAGIC);
 591
 592         ar5212AniDetach(ah);
 593         ar5212RfDetach(ah);
 594         ar5212Disable(ah);
 595         ar5212SetPowerMode(ah, HAL_PM_FULL_SLEEP, AH_TRUE);
 596
 597         ath_hal_eepromDetach(ah);
 598         ath_hal_free(ah);
 599 }
 600
 601 HAL_BOOL
 602 ar5212ChipTest(struct ath_hal *ah)
 603 {
 604         uint32_t regAddr[2] = { AR_STA_ID0, AR_PHY_BASE+(8 << 2) };
 605         uint32_t regHold[2];
 606         uint32_t patternData[4] =
 607             { 0x55555555, 0xaaaaaaaa, 0x66666666, 0x99999999 };
 608         int i, j;
 609
 610         /* Test PHY & MAC registers */
 611         for (i = 0; i < 2; i++) {
 612                 uint32_t addr = regAddr[i];
 613                 uint32_t wrData, rdData;
 614
 615                 regHold[i] = OS_REG_READ(ah, addr);
 616                 for (j = 0; j < 0x100; j++) {
 617                         wrData = (j << 16) | j;
 618                         OS_REG_WRITE(ah, addr, wrData);
 619                         rdData = OS_REG_READ(ah, addr);
 620                         if (rdData != wrData) {
 621                                 HALDEBUG(ah, HAL_DEBUG_ANY,
 622 "%s: address test failed addr: 0x%08x - wr:0x%08x != rd:0x%08x\n",
 623                                 __func__, addr, wrData, rdData);
 624                                 return AH_FALSE;
 625                         }
 626                 }
 627                 for (j = 0; j < 4; j++) {
 628                         wrData = patternData[j];
 629                         OS_REG_WRITE(ah, addr, wrData);
 630                         rdData = OS_REG_READ(ah, addr);
 631                         if (wrData != rdData) {
 632                                 HALDEBUG(ah, HAL_DEBUG_ANY,
 633 "%s: address test failed addr: 0x%08x - wr:0x%08x != rd:0x%08x\n",
 634                                         __func__, addr, wrData, rdData);
 635                                 return AH_FALSE;
 636                         }
 637                 }
 638                 OS_REG_WRITE(ah, regAddr[i], regHold[i]);
 639         }
 640         OS_DELAY(100);
 641         return AH_TRUE;
 642 }
 643
 644 /*
 645  * Store the channel edges for the requested operational mode
 646  */
 647 HAL_BOOL
 648 ar5212GetChannelEdges(struct ath_hal *ah,
 649         uint16_t flags, uint16_t *low, uint16_t *high)
 650 {
 651         if (flags & IEEE80211_CHAN_5GHZ) {
 652                 *low = 4915;
 653                 *high = 6100;
 654                 return AH_TRUE;
 655         }
 656         if ((flags & IEEE80211_CHAN_2GHZ) &&
 657             (ath_hal_eepromGetFlag(ah, AR_EEP_BMODE) ||
 658              ath_hal_eepromGetFlag(ah, AR_EEP_GMODE))) {
 659                 *low = 2312;
 660                 *high = 2732;
 661                 return AH_TRUE;
 662         }
 663         return AH_FALSE;
 664 }
 665
 666 /*
 667  * Disable PLL when in L0s as well as receiver clock when in L1.
 668  * This power saving option must be enabled through the Serdes.
 669  *
 670  * Programming the Serdes must go through the same 288 bit serial shift
 671  * register as the other analog registers.  Hence the 9 writes.
 672  *
 673  * XXX Clean up the magic numbers.
 674  */
 675 static void
 676 ar5212ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_off)
 677 {
 678         OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fc00);
 679         OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x24924924);
 680
 681         /* RX shut off when elecidle is asserted */
 682         OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x28000039);
 683         OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x53160824);
 684         OS_REG_WRITE(ah, AR_PCIE_SERDES, 0xe5980579);
 685
 686         /* Shut off PLL and CLKREQ active in L1 */
 687         OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x001defff);
 688         OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x1aaabe40);
 689         OS_REG_WRITE(ah, AR_PCIE_SERDES, 0xbe105554);
 690         OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x000e3007);
 691
 692         /* Load the new settings */
 693         OS_REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);
 694 }
 695
 696 static void
 697 ar5212DisablePCIE(struct ath_hal *ah)
 698 {
 699         /* NB: fill in for 9100 */
 700 }
 701
 702 /*
 703  * Fill all software cached or static hardware state information.
 704  * Return failure if capabilities are to come from EEPROM and
 705  * cannot be read.
 706  */
 707 HAL_BOOL
 708 ar5212FillCapabilityInfo(struct ath_hal *ah)
 709 {
 710 #define AR_KEYTABLE_SIZE        128
 711 #define IS_GRIFFIN_LITE(ah) \
 712     (AH_PRIVATE(ah)->ah_macVersion == AR_SREV_VERSION_GRIFFIN && \
 713      AH_PRIVATE(ah)->ah_macRev == AR_SREV_GRIFFIN_LITE)
 714 #define IS_COBRA(ah) \
 715     (AH_PRIVATE(ah)->ah_macVersion == AR_SREV_VERSION_COBRA)
 716 #define IS_2112(ah) \
 717         ((AH_PRIVATE(ah)->ah_analog5GhzRev & 0xF0) == AR_RAD2112_SREV_MAJOR)
 718
 719         struct ath_hal_private *ahpriv = AH_PRIVATE(ah);
 720         HAL_CAPABILITIES *pCap = &ahpriv->ah_caps;
 721         uint16_t capField, val;
 722
 723         /* Read the capability EEPROM location */
 724         if (ath_hal_eepromGet(ah, AR_EEP_OPCAP, &capField) != HAL_OK) {
 725                 HALDEBUG(ah, HAL_DEBUG_ANY,
 726                     "%s: unable to read caps from eeprom\n", __func__);
 727                 return AH_FALSE;
 728         }
 729         if (IS_2112(ah))
 730                 ath_hal_eepromSet(ah, AR_EEP_AMODE, AH_FALSE);
 731         if (capField == 0 && IS_GRIFFIN_LITE(ah)) {
 732                 /*
 733                  * For griffin-lite cards with unprogrammed capabilities.
 734                  */
 735                 ath_hal_eepromSet(ah, AR_EEP_COMPRESS, AH_FALSE);
 736                 ath_hal_eepromSet(ah, AR_EEP_FASTFRAME, AH_FALSE);
 737                 ath_hal_eepromSet(ah, AR_EEP_TURBO5DISABLE, AH_TRUE);
 738                 ath_hal_eepromSet(ah, AR_EEP_TURBO2DISABLE, AH_TRUE);
 739                 HALDEBUG(ah, HAL_DEBUG_ATTACH,
 740                     "%s: override caps for griffin-lite, now 0x%x (+!turbo)\n",
 741                     __func__, capField);
 742         }
 743
 744         /* Modify reg domain on newer cards that need to work with older sw */
 745         if (ahpriv->ah_opmode != HAL_M_HOSTAP &&
 746             ahpriv->ah_subvendorid == AR_SUBVENDOR_ID_NEW_A) {
 747                 if (ahpriv->ah_currentRD == 0x64 ||
 748                     ahpriv->ah_currentRD == 0x65)
 749                         ahpriv->ah_currentRD += 5;
 750                 else if (ahpriv->ah_currentRD == 0x41)
 751                         ahpriv->ah_currentRD = 0x43;
 752                 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: regdomain mapped to 0x%x\n",
 753                     __func__, ahpriv->ah_currentRD);
 754         }
 755
 756         if (AH_PRIVATE(ah)->ah_macVersion == AR_SREV_2417 ||
 757             AH_PRIVATE(ah)->ah_macVersion == AR_SREV_2425) {
 758                 HALDEBUG(ah, HAL_DEBUG_ATTACH,
 759                     "%s: enable Bmode and disable turbo for Swan/Nala\n",
 760                     __func__);
 761                 ath_hal_eepromSet(ah, AR_EEP_BMODE, AH_TRUE);
 762                 ath_hal_eepromSet(ah, AR_EEP_COMPRESS, AH_FALSE);
 763                 ath_hal_eepromSet(ah, AR_EEP_FASTFRAME, AH_FALSE);
 764                 ath_hal_eepromSet(ah, AR_EEP_TURBO5DISABLE, AH_TRUE);
 765                 ath_hal_eepromSet(ah, AR_EEP_TURBO2DISABLE, AH_TRUE);
 766         }
 767
 768         /* Construct wireless mode from EEPROM */
 769         pCap->halWirelessModes = 0;
 770         if (ath_hal_eepromGetFlag(ah, AR_EEP_AMODE)) {
 771                 pCap->halWirelessModes |= HAL_MODE_11A;
 772                 if (!ath_hal_eepromGetFlag(ah, AR_EEP_TURBO5DISABLE))
 773                         pCap->halWirelessModes |= HAL_MODE_TURBO;
 774         }
 775         if (ath_hal_eepromGetFlag(ah, AR_EEP_BMODE))
 776                 pCap->halWirelessModes |= HAL_MODE_11B;
 777         if (ath_hal_eepromGetFlag(ah, AR_EEP_GMODE) &&
 778             ahpriv->ah_subvendorid != AR_SUBVENDOR_ID_NOG) {
 779                 pCap->halWirelessModes |= HAL_MODE_11G;
 780                 if (!ath_hal_eepromGetFlag(ah, AR_EEP_TURBO2DISABLE))
 781                         pCap->halWirelessModes |= HAL_MODE_108G;
 782         }
 783
 784         pCap->halLow2GhzChan = 2312;
 785         /* XXX 2417 too? */
 786         if (IS_RAD5112_ANY(ah) || IS_5413(ah) || IS_2425(ah) ||  IS_2417(ah))
 787                 pCap->halHigh2GhzChan = 2500;
 788         else
 789                 pCap->halHigh2GhzChan = 2732;
 790
 791         /*
 792          * For AR5111 version < 4, the lowest centre frequency supported is
 793          * 5130MHz.  For AR5111 version 4, the 4.9GHz channels are supported
 794          * but only in 10MHz increments.
 795          *
 796          * In addition, the programming method is wrong - it uses the IEEE
 797          * channel number to calculate the frequency, rather than the
 798          * channel centre.  Since half/quarter rates re-use some of the
 799          * 5GHz channel IEEE numbers, this will result in a badly programmed
 800          * synth.
 801          *
 802          * Until the relevant support is written, just limit lower frequency
 803          * support for AR5111 so things aren't incorrectly programmed.
 804          *
 805          * XXX It's also possible this code doesn't correctly limit the
 806          * centre frequencies of potential channels; this is very important
 807          * for half/quarter rate!
 808          */
 809         if (AH_RADIO_MAJOR(ah) == AR_RAD5111_SREV_MAJOR) {
 810                 pCap->halLow5GhzChan = 5120; /* XXX lowest centre = 5130MHz */
 811         } else {
 812                 pCap->halLow5GhzChan = 4915;
 813         }
 814         pCap->halHigh5GhzChan = 6100;
 815
 816         pCap->halCipherCkipSupport = AH_FALSE;
 817         pCap->halCipherTkipSupport = AH_TRUE;
 818         pCap->halCipherAesCcmSupport =
 819                 (ath_hal_eepromGetFlag(ah, AR_EEP_AES) &&
 820                  ((AH_PRIVATE(ah)->ah_macVersion > AR_SREV_VERSION_VENICE) ||
 821                   ((AH_PRIVATE(ah)->ah_macVersion == AR_SREV_VERSION_VENICE) &&
 822                    (AH_PRIVATE(ah)->ah_macRev >= AR_SREV_VERSION_OAHU))));
 823
 824         pCap->halMicCkipSupport    = AH_FALSE;
 825         pCap->halMicTkipSupport    = AH_TRUE;
 826         pCap->halMicAesCcmSupport  = ath_hal_eepromGetFlag(ah, AR_EEP_AES);
 827         /*
 828          * Starting with Griffin TX+RX mic keys can be combined
 829          * in one key cache slot.
 830          */
 831         if (AH_PRIVATE(ah)->ah_macVersion >= AR_SREV_VERSION_GRIFFIN)
 832                 pCap->halTkipMicTxRxKeySupport = AH_TRUE;
 833         else
 834                 pCap->halTkipMicTxRxKeySupport = AH_FALSE;
 835         pCap->halChanSpreadSupport = AH_TRUE;
 836         pCap->halSleepAfterBeaconBroken = AH_TRUE;
 837
 838         if (ahpriv->ah_macRev > 1 || IS_COBRA(ah)) {
 839                 pCap->halCompressSupport   =
 840                         ath_hal_eepromGetFlag(ah, AR_EEP_COMPRESS) &&
 841                         (pCap->halWirelessModes & (HAL_MODE_11A|HAL_MODE_11G)) != 0;
 842                 pCap->halBurstSupport = ath_hal_eepromGetFlag(ah, AR_EEP_BURST);
 843                 pCap->halFastFramesSupport =
 844                         ath_hal_eepromGetFlag(ah, AR_EEP_FASTFRAME) &&
 845                         (pCap->halWirelessModes & (HAL_MODE_11A|HAL_MODE_11G)) != 0;
 846                 pCap->halChapTuningSupport = AH_TRUE;
 847                 pCap->halTurboPrimeSupport = AH_TRUE;
 848         }
 849         pCap->halTurboGSupport = pCap->halWirelessModes & HAL_MODE_108G;
 850
 851         pCap->halPSPollBroken = AH_TRUE;        /* XXX fixed in later revs? */
 852         pCap->halNumMRRetries = 4;              /* Hardware supports 4 MRR */
 853         pCap->halNumTxMaps = 1;                 /* Single TX ptr per descr */
 854         pCap->halVEOLSupport = AH_TRUE;
 855         pCap->halBssIdMaskSupport = AH_TRUE;
 856         pCap->halMcastKeySrchSupport = AH_TRUE;
 857         if ((ahpriv->ah_macVersion == AR_SREV_VERSION_VENICE &&
 858              ahpriv->ah_macRev == 8) ||
 859             ahpriv->ah_macVersion > AR_SREV_VERSION_VENICE)
 860                 pCap->halTsfAddSupport = AH_TRUE;
 861
 862         if (ath_hal_eepromGet(ah, AR_EEP_MAXQCU, &val) == HAL_OK)
 863                 pCap->halTotalQueues = val;
 864         else
 865                 pCap->halTotalQueues = HAL_NUM_TX_QUEUES;
 866
 867         if (ath_hal_eepromGet(ah, AR_EEP_KCENTRIES, &val) == HAL_OK)
 868                 pCap->halKeyCacheSize = val;
 869         else
 870                 pCap->halKeyCacheSize = AR_KEYTABLE_SIZE;
 871
 872         pCap->halChanHalfRate = AH_TRUE;
 873         pCap->halChanQuarterRate = AH_TRUE;
 874
 875         /*
 876          * RSSI uses the combined field; some 11n NICs may use
 877          * the control chain RSSI.
 878          */
 879         pCap->halUseCombinedRadarRssi = AH_TRUE;
 880
 881         if (ath_hal_eepromGetFlag(ah, AR_EEP_RFKILL) &&
 882             ath_hal_eepromGet(ah, AR_EEP_RFSILENT, &ahpriv->ah_rfsilent) == HAL_OK) {
 883                 /* NB: enabled by default */
 884                 ahpriv->ah_rfkillEnabled = AH_TRUE;
 885                 pCap->halRfSilentSupport = AH_TRUE;
 886         }
 887
 888         /* NB: this is a guess, noone seems to know the answer */
 889         ahpriv->ah_rxornIsFatal =
 890             (AH_PRIVATE(ah)->ah_macVersion < AR_SREV_VERSION_VENICE);
 891
 892         /* enable features that first appeared in Hainan */
 893         if ((AH_PRIVATE(ah)->ah_macVersion == AR_SREV_VERSION_VENICE &&
 894              AH_PRIVATE(ah)->ah_macRev == AR_SREV_HAINAN) ||
 895             AH_PRIVATE(ah)->ah_macVersion > AR_SREV_VERSION_VENICE) {
 896                 /* h/w phy counters */
 897                 pCap->halHwPhyCounterSupport = AH_TRUE;
 898                 /* bssid match disable */
 899                 pCap->halBssidMatchSupport = AH_TRUE;
 900         }
 901
 902         pCap->halTstampPrecision = 15;
 903         pCap->halIntrMask = HAL_INT_COMMON
 904                         | HAL_INT_RX
 905                         | HAL_INT_TX
 906                         | HAL_INT_FATAL
 907                         | HAL_INT_BNR
 908                         | HAL_INT_BMISC
 909                         ;
 910         if (AH_PRIVATE(ah)->ah_macVersion < AR_SREV_VERSION_GRIFFIN)
 911                 pCap->halIntrMask &= ~HAL_INT_TBTT;
 912
 913         pCap->hal4kbSplitTransSupport = AH_TRUE;
 914         pCap->halHasRxSelfLinkedTail = AH_TRUE;
 915
 916         return AH_TRUE;
 917 #undef IS_COBRA
 918 #undef IS_GRIFFIN_LITE
 919 #undef AR_KEYTABLE_SIZE
 920 }
 921
 922 static const char*
 923 ar5212Probe(uint16_t vendorid, uint16_t devid)
 924 {
 925         if (vendorid == ATHEROS_VENDOR_ID ||
 926             vendorid == ATHEROS_3COM_VENDOR_ID ||
 927             vendorid == ATHEROS_3COM2_VENDOR_ID) {
 928                 switch (devid) {
 929                 case AR5212_FPGA:
 930                         return "Atheros 5212 (FPGA)";
 931                 case AR5212_DEVID:
 932                 case AR5212_DEVID_IBM:
 933                 case AR5212_DEFAULT:
 934                         return "Atheros 5212";
 935                 case AR5212_AR2413:
 936                         return "Atheros 2413";
 937                 case AR5212_AR2417:
 938                         return "Atheros 2417";
 939                 case AR5212_AR5413:
 940                         return "Atheros 5413";
 941                 case AR5212_AR5424:
 942                         return "Atheros 5424/2424";
 943                 }
 944         }
 945         return AH_NULL;
 946 }
 947 AH_CHIP(AR5212, ar5212Probe, ar5212Attach);